1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0+ */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * pv88080-regulator.h - Regulator definitions for PV88080 4*4882a593Smuzhiyun * Copyright (C) 2016 Powerventure Semiconductor Ltd. 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef __PV88080_REGISTERS_H__ 8*4882a593Smuzhiyun #define __PV88080_REGISTERS_H__ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun /* System Control and Event Registers */ 11*4882a593Smuzhiyun #define PV88080_REG_EVENT_A 0x04 12*4882a593Smuzhiyun #define PV88080_REG_MASK_A 0x09 13*4882a593Smuzhiyun #define PV88080_REG_MASK_B 0x0A 14*4882a593Smuzhiyun #define PV88080_REG_MASK_C 0x0B 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun /* Regulator Registers - rev. AA */ 17*4882a593Smuzhiyun #define PV88080AA_REG_HVBUCK_CONF1 0x2D 18*4882a593Smuzhiyun #define PV88080AA_REG_HVBUCK_CONF2 0x2E 19*4882a593Smuzhiyun #define PV88080AA_REG_BUCK1_CONF0 0x27 20*4882a593Smuzhiyun #define PV88080AA_REG_BUCK1_CONF1 0x28 21*4882a593Smuzhiyun #define PV88080AA_REG_BUCK1_CONF2 0x59 22*4882a593Smuzhiyun #define PV88080AA_REG_BUCK1_CONF5 0x5C 23*4882a593Smuzhiyun #define PV88080AA_REG_BUCK2_CONF0 0x29 24*4882a593Smuzhiyun #define PV88080AA_REG_BUCK2_CONF1 0x2A 25*4882a593Smuzhiyun #define PV88080AA_REG_BUCK2_CONF2 0x61 26*4882a593Smuzhiyun #define PV88080AA_REG_BUCK2_CONF5 0x64 27*4882a593Smuzhiyun #define PV88080AA_REG_BUCK3_CONF0 0x2B 28*4882a593Smuzhiyun #define PV88080AA_REG_BUCK3_CONF1 0x2C 29*4882a593Smuzhiyun #define PV88080AA_REG_BUCK3_CONF2 0x69 30*4882a593Smuzhiyun #define PV88080AA_REG_BUCK3_CONF5 0x6C 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun /* Regulator Registers - rev. BA */ 33*4882a593Smuzhiyun #define PV88080BA_REG_HVBUCK_CONF1 0x33 34*4882a593Smuzhiyun #define PV88080BA_REG_HVBUCK_CONF2 0x34 35*4882a593Smuzhiyun #define PV88080BA_REG_BUCK1_CONF0 0x2A 36*4882a593Smuzhiyun #define PV88080BA_REG_BUCK1_CONF1 0x2C 37*4882a593Smuzhiyun #define PV88080BA_REG_BUCK1_CONF2 0x5A 38*4882a593Smuzhiyun #define PV88080BA_REG_BUCK1_CONF5 0x5D 39*4882a593Smuzhiyun #define PV88080BA_REG_BUCK2_CONF0 0x2D 40*4882a593Smuzhiyun #define PV88080BA_REG_BUCK2_CONF1 0x2F 41*4882a593Smuzhiyun #define PV88080BA_REG_BUCK2_CONF2 0x63 42*4882a593Smuzhiyun #define PV88080BA_REG_BUCK2_CONF5 0x66 43*4882a593Smuzhiyun #define PV88080BA_REG_BUCK3_CONF0 0x30 44*4882a593Smuzhiyun #define PV88080BA_REG_BUCK3_CONF1 0x32 45*4882a593Smuzhiyun #define PV88080BA_REG_BUCK3_CONF2 0x6C 46*4882a593Smuzhiyun #define PV88080BA_REG_BUCK3_CONF5 0x6F 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun /* PV88080_REG_EVENT_A (addr=0x04) */ 49*4882a593Smuzhiyun #define PV88080_E_VDD_FLT 0x01 50*4882a593Smuzhiyun #define PV88080_E_OVER_TEMP 0x02 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun /* PV88080_REG_MASK_A (addr=0x09) */ 53*4882a593Smuzhiyun #define PV88080_M_VDD_FLT 0x01 54*4882a593Smuzhiyun #define PV88080_M_OVER_TEMP 0x02 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun /* PV88080_REG_BUCK1_CONF0 (addr=0x27|0x2A) */ 57*4882a593Smuzhiyun #define PV88080_BUCK1_EN 0x80 58*4882a593Smuzhiyun #define PV88080_VBUCK1_MASK 0x7F 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun /* PV88080_REG_BUCK2_CONF0 (addr=0x29|0x2D) */ 61*4882a593Smuzhiyun #define PV88080_BUCK2_EN 0x80 62*4882a593Smuzhiyun #define PV88080_VBUCK2_MASK 0x7F 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun /* PV88080_REG_BUCK3_CONF0 (addr=0x2B|0x30) */ 65*4882a593Smuzhiyun #define PV88080_BUCK3_EN 0x80 66*4882a593Smuzhiyun #define PV88080_VBUCK3_MASK 0x7F 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun /* PV88080_REG_BUCK1_CONF1 (addr=0x28|0x2C) */ 69*4882a593Smuzhiyun #define PV88080_BUCK1_ILIM_SHIFT 2 70*4882a593Smuzhiyun #define PV88080_BUCK1_ILIM_MASK 0x0C 71*4882a593Smuzhiyun #define PV88080_BUCK1_MODE_MASK 0x03 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun /* PV88080_REG_BUCK2_CONF1 (addr=0x2A|0x2F) */ 74*4882a593Smuzhiyun #define PV88080_BUCK2_ILIM_SHIFT 2 75*4882a593Smuzhiyun #define PV88080_BUCK2_ILIM_MASK 0x0C 76*4882a593Smuzhiyun #define PV88080_BUCK2_MODE_MASK 0x03 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun /* PV88080_REG_BUCK3_CONF1 (addr=0x2C|0x32) */ 79*4882a593Smuzhiyun #define PV88080_BUCK3_ILIM_SHIFT 2 80*4882a593Smuzhiyun #define PV88080_BUCK3_ILIM_MASK 0x0C 81*4882a593Smuzhiyun #define PV88080_BUCK3_MODE_MASK 0x03 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun #define PV88080_BUCK_MODE_SLEEP 0x00 84*4882a593Smuzhiyun #define PV88080_BUCK_MODE_AUTO 0x01 85*4882a593Smuzhiyun #define PV88080_BUCK_MODE_SYNC 0x02 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun /* PV88080_REG_HVBUCK_CONF1 (addr=0x2D|0x33) */ 88*4882a593Smuzhiyun #define PV88080_VHVBUCK_MASK 0xFF 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun /* PV88080_REG_HVBUCK_CONF1 (addr=0x2E|0x34) */ 91*4882a593Smuzhiyun #define PV88080_HVBUCK_EN 0x01 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun /* PV88080_REG_BUCK2_CONF2 (addr=0x61|0x63) */ 94*4882a593Smuzhiyun /* PV88080_REG_BUCK3_CONF2 (addr=0x69|0x6C) */ 95*4882a593Smuzhiyun #define PV88080_BUCK_VDAC_RANGE_SHIFT 7 96*4882a593Smuzhiyun #define PV88080_BUCK_VDAC_RANGE_MASK 0x01 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun #define PV88080_BUCK_VDAC_RANGE_1 0x00 99*4882a593Smuzhiyun #define PV88080_BUCK_VDAC_RANGE_2 0x01 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun /* PV88080_REG_BUCK2_CONF5 (addr=0x64|0x66) */ 102*4882a593Smuzhiyun /* PV88080_REG_BUCK3_CONF5 (addr=0x6C|0x6F) */ 103*4882a593Smuzhiyun #define PV88080_BUCK_VRANGE_GAIN_SHIFT 0 104*4882a593Smuzhiyun #define PV88080_BUCK_VRANGE_GAIN_MASK 0x01 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun #define PV88080_BUCK_VRANGE_GAIN_1 0x00 107*4882a593Smuzhiyun #define PV88080_BUCK_VRANGE_GAIN_2 0x01 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun #endif /* __PV88080_REGISTERS_H__ */ 110