xref: /OK3568_Linux_fs/kernel/drivers/regulator/pv88060-regulator.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // pv88060-regulator.c - Regulator device driver for PV88060
4*4882a593Smuzhiyun // Copyright (C) 2015  Powerventure Semiconductor Ltd.
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun #include <linux/err.h>
7*4882a593Smuzhiyun #include <linux/i2c.h>
8*4882a593Smuzhiyun #include <linux/module.h>
9*4882a593Smuzhiyun #include <linux/init.h>
10*4882a593Smuzhiyun #include <linux/slab.h>
11*4882a593Smuzhiyun #include <linux/regulator/driver.h>
12*4882a593Smuzhiyun #include <linux/regulator/machine.h>
13*4882a593Smuzhiyun #include <linux/regmap.h>
14*4882a593Smuzhiyun #include <linux/irq.h>
15*4882a593Smuzhiyun #include <linux/interrupt.h>
16*4882a593Smuzhiyun #include <linux/regulator/of_regulator.h>
17*4882a593Smuzhiyun #include "pv88060-regulator.h"
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #define PV88060_MAX_REGULATORS	14
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun /* PV88060 REGULATOR IDs */
22*4882a593Smuzhiyun enum {
23*4882a593Smuzhiyun 	/* BUCKs */
24*4882a593Smuzhiyun 	PV88060_ID_BUCK1,
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun 	/* LDOs */
27*4882a593Smuzhiyun 	PV88060_ID_LDO1,
28*4882a593Smuzhiyun 	PV88060_ID_LDO2,
29*4882a593Smuzhiyun 	PV88060_ID_LDO3,
30*4882a593Smuzhiyun 	PV88060_ID_LDO4,
31*4882a593Smuzhiyun 	PV88060_ID_LDO5,
32*4882a593Smuzhiyun 	PV88060_ID_LDO6,
33*4882a593Smuzhiyun 	PV88060_ID_LDO7,
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun 	/* SWTs */
36*4882a593Smuzhiyun 	PV88060_ID_SW1,
37*4882a593Smuzhiyun 	PV88060_ID_SW2,
38*4882a593Smuzhiyun 	PV88060_ID_SW3,
39*4882a593Smuzhiyun 	PV88060_ID_SW4,
40*4882a593Smuzhiyun 	PV88060_ID_SW5,
41*4882a593Smuzhiyun 	PV88060_ID_SW6,
42*4882a593Smuzhiyun };
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun struct pv88060_regulator {
45*4882a593Smuzhiyun 	struct regulator_desc desc;
46*4882a593Smuzhiyun 	unsigned int conf;		/* buck configuration register */
47*4882a593Smuzhiyun };
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun struct pv88060 {
50*4882a593Smuzhiyun 	struct device *dev;
51*4882a593Smuzhiyun 	struct regmap *regmap;
52*4882a593Smuzhiyun 	struct regulator_dev *rdev[PV88060_MAX_REGULATORS];
53*4882a593Smuzhiyun };
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun static const struct regmap_config pv88060_regmap_config = {
56*4882a593Smuzhiyun 	.reg_bits = 8,
57*4882a593Smuzhiyun 	.val_bits = 8,
58*4882a593Smuzhiyun };
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun /* Current limits array (in uA) for BUCK1
61*4882a593Smuzhiyun  * Entry indexes corresponds to register values.
62*4882a593Smuzhiyun  */
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun static const unsigned int pv88060_buck1_limits[] = {
65*4882a593Smuzhiyun 	1496000, 2393000, 3291000, 4189000
66*4882a593Smuzhiyun };
67*4882a593Smuzhiyun 
pv88060_buck_get_mode(struct regulator_dev * rdev)68*4882a593Smuzhiyun static unsigned int pv88060_buck_get_mode(struct regulator_dev *rdev)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun 	struct pv88060_regulator *info = rdev_get_drvdata(rdev);
71*4882a593Smuzhiyun 	unsigned int data;
72*4882a593Smuzhiyun 	int ret, mode = 0;
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	ret = regmap_read(rdev->regmap, info->conf, &data);
75*4882a593Smuzhiyun 	if (ret < 0)
76*4882a593Smuzhiyun 		return ret;
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun 	switch (data & PV88060_BUCK_MODE_MASK) {
79*4882a593Smuzhiyun 	case PV88060_BUCK_MODE_SYNC:
80*4882a593Smuzhiyun 		mode = REGULATOR_MODE_FAST;
81*4882a593Smuzhiyun 		break;
82*4882a593Smuzhiyun 	case PV88060_BUCK_MODE_AUTO:
83*4882a593Smuzhiyun 		mode = REGULATOR_MODE_NORMAL;
84*4882a593Smuzhiyun 		break;
85*4882a593Smuzhiyun 	case PV88060_BUCK_MODE_SLEEP:
86*4882a593Smuzhiyun 		mode = REGULATOR_MODE_STANDBY;
87*4882a593Smuzhiyun 		break;
88*4882a593Smuzhiyun 	}
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun 	return mode;
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun 
pv88060_buck_set_mode(struct regulator_dev * rdev,unsigned int mode)93*4882a593Smuzhiyun static int pv88060_buck_set_mode(struct regulator_dev *rdev,
94*4882a593Smuzhiyun 					unsigned int mode)
95*4882a593Smuzhiyun {
96*4882a593Smuzhiyun 	struct pv88060_regulator *info = rdev_get_drvdata(rdev);
97*4882a593Smuzhiyun 	int val = 0;
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun 	switch (mode) {
100*4882a593Smuzhiyun 	case REGULATOR_MODE_FAST:
101*4882a593Smuzhiyun 		val = PV88060_BUCK_MODE_SYNC;
102*4882a593Smuzhiyun 		break;
103*4882a593Smuzhiyun 	case REGULATOR_MODE_NORMAL:
104*4882a593Smuzhiyun 		val = PV88060_BUCK_MODE_AUTO;
105*4882a593Smuzhiyun 		break;
106*4882a593Smuzhiyun 	case REGULATOR_MODE_STANDBY:
107*4882a593Smuzhiyun 		val = PV88060_BUCK_MODE_SLEEP;
108*4882a593Smuzhiyun 		break;
109*4882a593Smuzhiyun 	default:
110*4882a593Smuzhiyun 		return -EINVAL;
111*4882a593Smuzhiyun 	}
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 	return regmap_update_bits(rdev->regmap, info->conf,
114*4882a593Smuzhiyun 					PV88060_BUCK_MODE_MASK, val);
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun static const struct regulator_ops pv88060_buck_ops = {
118*4882a593Smuzhiyun 	.get_mode = pv88060_buck_get_mode,
119*4882a593Smuzhiyun 	.set_mode = pv88060_buck_set_mode,
120*4882a593Smuzhiyun 	.enable = regulator_enable_regmap,
121*4882a593Smuzhiyun 	.disable = regulator_disable_regmap,
122*4882a593Smuzhiyun 	.is_enabled = regulator_is_enabled_regmap,
123*4882a593Smuzhiyun 	.set_voltage_sel = regulator_set_voltage_sel_regmap,
124*4882a593Smuzhiyun 	.get_voltage_sel = regulator_get_voltage_sel_regmap,
125*4882a593Smuzhiyun 	.list_voltage = regulator_list_voltage_linear,
126*4882a593Smuzhiyun 	.set_current_limit = regulator_set_current_limit_regmap,
127*4882a593Smuzhiyun 	.get_current_limit = regulator_get_current_limit_regmap,
128*4882a593Smuzhiyun };
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun static const struct regulator_ops pv88060_ldo_ops = {
131*4882a593Smuzhiyun 	.enable = regulator_enable_regmap,
132*4882a593Smuzhiyun 	.disable = regulator_disable_regmap,
133*4882a593Smuzhiyun 	.is_enabled = regulator_is_enabled_regmap,
134*4882a593Smuzhiyun 	.set_voltage_sel = regulator_set_voltage_sel_regmap,
135*4882a593Smuzhiyun 	.get_voltage_sel = regulator_get_voltage_sel_regmap,
136*4882a593Smuzhiyun 	.list_voltage = regulator_list_voltage_linear,
137*4882a593Smuzhiyun };
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun static const struct regulator_ops pv88060_sw_ops = {
140*4882a593Smuzhiyun 	.enable = regulator_enable_regmap,
141*4882a593Smuzhiyun 	.disable = regulator_disable_regmap,
142*4882a593Smuzhiyun 	.is_enabled = regulator_is_enabled_regmap,
143*4882a593Smuzhiyun };
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun #define PV88060_BUCK(chip, regl_name, min, step, max, limits_array) \
146*4882a593Smuzhiyun {\
147*4882a593Smuzhiyun 	.desc	=	{\
148*4882a593Smuzhiyun 		.id = chip##_ID_##regl_name,\
149*4882a593Smuzhiyun 		.name = __stringify(chip##_##regl_name),\
150*4882a593Smuzhiyun 		.of_match = of_match_ptr(#regl_name),\
151*4882a593Smuzhiyun 		.regulators_node = of_match_ptr("regulators"),\
152*4882a593Smuzhiyun 		.type = REGULATOR_VOLTAGE,\
153*4882a593Smuzhiyun 		.owner = THIS_MODULE,\
154*4882a593Smuzhiyun 		.ops = &pv88060_buck_ops,\
155*4882a593Smuzhiyun 		.min_uV = min,\
156*4882a593Smuzhiyun 		.uV_step = step,\
157*4882a593Smuzhiyun 		.n_voltages = ((max) - (min))/(step) + 1,\
158*4882a593Smuzhiyun 		.enable_reg = PV88060_REG_##regl_name##_CONF0,\
159*4882a593Smuzhiyun 		.enable_mask = PV88060_BUCK_EN, \
160*4882a593Smuzhiyun 		.vsel_reg = PV88060_REG_##regl_name##_CONF0,\
161*4882a593Smuzhiyun 		.vsel_mask = PV88060_VBUCK_MASK,\
162*4882a593Smuzhiyun 		.curr_table = limits_array,\
163*4882a593Smuzhiyun 		.n_current_limits = ARRAY_SIZE(limits_array),\
164*4882a593Smuzhiyun 		.csel_reg = PV88060_REG_##regl_name##_CONF1,\
165*4882a593Smuzhiyun 		.csel_mask = PV88060_BUCK_ILIM_MASK,\
166*4882a593Smuzhiyun 	},\
167*4882a593Smuzhiyun 	.conf = PV88060_REG_##regl_name##_CONF1,\
168*4882a593Smuzhiyun }
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun #define PV88060_LDO(chip, regl_name, min, step, max) \
171*4882a593Smuzhiyun {\
172*4882a593Smuzhiyun 	.desc	=	{\
173*4882a593Smuzhiyun 		.id = chip##_ID_##regl_name,\
174*4882a593Smuzhiyun 		.name = __stringify(chip##_##regl_name),\
175*4882a593Smuzhiyun 		.of_match = of_match_ptr(#regl_name),\
176*4882a593Smuzhiyun 		.regulators_node = of_match_ptr("regulators"),\
177*4882a593Smuzhiyun 		.type = REGULATOR_VOLTAGE,\
178*4882a593Smuzhiyun 		.owner = THIS_MODULE,\
179*4882a593Smuzhiyun 		.ops = &pv88060_ldo_ops,\
180*4882a593Smuzhiyun 		.min_uV = min, \
181*4882a593Smuzhiyun 		.uV_step = step, \
182*4882a593Smuzhiyun 		.n_voltages = (step) ? ((max - min) / step + 1) : 1, \
183*4882a593Smuzhiyun 		.enable_reg = PV88060_REG_##regl_name##_CONF, \
184*4882a593Smuzhiyun 		.enable_mask = PV88060_LDO_EN, \
185*4882a593Smuzhiyun 		.vsel_reg = PV88060_REG_##regl_name##_CONF, \
186*4882a593Smuzhiyun 		.vsel_mask = PV88060_VLDO_MASK, \
187*4882a593Smuzhiyun 	},\
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun #define PV88060_SW(chip, regl_name, max) \
191*4882a593Smuzhiyun {\
192*4882a593Smuzhiyun 	.desc	=	{\
193*4882a593Smuzhiyun 		.id = chip##_ID_##regl_name,\
194*4882a593Smuzhiyun 		.name = __stringify(chip##_##regl_name),\
195*4882a593Smuzhiyun 		.of_match = of_match_ptr(#regl_name),\
196*4882a593Smuzhiyun 		.regulators_node = of_match_ptr("regulators"),\
197*4882a593Smuzhiyun 		.type = REGULATOR_VOLTAGE,\
198*4882a593Smuzhiyun 		.owner = THIS_MODULE,\
199*4882a593Smuzhiyun 		.ops = &pv88060_sw_ops,\
200*4882a593Smuzhiyun 		.fixed_uV = max,\
201*4882a593Smuzhiyun 		.n_voltages = 1,\
202*4882a593Smuzhiyun 		.enable_reg = PV88060_REG_##regl_name##_CONF,\
203*4882a593Smuzhiyun 		.enable_mask = PV88060_SW_EN,\
204*4882a593Smuzhiyun 	},\
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun static const struct pv88060_regulator pv88060_regulator_info[] = {
208*4882a593Smuzhiyun 	PV88060_BUCK(PV88060, BUCK1, 2800000, 12500, 4387500,
209*4882a593Smuzhiyun 		pv88060_buck1_limits),
210*4882a593Smuzhiyun 	PV88060_LDO(PV88060, LDO1, 1200000, 50000, 3350000),
211*4882a593Smuzhiyun 	PV88060_LDO(PV88060, LDO2, 1200000, 50000, 3350000),
212*4882a593Smuzhiyun 	PV88060_LDO(PV88060, LDO3, 1200000, 50000, 3350000),
213*4882a593Smuzhiyun 	PV88060_LDO(PV88060, LDO4, 1200000, 50000, 3350000),
214*4882a593Smuzhiyun 	PV88060_LDO(PV88060, LDO5, 1200000, 50000, 3350000),
215*4882a593Smuzhiyun 	PV88060_LDO(PV88060, LDO6, 1200000, 50000, 3350000),
216*4882a593Smuzhiyun 	PV88060_LDO(PV88060, LDO7, 1200000, 50000, 3350000),
217*4882a593Smuzhiyun 	PV88060_SW(PV88060, SW1, 5000000),
218*4882a593Smuzhiyun 	PV88060_SW(PV88060, SW2, 5000000),
219*4882a593Smuzhiyun 	PV88060_SW(PV88060, SW3, 5000000),
220*4882a593Smuzhiyun 	PV88060_SW(PV88060, SW4, 5000000),
221*4882a593Smuzhiyun 	PV88060_SW(PV88060, SW5, 5000000),
222*4882a593Smuzhiyun 	PV88060_SW(PV88060, SW6, 5000000),
223*4882a593Smuzhiyun };
224*4882a593Smuzhiyun 
pv88060_irq_handler(int irq,void * data)225*4882a593Smuzhiyun static irqreturn_t pv88060_irq_handler(int irq, void *data)
226*4882a593Smuzhiyun {
227*4882a593Smuzhiyun 	struct pv88060 *chip = data;
228*4882a593Smuzhiyun 	int i, reg_val, err, ret = IRQ_NONE;
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 	err = regmap_read(chip->regmap, PV88060_REG_EVENT_A, &reg_val);
231*4882a593Smuzhiyun 	if (err < 0)
232*4882a593Smuzhiyun 		goto error_i2c;
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun 	if (reg_val & PV88060_E_VDD_FLT) {
235*4882a593Smuzhiyun 		for (i = 0; i < PV88060_MAX_REGULATORS; i++) {
236*4882a593Smuzhiyun 			if (chip->rdev[i] != NULL)
237*4882a593Smuzhiyun 				regulator_notifier_call_chain(chip->rdev[i],
238*4882a593Smuzhiyun 					REGULATOR_EVENT_UNDER_VOLTAGE,
239*4882a593Smuzhiyun 					NULL);
240*4882a593Smuzhiyun 		}
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun 		err = regmap_write(chip->regmap, PV88060_REG_EVENT_A,
243*4882a593Smuzhiyun 			PV88060_E_VDD_FLT);
244*4882a593Smuzhiyun 		if (err < 0)
245*4882a593Smuzhiyun 			goto error_i2c;
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 		ret = IRQ_HANDLED;
248*4882a593Smuzhiyun 	}
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun 	if (reg_val & PV88060_E_OVER_TEMP) {
251*4882a593Smuzhiyun 		for (i = 0; i < PV88060_MAX_REGULATORS; i++) {
252*4882a593Smuzhiyun 			if (chip->rdev[i] != NULL)
253*4882a593Smuzhiyun 				regulator_notifier_call_chain(chip->rdev[i],
254*4882a593Smuzhiyun 					REGULATOR_EVENT_OVER_TEMP,
255*4882a593Smuzhiyun 					NULL);
256*4882a593Smuzhiyun 		}
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun 		err = regmap_write(chip->regmap, PV88060_REG_EVENT_A,
259*4882a593Smuzhiyun 			PV88060_E_OVER_TEMP);
260*4882a593Smuzhiyun 		if (err < 0)
261*4882a593Smuzhiyun 			goto error_i2c;
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun 		ret = IRQ_HANDLED;
264*4882a593Smuzhiyun 	}
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun 	return ret;
267*4882a593Smuzhiyun 
268*4882a593Smuzhiyun error_i2c:
269*4882a593Smuzhiyun 	dev_err(chip->dev, "I2C error : %d\n", err);
270*4882a593Smuzhiyun 	return IRQ_NONE;
271*4882a593Smuzhiyun }
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun /*
274*4882a593Smuzhiyun  * I2C driver interface functions
275*4882a593Smuzhiyun  */
pv88060_i2c_probe(struct i2c_client * i2c)276*4882a593Smuzhiyun static int pv88060_i2c_probe(struct i2c_client *i2c)
277*4882a593Smuzhiyun {
278*4882a593Smuzhiyun 	struct regulator_init_data *init_data = dev_get_platdata(&i2c->dev);
279*4882a593Smuzhiyun 	struct pv88060 *chip;
280*4882a593Smuzhiyun 	struct regulator_config config = { };
281*4882a593Smuzhiyun 	int error, i, ret = 0;
282*4882a593Smuzhiyun 
283*4882a593Smuzhiyun 	chip = devm_kzalloc(&i2c->dev, sizeof(struct pv88060), GFP_KERNEL);
284*4882a593Smuzhiyun 	if (!chip)
285*4882a593Smuzhiyun 		return -ENOMEM;
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun 	chip->dev = &i2c->dev;
288*4882a593Smuzhiyun 	chip->regmap = devm_regmap_init_i2c(i2c, &pv88060_regmap_config);
289*4882a593Smuzhiyun 	if (IS_ERR(chip->regmap)) {
290*4882a593Smuzhiyun 		error = PTR_ERR(chip->regmap);
291*4882a593Smuzhiyun 		dev_err(chip->dev, "Failed to allocate register map: %d\n",
292*4882a593Smuzhiyun 			error);
293*4882a593Smuzhiyun 		return error;
294*4882a593Smuzhiyun 	}
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun 	i2c_set_clientdata(i2c, chip);
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun 	if (i2c->irq != 0) {
299*4882a593Smuzhiyun 		ret = regmap_write(chip->regmap, PV88060_REG_MASK_A, 0xFF);
300*4882a593Smuzhiyun 		if (ret < 0) {
301*4882a593Smuzhiyun 			dev_err(chip->dev,
302*4882a593Smuzhiyun 				"Failed to mask A reg: %d\n", ret);
303*4882a593Smuzhiyun 			return ret;
304*4882a593Smuzhiyun 		}
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun 		ret = regmap_write(chip->regmap, PV88060_REG_MASK_B, 0xFF);
307*4882a593Smuzhiyun 		if (ret < 0) {
308*4882a593Smuzhiyun 			dev_err(chip->dev,
309*4882a593Smuzhiyun 				"Failed to mask B reg: %d\n", ret);
310*4882a593Smuzhiyun 			return ret;
311*4882a593Smuzhiyun 		}
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 		ret = regmap_write(chip->regmap, PV88060_REG_MASK_C, 0xFF);
314*4882a593Smuzhiyun 		if (ret < 0) {
315*4882a593Smuzhiyun 			dev_err(chip->dev,
316*4882a593Smuzhiyun 				"Failed to mask C reg: %d\n", ret);
317*4882a593Smuzhiyun 			return ret;
318*4882a593Smuzhiyun 		}
319*4882a593Smuzhiyun 
320*4882a593Smuzhiyun 		ret = devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL,
321*4882a593Smuzhiyun 					pv88060_irq_handler,
322*4882a593Smuzhiyun 					IRQF_TRIGGER_LOW|IRQF_ONESHOT,
323*4882a593Smuzhiyun 					"pv88060", chip);
324*4882a593Smuzhiyun 		if (ret != 0) {
325*4882a593Smuzhiyun 			dev_err(chip->dev, "Failed to request IRQ: %d\n",
326*4882a593Smuzhiyun 				i2c->irq);
327*4882a593Smuzhiyun 			return ret;
328*4882a593Smuzhiyun 		}
329*4882a593Smuzhiyun 
330*4882a593Smuzhiyun 		ret = regmap_update_bits(chip->regmap, PV88060_REG_MASK_A,
331*4882a593Smuzhiyun 			PV88060_M_VDD_FLT | PV88060_M_OVER_TEMP, 0);
332*4882a593Smuzhiyun 		if (ret < 0) {
333*4882a593Smuzhiyun 			dev_err(chip->dev,
334*4882a593Smuzhiyun 				"Failed to update mask reg: %d\n", ret);
335*4882a593Smuzhiyun 			return ret;
336*4882a593Smuzhiyun 		}
337*4882a593Smuzhiyun 
338*4882a593Smuzhiyun 	} else {
339*4882a593Smuzhiyun 		dev_warn(chip->dev, "No IRQ configured\n");
340*4882a593Smuzhiyun 	}
341*4882a593Smuzhiyun 
342*4882a593Smuzhiyun 	config.dev = chip->dev;
343*4882a593Smuzhiyun 	config.regmap = chip->regmap;
344*4882a593Smuzhiyun 
345*4882a593Smuzhiyun 	for (i = 0; i < PV88060_MAX_REGULATORS; i++) {
346*4882a593Smuzhiyun 		if (init_data)
347*4882a593Smuzhiyun 			config.init_data = &init_data[i];
348*4882a593Smuzhiyun 
349*4882a593Smuzhiyun 		config.driver_data = (void *)&pv88060_regulator_info[i];
350*4882a593Smuzhiyun 		chip->rdev[i] = devm_regulator_register(chip->dev,
351*4882a593Smuzhiyun 			&pv88060_regulator_info[i].desc, &config);
352*4882a593Smuzhiyun 		if (IS_ERR(chip->rdev[i])) {
353*4882a593Smuzhiyun 			dev_err(chip->dev,
354*4882a593Smuzhiyun 				"Failed to register PV88060 regulator\n");
355*4882a593Smuzhiyun 			return PTR_ERR(chip->rdev[i]);
356*4882a593Smuzhiyun 		}
357*4882a593Smuzhiyun 	}
358*4882a593Smuzhiyun 
359*4882a593Smuzhiyun 	return 0;
360*4882a593Smuzhiyun }
361*4882a593Smuzhiyun 
362*4882a593Smuzhiyun static const struct i2c_device_id pv88060_i2c_id[] = {
363*4882a593Smuzhiyun 	{"pv88060", 0},
364*4882a593Smuzhiyun 	{},
365*4882a593Smuzhiyun };
366*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, pv88060_i2c_id);
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun #ifdef CONFIG_OF
369*4882a593Smuzhiyun static const struct of_device_id pv88060_dt_ids[] = {
370*4882a593Smuzhiyun 	{ .compatible = "pvs,pv88060", .data = &pv88060_i2c_id[0] },
371*4882a593Smuzhiyun 	{},
372*4882a593Smuzhiyun };
373*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, pv88060_dt_ids);
374*4882a593Smuzhiyun #endif
375*4882a593Smuzhiyun 
376*4882a593Smuzhiyun static struct i2c_driver pv88060_regulator_driver = {
377*4882a593Smuzhiyun 	.driver = {
378*4882a593Smuzhiyun 		.name = "pv88060",
379*4882a593Smuzhiyun 		.of_match_table = of_match_ptr(pv88060_dt_ids),
380*4882a593Smuzhiyun 	},
381*4882a593Smuzhiyun 	.probe_new = pv88060_i2c_probe,
382*4882a593Smuzhiyun 	.id_table = pv88060_i2c_id,
383*4882a593Smuzhiyun };
384*4882a593Smuzhiyun 
385*4882a593Smuzhiyun module_i2c_driver(pv88060_regulator_driver);
386*4882a593Smuzhiyun 
387*4882a593Smuzhiyun MODULE_AUTHOR("James Ban <James.Ban.opensource@diasemi.com>");
388*4882a593Smuzhiyun MODULE_DESCRIPTION("Regulator device driver for Powerventure PV88060");
389*4882a593Smuzhiyun MODULE_LICENSE("GPL");
390