1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // mpq7920.c - regulator driver for mps mpq7920
4*4882a593Smuzhiyun //
5*4882a593Smuzhiyun // Copyright 2019 Monolithic Power Systems, Inc
6*4882a593Smuzhiyun //
7*4882a593Smuzhiyun // Author: Saravanan Sekar <sravanhome@gmail.com>
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/kernel.h>
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/init.h>
12*4882a593Smuzhiyun #include <linux/err.h>
13*4882a593Smuzhiyun #include <linux/of.h>
14*4882a593Smuzhiyun #include <linux/of_device.h>
15*4882a593Smuzhiyun #include <linux/platform_device.h>
16*4882a593Smuzhiyun #include <linux/regulator/driver.h>
17*4882a593Smuzhiyun #include <linux/regulator/of_regulator.h>
18*4882a593Smuzhiyun #include <linux/i2c.h>
19*4882a593Smuzhiyun #include <linux/regmap.h>
20*4882a593Smuzhiyun #include "mpq7920.h"
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #define MPQ7920_BUCK_VOLT_RANGE \
23*4882a593Smuzhiyun ((MPQ7920_VOLT_MAX - MPQ7920_BUCK_VOLT_MIN)/MPQ7920_VOLT_STEP + 1)
24*4882a593Smuzhiyun #define MPQ7920_LDO_VOLT_RANGE \
25*4882a593Smuzhiyun ((MPQ7920_VOLT_MAX - MPQ7920_LDO_VOLT_MIN)/MPQ7920_VOLT_STEP + 1)
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #define MPQ7920BUCK(_name, _id, _ilim) \
28*4882a593Smuzhiyun [MPQ7920_BUCK ## _id] = { \
29*4882a593Smuzhiyun .id = MPQ7920_BUCK ## _id, \
30*4882a593Smuzhiyun .name = _name, \
31*4882a593Smuzhiyun .of_match = _name, \
32*4882a593Smuzhiyun .regulators_node = "regulators", \
33*4882a593Smuzhiyun .of_parse_cb = mpq7920_parse_cb, \
34*4882a593Smuzhiyun .ops = &mpq7920_buck_ops, \
35*4882a593Smuzhiyun .min_uV = MPQ7920_BUCK_VOLT_MIN, \
36*4882a593Smuzhiyun .uV_step = MPQ7920_VOLT_STEP, \
37*4882a593Smuzhiyun .n_voltages = MPQ7920_BUCK_VOLT_RANGE, \
38*4882a593Smuzhiyun .curr_table = _ilim, \
39*4882a593Smuzhiyun .n_current_limits = ARRAY_SIZE(_ilim), \
40*4882a593Smuzhiyun .csel_reg = MPQ7920_BUCK ##_id## _REG_C, \
41*4882a593Smuzhiyun .csel_mask = MPQ7920_MASK_BUCK_ILIM, \
42*4882a593Smuzhiyun .enable_reg = MPQ7920_REG_REGULATOR_EN, \
43*4882a593Smuzhiyun .enable_mask = BIT(MPQ7920_REGULATOR_EN_OFFSET - \
44*4882a593Smuzhiyun MPQ7920_BUCK ## _id), \
45*4882a593Smuzhiyun .vsel_reg = MPQ7920_BUCK ##_id## _REG_A, \
46*4882a593Smuzhiyun .vsel_mask = MPQ7920_MASK_VREF, \
47*4882a593Smuzhiyun .active_discharge_on = MPQ7920_DISCHARGE_ON, \
48*4882a593Smuzhiyun .active_discharge_reg = MPQ7920_BUCK ##_id## _REG_B, \
49*4882a593Smuzhiyun .active_discharge_mask = MPQ7920_MASK_DISCHARGE, \
50*4882a593Smuzhiyun .soft_start_reg = MPQ7920_BUCK ##_id## _REG_C, \
51*4882a593Smuzhiyun .soft_start_mask = MPQ7920_MASK_SOFTSTART, \
52*4882a593Smuzhiyun .owner = THIS_MODULE, \
53*4882a593Smuzhiyun }
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun #define MPQ7920LDO(_name, _id, _ops, _ilim, _ilim_sz, _creg, _cmask) \
56*4882a593Smuzhiyun [MPQ7920_LDO ## _id] = { \
57*4882a593Smuzhiyun .id = MPQ7920_LDO ## _id, \
58*4882a593Smuzhiyun .name = _name, \
59*4882a593Smuzhiyun .of_match = _name, \
60*4882a593Smuzhiyun .regulators_node = "regulators", \
61*4882a593Smuzhiyun .ops = _ops, \
62*4882a593Smuzhiyun .min_uV = MPQ7920_LDO_VOLT_MIN, \
63*4882a593Smuzhiyun .uV_step = MPQ7920_VOLT_STEP, \
64*4882a593Smuzhiyun .n_voltages = MPQ7920_LDO_VOLT_RANGE, \
65*4882a593Smuzhiyun .vsel_reg = MPQ7920_LDO ##_id## _REG_A, \
66*4882a593Smuzhiyun .vsel_mask = MPQ7920_MASK_VREF, \
67*4882a593Smuzhiyun .curr_table = _ilim, \
68*4882a593Smuzhiyun .n_current_limits = _ilim_sz, \
69*4882a593Smuzhiyun .csel_reg = _creg, \
70*4882a593Smuzhiyun .csel_mask = _cmask, \
71*4882a593Smuzhiyun .enable_reg = (_id == 1) ? 0 : MPQ7920_REG_REGULATOR_EN,\
72*4882a593Smuzhiyun .enable_mask = BIT(MPQ7920_REGULATOR_EN_OFFSET - \
73*4882a593Smuzhiyun MPQ7920_LDO ##_id + 1), \
74*4882a593Smuzhiyun .active_discharge_on = MPQ7920_DISCHARGE_ON, \
75*4882a593Smuzhiyun .active_discharge_mask = MPQ7920_MASK_DISCHARGE, \
76*4882a593Smuzhiyun .active_discharge_reg = MPQ7920_LDO ##_id## _REG_B, \
77*4882a593Smuzhiyun .type = REGULATOR_VOLTAGE, \
78*4882a593Smuzhiyun .owner = THIS_MODULE, \
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun enum mpq7920_regulators {
82*4882a593Smuzhiyun MPQ7920_BUCK1,
83*4882a593Smuzhiyun MPQ7920_BUCK2,
84*4882a593Smuzhiyun MPQ7920_BUCK3,
85*4882a593Smuzhiyun MPQ7920_BUCK4,
86*4882a593Smuzhiyun MPQ7920_LDO1, /* LDORTC */
87*4882a593Smuzhiyun MPQ7920_LDO2,
88*4882a593Smuzhiyun MPQ7920_LDO3,
89*4882a593Smuzhiyun MPQ7920_LDO4,
90*4882a593Smuzhiyun MPQ7920_LDO5,
91*4882a593Smuzhiyun MPQ7920_MAX_REGULATORS,
92*4882a593Smuzhiyun };
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun struct mpq7920_regulator_info {
95*4882a593Smuzhiyun struct regmap *regmap;
96*4882a593Smuzhiyun struct regulator_desc *rdesc;
97*4882a593Smuzhiyun };
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun static const struct regmap_config mpq7920_regmap_config = {
100*4882a593Smuzhiyun .reg_bits = 8,
101*4882a593Smuzhiyun .val_bits = 8,
102*4882a593Smuzhiyun .max_register = 0x25,
103*4882a593Smuzhiyun };
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun /* Current limits array (in uA)
106*4882a593Smuzhiyun * ILIM1 & ILIM3
107*4882a593Smuzhiyun */
108*4882a593Smuzhiyun static const unsigned int mpq7920_I_limits1[] = {
109*4882a593Smuzhiyun 4600000, 6600000, 7600000, 9300000
110*4882a593Smuzhiyun };
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun /* ILIM2 & ILIM4 */
113*4882a593Smuzhiyun static const unsigned int mpq7920_I_limits2[] = {
114*4882a593Smuzhiyun 2700000, 3900000, 5100000, 6100000
115*4882a593Smuzhiyun };
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun /* LDO4 & LDO5 */
118*4882a593Smuzhiyun static const unsigned int mpq7920_I_limits3[] = {
119*4882a593Smuzhiyun 300000, 700000
120*4882a593Smuzhiyun };
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun static int mpq7920_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay);
123*4882a593Smuzhiyun static int mpq7920_parse_cb(struct device_node *np,
124*4882a593Smuzhiyun const struct regulator_desc *rdesc,
125*4882a593Smuzhiyun struct regulator_config *config);
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun /* RTCLDO not controllable, always ON */
128*4882a593Smuzhiyun static const struct regulator_ops mpq7920_ldortc_ops = {
129*4882a593Smuzhiyun .list_voltage = regulator_list_voltage_linear,
130*4882a593Smuzhiyun .map_voltage = regulator_map_voltage_linear,
131*4882a593Smuzhiyun .get_voltage_sel = regulator_get_voltage_sel_regmap,
132*4882a593Smuzhiyun .set_voltage_sel = regulator_set_voltage_sel_regmap,
133*4882a593Smuzhiyun };
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun static const struct regulator_ops mpq7920_ldo_wo_current_ops = {
136*4882a593Smuzhiyun .enable = regulator_enable_regmap,
137*4882a593Smuzhiyun .disable = regulator_disable_regmap,
138*4882a593Smuzhiyun .is_enabled = regulator_is_enabled_regmap,
139*4882a593Smuzhiyun .list_voltage = regulator_list_voltage_linear,
140*4882a593Smuzhiyun .map_voltage = regulator_map_voltage_linear,
141*4882a593Smuzhiyun .get_voltage_sel = regulator_get_voltage_sel_regmap,
142*4882a593Smuzhiyun .set_voltage_sel = regulator_set_voltage_sel_regmap,
143*4882a593Smuzhiyun .set_active_discharge = regulator_set_active_discharge_regmap,
144*4882a593Smuzhiyun };
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun static const struct regulator_ops mpq7920_ldo_ops = {
147*4882a593Smuzhiyun .enable = regulator_enable_regmap,
148*4882a593Smuzhiyun .disable = regulator_disable_regmap,
149*4882a593Smuzhiyun .is_enabled = regulator_is_enabled_regmap,
150*4882a593Smuzhiyun .list_voltage = regulator_list_voltage_linear,
151*4882a593Smuzhiyun .map_voltage = regulator_map_voltage_linear,
152*4882a593Smuzhiyun .get_voltage_sel = regulator_get_voltage_sel_regmap,
153*4882a593Smuzhiyun .set_voltage_sel = regulator_set_voltage_sel_regmap,
154*4882a593Smuzhiyun .set_active_discharge = regulator_set_active_discharge_regmap,
155*4882a593Smuzhiyun .get_current_limit = regulator_get_current_limit_regmap,
156*4882a593Smuzhiyun .set_current_limit = regulator_set_current_limit_regmap,
157*4882a593Smuzhiyun };
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun static const struct regulator_ops mpq7920_buck_ops = {
160*4882a593Smuzhiyun .enable = regulator_enable_regmap,
161*4882a593Smuzhiyun .disable = regulator_disable_regmap,
162*4882a593Smuzhiyun .is_enabled = regulator_is_enabled_regmap,
163*4882a593Smuzhiyun .list_voltage = regulator_list_voltage_linear,
164*4882a593Smuzhiyun .map_voltage = regulator_map_voltage_linear,
165*4882a593Smuzhiyun .get_voltage_sel = regulator_get_voltage_sel_regmap,
166*4882a593Smuzhiyun .set_voltage_sel = regulator_set_voltage_sel_regmap,
167*4882a593Smuzhiyun .set_active_discharge = regulator_set_active_discharge_regmap,
168*4882a593Smuzhiyun .set_soft_start = regulator_set_soft_start_regmap,
169*4882a593Smuzhiyun .set_ramp_delay = mpq7920_set_ramp_delay,
170*4882a593Smuzhiyun };
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun static struct regulator_desc mpq7920_regulators_desc[MPQ7920_MAX_REGULATORS] = {
173*4882a593Smuzhiyun MPQ7920BUCK("buck1", 1, mpq7920_I_limits1),
174*4882a593Smuzhiyun MPQ7920BUCK("buck2", 2, mpq7920_I_limits2),
175*4882a593Smuzhiyun MPQ7920BUCK("buck3", 3, mpq7920_I_limits1),
176*4882a593Smuzhiyun MPQ7920BUCK("buck4", 4, mpq7920_I_limits2),
177*4882a593Smuzhiyun MPQ7920LDO("ldortc", 1, &mpq7920_ldortc_ops, NULL, 0, 0, 0),
178*4882a593Smuzhiyun MPQ7920LDO("ldo2", 2, &mpq7920_ldo_wo_current_ops, NULL, 0, 0, 0),
179*4882a593Smuzhiyun MPQ7920LDO("ldo3", 3, &mpq7920_ldo_wo_current_ops, NULL, 0, 0, 0),
180*4882a593Smuzhiyun MPQ7920LDO("ldo4", 4, &mpq7920_ldo_ops, mpq7920_I_limits3,
181*4882a593Smuzhiyun ARRAY_SIZE(mpq7920_I_limits3), MPQ7920_LDO4_REG_B,
182*4882a593Smuzhiyun MPQ7920_MASK_LDO_ILIM),
183*4882a593Smuzhiyun MPQ7920LDO("ldo5", 5, &mpq7920_ldo_ops, mpq7920_I_limits3,
184*4882a593Smuzhiyun ARRAY_SIZE(mpq7920_I_limits3), MPQ7920_LDO5_REG_B,
185*4882a593Smuzhiyun MPQ7920_MASK_LDO_ILIM),
186*4882a593Smuzhiyun };
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun /*
189*4882a593Smuzhiyun * DVS ramp rate BUCK1 to BUCK4
190*4882a593Smuzhiyun * 00-01: Reserved
191*4882a593Smuzhiyun * 10: 8mV/us
192*4882a593Smuzhiyun * 11: 4mV/us
193*4882a593Smuzhiyun */
mpq7920_set_ramp_delay(struct regulator_dev * rdev,int ramp_delay)194*4882a593Smuzhiyun static int mpq7920_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay)
195*4882a593Smuzhiyun {
196*4882a593Smuzhiyun unsigned int ramp_val;
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun if (ramp_delay > 8000 || ramp_delay < 0)
199*4882a593Smuzhiyun return -EINVAL;
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun if (ramp_delay <= 4000)
202*4882a593Smuzhiyun ramp_val = 3;
203*4882a593Smuzhiyun else
204*4882a593Smuzhiyun ramp_val = 2;
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun return regmap_update_bits(rdev->regmap, MPQ7920_REG_CTL0,
207*4882a593Smuzhiyun MPQ7920_MASK_DVS_SLEWRATE, ramp_val << 6);
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun
mpq7920_parse_cb(struct device_node * np,const struct regulator_desc * desc,struct regulator_config * config)210*4882a593Smuzhiyun static int mpq7920_parse_cb(struct device_node *np,
211*4882a593Smuzhiyun const struct regulator_desc *desc,
212*4882a593Smuzhiyun struct regulator_config *config)
213*4882a593Smuzhiyun {
214*4882a593Smuzhiyun uint8_t val;
215*4882a593Smuzhiyun int ret;
216*4882a593Smuzhiyun struct mpq7920_regulator_info *info = config->driver_data;
217*4882a593Smuzhiyun struct regulator_desc *rdesc = &info->rdesc[desc->id];
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun if (of_property_read_bool(np, "mps,buck-ovp-disable")) {
220*4882a593Smuzhiyun regmap_update_bits(config->regmap,
221*4882a593Smuzhiyun MPQ7920_BUCK1_REG_B + (rdesc->id * 4),
222*4882a593Smuzhiyun MPQ7920_MASK_OVP, MPQ7920_OVP_DISABLE);
223*4882a593Smuzhiyun }
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun ret = of_property_read_u8(np, "mps,buck-phase-delay", &val);
226*4882a593Smuzhiyun if (!ret) {
227*4882a593Smuzhiyun regmap_update_bits(config->regmap,
228*4882a593Smuzhiyun MPQ7920_BUCK1_REG_C + (rdesc->id * 4),
229*4882a593Smuzhiyun MPQ7920_MASK_BUCK_PHASE_DEALY,
230*4882a593Smuzhiyun (val & 3) << 4);
231*4882a593Smuzhiyun }
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun ret = of_property_read_u8(np, "mps,buck-softstart", &val);
234*4882a593Smuzhiyun if (!ret)
235*4882a593Smuzhiyun rdesc->soft_start_val_on = (val & 3) << 2;
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun return 0;
238*4882a593Smuzhiyun }
239*4882a593Smuzhiyun
mpq7920_parse_dt(struct device * dev,struct mpq7920_regulator_info * info)240*4882a593Smuzhiyun static void mpq7920_parse_dt(struct device *dev,
241*4882a593Smuzhiyun struct mpq7920_regulator_info *info)
242*4882a593Smuzhiyun {
243*4882a593Smuzhiyun int ret;
244*4882a593Smuzhiyun struct device_node *np = dev->of_node;
245*4882a593Smuzhiyun uint8_t freq;
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun np = of_get_child_by_name(np, "regulators");
248*4882a593Smuzhiyun if (!np) {
249*4882a593Smuzhiyun dev_err(dev, "missing 'regulators' subnode in DT\n");
250*4882a593Smuzhiyun return;
251*4882a593Smuzhiyun }
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun ret = of_property_read_u8(np, "mps,switch-freq", &freq);
254*4882a593Smuzhiyun if (!ret) {
255*4882a593Smuzhiyun regmap_update_bits(info->regmap, MPQ7920_REG_CTL0,
256*4882a593Smuzhiyun MPQ7920_MASK_SWITCH_FREQ,
257*4882a593Smuzhiyun (freq & 3) << 4);
258*4882a593Smuzhiyun }
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun of_node_put(np);
261*4882a593Smuzhiyun }
262*4882a593Smuzhiyun
mpq7920_i2c_probe(struct i2c_client * client)263*4882a593Smuzhiyun static int mpq7920_i2c_probe(struct i2c_client *client)
264*4882a593Smuzhiyun {
265*4882a593Smuzhiyun struct device *dev = &client->dev;
266*4882a593Smuzhiyun struct mpq7920_regulator_info *info;
267*4882a593Smuzhiyun struct regulator_config config = { NULL, };
268*4882a593Smuzhiyun struct regulator_dev *rdev;
269*4882a593Smuzhiyun struct regmap *regmap;
270*4882a593Smuzhiyun int i;
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun info = devm_kzalloc(dev, sizeof(struct mpq7920_regulator_info),
273*4882a593Smuzhiyun GFP_KERNEL);
274*4882a593Smuzhiyun if (!info)
275*4882a593Smuzhiyun return -ENOMEM;
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun info->rdesc = mpq7920_regulators_desc;
278*4882a593Smuzhiyun regmap = devm_regmap_init_i2c(client, &mpq7920_regmap_config);
279*4882a593Smuzhiyun if (IS_ERR(regmap)) {
280*4882a593Smuzhiyun dev_err(dev, "Failed to allocate regmap!\n");
281*4882a593Smuzhiyun return PTR_ERR(regmap);
282*4882a593Smuzhiyun }
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun i2c_set_clientdata(client, info);
285*4882a593Smuzhiyun info->regmap = regmap;
286*4882a593Smuzhiyun if (client->dev.of_node)
287*4882a593Smuzhiyun mpq7920_parse_dt(&client->dev, info);
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun config.dev = dev;
290*4882a593Smuzhiyun config.regmap = regmap;
291*4882a593Smuzhiyun config.driver_data = info;
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun for (i = 0; i < MPQ7920_MAX_REGULATORS; i++) {
294*4882a593Smuzhiyun rdev = devm_regulator_register(dev,
295*4882a593Smuzhiyun &mpq7920_regulators_desc[i],
296*4882a593Smuzhiyun &config);
297*4882a593Smuzhiyun if (IS_ERR(rdev)) {
298*4882a593Smuzhiyun dev_err(dev, "Failed to register regulator!\n");
299*4882a593Smuzhiyun return PTR_ERR(rdev);
300*4882a593Smuzhiyun }
301*4882a593Smuzhiyun }
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun return 0;
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun static const struct of_device_id mpq7920_of_match[] = {
307*4882a593Smuzhiyun { .compatible = "mps,mpq7920"},
308*4882a593Smuzhiyun {},
309*4882a593Smuzhiyun };
310*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, mpq7920_of_match);
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun static const struct i2c_device_id mpq7920_id[] = {
313*4882a593Smuzhiyun { "mpq7920", },
314*4882a593Smuzhiyun { },
315*4882a593Smuzhiyun };
316*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, mpq7920_id);
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun static struct i2c_driver mpq7920_regulator_driver = {
319*4882a593Smuzhiyun .driver = {
320*4882a593Smuzhiyun .name = "mpq7920",
321*4882a593Smuzhiyun .of_match_table = of_match_ptr(mpq7920_of_match),
322*4882a593Smuzhiyun },
323*4882a593Smuzhiyun .probe_new = mpq7920_i2c_probe,
324*4882a593Smuzhiyun .id_table = mpq7920_id,
325*4882a593Smuzhiyun };
326*4882a593Smuzhiyun module_i2c_driver(mpq7920_regulator_driver);
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun MODULE_AUTHOR("Saravanan Sekar <sravanhome@gmail.com>");
329*4882a593Smuzhiyun MODULE_DESCRIPTION("MPQ7920 PMIC regulator driver");
330*4882a593Smuzhiyun MODULE_LICENSE("GPL");
331