1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * mc13xxx.h - regulators for the Freescale mc13xxx PMIC
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2010 Yong Shen <yong.shen@linaro.org>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #ifndef __LINUX_REGULATOR_MC13XXX_H
9*4882a593Smuzhiyun #define __LINUX_REGULATOR_MC13XXX_H
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/regulator/driver.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun struct mc13xxx_regulator {
14*4882a593Smuzhiyun struct regulator_desc desc;
15*4882a593Smuzhiyun int reg;
16*4882a593Smuzhiyun int enable_bit;
17*4882a593Smuzhiyun int vsel_reg;
18*4882a593Smuzhiyun int vsel_shift;
19*4882a593Smuzhiyun int vsel_mask;
20*4882a593Smuzhiyun };
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun struct mc13xxx_regulator_priv {
23*4882a593Smuzhiyun struct mc13xxx *mc13xxx;
24*4882a593Smuzhiyun u32 powermisc_pwgt_state;
25*4882a593Smuzhiyun struct mc13xxx_regulator *mc13xxx_regulators;
26*4882a593Smuzhiyun int num_regulators;
27*4882a593Smuzhiyun struct regulator_dev *regulators[];
28*4882a593Smuzhiyun };
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun extern int mc13xxx_fixed_regulator_set_voltage(struct regulator_dev *rdev,
31*4882a593Smuzhiyun int min_uV, int max_uV, unsigned *selector);
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun #ifdef CONFIG_OF
34*4882a593Smuzhiyun extern int mc13xxx_get_num_regulators_dt(struct platform_device *pdev);
35*4882a593Smuzhiyun extern struct mc13xxx_regulator_init_data *mc13xxx_parse_regulators_dt(
36*4882a593Smuzhiyun struct platform_device *pdev, struct mc13xxx_regulator *regulators,
37*4882a593Smuzhiyun int num_regulators);
38*4882a593Smuzhiyun #else
mc13xxx_get_num_regulators_dt(struct platform_device * pdev)39*4882a593Smuzhiyun static inline int mc13xxx_get_num_regulators_dt(struct platform_device *pdev)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun return -ENODEV;
42*4882a593Smuzhiyun }
43*4882a593Smuzhiyun
mc13xxx_parse_regulators_dt(struct platform_device * pdev,struct mc13xxx_regulator * regulators,int num_regulators)44*4882a593Smuzhiyun static inline struct mc13xxx_regulator_init_data *mc13xxx_parse_regulators_dt(
45*4882a593Smuzhiyun struct platform_device *pdev, struct mc13xxx_regulator *regulators,
46*4882a593Smuzhiyun int num_regulators)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun return NULL;
49*4882a593Smuzhiyun }
50*4882a593Smuzhiyun #endif
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun extern const struct regulator_ops mc13xxx_regulator_ops;
53*4882a593Smuzhiyun extern const struct regulator_ops mc13xxx_fixed_regulator_ops;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun #define MC13xxx_DEFINE(prefix, _name, _node, _reg, _vsel_reg, _voltages, _ops) \
56*4882a593Smuzhiyun [prefix ## _name] = { \
57*4882a593Smuzhiyun .desc = { \
58*4882a593Smuzhiyun .name = #_node, \
59*4882a593Smuzhiyun .n_voltages = ARRAY_SIZE(_voltages), \
60*4882a593Smuzhiyun .volt_table = _voltages, \
61*4882a593Smuzhiyun .ops = &_ops, \
62*4882a593Smuzhiyun .type = REGULATOR_VOLTAGE, \
63*4882a593Smuzhiyun .id = prefix ## _name, \
64*4882a593Smuzhiyun .owner = THIS_MODULE, \
65*4882a593Smuzhiyun }, \
66*4882a593Smuzhiyun .reg = prefix ## _reg, \
67*4882a593Smuzhiyun .enable_bit = prefix ## _reg ## _ ## _name ## EN, \
68*4882a593Smuzhiyun .vsel_reg = prefix ## _vsel_reg, \
69*4882a593Smuzhiyun .vsel_shift = prefix ## _vsel_reg ## _ ## _name ## VSEL,\
70*4882a593Smuzhiyun .vsel_mask = prefix ## _vsel_reg ## _ ## _name ## VSEL_M,\
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun #define MC13xxx_FIXED_DEFINE(prefix, _name, _node, _reg, _voltages, _ops) \
74*4882a593Smuzhiyun [prefix ## _name] = { \
75*4882a593Smuzhiyun .desc = { \
76*4882a593Smuzhiyun .name = #_node, \
77*4882a593Smuzhiyun .n_voltages = ARRAY_SIZE(_voltages), \
78*4882a593Smuzhiyun .volt_table = _voltages, \
79*4882a593Smuzhiyun .ops = &_ops, \
80*4882a593Smuzhiyun .type = REGULATOR_VOLTAGE, \
81*4882a593Smuzhiyun .id = prefix ## _name, \
82*4882a593Smuzhiyun .owner = THIS_MODULE, \
83*4882a593Smuzhiyun }, \
84*4882a593Smuzhiyun .reg = prefix ## _reg, \
85*4882a593Smuzhiyun .enable_bit = prefix ## _reg ## _ ## _name ## EN, \
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun #define MC13xxx_GPO_DEFINE(prefix, _name, _node, _reg, _voltages, _ops) \
89*4882a593Smuzhiyun [prefix ## _name] = { \
90*4882a593Smuzhiyun .desc = { \
91*4882a593Smuzhiyun .name = #_node, \
92*4882a593Smuzhiyun .n_voltages = ARRAY_SIZE(_voltages), \
93*4882a593Smuzhiyun .volt_table = _voltages, \
94*4882a593Smuzhiyun .ops = &_ops, \
95*4882a593Smuzhiyun .type = REGULATOR_VOLTAGE, \
96*4882a593Smuzhiyun .id = prefix ## _name, \
97*4882a593Smuzhiyun .owner = THIS_MODULE, \
98*4882a593Smuzhiyun }, \
99*4882a593Smuzhiyun .reg = prefix ## _reg, \
100*4882a593Smuzhiyun .enable_bit = prefix ## _reg ## _ ## _name ## EN, \
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun #define MC13xxx_DEFINE_SW(_name, _node, _reg, _vsel_reg, _voltages, ops) \
104*4882a593Smuzhiyun MC13xxx_DEFINE(SW, _name, _node, _reg, _vsel_reg, _voltages, ops)
105*4882a593Smuzhiyun #define MC13xxx_DEFINE_REGU(_name, _node, _reg, _vsel_reg, _voltages, ops) \
106*4882a593Smuzhiyun MC13xxx_DEFINE(REGU, _name, _node, _reg, _vsel_reg, _voltages, ops)
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun #endif
109