1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // max8998.c - Voltage regulator driver for the Maxim 8998
4*4882a593Smuzhiyun //
5*4882a593Smuzhiyun // Copyright (C) 2009-2010 Samsung Electronics
6*4882a593Smuzhiyun // Kyungmin Park <kyungmin.park@samsung.com>
7*4882a593Smuzhiyun // Marek Szyprowski <m.szyprowski@samsung.com>
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/init.h>
11*4882a593Smuzhiyun #include <linux/i2c.h>
12*4882a593Smuzhiyun #include <linux/err.h>
13*4882a593Smuzhiyun #include <linux/gpio.h>
14*4882a593Smuzhiyun #include <linux/slab.h>
15*4882a593Smuzhiyun #include <linux/interrupt.h>
16*4882a593Smuzhiyun #include <linux/mutex.h>
17*4882a593Smuzhiyun #include <linux/of.h>
18*4882a593Smuzhiyun #include <linux/of_gpio.h>
19*4882a593Smuzhiyun #include <linux/platform_device.h>
20*4882a593Smuzhiyun #include <linux/regulator/driver.h>
21*4882a593Smuzhiyun #include <linux/regulator/of_regulator.h>
22*4882a593Smuzhiyun #include <linux/mfd/max8998.h>
23*4882a593Smuzhiyun #include <linux/mfd/max8998-private.h>
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun struct max8998_data {
26*4882a593Smuzhiyun struct device *dev;
27*4882a593Smuzhiyun struct max8998_dev *iodev;
28*4882a593Smuzhiyun int num_regulators;
29*4882a593Smuzhiyun u8 buck1_vol[4]; /* voltages for selection */
30*4882a593Smuzhiyun u8 buck2_vol[2];
31*4882a593Smuzhiyun unsigned int buck1_idx; /* index to last changed voltage */
32*4882a593Smuzhiyun /* value in a set */
33*4882a593Smuzhiyun unsigned int buck2_idx;
34*4882a593Smuzhiyun };
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun static const unsigned int charger_current_table[] = {
37*4882a593Smuzhiyun 90000, 380000, 475000, 550000, 570000, 600000, 700000, 800000,
38*4882a593Smuzhiyun };
39*4882a593Smuzhiyun
max8998_get_enable_register(struct regulator_dev * rdev,int * reg,int * shift)40*4882a593Smuzhiyun static int max8998_get_enable_register(struct regulator_dev *rdev,
41*4882a593Smuzhiyun int *reg, int *shift)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun int ldo = rdev_get_id(rdev);
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun switch (ldo) {
46*4882a593Smuzhiyun case MAX8998_LDO2 ... MAX8998_LDO5:
47*4882a593Smuzhiyun *reg = MAX8998_REG_ONOFF1;
48*4882a593Smuzhiyun *shift = 3 - (ldo - MAX8998_LDO2);
49*4882a593Smuzhiyun break;
50*4882a593Smuzhiyun case MAX8998_LDO6 ... MAX8998_LDO13:
51*4882a593Smuzhiyun *reg = MAX8998_REG_ONOFF2;
52*4882a593Smuzhiyun *shift = 7 - (ldo - MAX8998_LDO6);
53*4882a593Smuzhiyun break;
54*4882a593Smuzhiyun case MAX8998_LDO14 ... MAX8998_LDO17:
55*4882a593Smuzhiyun *reg = MAX8998_REG_ONOFF3;
56*4882a593Smuzhiyun *shift = 7 - (ldo - MAX8998_LDO14);
57*4882a593Smuzhiyun break;
58*4882a593Smuzhiyun case MAX8998_BUCK1 ... MAX8998_BUCK4:
59*4882a593Smuzhiyun *reg = MAX8998_REG_ONOFF1;
60*4882a593Smuzhiyun *shift = 7 - (ldo - MAX8998_BUCK1);
61*4882a593Smuzhiyun break;
62*4882a593Smuzhiyun case MAX8998_EN32KHZ_AP ... MAX8998_ENVICHG:
63*4882a593Smuzhiyun *reg = MAX8998_REG_ONOFF4;
64*4882a593Smuzhiyun *shift = 7 - (ldo - MAX8998_EN32KHZ_AP);
65*4882a593Smuzhiyun break;
66*4882a593Smuzhiyun case MAX8998_ESAFEOUT1 ... MAX8998_ESAFEOUT2:
67*4882a593Smuzhiyun *reg = MAX8998_REG_CHGR2;
68*4882a593Smuzhiyun *shift = 7 - (ldo - MAX8998_ESAFEOUT1);
69*4882a593Smuzhiyun break;
70*4882a593Smuzhiyun case MAX8998_CHARGER:
71*4882a593Smuzhiyun *reg = MAX8998_REG_CHGR2;
72*4882a593Smuzhiyun *shift = 0;
73*4882a593Smuzhiyun break;
74*4882a593Smuzhiyun default:
75*4882a593Smuzhiyun return -EINVAL;
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun return 0;
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun
max8998_ldo_is_enabled(struct regulator_dev * rdev)81*4882a593Smuzhiyun static int max8998_ldo_is_enabled(struct regulator_dev *rdev)
82*4882a593Smuzhiyun {
83*4882a593Smuzhiyun struct max8998_data *max8998 = rdev_get_drvdata(rdev);
84*4882a593Smuzhiyun struct i2c_client *i2c = max8998->iodev->i2c;
85*4882a593Smuzhiyun int ret, reg, shift = 8;
86*4882a593Smuzhiyun u8 val;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun ret = max8998_get_enable_register(rdev, ®, &shift);
89*4882a593Smuzhiyun if (ret)
90*4882a593Smuzhiyun return ret;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun ret = max8998_read_reg(i2c, reg, &val);
93*4882a593Smuzhiyun if (ret)
94*4882a593Smuzhiyun return ret;
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun return val & (1 << shift);
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun
max8998_ldo_is_enabled_inverted(struct regulator_dev * rdev)99*4882a593Smuzhiyun static int max8998_ldo_is_enabled_inverted(struct regulator_dev *rdev)
100*4882a593Smuzhiyun {
101*4882a593Smuzhiyun return (!max8998_ldo_is_enabled(rdev));
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun
max8998_ldo_enable(struct regulator_dev * rdev)104*4882a593Smuzhiyun static int max8998_ldo_enable(struct regulator_dev *rdev)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun struct max8998_data *max8998 = rdev_get_drvdata(rdev);
107*4882a593Smuzhiyun struct i2c_client *i2c = max8998->iodev->i2c;
108*4882a593Smuzhiyun int reg, shift = 8, ret;
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun ret = max8998_get_enable_register(rdev, ®, &shift);
111*4882a593Smuzhiyun if (ret)
112*4882a593Smuzhiyun return ret;
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun return max8998_update_reg(i2c, reg, 1<<shift, 1<<shift);
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
max8998_ldo_disable(struct regulator_dev * rdev)117*4882a593Smuzhiyun static int max8998_ldo_disable(struct regulator_dev *rdev)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun struct max8998_data *max8998 = rdev_get_drvdata(rdev);
120*4882a593Smuzhiyun struct i2c_client *i2c = max8998->iodev->i2c;
121*4882a593Smuzhiyun int reg, shift = 8, ret;
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun ret = max8998_get_enable_register(rdev, ®, &shift);
124*4882a593Smuzhiyun if (ret)
125*4882a593Smuzhiyun return ret;
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun return max8998_update_reg(i2c, reg, 0, 1<<shift);
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun
max8998_get_voltage_register(struct regulator_dev * rdev,int * _reg,int * _shift,int * _mask)130*4882a593Smuzhiyun static int max8998_get_voltage_register(struct regulator_dev *rdev,
131*4882a593Smuzhiyun int *_reg, int *_shift, int *_mask)
132*4882a593Smuzhiyun {
133*4882a593Smuzhiyun int ldo = rdev_get_id(rdev);
134*4882a593Smuzhiyun struct max8998_data *max8998 = rdev_get_drvdata(rdev);
135*4882a593Smuzhiyun int reg, shift = 0, mask = 0xff;
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun switch (ldo) {
138*4882a593Smuzhiyun case MAX8998_LDO2 ... MAX8998_LDO3:
139*4882a593Smuzhiyun reg = MAX8998_REG_LDO2_LDO3;
140*4882a593Smuzhiyun mask = 0xf;
141*4882a593Smuzhiyun if (ldo == MAX8998_LDO2)
142*4882a593Smuzhiyun shift = 4;
143*4882a593Smuzhiyun else
144*4882a593Smuzhiyun shift = 0;
145*4882a593Smuzhiyun break;
146*4882a593Smuzhiyun case MAX8998_LDO4 ... MAX8998_LDO7:
147*4882a593Smuzhiyun reg = MAX8998_REG_LDO4 + (ldo - MAX8998_LDO4);
148*4882a593Smuzhiyun break;
149*4882a593Smuzhiyun case MAX8998_LDO8 ... MAX8998_LDO9:
150*4882a593Smuzhiyun reg = MAX8998_REG_LDO8_LDO9;
151*4882a593Smuzhiyun mask = 0xf;
152*4882a593Smuzhiyun if (ldo == MAX8998_LDO8)
153*4882a593Smuzhiyun shift = 4;
154*4882a593Smuzhiyun else
155*4882a593Smuzhiyun shift = 0;
156*4882a593Smuzhiyun break;
157*4882a593Smuzhiyun case MAX8998_LDO10 ... MAX8998_LDO11:
158*4882a593Smuzhiyun reg = MAX8998_REG_LDO10_LDO11;
159*4882a593Smuzhiyun if (ldo == MAX8998_LDO10) {
160*4882a593Smuzhiyun shift = 5;
161*4882a593Smuzhiyun mask = 0x7;
162*4882a593Smuzhiyun } else {
163*4882a593Smuzhiyun shift = 0;
164*4882a593Smuzhiyun mask = 0x1f;
165*4882a593Smuzhiyun }
166*4882a593Smuzhiyun break;
167*4882a593Smuzhiyun case MAX8998_LDO12 ... MAX8998_LDO17:
168*4882a593Smuzhiyun reg = MAX8998_REG_LDO12 + (ldo - MAX8998_LDO12);
169*4882a593Smuzhiyun break;
170*4882a593Smuzhiyun case MAX8998_BUCK1:
171*4882a593Smuzhiyun reg = MAX8998_REG_BUCK1_VOLTAGE1 + max8998->buck1_idx;
172*4882a593Smuzhiyun break;
173*4882a593Smuzhiyun case MAX8998_BUCK2:
174*4882a593Smuzhiyun reg = MAX8998_REG_BUCK2_VOLTAGE1 + max8998->buck2_idx;
175*4882a593Smuzhiyun break;
176*4882a593Smuzhiyun case MAX8998_BUCK3:
177*4882a593Smuzhiyun reg = MAX8998_REG_BUCK3;
178*4882a593Smuzhiyun break;
179*4882a593Smuzhiyun case MAX8998_BUCK4:
180*4882a593Smuzhiyun reg = MAX8998_REG_BUCK4;
181*4882a593Smuzhiyun break;
182*4882a593Smuzhiyun default:
183*4882a593Smuzhiyun return -EINVAL;
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun *_reg = reg;
187*4882a593Smuzhiyun *_shift = shift;
188*4882a593Smuzhiyun *_mask = mask;
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun return 0;
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun
max8998_get_voltage_sel(struct regulator_dev * rdev)193*4882a593Smuzhiyun static int max8998_get_voltage_sel(struct regulator_dev *rdev)
194*4882a593Smuzhiyun {
195*4882a593Smuzhiyun struct max8998_data *max8998 = rdev_get_drvdata(rdev);
196*4882a593Smuzhiyun struct i2c_client *i2c = max8998->iodev->i2c;
197*4882a593Smuzhiyun int reg, shift = 0, mask, ret;
198*4882a593Smuzhiyun u8 val;
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun ret = max8998_get_voltage_register(rdev, ®, &shift, &mask);
201*4882a593Smuzhiyun if (ret)
202*4882a593Smuzhiyun return ret;
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun ret = max8998_read_reg(i2c, reg, &val);
205*4882a593Smuzhiyun if (ret)
206*4882a593Smuzhiyun return ret;
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun val >>= shift;
209*4882a593Smuzhiyun val &= mask;
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun return val;
212*4882a593Smuzhiyun }
213*4882a593Smuzhiyun
max8998_set_voltage_ldo_sel(struct regulator_dev * rdev,unsigned selector)214*4882a593Smuzhiyun static int max8998_set_voltage_ldo_sel(struct regulator_dev *rdev,
215*4882a593Smuzhiyun unsigned selector)
216*4882a593Smuzhiyun {
217*4882a593Smuzhiyun struct max8998_data *max8998 = rdev_get_drvdata(rdev);
218*4882a593Smuzhiyun struct i2c_client *i2c = max8998->iodev->i2c;
219*4882a593Smuzhiyun int reg, shift = 0, mask, ret;
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun ret = max8998_get_voltage_register(rdev, ®, &shift, &mask);
222*4882a593Smuzhiyun if (ret)
223*4882a593Smuzhiyun return ret;
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun ret = max8998_update_reg(i2c, reg, selector<<shift, mask<<shift);
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun return ret;
228*4882a593Smuzhiyun }
229*4882a593Smuzhiyun
buck1_gpio_set(int gpio1,int gpio2,int v)230*4882a593Smuzhiyun static inline void buck1_gpio_set(int gpio1, int gpio2, int v)
231*4882a593Smuzhiyun {
232*4882a593Smuzhiyun gpio_set_value(gpio1, v & 0x1);
233*4882a593Smuzhiyun gpio_set_value(gpio2, (v >> 1) & 0x1);
234*4882a593Smuzhiyun }
235*4882a593Smuzhiyun
buck2_gpio_set(int gpio,int v)236*4882a593Smuzhiyun static inline void buck2_gpio_set(int gpio, int v)
237*4882a593Smuzhiyun {
238*4882a593Smuzhiyun gpio_set_value(gpio, v & 0x1);
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun
max8998_set_voltage_buck_sel(struct regulator_dev * rdev,unsigned selector)241*4882a593Smuzhiyun static int max8998_set_voltage_buck_sel(struct regulator_dev *rdev,
242*4882a593Smuzhiyun unsigned selector)
243*4882a593Smuzhiyun {
244*4882a593Smuzhiyun struct max8998_data *max8998 = rdev_get_drvdata(rdev);
245*4882a593Smuzhiyun struct max8998_platform_data *pdata = max8998->iodev->pdata;
246*4882a593Smuzhiyun struct i2c_client *i2c = max8998->iodev->i2c;
247*4882a593Smuzhiyun int buck = rdev_get_id(rdev);
248*4882a593Smuzhiyun int reg, shift = 0, mask, ret, j;
249*4882a593Smuzhiyun static u8 buck1_last_val;
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun ret = max8998_get_voltage_register(rdev, ®, &shift, &mask);
252*4882a593Smuzhiyun if (ret)
253*4882a593Smuzhiyun return ret;
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun switch (buck) {
256*4882a593Smuzhiyun case MAX8998_BUCK1:
257*4882a593Smuzhiyun dev_dbg(max8998->dev,
258*4882a593Smuzhiyun "BUCK1, selector:%d, buck1_vol1:%d, buck1_vol2:%d\n"
259*4882a593Smuzhiyun "buck1_vol3:%d, buck1_vol4:%d\n",
260*4882a593Smuzhiyun selector, max8998->buck1_vol[0], max8998->buck1_vol[1],
261*4882a593Smuzhiyun max8998->buck1_vol[2], max8998->buck1_vol[3]);
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun if (gpio_is_valid(pdata->buck1_set1) &&
264*4882a593Smuzhiyun gpio_is_valid(pdata->buck1_set2)) {
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun /* check if requested voltage */
267*4882a593Smuzhiyun /* value is already defined */
268*4882a593Smuzhiyun for (j = 0; j < ARRAY_SIZE(max8998->buck1_vol); j++) {
269*4882a593Smuzhiyun if (max8998->buck1_vol[j] == selector) {
270*4882a593Smuzhiyun max8998->buck1_idx = j;
271*4882a593Smuzhiyun buck1_gpio_set(pdata->buck1_set1,
272*4882a593Smuzhiyun pdata->buck1_set2, j);
273*4882a593Smuzhiyun goto buck1_exit;
274*4882a593Smuzhiyun }
275*4882a593Smuzhiyun }
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun if (pdata->buck_voltage_lock)
278*4882a593Smuzhiyun return -EINVAL;
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun /* no predefine regulator found */
281*4882a593Smuzhiyun max8998->buck1_idx = (buck1_last_val % 2) + 2;
282*4882a593Smuzhiyun dev_dbg(max8998->dev, "max8998->buck1_idx:%d\n",
283*4882a593Smuzhiyun max8998->buck1_idx);
284*4882a593Smuzhiyun max8998->buck1_vol[max8998->buck1_idx] = selector;
285*4882a593Smuzhiyun ret = max8998_get_voltage_register(rdev, ®,
286*4882a593Smuzhiyun &shift,
287*4882a593Smuzhiyun &mask);
288*4882a593Smuzhiyun ret = max8998_write_reg(i2c, reg, selector);
289*4882a593Smuzhiyun buck1_gpio_set(pdata->buck1_set1,
290*4882a593Smuzhiyun pdata->buck1_set2, max8998->buck1_idx);
291*4882a593Smuzhiyun buck1_last_val++;
292*4882a593Smuzhiyun buck1_exit:
293*4882a593Smuzhiyun dev_dbg(max8998->dev, "%s: SET1:%d, SET2:%d\n",
294*4882a593Smuzhiyun i2c->name, gpio_get_value(pdata->buck1_set1),
295*4882a593Smuzhiyun gpio_get_value(pdata->buck1_set2));
296*4882a593Smuzhiyun break;
297*4882a593Smuzhiyun } else {
298*4882a593Smuzhiyun ret = max8998_write_reg(i2c, reg, selector);
299*4882a593Smuzhiyun }
300*4882a593Smuzhiyun break;
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun case MAX8998_BUCK2:
303*4882a593Smuzhiyun dev_dbg(max8998->dev,
304*4882a593Smuzhiyun "BUCK2, selector:%d buck2_vol1:%d, buck2_vol2:%d\n",
305*4882a593Smuzhiyun selector, max8998->buck2_vol[0], max8998->buck2_vol[1]);
306*4882a593Smuzhiyun if (gpio_is_valid(pdata->buck2_set3)) {
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun /* check if requested voltage */
309*4882a593Smuzhiyun /* value is already defined */
310*4882a593Smuzhiyun for (j = 0; j < ARRAY_SIZE(max8998->buck2_vol); j++) {
311*4882a593Smuzhiyun if (max8998->buck2_vol[j] == selector) {
312*4882a593Smuzhiyun max8998->buck2_idx = j;
313*4882a593Smuzhiyun buck2_gpio_set(pdata->buck2_set3, j);
314*4882a593Smuzhiyun goto buck2_exit;
315*4882a593Smuzhiyun }
316*4882a593Smuzhiyun }
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun if (pdata->buck_voltage_lock)
319*4882a593Smuzhiyun return -EINVAL;
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun max8998_get_voltage_register(rdev,
322*4882a593Smuzhiyun ®, &shift, &mask);
323*4882a593Smuzhiyun ret = max8998_write_reg(i2c, reg, selector);
324*4882a593Smuzhiyun max8998->buck2_vol[max8998->buck2_idx] = selector;
325*4882a593Smuzhiyun buck2_gpio_set(pdata->buck2_set3, max8998->buck2_idx);
326*4882a593Smuzhiyun buck2_exit:
327*4882a593Smuzhiyun dev_dbg(max8998->dev, "%s: SET3:%d\n", i2c->name,
328*4882a593Smuzhiyun gpio_get_value(pdata->buck2_set3));
329*4882a593Smuzhiyun } else {
330*4882a593Smuzhiyun ret = max8998_write_reg(i2c, reg, selector);
331*4882a593Smuzhiyun }
332*4882a593Smuzhiyun break;
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun case MAX8998_BUCK3:
335*4882a593Smuzhiyun case MAX8998_BUCK4:
336*4882a593Smuzhiyun ret = max8998_update_reg(i2c, reg, selector<<shift,
337*4882a593Smuzhiyun mask<<shift);
338*4882a593Smuzhiyun break;
339*4882a593Smuzhiyun }
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun return ret;
342*4882a593Smuzhiyun }
343*4882a593Smuzhiyun
max8998_set_voltage_buck_time_sel(struct regulator_dev * rdev,unsigned int old_selector,unsigned int new_selector)344*4882a593Smuzhiyun static int max8998_set_voltage_buck_time_sel(struct regulator_dev *rdev,
345*4882a593Smuzhiyun unsigned int old_selector,
346*4882a593Smuzhiyun unsigned int new_selector)
347*4882a593Smuzhiyun {
348*4882a593Smuzhiyun struct max8998_data *max8998 = rdev_get_drvdata(rdev);
349*4882a593Smuzhiyun struct i2c_client *i2c = max8998->iodev->i2c;
350*4882a593Smuzhiyun int buck = rdev_get_id(rdev);
351*4882a593Smuzhiyun u8 val = 0;
352*4882a593Smuzhiyun int difference, ret;
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun if (buck < MAX8998_BUCK1 || buck > MAX8998_BUCK4)
355*4882a593Smuzhiyun return -EINVAL;
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun /* Voltage stabilization */
358*4882a593Smuzhiyun ret = max8998_read_reg(i2c, MAX8998_REG_ONOFF4, &val);
359*4882a593Smuzhiyun if (ret)
360*4882a593Smuzhiyun return ret;
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun /* lp3974 hasn't got ENRAMP bit - ramp is assumed as true */
363*4882a593Smuzhiyun /* MAX8998 has ENRAMP bit implemented, so test it*/
364*4882a593Smuzhiyun if (max8998->iodev->type == TYPE_MAX8998 && !(val & MAX8998_ENRAMP))
365*4882a593Smuzhiyun return 0;
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun difference = (new_selector - old_selector) * rdev->desc->uV_step / 1000;
368*4882a593Smuzhiyun if (difference > 0)
369*4882a593Smuzhiyun return DIV_ROUND_UP(difference, (val & 0x0f) + 1);
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun return 0;
372*4882a593Smuzhiyun }
373*4882a593Smuzhiyun
max8998_set_current_limit(struct regulator_dev * rdev,int min_uA,int max_uA)374*4882a593Smuzhiyun static int max8998_set_current_limit(struct regulator_dev *rdev,
375*4882a593Smuzhiyun int min_uA, int max_uA)
376*4882a593Smuzhiyun {
377*4882a593Smuzhiyun struct max8998_data *max8998 = rdev_get_drvdata(rdev);
378*4882a593Smuzhiyun struct i2c_client *i2c = max8998->iodev->i2c;
379*4882a593Smuzhiyun unsigned int n_currents = rdev->desc->n_current_limits;
380*4882a593Smuzhiyun int i, sel = -1;
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun if (n_currents == 0)
383*4882a593Smuzhiyun return -EINVAL;
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun if (rdev->desc->curr_table) {
386*4882a593Smuzhiyun const unsigned int *curr_table = rdev->desc->curr_table;
387*4882a593Smuzhiyun bool ascend = curr_table[n_currents - 1] > curr_table[0];
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun /* search for closest to maximum */
390*4882a593Smuzhiyun if (ascend) {
391*4882a593Smuzhiyun for (i = n_currents - 1; i >= 0; i--) {
392*4882a593Smuzhiyun if (min_uA <= curr_table[i] &&
393*4882a593Smuzhiyun curr_table[i] <= max_uA) {
394*4882a593Smuzhiyun sel = i;
395*4882a593Smuzhiyun break;
396*4882a593Smuzhiyun }
397*4882a593Smuzhiyun }
398*4882a593Smuzhiyun } else {
399*4882a593Smuzhiyun for (i = 0; i < n_currents; i++) {
400*4882a593Smuzhiyun if (min_uA <= curr_table[i] &&
401*4882a593Smuzhiyun curr_table[i] <= max_uA) {
402*4882a593Smuzhiyun sel = i;
403*4882a593Smuzhiyun break;
404*4882a593Smuzhiyun }
405*4882a593Smuzhiyun }
406*4882a593Smuzhiyun }
407*4882a593Smuzhiyun }
408*4882a593Smuzhiyun
409*4882a593Smuzhiyun if (sel < 0)
410*4882a593Smuzhiyun return -EINVAL;
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun sel <<= ffs(rdev->desc->csel_mask) - 1;
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun return max8998_update_reg(i2c, rdev->desc->csel_reg,
415*4882a593Smuzhiyun sel, rdev->desc->csel_mask);
416*4882a593Smuzhiyun }
417*4882a593Smuzhiyun
max8998_get_current_limit(struct regulator_dev * rdev)418*4882a593Smuzhiyun static int max8998_get_current_limit(struct regulator_dev *rdev)
419*4882a593Smuzhiyun {
420*4882a593Smuzhiyun struct max8998_data *max8998 = rdev_get_drvdata(rdev);
421*4882a593Smuzhiyun struct i2c_client *i2c = max8998->iodev->i2c;
422*4882a593Smuzhiyun u8 val;
423*4882a593Smuzhiyun int ret;
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun ret = max8998_read_reg(i2c, rdev->desc->csel_reg, &val);
426*4882a593Smuzhiyun if (ret != 0)
427*4882a593Smuzhiyun return ret;
428*4882a593Smuzhiyun
429*4882a593Smuzhiyun val &= rdev->desc->csel_mask;
430*4882a593Smuzhiyun val >>= ffs(rdev->desc->csel_mask) - 1;
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun if (rdev->desc->curr_table) {
433*4882a593Smuzhiyun if (val >= rdev->desc->n_current_limits)
434*4882a593Smuzhiyun return -EINVAL;
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun return rdev->desc->curr_table[val];
437*4882a593Smuzhiyun }
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun return -EINVAL;
440*4882a593Smuzhiyun }
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun static const struct regulator_ops max8998_ldo_ops = {
443*4882a593Smuzhiyun .list_voltage = regulator_list_voltage_linear,
444*4882a593Smuzhiyun .map_voltage = regulator_map_voltage_linear,
445*4882a593Smuzhiyun .is_enabled = max8998_ldo_is_enabled,
446*4882a593Smuzhiyun .enable = max8998_ldo_enable,
447*4882a593Smuzhiyun .disable = max8998_ldo_disable,
448*4882a593Smuzhiyun .get_voltage_sel = max8998_get_voltage_sel,
449*4882a593Smuzhiyun .set_voltage_sel = max8998_set_voltage_ldo_sel,
450*4882a593Smuzhiyun };
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun static const struct regulator_ops max8998_buck_ops = {
453*4882a593Smuzhiyun .list_voltage = regulator_list_voltage_linear,
454*4882a593Smuzhiyun .map_voltage = regulator_map_voltage_linear,
455*4882a593Smuzhiyun .is_enabled = max8998_ldo_is_enabled,
456*4882a593Smuzhiyun .enable = max8998_ldo_enable,
457*4882a593Smuzhiyun .disable = max8998_ldo_disable,
458*4882a593Smuzhiyun .get_voltage_sel = max8998_get_voltage_sel,
459*4882a593Smuzhiyun .set_voltage_sel = max8998_set_voltage_buck_sel,
460*4882a593Smuzhiyun .set_voltage_time_sel = max8998_set_voltage_buck_time_sel,
461*4882a593Smuzhiyun };
462*4882a593Smuzhiyun
463*4882a593Smuzhiyun static const struct regulator_ops max8998_charger_ops = {
464*4882a593Smuzhiyun .set_current_limit = max8998_set_current_limit,
465*4882a593Smuzhiyun .get_current_limit = max8998_get_current_limit,
466*4882a593Smuzhiyun .is_enabled = max8998_ldo_is_enabled_inverted,
467*4882a593Smuzhiyun /* Swapped as register is inverted */
468*4882a593Smuzhiyun .enable = max8998_ldo_disable,
469*4882a593Smuzhiyun .disable = max8998_ldo_enable,
470*4882a593Smuzhiyun };
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun static const struct regulator_ops max8998_others_ops = {
473*4882a593Smuzhiyun .is_enabled = max8998_ldo_is_enabled,
474*4882a593Smuzhiyun .enable = max8998_ldo_enable,
475*4882a593Smuzhiyun .disable = max8998_ldo_disable,
476*4882a593Smuzhiyun };
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun #define MAX8998_LINEAR_REG(_name, _ops, _min, _step, _max) \
479*4882a593Smuzhiyun { \
480*4882a593Smuzhiyun .name = #_name, \
481*4882a593Smuzhiyun .id = MAX8998_##_name, \
482*4882a593Smuzhiyun .ops = _ops, \
483*4882a593Smuzhiyun .min_uV = (_min), \
484*4882a593Smuzhiyun .uV_step = (_step), \
485*4882a593Smuzhiyun .n_voltages = ((_max) - (_min)) / (_step) + 1, \
486*4882a593Smuzhiyun .type = REGULATOR_VOLTAGE, \
487*4882a593Smuzhiyun .owner = THIS_MODULE, \
488*4882a593Smuzhiyun }
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun #define MAX8998_CURRENT_REG(_name, _ops, _table, _reg, _mask) \
491*4882a593Smuzhiyun { \
492*4882a593Smuzhiyun .name = #_name, \
493*4882a593Smuzhiyun .id = MAX8998_##_name, \
494*4882a593Smuzhiyun .ops = _ops, \
495*4882a593Smuzhiyun .curr_table = _table, \
496*4882a593Smuzhiyun .n_current_limits = ARRAY_SIZE(_table), \
497*4882a593Smuzhiyun .csel_reg = _reg, \
498*4882a593Smuzhiyun .csel_mask = _mask, \
499*4882a593Smuzhiyun .type = REGULATOR_CURRENT, \
500*4882a593Smuzhiyun .owner = THIS_MODULE, \
501*4882a593Smuzhiyun }
502*4882a593Smuzhiyun
503*4882a593Smuzhiyun #define MAX8998_OTHERS_REG(_name, _id) \
504*4882a593Smuzhiyun { \
505*4882a593Smuzhiyun .name = #_name, \
506*4882a593Smuzhiyun .id = _id, \
507*4882a593Smuzhiyun .ops = &max8998_others_ops, \
508*4882a593Smuzhiyun .type = REGULATOR_VOLTAGE, \
509*4882a593Smuzhiyun .owner = THIS_MODULE, \
510*4882a593Smuzhiyun }
511*4882a593Smuzhiyun
512*4882a593Smuzhiyun static const struct regulator_desc regulators[] = {
513*4882a593Smuzhiyun MAX8998_LINEAR_REG(LDO2, &max8998_ldo_ops, 800000, 50000, 1300000),
514*4882a593Smuzhiyun MAX8998_LINEAR_REG(LDO3, &max8998_ldo_ops, 800000, 50000, 1300000),
515*4882a593Smuzhiyun MAX8998_LINEAR_REG(LDO4, &max8998_ldo_ops, 1600000, 100000, 3600000),
516*4882a593Smuzhiyun MAX8998_LINEAR_REG(LDO5, &max8998_ldo_ops, 1600000, 100000, 3600000),
517*4882a593Smuzhiyun MAX8998_LINEAR_REG(LDO6, &max8998_ldo_ops, 1600000, 100000, 3600000),
518*4882a593Smuzhiyun MAX8998_LINEAR_REG(LDO7, &max8998_ldo_ops, 1600000, 100000, 3600000),
519*4882a593Smuzhiyun MAX8998_LINEAR_REG(LDO8, &max8998_ldo_ops, 3000000, 100000, 3600000),
520*4882a593Smuzhiyun MAX8998_LINEAR_REG(LDO9, &max8998_ldo_ops, 2800000, 100000, 3100000),
521*4882a593Smuzhiyun MAX8998_LINEAR_REG(LDO10, &max8998_ldo_ops, 950000, 50000, 1300000),
522*4882a593Smuzhiyun MAX8998_LINEAR_REG(LDO11, &max8998_ldo_ops, 1600000, 100000, 3600000),
523*4882a593Smuzhiyun MAX8998_LINEAR_REG(LDO12, &max8998_ldo_ops, 800000, 100000, 3300000),
524*4882a593Smuzhiyun MAX8998_LINEAR_REG(LDO13, &max8998_ldo_ops, 800000, 100000, 3300000),
525*4882a593Smuzhiyun MAX8998_LINEAR_REG(LDO14, &max8998_ldo_ops, 1200000, 100000, 3300000),
526*4882a593Smuzhiyun MAX8998_LINEAR_REG(LDO15, &max8998_ldo_ops, 1200000, 100000, 3300000),
527*4882a593Smuzhiyun MAX8998_LINEAR_REG(LDO16, &max8998_ldo_ops, 1600000, 100000, 3600000),
528*4882a593Smuzhiyun MAX8998_LINEAR_REG(LDO17, &max8998_ldo_ops, 1600000, 100000, 3600000),
529*4882a593Smuzhiyun MAX8998_LINEAR_REG(BUCK1, &max8998_buck_ops, 750000, 25000, 1525000),
530*4882a593Smuzhiyun MAX8998_LINEAR_REG(BUCK2, &max8998_buck_ops, 750000, 25000, 1525000),
531*4882a593Smuzhiyun MAX8998_LINEAR_REG(BUCK3, &max8998_buck_ops, 1600000, 100000, 3600000),
532*4882a593Smuzhiyun MAX8998_LINEAR_REG(BUCK4, &max8998_buck_ops, 800000, 100000, 2300000),
533*4882a593Smuzhiyun MAX8998_OTHERS_REG(EN32KHz-AP, MAX8998_EN32KHZ_AP),
534*4882a593Smuzhiyun MAX8998_OTHERS_REG(EN32KHz-CP, MAX8998_EN32KHZ_CP),
535*4882a593Smuzhiyun MAX8998_OTHERS_REG(ENVICHG, MAX8998_ENVICHG),
536*4882a593Smuzhiyun MAX8998_OTHERS_REG(ESAFEOUT1, MAX8998_ESAFEOUT1),
537*4882a593Smuzhiyun MAX8998_OTHERS_REG(ESAFEOUT2, MAX8998_ESAFEOUT2),
538*4882a593Smuzhiyun MAX8998_CURRENT_REG(CHARGER, &max8998_charger_ops,
539*4882a593Smuzhiyun charger_current_table, MAX8998_REG_CHGR1, 0x7),
540*4882a593Smuzhiyun };
541*4882a593Smuzhiyun
max8998_pmic_dt_parse_dvs_gpio(struct max8998_dev * iodev,struct max8998_platform_data * pdata,struct device_node * pmic_np)542*4882a593Smuzhiyun static int max8998_pmic_dt_parse_dvs_gpio(struct max8998_dev *iodev,
543*4882a593Smuzhiyun struct max8998_platform_data *pdata,
544*4882a593Smuzhiyun struct device_node *pmic_np)
545*4882a593Smuzhiyun {
546*4882a593Smuzhiyun int gpio;
547*4882a593Smuzhiyun
548*4882a593Smuzhiyun gpio = of_get_named_gpio(pmic_np, "max8998,pmic-buck1-dvs-gpios", 0);
549*4882a593Smuzhiyun if (!gpio_is_valid(gpio)) {
550*4882a593Smuzhiyun dev_err(iodev->dev, "invalid buck1 gpio[0]: %d\n", gpio);
551*4882a593Smuzhiyun return -EINVAL;
552*4882a593Smuzhiyun }
553*4882a593Smuzhiyun pdata->buck1_set1 = gpio;
554*4882a593Smuzhiyun
555*4882a593Smuzhiyun gpio = of_get_named_gpio(pmic_np, "max8998,pmic-buck1-dvs-gpios", 1);
556*4882a593Smuzhiyun if (!gpio_is_valid(gpio)) {
557*4882a593Smuzhiyun dev_err(iodev->dev, "invalid buck1 gpio[1]: %d\n", gpio);
558*4882a593Smuzhiyun return -EINVAL;
559*4882a593Smuzhiyun }
560*4882a593Smuzhiyun pdata->buck1_set2 = gpio;
561*4882a593Smuzhiyun
562*4882a593Smuzhiyun gpio = of_get_named_gpio(pmic_np, "max8998,pmic-buck2-dvs-gpio", 0);
563*4882a593Smuzhiyun if (!gpio_is_valid(gpio)) {
564*4882a593Smuzhiyun dev_err(iodev->dev, "invalid buck 2 gpio: %d\n", gpio);
565*4882a593Smuzhiyun return -EINVAL;
566*4882a593Smuzhiyun }
567*4882a593Smuzhiyun pdata->buck2_set3 = gpio;
568*4882a593Smuzhiyun
569*4882a593Smuzhiyun return 0;
570*4882a593Smuzhiyun }
571*4882a593Smuzhiyun
max8998_pmic_dt_parse_pdata(struct max8998_dev * iodev,struct max8998_platform_data * pdata)572*4882a593Smuzhiyun static int max8998_pmic_dt_parse_pdata(struct max8998_dev *iodev,
573*4882a593Smuzhiyun struct max8998_platform_data *pdata)
574*4882a593Smuzhiyun {
575*4882a593Smuzhiyun struct device_node *pmic_np = iodev->dev->of_node;
576*4882a593Smuzhiyun struct device_node *regulators_np, *reg_np;
577*4882a593Smuzhiyun struct max8998_regulator_data *rdata;
578*4882a593Smuzhiyun unsigned int i;
579*4882a593Smuzhiyun int ret;
580*4882a593Smuzhiyun
581*4882a593Smuzhiyun regulators_np = of_get_child_by_name(pmic_np, "regulators");
582*4882a593Smuzhiyun if (!regulators_np) {
583*4882a593Smuzhiyun dev_err(iodev->dev, "could not find regulators sub-node\n");
584*4882a593Smuzhiyun return -EINVAL;
585*4882a593Smuzhiyun }
586*4882a593Smuzhiyun
587*4882a593Smuzhiyun /* count the number of regulators to be supported in pmic */
588*4882a593Smuzhiyun pdata->num_regulators = of_get_child_count(regulators_np);
589*4882a593Smuzhiyun
590*4882a593Smuzhiyun rdata = devm_kcalloc(iodev->dev,
591*4882a593Smuzhiyun pdata->num_regulators, sizeof(*rdata),
592*4882a593Smuzhiyun GFP_KERNEL);
593*4882a593Smuzhiyun if (!rdata) {
594*4882a593Smuzhiyun of_node_put(regulators_np);
595*4882a593Smuzhiyun return -ENOMEM;
596*4882a593Smuzhiyun }
597*4882a593Smuzhiyun
598*4882a593Smuzhiyun pdata->regulators = rdata;
599*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(regulators); ++i) {
600*4882a593Smuzhiyun reg_np = of_get_child_by_name(regulators_np,
601*4882a593Smuzhiyun regulators[i].name);
602*4882a593Smuzhiyun if (!reg_np)
603*4882a593Smuzhiyun continue;
604*4882a593Smuzhiyun
605*4882a593Smuzhiyun rdata->id = regulators[i].id;
606*4882a593Smuzhiyun rdata->initdata = of_get_regulator_init_data(iodev->dev,
607*4882a593Smuzhiyun reg_np,
608*4882a593Smuzhiyun ®ulators[i]);
609*4882a593Smuzhiyun rdata->reg_node = reg_np;
610*4882a593Smuzhiyun ++rdata;
611*4882a593Smuzhiyun }
612*4882a593Smuzhiyun pdata->num_regulators = rdata - pdata->regulators;
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun of_node_put(reg_np);
615*4882a593Smuzhiyun of_node_put(regulators_np);
616*4882a593Smuzhiyun
617*4882a593Smuzhiyun ret = max8998_pmic_dt_parse_dvs_gpio(iodev, pdata, pmic_np);
618*4882a593Smuzhiyun if (ret)
619*4882a593Smuzhiyun return -EINVAL;
620*4882a593Smuzhiyun
621*4882a593Smuzhiyun if (of_find_property(pmic_np, "max8998,pmic-buck-voltage-lock", NULL))
622*4882a593Smuzhiyun pdata->buck_voltage_lock = true;
623*4882a593Smuzhiyun
624*4882a593Smuzhiyun ret = of_property_read_u32(pmic_np,
625*4882a593Smuzhiyun "max8998,pmic-buck1-default-dvs-idx",
626*4882a593Smuzhiyun &pdata->buck1_default_idx);
627*4882a593Smuzhiyun if (!ret && pdata->buck1_default_idx >= 4) {
628*4882a593Smuzhiyun pdata->buck1_default_idx = 0;
629*4882a593Smuzhiyun dev_warn(iodev->dev, "invalid value for default dvs index, using 0 instead\n");
630*4882a593Smuzhiyun }
631*4882a593Smuzhiyun
632*4882a593Smuzhiyun ret = of_property_read_u32(pmic_np,
633*4882a593Smuzhiyun "max8998,pmic-buck2-default-dvs-idx",
634*4882a593Smuzhiyun &pdata->buck2_default_idx);
635*4882a593Smuzhiyun if (!ret && pdata->buck2_default_idx >= 2) {
636*4882a593Smuzhiyun pdata->buck2_default_idx = 0;
637*4882a593Smuzhiyun dev_warn(iodev->dev, "invalid value for default dvs index, using 0 instead\n");
638*4882a593Smuzhiyun }
639*4882a593Smuzhiyun
640*4882a593Smuzhiyun ret = of_property_read_u32_array(pmic_np,
641*4882a593Smuzhiyun "max8998,pmic-buck1-dvs-voltage",
642*4882a593Smuzhiyun pdata->buck1_voltage,
643*4882a593Smuzhiyun ARRAY_SIZE(pdata->buck1_voltage));
644*4882a593Smuzhiyun if (ret) {
645*4882a593Smuzhiyun dev_err(iodev->dev, "buck1 voltages not specified\n");
646*4882a593Smuzhiyun return -EINVAL;
647*4882a593Smuzhiyun }
648*4882a593Smuzhiyun
649*4882a593Smuzhiyun ret = of_property_read_u32_array(pmic_np,
650*4882a593Smuzhiyun "max8998,pmic-buck2-dvs-voltage",
651*4882a593Smuzhiyun pdata->buck2_voltage,
652*4882a593Smuzhiyun ARRAY_SIZE(pdata->buck2_voltage));
653*4882a593Smuzhiyun if (ret) {
654*4882a593Smuzhiyun dev_err(iodev->dev, "buck2 voltages not specified\n");
655*4882a593Smuzhiyun return -EINVAL;
656*4882a593Smuzhiyun }
657*4882a593Smuzhiyun
658*4882a593Smuzhiyun return 0;
659*4882a593Smuzhiyun }
660*4882a593Smuzhiyun
max8998_pmic_probe(struct platform_device * pdev)661*4882a593Smuzhiyun static int max8998_pmic_probe(struct platform_device *pdev)
662*4882a593Smuzhiyun {
663*4882a593Smuzhiyun struct max8998_dev *iodev = dev_get_drvdata(pdev->dev.parent);
664*4882a593Smuzhiyun struct max8998_platform_data *pdata = iodev->pdata;
665*4882a593Smuzhiyun struct regulator_config config = { };
666*4882a593Smuzhiyun struct regulator_dev *rdev;
667*4882a593Smuzhiyun struct max8998_data *max8998;
668*4882a593Smuzhiyun struct i2c_client *i2c;
669*4882a593Smuzhiyun int i, ret;
670*4882a593Smuzhiyun unsigned int v;
671*4882a593Smuzhiyun
672*4882a593Smuzhiyun if (!pdata) {
673*4882a593Smuzhiyun dev_err(pdev->dev.parent, "No platform init data supplied\n");
674*4882a593Smuzhiyun return -ENODEV;
675*4882a593Smuzhiyun }
676*4882a593Smuzhiyun
677*4882a593Smuzhiyun if (IS_ENABLED(CONFIG_OF) && iodev->dev->of_node) {
678*4882a593Smuzhiyun ret = max8998_pmic_dt_parse_pdata(iodev, pdata);
679*4882a593Smuzhiyun if (ret)
680*4882a593Smuzhiyun return ret;
681*4882a593Smuzhiyun }
682*4882a593Smuzhiyun
683*4882a593Smuzhiyun max8998 = devm_kzalloc(&pdev->dev, sizeof(struct max8998_data),
684*4882a593Smuzhiyun GFP_KERNEL);
685*4882a593Smuzhiyun if (!max8998)
686*4882a593Smuzhiyun return -ENOMEM;
687*4882a593Smuzhiyun
688*4882a593Smuzhiyun max8998->dev = &pdev->dev;
689*4882a593Smuzhiyun max8998->iodev = iodev;
690*4882a593Smuzhiyun max8998->num_regulators = pdata->num_regulators;
691*4882a593Smuzhiyun platform_set_drvdata(pdev, max8998);
692*4882a593Smuzhiyun i2c = max8998->iodev->i2c;
693*4882a593Smuzhiyun
694*4882a593Smuzhiyun max8998->buck1_idx = pdata->buck1_default_idx;
695*4882a593Smuzhiyun max8998->buck2_idx = pdata->buck2_default_idx;
696*4882a593Smuzhiyun
697*4882a593Smuzhiyun /* NOTE: */
698*4882a593Smuzhiyun /* For unused GPIO NOT marked as -1 (thereof equal to 0) WARN_ON */
699*4882a593Smuzhiyun /* will be displayed */
700*4882a593Smuzhiyun
701*4882a593Smuzhiyun /* Check if MAX8998 voltage selection GPIOs are defined */
702*4882a593Smuzhiyun if (gpio_is_valid(pdata->buck1_set1) &&
703*4882a593Smuzhiyun gpio_is_valid(pdata->buck1_set2)) {
704*4882a593Smuzhiyun /* Check if SET1 is not equal to 0 */
705*4882a593Smuzhiyun if (!pdata->buck1_set1) {
706*4882a593Smuzhiyun dev_err(&pdev->dev,
707*4882a593Smuzhiyun "MAX8998 SET1 GPIO defined as 0 !\n");
708*4882a593Smuzhiyun WARN_ON(!pdata->buck1_set1);
709*4882a593Smuzhiyun return -EIO;
710*4882a593Smuzhiyun }
711*4882a593Smuzhiyun /* Check if SET2 is not equal to 0 */
712*4882a593Smuzhiyun if (!pdata->buck1_set2) {
713*4882a593Smuzhiyun dev_err(&pdev->dev,
714*4882a593Smuzhiyun "MAX8998 SET2 GPIO defined as 0 !\n");
715*4882a593Smuzhiyun WARN_ON(!pdata->buck1_set2);
716*4882a593Smuzhiyun return -EIO;
717*4882a593Smuzhiyun }
718*4882a593Smuzhiyun
719*4882a593Smuzhiyun gpio_request(pdata->buck1_set1, "MAX8998 BUCK1_SET1");
720*4882a593Smuzhiyun gpio_direction_output(pdata->buck1_set1,
721*4882a593Smuzhiyun max8998->buck1_idx & 0x1);
722*4882a593Smuzhiyun
723*4882a593Smuzhiyun
724*4882a593Smuzhiyun gpio_request(pdata->buck1_set2, "MAX8998 BUCK1_SET2");
725*4882a593Smuzhiyun gpio_direction_output(pdata->buck1_set2,
726*4882a593Smuzhiyun (max8998->buck1_idx >> 1) & 0x1);
727*4882a593Smuzhiyun
728*4882a593Smuzhiyun /* Set predefined values for BUCK1 registers */
729*4882a593Smuzhiyun for (v = 0; v < ARRAY_SIZE(pdata->buck1_voltage); ++v) {
730*4882a593Smuzhiyun int index = MAX8998_BUCK1 - MAX8998_LDO2;
731*4882a593Smuzhiyun
732*4882a593Smuzhiyun i = 0;
733*4882a593Smuzhiyun while (regulators[index].min_uV +
734*4882a593Smuzhiyun regulators[index].uV_step * i
735*4882a593Smuzhiyun < pdata->buck1_voltage[v])
736*4882a593Smuzhiyun i++;
737*4882a593Smuzhiyun
738*4882a593Smuzhiyun max8998->buck1_vol[v] = i;
739*4882a593Smuzhiyun ret = max8998_write_reg(i2c,
740*4882a593Smuzhiyun MAX8998_REG_BUCK1_VOLTAGE1 + v, i);
741*4882a593Smuzhiyun if (ret)
742*4882a593Smuzhiyun return ret;
743*4882a593Smuzhiyun }
744*4882a593Smuzhiyun }
745*4882a593Smuzhiyun
746*4882a593Smuzhiyun if (gpio_is_valid(pdata->buck2_set3)) {
747*4882a593Smuzhiyun /* Check if SET3 is not equal to 0 */
748*4882a593Smuzhiyun if (!pdata->buck2_set3) {
749*4882a593Smuzhiyun dev_err(&pdev->dev,
750*4882a593Smuzhiyun "MAX8998 SET3 GPIO defined as 0 !\n");
751*4882a593Smuzhiyun WARN_ON(!pdata->buck2_set3);
752*4882a593Smuzhiyun return -EIO;
753*4882a593Smuzhiyun }
754*4882a593Smuzhiyun gpio_request(pdata->buck2_set3, "MAX8998 BUCK2_SET3");
755*4882a593Smuzhiyun gpio_direction_output(pdata->buck2_set3,
756*4882a593Smuzhiyun max8998->buck2_idx & 0x1);
757*4882a593Smuzhiyun
758*4882a593Smuzhiyun /* Set predefined values for BUCK2 registers */
759*4882a593Smuzhiyun for (v = 0; v < ARRAY_SIZE(pdata->buck2_voltage); ++v) {
760*4882a593Smuzhiyun int index = MAX8998_BUCK2 - MAX8998_LDO2;
761*4882a593Smuzhiyun
762*4882a593Smuzhiyun i = 0;
763*4882a593Smuzhiyun while (regulators[index].min_uV +
764*4882a593Smuzhiyun regulators[index].uV_step * i
765*4882a593Smuzhiyun < pdata->buck2_voltage[v])
766*4882a593Smuzhiyun i++;
767*4882a593Smuzhiyun
768*4882a593Smuzhiyun max8998->buck2_vol[v] = i;
769*4882a593Smuzhiyun ret = max8998_write_reg(i2c,
770*4882a593Smuzhiyun MAX8998_REG_BUCK2_VOLTAGE1 + v, i);
771*4882a593Smuzhiyun if (ret)
772*4882a593Smuzhiyun return ret;
773*4882a593Smuzhiyun }
774*4882a593Smuzhiyun }
775*4882a593Smuzhiyun
776*4882a593Smuzhiyun for (i = 0; i < pdata->num_regulators; i++) {
777*4882a593Smuzhiyun int index = pdata->regulators[i].id - MAX8998_LDO2;
778*4882a593Smuzhiyun
779*4882a593Smuzhiyun config.dev = max8998->dev;
780*4882a593Smuzhiyun config.of_node = pdata->regulators[i].reg_node;
781*4882a593Smuzhiyun config.init_data = pdata->regulators[i].initdata;
782*4882a593Smuzhiyun config.driver_data = max8998;
783*4882a593Smuzhiyun
784*4882a593Smuzhiyun rdev = devm_regulator_register(&pdev->dev, ®ulators[index],
785*4882a593Smuzhiyun &config);
786*4882a593Smuzhiyun if (IS_ERR(rdev)) {
787*4882a593Smuzhiyun ret = PTR_ERR(rdev);
788*4882a593Smuzhiyun dev_err(max8998->dev, "regulator %s init failed (%d)\n",
789*4882a593Smuzhiyun regulators[index].name, ret);
790*4882a593Smuzhiyun return ret;
791*4882a593Smuzhiyun }
792*4882a593Smuzhiyun }
793*4882a593Smuzhiyun
794*4882a593Smuzhiyun return 0;
795*4882a593Smuzhiyun }
796*4882a593Smuzhiyun
797*4882a593Smuzhiyun static const struct platform_device_id max8998_pmic_id[] = {
798*4882a593Smuzhiyun { "max8998-pmic", TYPE_MAX8998 },
799*4882a593Smuzhiyun { "lp3974-pmic", TYPE_LP3974 },
800*4882a593Smuzhiyun { }
801*4882a593Smuzhiyun };
802*4882a593Smuzhiyun MODULE_DEVICE_TABLE(platform, max8998_pmic_id);
803*4882a593Smuzhiyun
804*4882a593Smuzhiyun static struct platform_driver max8998_pmic_driver = {
805*4882a593Smuzhiyun .driver = {
806*4882a593Smuzhiyun .name = "max8998-pmic",
807*4882a593Smuzhiyun },
808*4882a593Smuzhiyun .probe = max8998_pmic_probe,
809*4882a593Smuzhiyun .id_table = max8998_pmic_id,
810*4882a593Smuzhiyun };
811*4882a593Smuzhiyun
max8998_pmic_init(void)812*4882a593Smuzhiyun static int __init max8998_pmic_init(void)
813*4882a593Smuzhiyun {
814*4882a593Smuzhiyun return platform_driver_register(&max8998_pmic_driver);
815*4882a593Smuzhiyun }
816*4882a593Smuzhiyun subsys_initcall(max8998_pmic_init);
817*4882a593Smuzhiyun
max8998_pmic_cleanup(void)818*4882a593Smuzhiyun static void __exit max8998_pmic_cleanup(void)
819*4882a593Smuzhiyun {
820*4882a593Smuzhiyun platform_driver_unregister(&max8998_pmic_driver);
821*4882a593Smuzhiyun }
822*4882a593Smuzhiyun module_exit(max8998_pmic_cleanup);
823*4882a593Smuzhiyun
824*4882a593Smuzhiyun MODULE_DESCRIPTION("MAXIM 8998 voltage regulator driver");
825*4882a593Smuzhiyun MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
826*4882a593Smuzhiyun MODULE_LICENSE("GPL");
827