xref: /OK3568_Linux_fs/kernel/drivers/regulator/max8997-regulator.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // max8997.c - Regulator driver for the Maxim 8997/8966
4*4882a593Smuzhiyun //
5*4882a593Smuzhiyun // Copyright (C) 2011 Samsung Electronics
6*4882a593Smuzhiyun // MyungJoo Ham <myungjoo.ham@samsung.com>
7*4882a593Smuzhiyun //
8*4882a593Smuzhiyun // This driver is based on max8998.c
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/bug.h>
11*4882a593Smuzhiyun #include <linux/err.h>
12*4882a593Smuzhiyun #include <linux/gpio.h>
13*4882a593Smuzhiyun #include <linux/of_gpio.h>
14*4882a593Smuzhiyun #include <linux/slab.h>
15*4882a593Smuzhiyun #include <linux/module.h>
16*4882a593Smuzhiyun #include <linux/platform_device.h>
17*4882a593Smuzhiyun #include <linux/regulator/driver.h>
18*4882a593Smuzhiyun #include <linux/regulator/machine.h>
19*4882a593Smuzhiyun #include <linux/mfd/max8997.h>
20*4882a593Smuzhiyun #include <linux/mfd/max8997-private.h>
21*4882a593Smuzhiyun #include <linux/regulator/of_regulator.h>
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun struct max8997_data {
24*4882a593Smuzhiyun 	struct device *dev;
25*4882a593Smuzhiyun 	struct max8997_dev *iodev;
26*4882a593Smuzhiyun 	int num_regulators;
27*4882a593Smuzhiyun 	int ramp_delay; /* in mV/us */
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun 	bool buck1_gpiodvs;
30*4882a593Smuzhiyun 	bool buck2_gpiodvs;
31*4882a593Smuzhiyun 	bool buck5_gpiodvs;
32*4882a593Smuzhiyun 	u8 buck1_vol[8];
33*4882a593Smuzhiyun 	u8 buck2_vol[8];
34*4882a593Smuzhiyun 	u8 buck5_vol[8];
35*4882a593Smuzhiyun 	int buck125_gpios[3];
36*4882a593Smuzhiyun 	int buck125_gpioindex;
37*4882a593Smuzhiyun 	bool ignore_gpiodvs_side_effect;
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun 	u8 saved_states[MAX8997_REG_MAX];
40*4882a593Smuzhiyun };
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun static const unsigned int safeoutvolt[] = {
43*4882a593Smuzhiyun 	4850000,
44*4882a593Smuzhiyun 	4900000,
45*4882a593Smuzhiyun 	4950000,
46*4882a593Smuzhiyun 	3300000,
47*4882a593Smuzhiyun };
48*4882a593Smuzhiyun 
max8997_set_gpio(struct max8997_data * max8997)49*4882a593Smuzhiyun static inline void max8997_set_gpio(struct max8997_data *max8997)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun 	int set3 = (max8997->buck125_gpioindex) & 0x1;
52*4882a593Smuzhiyun 	int set2 = ((max8997->buck125_gpioindex) >> 1) & 0x1;
53*4882a593Smuzhiyun 	int set1 = ((max8997->buck125_gpioindex) >> 2) & 0x1;
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun 	gpio_set_value(max8997->buck125_gpios[0], set1);
56*4882a593Smuzhiyun 	gpio_set_value(max8997->buck125_gpios[1], set2);
57*4882a593Smuzhiyun 	gpio_set_value(max8997->buck125_gpios[2], set3);
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun struct voltage_map_desc {
61*4882a593Smuzhiyun 	int min;
62*4882a593Smuzhiyun 	int max;
63*4882a593Smuzhiyun 	int step;
64*4882a593Smuzhiyun };
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun /* Voltage maps in uV */
67*4882a593Smuzhiyun static const struct voltage_map_desc ldo_voltage_map_desc = {
68*4882a593Smuzhiyun 	.min = 800000,	.max = 3950000,	.step = 50000,
69*4882a593Smuzhiyun }; /* LDO1 ~ 18, 21 all */
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun static const struct voltage_map_desc buck1245_voltage_map_desc = {
72*4882a593Smuzhiyun 	.min = 650000,	.max = 2225000,	.step = 25000,
73*4882a593Smuzhiyun }; /* Buck1, 2, 4, 5 */
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun static const struct voltage_map_desc buck37_voltage_map_desc = {
76*4882a593Smuzhiyun 	.min = 750000,	.max = 3900000,	.step = 50000,
77*4882a593Smuzhiyun }; /* Buck3, 7 */
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun /* current map in uA */
80*4882a593Smuzhiyun static const struct voltage_map_desc charger_current_map_desc = {
81*4882a593Smuzhiyun 	.min = 200000,	.max = 950000,	.step = 50000,
82*4882a593Smuzhiyun };
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun static const struct voltage_map_desc topoff_current_map_desc = {
85*4882a593Smuzhiyun 	.min = 50000,	.max = 200000,	.step = 10000,
86*4882a593Smuzhiyun };
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun static const struct voltage_map_desc *reg_voltage_map[] = {
89*4882a593Smuzhiyun 	[MAX8997_LDO1] = &ldo_voltage_map_desc,
90*4882a593Smuzhiyun 	[MAX8997_LDO2] = &ldo_voltage_map_desc,
91*4882a593Smuzhiyun 	[MAX8997_LDO3] = &ldo_voltage_map_desc,
92*4882a593Smuzhiyun 	[MAX8997_LDO4] = &ldo_voltage_map_desc,
93*4882a593Smuzhiyun 	[MAX8997_LDO5] = &ldo_voltage_map_desc,
94*4882a593Smuzhiyun 	[MAX8997_LDO6] = &ldo_voltage_map_desc,
95*4882a593Smuzhiyun 	[MAX8997_LDO7] = &ldo_voltage_map_desc,
96*4882a593Smuzhiyun 	[MAX8997_LDO8] = &ldo_voltage_map_desc,
97*4882a593Smuzhiyun 	[MAX8997_LDO9] = &ldo_voltage_map_desc,
98*4882a593Smuzhiyun 	[MAX8997_LDO10] = &ldo_voltage_map_desc,
99*4882a593Smuzhiyun 	[MAX8997_LDO11] = &ldo_voltage_map_desc,
100*4882a593Smuzhiyun 	[MAX8997_LDO12] = &ldo_voltage_map_desc,
101*4882a593Smuzhiyun 	[MAX8997_LDO13] = &ldo_voltage_map_desc,
102*4882a593Smuzhiyun 	[MAX8997_LDO14] = &ldo_voltage_map_desc,
103*4882a593Smuzhiyun 	[MAX8997_LDO15] = &ldo_voltage_map_desc,
104*4882a593Smuzhiyun 	[MAX8997_LDO16] = &ldo_voltage_map_desc,
105*4882a593Smuzhiyun 	[MAX8997_LDO17] = &ldo_voltage_map_desc,
106*4882a593Smuzhiyun 	[MAX8997_LDO18] = &ldo_voltage_map_desc,
107*4882a593Smuzhiyun 	[MAX8997_LDO21] = &ldo_voltage_map_desc,
108*4882a593Smuzhiyun 	[MAX8997_BUCK1] = &buck1245_voltage_map_desc,
109*4882a593Smuzhiyun 	[MAX8997_BUCK2] = &buck1245_voltage_map_desc,
110*4882a593Smuzhiyun 	[MAX8997_BUCK3] = &buck37_voltage_map_desc,
111*4882a593Smuzhiyun 	[MAX8997_BUCK4] = &buck1245_voltage_map_desc,
112*4882a593Smuzhiyun 	[MAX8997_BUCK5] = &buck1245_voltage_map_desc,
113*4882a593Smuzhiyun 	[MAX8997_BUCK6] = NULL,
114*4882a593Smuzhiyun 	[MAX8997_BUCK7] = &buck37_voltage_map_desc,
115*4882a593Smuzhiyun 	[MAX8997_EN32KHZ_AP] = NULL,
116*4882a593Smuzhiyun 	[MAX8997_EN32KHZ_CP] = NULL,
117*4882a593Smuzhiyun 	[MAX8997_ENVICHG] = NULL,
118*4882a593Smuzhiyun 	[MAX8997_ESAFEOUT1] = NULL,
119*4882a593Smuzhiyun 	[MAX8997_ESAFEOUT2] = NULL,
120*4882a593Smuzhiyun 	[MAX8997_CHARGER_CV] = NULL,
121*4882a593Smuzhiyun 	[MAX8997_CHARGER] = &charger_current_map_desc,
122*4882a593Smuzhiyun 	[MAX8997_CHARGER_TOPOFF] = &topoff_current_map_desc,
123*4882a593Smuzhiyun };
124*4882a593Smuzhiyun 
max8997_list_voltage_charger_cv(struct regulator_dev * rdev,unsigned int selector)125*4882a593Smuzhiyun static int max8997_list_voltage_charger_cv(struct regulator_dev *rdev,
126*4882a593Smuzhiyun 		unsigned int selector)
127*4882a593Smuzhiyun {
128*4882a593Smuzhiyun 	int rid = rdev_get_id(rdev);
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	if (rid != MAX8997_CHARGER_CV)
131*4882a593Smuzhiyun 		goto err;
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 	switch (selector) {
134*4882a593Smuzhiyun 	case 0x00:
135*4882a593Smuzhiyun 		return 4200000;
136*4882a593Smuzhiyun 	case 0x01 ... 0x0E:
137*4882a593Smuzhiyun 		return 4000000 + 20000 * (selector - 0x01);
138*4882a593Smuzhiyun 	case 0x0F:
139*4882a593Smuzhiyun 		return 4350000;
140*4882a593Smuzhiyun 	default:
141*4882a593Smuzhiyun 		return -EINVAL;
142*4882a593Smuzhiyun 	}
143*4882a593Smuzhiyun err:
144*4882a593Smuzhiyun 	return -EINVAL;
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun 
max8997_list_voltage(struct regulator_dev * rdev,unsigned int selector)147*4882a593Smuzhiyun static int max8997_list_voltage(struct regulator_dev *rdev,
148*4882a593Smuzhiyun 		unsigned int selector)
149*4882a593Smuzhiyun {
150*4882a593Smuzhiyun 	const struct voltage_map_desc *desc;
151*4882a593Smuzhiyun 	int rid = rdev_get_id(rdev);
152*4882a593Smuzhiyun 	int val;
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun 	if (rid < 0 || rid >= ARRAY_SIZE(reg_voltage_map))
155*4882a593Smuzhiyun 		return -EINVAL;
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 	desc = reg_voltage_map[rid];
158*4882a593Smuzhiyun 	if (desc == NULL)
159*4882a593Smuzhiyun 		return -EINVAL;
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun 	val = desc->min + desc->step * selector;
162*4882a593Smuzhiyun 	if (val > desc->max)
163*4882a593Smuzhiyun 		return -EINVAL;
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 	return val;
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun 
max8997_get_enable_register(struct regulator_dev * rdev,int * reg,int * mask,int * pattern)168*4882a593Smuzhiyun static int max8997_get_enable_register(struct regulator_dev *rdev,
169*4882a593Smuzhiyun 		int *reg, int *mask, int *pattern)
170*4882a593Smuzhiyun {
171*4882a593Smuzhiyun 	int rid = rdev_get_id(rdev);
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun 	switch (rid) {
174*4882a593Smuzhiyun 	case MAX8997_LDO1 ... MAX8997_LDO21:
175*4882a593Smuzhiyun 		*reg = MAX8997_REG_LDO1CTRL + (rid - MAX8997_LDO1);
176*4882a593Smuzhiyun 		*mask = 0xC0;
177*4882a593Smuzhiyun 		*pattern = 0xC0;
178*4882a593Smuzhiyun 		break;
179*4882a593Smuzhiyun 	case MAX8997_BUCK1:
180*4882a593Smuzhiyun 		*reg = MAX8997_REG_BUCK1CTRL;
181*4882a593Smuzhiyun 		*mask = 0x01;
182*4882a593Smuzhiyun 		*pattern = 0x01;
183*4882a593Smuzhiyun 		break;
184*4882a593Smuzhiyun 	case MAX8997_BUCK2:
185*4882a593Smuzhiyun 		*reg = MAX8997_REG_BUCK2CTRL;
186*4882a593Smuzhiyun 		*mask = 0x01;
187*4882a593Smuzhiyun 		*pattern = 0x01;
188*4882a593Smuzhiyun 		break;
189*4882a593Smuzhiyun 	case MAX8997_BUCK3:
190*4882a593Smuzhiyun 		*reg = MAX8997_REG_BUCK3CTRL;
191*4882a593Smuzhiyun 		*mask = 0x01;
192*4882a593Smuzhiyun 		*pattern = 0x01;
193*4882a593Smuzhiyun 		break;
194*4882a593Smuzhiyun 	case MAX8997_BUCK4:
195*4882a593Smuzhiyun 		*reg = MAX8997_REG_BUCK4CTRL;
196*4882a593Smuzhiyun 		*mask = 0x01;
197*4882a593Smuzhiyun 		*pattern = 0x01;
198*4882a593Smuzhiyun 		break;
199*4882a593Smuzhiyun 	case MAX8997_BUCK5:
200*4882a593Smuzhiyun 		*reg = MAX8997_REG_BUCK5CTRL;
201*4882a593Smuzhiyun 		*mask = 0x01;
202*4882a593Smuzhiyun 		*pattern = 0x01;
203*4882a593Smuzhiyun 		break;
204*4882a593Smuzhiyun 	case MAX8997_BUCK6:
205*4882a593Smuzhiyun 		*reg = MAX8997_REG_BUCK6CTRL;
206*4882a593Smuzhiyun 		*mask = 0x01;
207*4882a593Smuzhiyun 		*pattern = 0x01;
208*4882a593Smuzhiyun 		break;
209*4882a593Smuzhiyun 	case MAX8997_BUCK7:
210*4882a593Smuzhiyun 		*reg = MAX8997_REG_BUCK7CTRL;
211*4882a593Smuzhiyun 		*mask = 0x01;
212*4882a593Smuzhiyun 		*pattern = 0x01;
213*4882a593Smuzhiyun 		break;
214*4882a593Smuzhiyun 	case MAX8997_EN32KHZ_AP ... MAX8997_EN32KHZ_CP:
215*4882a593Smuzhiyun 		*reg = MAX8997_REG_MAINCON1;
216*4882a593Smuzhiyun 		*mask = 0x01 << (rid - MAX8997_EN32KHZ_AP);
217*4882a593Smuzhiyun 		*pattern = 0x01 << (rid - MAX8997_EN32KHZ_AP);
218*4882a593Smuzhiyun 		break;
219*4882a593Smuzhiyun 	case MAX8997_ENVICHG:
220*4882a593Smuzhiyun 		*reg = MAX8997_REG_MBCCTRL1;
221*4882a593Smuzhiyun 		*mask = 0x80;
222*4882a593Smuzhiyun 		*pattern = 0x80;
223*4882a593Smuzhiyun 		break;
224*4882a593Smuzhiyun 	case MAX8997_ESAFEOUT1 ... MAX8997_ESAFEOUT2:
225*4882a593Smuzhiyun 		*reg = MAX8997_REG_SAFEOUTCTRL;
226*4882a593Smuzhiyun 		*mask = 0x40 << (rid - MAX8997_ESAFEOUT1);
227*4882a593Smuzhiyun 		*pattern = 0x40 << (rid - MAX8997_ESAFEOUT1);
228*4882a593Smuzhiyun 		break;
229*4882a593Smuzhiyun 	case MAX8997_CHARGER:
230*4882a593Smuzhiyun 		*reg = MAX8997_REG_MBCCTRL2;
231*4882a593Smuzhiyun 		*mask = 0x40;
232*4882a593Smuzhiyun 		*pattern = 0x40;
233*4882a593Smuzhiyun 		break;
234*4882a593Smuzhiyun 	default:
235*4882a593Smuzhiyun 		/* Not controllable or not exists */
236*4882a593Smuzhiyun 		return -EINVAL;
237*4882a593Smuzhiyun 	}
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun 	return 0;
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun 
max8997_reg_is_enabled(struct regulator_dev * rdev)242*4882a593Smuzhiyun static int max8997_reg_is_enabled(struct regulator_dev *rdev)
243*4882a593Smuzhiyun {
244*4882a593Smuzhiyun 	struct max8997_data *max8997 = rdev_get_drvdata(rdev);
245*4882a593Smuzhiyun 	struct i2c_client *i2c = max8997->iodev->i2c;
246*4882a593Smuzhiyun 	int ret, reg, mask, pattern;
247*4882a593Smuzhiyun 	u8 val;
248*4882a593Smuzhiyun 
249*4882a593Smuzhiyun 	ret = max8997_get_enable_register(rdev, &reg, &mask, &pattern);
250*4882a593Smuzhiyun 	if (ret)
251*4882a593Smuzhiyun 		return ret;
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun 	ret = max8997_read_reg(i2c, reg, &val);
254*4882a593Smuzhiyun 	if (ret)
255*4882a593Smuzhiyun 		return ret;
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun 	return (val & mask) == pattern;
258*4882a593Smuzhiyun }
259*4882a593Smuzhiyun 
max8997_reg_enable(struct regulator_dev * rdev)260*4882a593Smuzhiyun static int max8997_reg_enable(struct regulator_dev *rdev)
261*4882a593Smuzhiyun {
262*4882a593Smuzhiyun 	struct max8997_data *max8997 = rdev_get_drvdata(rdev);
263*4882a593Smuzhiyun 	struct i2c_client *i2c = max8997->iodev->i2c;
264*4882a593Smuzhiyun 	int ret, reg, mask, pattern;
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun 	ret = max8997_get_enable_register(rdev, &reg, &mask, &pattern);
267*4882a593Smuzhiyun 	if (ret)
268*4882a593Smuzhiyun 		return ret;
269*4882a593Smuzhiyun 
270*4882a593Smuzhiyun 	return max8997_update_reg(i2c, reg, pattern, mask);
271*4882a593Smuzhiyun }
272*4882a593Smuzhiyun 
max8997_reg_disable(struct regulator_dev * rdev)273*4882a593Smuzhiyun static int max8997_reg_disable(struct regulator_dev *rdev)
274*4882a593Smuzhiyun {
275*4882a593Smuzhiyun 	struct max8997_data *max8997 = rdev_get_drvdata(rdev);
276*4882a593Smuzhiyun 	struct i2c_client *i2c = max8997->iodev->i2c;
277*4882a593Smuzhiyun 	int ret, reg, mask, pattern;
278*4882a593Smuzhiyun 
279*4882a593Smuzhiyun 	ret = max8997_get_enable_register(rdev, &reg, &mask, &pattern);
280*4882a593Smuzhiyun 	if (ret)
281*4882a593Smuzhiyun 		return ret;
282*4882a593Smuzhiyun 
283*4882a593Smuzhiyun 	return max8997_update_reg(i2c, reg, ~pattern, mask);
284*4882a593Smuzhiyun }
285*4882a593Smuzhiyun 
max8997_get_voltage_register(struct regulator_dev * rdev,int * _reg,int * _shift,int * _mask)286*4882a593Smuzhiyun static int max8997_get_voltage_register(struct regulator_dev *rdev,
287*4882a593Smuzhiyun 		int *_reg, int *_shift, int *_mask)
288*4882a593Smuzhiyun {
289*4882a593Smuzhiyun 	struct max8997_data *max8997 = rdev_get_drvdata(rdev);
290*4882a593Smuzhiyun 	int rid = rdev_get_id(rdev);
291*4882a593Smuzhiyun 	int reg, shift = 0, mask = 0x3f;
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun 	switch (rid) {
294*4882a593Smuzhiyun 	case MAX8997_LDO1 ... MAX8997_LDO21:
295*4882a593Smuzhiyun 		reg = MAX8997_REG_LDO1CTRL + (rid - MAX8997_LDO1);
296*4882a593Smuzhiyun 		break;
297*4882a593Smuzhiyun 	case MAX8997_BUCK1:
298*4882a593Smuzhiyun 		reg = MAX8997_REG_BUCK1DVS1;
299*4882a593Smuzhiyun 		if (max8997->buck1_gpiodvs)
300*4882a593Smuzhiyun 			reg += max8997->buck125_gpioindex;
301*4882a593Smuzhiyun 		break;
302*4882a593Smuzhiyun 	case MAX8997_BUCK2:
303*4882a593Smuzhiyun 		reg = MAX8997_REG_BUCK2DVS1;
304*4882a593Smuzhiyun 		if (max8997->buck2_gpiodvs)
305*4882a593Smuzhiyun 			reg += max8997->buck125_gpioindex;
306*4882a593Smuzhiyun 		break;
307*4882a593Smuzhiyun 	case MAX8997_BUCK3:
308*4882a593Smuzhiyun 		reg = MAX8997_REG_BUCK3DVS;
309*4882a593Smuzhiyun 		break;
310*4882a593Smuzhiyun 	case MAX8997_BUCK4:
311*4882a593Smuzhiyun 		reg = MAX8997_REG_BUCK4DVS;
312*4882a593Smuzhiyun 		break;
313*4882a593Smuzhiyun 	case MAX8997_BUCK5:
314*4882a593Smuzhiyun 		reg = MAX8997_REG_BUCK5DVS1;
315*4882a593Smuzhiyun 		if (max8997->buck5_gpiodvs)
316*4882a593Smuzhiyun 			reg += max8997->buck125_gpioindex;
317*4882a593Smuzhiyun 		break;
318*4882a593Smuzhiyun 	case MAX8997_BUCK7:
319*4882a593Smuzhiyun 		reg = MAX8997_REG_BUCK7DVS;
320*4882a593Smuzhiyun 		break;
321*4882a593Smuzhiyun 	case MAX8997_ESAFEOUT1 ...  MAX8997_ESAFEOUT2:
322*4882a593Smuzhiyun 		reg = MAX8997_REG_SAFEOUTCTRL;
323*4882a593Smuzhiyun 		shift = (rid == MAX8997_ESAFEOUT2) ? 2 : 0;
324*4882a593Smuzhiyun 		mask = 0x3;
325*4882a593Smuzhiyun 		break;
326*4882a593Smuzhiyun 	case MAX8997_CHARGER_CV:
327*4882a593Smuzhiyun 		reg = MAX8997_REG_MBCCTRL3;
328*4882a593Smuzhiyun 		shift = 0;
329*4882a593Smuzhiyun 		mask = 0xf;
330*4882a593Smuzhiyun 		break;
331*4882a593Smuzhiyun 	case MAX8997_CHARGER:
332*4882a593Smuzhiyun 		reg = MAX8997_REG_MBCCTRL4;
333*4882a593Smuzhiyun 		shift = 0;
334*4882a593Smuzhiyun 		mask = 0xf;
335*4882a593Smuzhiyun 		break;
336*4882a593Smuzhiyun 	case MAX8997_CHARGER_TOPOFF:
337*4882a593Smuzhiyun 		reg = MAX8997_REG_MBCCTRL5;
338*4882a593Smuzhiyun 		shift = 0;
339*4882a593Smuzhiyun 		mask = 0xf;
340*4882a593Smuzhiyun 		break;
341*4882a593Smuzhiyun 	default:
342*4882a593Smuzhiyun 		return -EINVAL;
343*4882a593Smuzhiyun 	}
344*4882a593Smuzhiyun 
345*4882a593Smuzhiyun 	*_reg = reg;
346*4882a593Smuzhiyun 	*_shift = shift;
347*4882a593Smuzhiyun 	*_mask = mask;
348*4882a593Smuzhiyun 
349*4882a593Smuzhiyun 	return 0;
350*4882a593Smuzhiyun }
351*4882a593Smuzhiyun 
max8997_get_voltage_sel(struct regulator_dev * rdev)352*4882a593Smuzhiyun static int max8997_get_voltage_sel(struct regulator_dev *rdev)
353*4882a593Smuzhiyun {
354*4882a593Smuzhiyun 	struct max8997_data *max8997 = rdev_get_drvdata(rdev);
355*4882a593Smuzhiyun 	struct i2c_client *i2c = max8997->iodev->i2c;
356*4882a593Smuzhiyun 	int reg, shift, mask, ret;
357*4882a593Smuzhiyun 	u8 val;
358*4882a593Smuzhiyun 
359*4882a593Smuzhiyun 	ret = max8997_get_voltage_register(rdev, &reg, &shift, &mask);
360*4882a593Smuzhiyun 	if (ret)
361*4882a593Smuzhiyun 		return ret;
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun 	ret = max8997_read_reg(i2c, reg, &val);
364*4882a593Smuzhiyun 	if (ret)
365*4882a593Smuzhiyun 		return ret;
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun 	val >>= shift;
368*4882a593Smuzhiyun 	val &= mask;
369*4882a593Smuzhiyun 
370*4882a593Smuzhiyun 	return val;
371*4882a593Smuzhiyun }
372*4882a593Smuzhiyun 
max8997_get_voltage_proper_val(const struct voltage_map_desc * desc,int min_vol,int max_vol)373*4882a593Smuzhiyun static inline int max8997_get_voltage_proper_val(
374*4882a593Smuzhiyun 		const struct voltage_map_desc *desc,
375*4882a593Smuzhiyun 		int min_vol, int max_vol)
376*4882a593Smuzhiyun {
377*4882a593Smuzhiyun 	int i;
378*4882a593Smuzhiyun 
379*4882a593Smuzhiyun 	if (desc == NULL)
380*4882a593Smuzhiyun 		return -EINVAL;
381*4882a593Smuzhiyun 
382*4882a593Smuzhiyun 	if (max_vol < desc->min || min_vol > desc->max)
383*4882a593Smuzhiyun 		return -EINVAL;
384*4882a593Smuzhiyun 
385*4882a593Smuzhiyun 	if (min_vol < desc->min)
386*4882a593Smuzhiyun 		min_vol = desc->min;
387*4882a593Smuzhiyun 
388*4882a593Smuzhiyun 	i = DIV_ROUND_UP(min_vol - desc->min, desc->step);
389*4882a593Smuzhiyun 
390*4882a593Smuzhiyun 	if (desc->min + desc->step * i > max_vol)
391*4882a593Smuzhiyun 		return -EINVAL;
392*4882a593Smuzhiyun 
393*4882a593Smuzhiyun 	return i;
394*4882a593Smuzhiyun }
395*4882a593Smuzhiyun 
max8997_set_voltage_charger_cv(struct regulator_dev * rdev,int min_uV,int max_uV,unsigned * selector)396*4882a593Smuzhiyun static int max8997_set_voltage_charger_cv(struct regulator_dev *rdev,
397*4882a593Smuzhiyun 		int min_uV, int max_uV, unsigned *selector)
398*4882a593Smuzhiyun {
399*4882a593Smuzhiyun 	struct max8997_data *max8997 = rdev_get_drvdata(rdev);
400*4882a593Smuzhiyun 	struct i2c_client *i2c = max8997->iodev->i2c;
401*4882a593Smuzhiyun 	int rid = rdev_get_id(rdev);
402*4882a593Smuzhiyun 	int lb, ub;
403*4882a593Smuzhiyun 	int reg, shift = 0, mask, ret = 0;
404*4882a593Smuzhiyun 	u8 val = 0x0;
405*4882a593Smuzhiyun 
406*4882a593Smuzhiyun 	if (rid != MAX8997_CHARGER_CV)
407*4882a593Smuzhiyun 		return -EINVAL;
408*4882a593Smuzhiyun 
409*4882a593Smuzhiyun 	ret = max8997_get_voltage_register(rdev, &reg, &shift, &mask);
410*4882a593Smuzhiyun 	if (ret)
411*4882a593Smuzhiyun 		return ret;
412*4882a593Smuzhiyun 
413*4882a593Smuzhiyun 	if (max_uV < 4000000 || min_uV > 4350000)
414*4882a593Smuzhiyun 		return -EINVAL;
415*4882a593Smuzhiyun 
416*4882a593Smuzhiyun 	if (min_uV <= 4000000)
417*4882a593Smuzhiyun 		val = 0x1;
418*4882a593Smuzhiyun 	else if (min_uV <= 4200000 && max_uV >= 4200000)
419*4882a593Smuzhiyun 		val = 0x0;
420*4882a593Smuzhiyun 	else {
421*4882a593Smuzhiyun 		lb = (min_uV - 4000001) / 20000 + 2;
422*4882a593Smuzhiyun 		ub = (max_uV - 4000000) / 20000 + 1;
423*4882a593Smuzhiyun 
424*4882a593Smuzhiyun 		if (lb > ub)
425*4882a593Smuzhiyun 			return -EINVAL;
426*4882a593Smuzhiyun 
427*4882a593Smuzhiyun 		if (lb < 0xf)
428*4882a593Smuzhiyun 			val = lb;
429*4882a593Smuzhiyun 		else {
430*4882a593Smuzhiyun 			if (ub >= 0xf)
431*4882a593Smuzhiyun 				val = 0xf;
432*4882a593Smuzhiyun 			else
433*4882a593Smuzhiyun 				return -EINVAL;
434*4882a593Smuzhiyun 		}
435*4882a593Smuzhiyun 	}
436*4882a593Smuzhiyun 
437*4882a593Smuzhiyun 	*selector = val;
438*4882a593Smuzhiyun 
439*4882a593Smuzhiyun 	ret = max8997_update_reg(i2c, reg, val << shift, mask);
440*4882a593Smuzhiyun 
441*4882a593Smuzhiyun 	return ret;
442*4882a593Smuzhiyun }
443*4882a593Smuzhiyun 
444*4882a593Smuzhiyun /*
445*4882a593Smuzhiyun  * For LDO1 ~ LDO21, BUCK1~5, BUCK7, CHARGER, CHARGER_TOPOFF
446*4882a593Smuzhiyun  * BUCK1, 2, and 5 are available if they are not controlled by gpio
447*4882a593Smuzhiyun  */
max8997_set_voltage_ldobuck(struct regulator_dev * rdev,int min_uV,int max_uV,unsigned * selector)448*4882a593Smuzhiyun static int max8997_set_voltage_ldobuck(struct regulator_dev *rdev,
449*4882a593Smuzhiyun 		int min_uV, int max_uV, unsigned *selector)
450*4882a593Smuzhiyun {
451*4882a593Smuzhiyun 	struct max8997_data *max8997 = rdev_get_drvdata(rdev);
452*4882a593Smuzhiyun 	struct i2c_client *i2c = max8997->iodev->i2c;
453*4882a593Smuzhiyun 	const struct voltage_map_desc *desc;
454*4882a593Smuzhiyun 	int rid = rdev_get_id(rdev);
455*4882a593Smuzhiyun 	int i, reg, shift, mask, ret;
456*4882a593Smuzhiyun 
457*4882a593Smuzhiyun 	switch (rid) {
458*4882a593Smuzhiyun 	case MAX8997_LDO1 ... MAX8997_LDO21:
459*4882a593Smuzhiyun 		break;
460*4882a593Smuzhiyun 	case MAX8997_BUCK1 ... MAX8997_BUCK5:
461*4882a593Smuzhiyun 		break;
462*4882a593Smuzhiyun 	case MAX8997_BUCK6:
463*4882a593Smuzhiyun 		return -EINVAL;
464*4882a593Smuzhiyun 	case MAX8997_BUCK7:
465*4882a593Smuzhiyun 		break;
466*4882a593Smuzhiyun 	case MAX8997_CHARGER:
467*4882a593Smuzhiyun 		break;
468*4882a593Smuzhiyun 	case MAX8997_CHARGER_TOPOFF:
469*4882a593Smuzhiyun 		break;
470*4882a593Smuzhiyun 	default:
471*4882a593Smuzhiyun 		return -EINVAL;
472*4882a593Smuzhiyun 	}
473*4882a593Smuzhiyun 
474*4882a593Smuzhiyun 	desc = reg_voltage_map[rid];
475*4882a593Smuzhiyun 
476*4882a593Smuzhiyun 	i = max8997_get_voltage_proper_val(desc, min_uV, max_uV);
477*4882a593Smuzhiyun 	if (i < 0)
478*4882a593Smuzhiyun 		return i;
479*4882a593Smuzhiyun 
480*4882a593Smuzhiyun 	ret = max8997_get_voltage_register(rdev, &reg, &shift, &mask);
481*4882a593Smuzhiyun 	if (ret)
482*4882a593Smuzhiyun 		return ret;
483*4882a593Smuzhiyun 
484*4882a593Smuzhiyun 	ret = max8997_update_reg(i2c, reg, i << shift, mask << shift);
485*4882a593Smuzhiyun 	*selector = i;
486*4882a593Smuzhiyun 
487*4882a593Smuzhiyun 	return ret;
488*4882a593Smuzhiyun }
489*4882a593Smuzhiyun 
max8997_set_voltage_buck_time_sel(struct regulator_dev * rdev,unsigned int old_selector,unsigned int new_selector)490*4882a593Smuzhiyun static int max8997_set_voltage_buck_time_sel(struct regulator_dev *rdev,
491*4882a593Smuzhiyun 						unsigned int old_selector,
492*4882a593Smuzhiyun 						unsigned int new_selector)
493*4882a593Smuzhiyun {
494*4882a593Smuzhiyun 	struct max8997_data *max8997 = rdev_get_drvdata(rdev);
495*4882a593Smuzhiyun 	int rid = rdev_get_id(rdev);
496*4882a593Smuzhiyun 	const struct voltage_map_desc *desc = reg_voltage_map[rid];
497*4882a593Smuzhiyun 
498*4882a593Smuzhiyun 	/* Delay is required only if the voltage is increasing */
499*4882a593Smuzhiyun 	if (old_selector >= new_selector)
500*4882a593Smuzhiyun 		return 0;
501*4882a593Smuzhiyun 
502*4882a593Smuzhiyun 	/* No need to delay if gpio_dvs_mode */
503*4882a593Smuzhiyun 	switch (rid) {
504*4882a593Smuzhiyun 	case MAX8997_BUCK1:
505*4882a593Smuzhiyun 		if (max8997->buck1_gpiodvs)
506*4882a593Smuzhiyun 			return 0;
507*4882a593Smuzhiyun 		break;
508*4882a593Smuzhiyun 	case MAX8997_BUCK2:
509*4882a593Smuzhiyun 		if (max8997->buck2_gpiodvs)
510*4882a593Smuzhiyun 			return 0;
511*4882a593Smuzhiyun 		break;
512*4882a593Smuzhiyun 	case MAX8997_BUCK5:
513*4882a593Smuzhiyun 		if (max8997->buck5_gpiodvs)
514*4882a593Smuzhiyun 			return 0;
515*4882a593Smuzhiyun 		break;
516*4882a593Smuzhiyun 	}
517*4882a593Smuzhiyun 
518*4882a593Smuzhiyun 	switch (rid) {
519*4882a593Smuzhiyun 	case MAX8997_BUCK1:
520*4882a593Smuzhiyun 	case MAX8997_BUCK2:
521*4882a593Smuzhiyun 	case MAX8997_BUCK4:
522*4882a593Smuzhiyun 	case MAX8997_BUCK5:
523*4882a593Smuzhiyun 		return DIV_ROUND_UP(desc->step * (new_selector - old_selector),
524*4882a593Smuzhiyun 				    max8997->ramp_delay * 1000);
525*4882a593Smuzhiyun 	}
526*4882a593Smuzhiyun 
527*4882a593Smuzhiyun 	return 0;
528*4882a593Smuzhiyun }
529*4882a593Smuzhiyun 
530*4882a593Smuzhiyun /*
531*4882a593Smuzhiyun  * Assess the damage on the voltage setting of BUCK1,2,5 by the change.
532*4882a593Smuzhiyun  *
533*4882a593Smuzhiyun  * When GPIO-DVS mode is used for multiple bucks, changing the voltage value
534*4882a593Smuzhiyun  * of one of the bucks may affect that of another buck, which is the side
535*4882a593Smuzhiyun  * effect of the change (set_voltage). This function examines the GPIO-DVS
536*4882a593Smuzhiyun  * configurations and checks whether such side-effect exists.
537*4882a593Smuzhiyun  */
max8997_assess_side_effect(struct regulator_dev * rdev,u8 new_val,int * best)538*4882a593Smuzhiyun static int max8997_assess_side_effect(struct regulator_dev *rdev,
539*4882a593Smuzhiyun 		u8 new_val, int *best)
540*4882a593Smuzhiyun {
541*4882a593Smuzhiyun 	struct max8997_data *max8997 = rdev_get_drvdata(rdev);
542*4882a593Smuzhiyun 	int rid = rdev_get_id(rdev);
543*4882a593Smuzhiyun 	u8 *buckx_val[3];
544*4882a593Smuzhiyun 	bool buckx_gpiodvs[3];
545*4882a593Smuzhiyun 	int side_effect[8];
546*4882a593Smuzhiyun 	int min_side_effect = INT_MAX;
547*4882a593Smuzhiyun 	int i;
548*4882a593Smuzhiyun 
549*4882a593Smuzhiyun 	*best = -1;
550*4882a593Smuzhiyun 
551*4882a593Smuzhiyun 	switch (rid) {
552*4882a593Smuzhiyun 	case MAX8997_BUCK1:
553*4882a593Smuzhiyun 		rid = 0;
554*4882a593Smuzhiyun 		break;
555*4882a593Smuzhiyun 	case MAX8997_BUCK2:
556*4882a593Smuzhiyun 		rid = 1;
557*4882a593Smuzhiyun 		break;
558*4882a593Smuzhiyun 	case MAX8997_BUCK5:
559*4882a593Smuzhiyun 		rid = 2;
560*4882a593Smuzhiyun 		break;
561*4882a593Smuzhiyun 	default:
562*4882a593Smuzhiyun 		return -EINVAL;
563*4882a593Smuzhiyun 	}
564*4882a593Smuzhiyun 
565*4882a593Smuzhiyun 	buckx_val[0] = max8997->buck1_vol;
566*4882a593Smuzhiyun 	buckx_val[1] = max8997->buck2_vol;
567*4882a593Smuzhiyun 	buckx_val[2] = max8997->buck5_vol;
568*4882a593Smuzhiyun 	buckx_gpiodvs[0] = max8997->buck1_gpiodvs;
569*4882a593Smuzhiyun 	buckx_gpiodvs[1] = max8997->buck2_gpiodvs;
570*4882a593Smuzhiyun 	buckx_gpiodvs[2] = max8997->buck5_gpiodvs;
571*4882a593Smuzhiyun 
572*4882a593Smuzhiyun 	for (i = 0; i < 8; i++) {
573*4882a593Smuzhiyun 		int others;
574*4882a593Smuzhiyun 
575*4882a593Smuzhiyun 		if (new_val != (buckx_val[rid])[i]) {
576*4882a593Smuzhiyun 			side_effect[i] = -1;
577*4882a593Smuzhiyun 			continue;
578*4882a593Smuzhiyun 		}
579*4882a593Smuzhiyun 
580*4882a593Smuzhiyun 		side_effect[i] = 0;
581*4882a593Smuzhiyun 		for (others = 0; others < 3; others++) {
582*4882a593Smuzhiyun 			int diff;
583*4882a593Smuzhiyun 
584*4882a593Smuzhiyun 			if (others == rid)
585*4882a593Smuzhiyun 				continue;
586*4882a593Smuzhiyun 			if (buckx_gpiodvs[others] == false)
587*4882a593Smuzhiyun 				continue; /* Not affected */
588*4882a593Smuzhiyun 			diff = (buckx_val[others])[i] -
589*4882a593Smuzhiyun 				(buckx_val[others])[max8997->buck125_gpioindex];
590*4882a593Smuzhiyun 			if (diff > 0)
591*4882a593Smuzhiyun 				side_effect[i] += diff;
592*4882a593Smuzhiyun 			else if (diff < 0)
593*4882a593Smuzhiyun 				side_effect[i] -= diff;
594*4882a593Smuzhiyun 		}
595*4882a593Smuzhiyun 		if (side_effect[i] == 0) {
596*4882a593Smuzhiyun 			*best = i;
597*4882a593Smuzhiyun 			return 0; /* NO SIDE EFFECT! Use This! */
598*4882a593Smuzhiyun 		}
599*4882a593Smuzhiyun 		if (side_effect[i] < min_side_effect) {
600*4882a593Smuzhiyun 			min_side_effect = side_effect[i];
601*4882a593Smuzhiyun 			*best = i;
602*4882a593Smuzhiyun 		}
603*4882a593Smuzhiyun 	}
604*4882a593Smuzhiyun 
605*4882a593Smuzhiyun 	if (*best == -1)
606*4882a593Smuzhiyun 		return -EINVAL;
607*4882a593Smuzhiyun 
608*4882a593Smuzhiyun 	return side_effect[*best];
609*4882a593Smuzhiyun }
610*4882a593Smuzhiyun 
611*4882a593Smuzhiyun /*
612*4882a593Smuzhiyun  * For Buck 1 ~ 5 and 7. If it is not controlled by GPIO, this calls
613*4882a593Smuzhiyun  * max8997_set_voltage_ldobuck to do the job.
614*4882a593Smuzhiyun  */
max8997_set_voltage_buck(struct regulator_dev * rdev,int min_uV,int max_uV,unsigned * selector)615*4882a593Smuzhiyun static int max8997_set_voltage_buck(struct regulator_dev *rdev,
616*4882a593Smuzhiyun 		int min_uV, int max_uV, unsigned *selector)
617*4882a593Smuzhiyun {
618*4882a593Smuzhiyun 	struct max8997_data *max8997 = rdev_get_drvdata(rdev);
619*4882a593Smuzhiyun 	int rid = rdev_get_id(rdev);
620*4882a593Smuzhiyun 	const struct voltage_map_desc *desc;
621*4882a593Smuzhiyun 	int new_val, new_idx, damage, tmp_val, tmp_idx, tmp_dmg;
622*4882a593Smuzhiyun 	bool gpio_dvs_mode = false;
623*4882a593Smuzhiyun 
624*4882a593Smuzhiyun 	if (rid < MAX8997_BUCK1 || rid > MAX8997_BUCK7)
625*4882a593Smuzhiyun 		return -EINVAL;
626*4882a593Smuzhiyun 
627*4882a593Smuzhiyun 	switch (rid) {
628*4882a593Smuzhiyun 	case MAX8997_BUCK1:
629*4882a593Smuzhiyun 		if (max8997->buck1_gpiodvs)
630*4882a593Smuzhiyun 			gpio_dvs_mode = true;
631*4882a593Smuzhiyun 		break;
632*4882a593Smuzhiyun 	case MAX8997_BUCK2:
633*4882a593Smuzhiyun 		if (max8997->buck2_gpiodvs)
634*4882a593Smuzhiyun 			gpio_dvs_mode = true;
635*4882a593Smuzhiyun 		break;
636*4882a593Smuzhiyun 	case MAX8997_BUCK5:
637*4882a593Smuzhiyun 		if (max8997->buck5_gpiodvs)
638*4882a593Smuzhiyun 			gpio_dvs_mode = true;
639*4882a593Smuzhiyun 		break;
640*4882a593Smuzhiyun 	}
641*4882a593Smuzhiyun 
642*4882a593Smuzhiyun 	if (!gpio_dvs_mode)
643*4882a593Smuzhiyun 		return max8997_set_voltage_ldobuck(rdev, min_uV, max_uV,
644*4882a593Smuzhiyun 						selector);
645*4882a593Smuzhiyun 
646*4882a593Smuzhiyun 	desc = reg_voltage_map[rid];
647*4882a593Smuzhiyun 	new_val = max8997_get_voltage_proper_val(desc, min_uV, max_uV);
648*4882a593Smuzhiyun 	if (new_val < 0)
649*4882a593Smuzhiyun 		return new_val;
650*4882a593Smuzhiyun 
651*4882a593Smuzhiyun 	tmp_dmg = INT_MAX;
652*4882a593Smuzhiyun 	tmp_idx = -1;
653*4882a593Smuzhiyun 	tmp_val = -1;
654*4882a593Smuzhiyun 	do {
655*4882a593Smuzhiyun 		damage = max8997_assess_side_effect(rdev, new_val, &new_idx);
656*4882a593Smuzhiyun 		if (damage == 0)
657*4882a593Smuzhiyun 			goto out;
658*4882a593Smuzhiyun 
659*4882a593Smuzhiyun 		if (tmp_dmg > damage) {
660*4882a593Smuzhiyun 			tmp_idx = new_idx;
661*4882a593Smuzhiyun 			tmp_val = new_val;
662*4882a593Smuzhiyun 			tmp_dmg = damage;
663*4882a593Smuzhiyun 		}
664*4882a593Smuzhiyun 
665*4882a593Smuzhiyun 		new_val++;
666*4882a593Smuzhiyun 	} while (desc->min + desc->step * new_val <= desc->max);
667*4882a593Smuzhiyun 
668*4882a593Smuzhiyun 	new_idx = tmp_idx;
669*4882a593Smuzhiyun 	new_val = tmp_val;
670*4882a593Smuzhiyun 
671*4882a593Smuzhiyun 	if (max8997->ignore_gpiodvs_side_effect == false)
672*4882a593Smuzhiyun 		return -EINVAL;
673*4882a593Smuzhiyun 
674*4882a593Smuzhiyun 	dev_warn(&rdev->dev,
675*4882a593Smuzhiyun 		"MAX8997 GPIO-DVS Side Effect Warning: GPIO SET:  %d -> %d\n",
676*4882a593Smuzhiyun 		max8997->buck125_gpioindex, tmp_idx);
677*4882a593Smuzhiyun 
678*4882a593Smuzhiyun out:
679*4882a593Smuzhiyun 	if (new_idx < 0 || new_val < 0)
680*4882a593Smuzhiyun 		return -EINVAL;
681*4882a593Smuzhiyun 
682*4882a593Smuzhiyun 	max8997->buck125_gpioindex = new_idx;
683*4882a593Smuzhiyun 	max8997_set_gpio(max8997);
684*4882a593Smuzhiyun 	*selector = new_val;
685*4882a593Smuzhiyun 
686*4882a593Smuzhiyun 	return 0;
687*4882a593Smuzhiyun }
688*4882a593Smuzhiyun 
689*4882a593Smuzhiyun /* For SAFEOUT1 and SAFEOUT2 */
max8997_set_voltage_safeout_sel(struct regulator_dev * rdev,unsigned selector)690*4882a593Smuzhiyun static int max8997_set_voltage_safeout_sel(struct regulator_dev *rdev,
691*4882a593Smuzhiyun 					   unsigned selector)
692*4882a593Smuzhiyun {
693*4882a593Smuzhiyun 	struct max8997_data *max8997 = rdev_get_drvdata(rdev);
694*4882a593Smuzhiyun 	struct i2c_client *i2c = max8997->iodev->i2c;
695*4882a593Smuzhiyun 	int rid = rdev_get_id(rdev);
696*4882a593Smuzhiyun 	int reg, shift = 0, mask, ret;
697*4882a593Smuzhiyun 
698*4882a593Smuzhiyun 	if (rid != MAX8997_ESAFEOUT1 && rid != MAX8997_ESAFEOUT2)
699*4882a593Smuzhiyun 		return -EINVAL;
700*4882a593Smuzhiyun 
701*4882a593Smuzhiyun 	ret = max8997_get_voltage_register(rdev, &reg, &shift, &mask);
702*4882a593Smuzhiyun 	if (ret)
703*4882a593Smuzhiyun 		return ret;
704*4882a593Smuzhiyun 
705*4882a593Smuzhiyun 	return max8997_update_reg(i2c, reg, selector << shift, mask << shift);
706*4882a593Smuzhiyun }
707*4882a593Smuzhiyun 
max8997_reg_disable_suspend(struct regulator_dev * rdev)708*4882a593Smuzhiyun static int max8997_reg_disable_suspend(struct regulator_dev *rdev)
709*4882a593Smuzhiyun {
710*4882a593Smuzhiyun 	struct max8997_data *max8997 = rdev_get_drvdata(rdev);
711*4882a593Smuzhiyun 	struct i2c_client *i2c = max8997->iodev->i2c;
712*4882a593Smuzhiyun 	int ret, reg, mask, pattern;
713*4882a593Smuzhiyun 	int rid = rdev_get_id(rdev);
714*4882a593Smuzhiyun 
715*4882a593Smuzhiyun 	ret = max8997_get_enable_register(rdev, &reg, &mask, &pattern);
716*4882a593Smuzhiyun 	if (ret)
717*4882a593Smuzhiyun 		return ret;
718*4882a593Smuzhiyun 
719*4882a593Smuzhiyun 	max8997_read_reg(i2c, reg, &max8997->saved_states[rid]);
720*4882a593Smuzhiyun 
721*4882a593Smuzhiyun 	if (rid == MAX8997_LDO1 ||
722*4882a593Smuzhiyun 			rid == MAX8997_LDO10 ||
723*4882a593Smuzhiyun 			rid == MAX8997_LDO21) {
724*4882a593Smuzhiyun 		dev_dbg(&rdev->dev, "Conditional Power-Off for %s\n",
725*4882a593Smuzhiyun 				rdev->desc->name);
726*4882a593Smuzhiyun 		return max8997_update_reg(i2c, reg, 0x40, mask);
727*4882a593Smuzhiyun 	}
728*4882a593Smuzhiyun 
729*4882a593Smuzhiyun 	dev_dbg(&rdev->dev, "Full Power-Off for %s (%xh -> %xh)\n",
730*4882a593Smuzhiyun 			rdev->desc->name, max8997->saved_states[rid] & mask,
731*4882a593Smuzhiyun 			(~pattern) & mask);
732*4882a593Smuzhiyun 	return max8997_update_reg(i2c, reg, ~pattern, mask);
733*4882a593Smuzhiyun }
734*4882a593Smuzhiyun 
735*4882a593Smuzhiyun static const struct regulator_ops max8997_ldo_ops = {
736*4882a593Smuzhiyun 	.list_voltage		= max8997_list_voltage,
737*4882a593Smuzhiyun 	.is_enabled		= max8997_reg_is_enabled,
738*4882a593Smuzhiyun 	.enable			= max8997_reg_enable,
739*4882a593Smuzhiyun 	.disable		= max8997_reg_disable,
740*4882a593Smuzhiyun 	.get_voltage_sel	= max8997_get_voltage_sel,
741*4882a593Smuzhiyun 	.set_voltage		= max8997_set_voltage_ldobuck,
742*4882a593Smuzhiyun 	.set_suspend_disable	= max8997_reg_disable_suspend,
743*4882a593Smuzhiyun };
744*4882a593Smuzhiyun 
745*4882a593Smuzhiyun static const struct regulator_ops max8997_buck_ops = {
746*4882a593Smuzhiyun 	.list_voltage		= max8997_list_voltage,
747*4882a593Smuzhiyun 	.is_enabled		= max8997_reg_is_enabled,
748*4882a593Smuzhiyun 	.enable			= max8997_reg_enable,
749*4882a593Smuzhiyun 	.disable		= max8997_reg_disable,
750*4882a593Smuzhiyun 	.get_voltage_sel	= max8997_get_voltage_sel,
751*4882a593Smuzhiyun 	.set_voltage		= max8997_set_voltage_buck,
752*4882a593Smuzhiyun 	.set_voltage_time_sel	= max8997_set_voltage_buck_time_sel,
753*4882a593Smuzhiyun 	.set_suspend_disable	= max8997_reg_disable_suspend,
754*4882a593Smuzhiyun };
755*4882a593Smuzhiyun 
756*4882a593Smuzhiyun static const struct regulator_ops max8997_fixedvolt_ops = {
757*4882a593Smuzhiyun 	.list_voltage		= max8997_list_voltage,
758*4882a593Smuzhiyun 	.is_enabled		= max8997_reg_is_enabled,
759*4882a593Smuzhiyun 	.enable			= max8997_reg_enable,
760*4882a593Smuzhiyun 	.disable		= max8997_reg_disable,
761*4882a593Smuzhiyun 	.set_suspend_disable	= max8997_reg_disable_suspend,
762*4882a593Smuzhiyun };
763*4882a593Smuzhiyun 
764*4882a593Smuzhiyun static const struct regulator_ops max8997_safeout_ops = {
765*4882a593Smuzhiyun 	.list_voltage		= regulator_list_voltage_table,
766*4882a593Smuzhiyun 	.is_enabled		= max8997_reg_is_enabled,
767*4882a593Smuzhiyun 	.enable			= max8997_reg_enable,
768*4882a593Smuzhiyun 	.disable		= max8997_reg_disable,
769*4882a593Smuzhiyun 	.get_voltage_sel	= max8997_get_voltage_sel,
770*4882a593Smuzhiyun 	.set_voltage_sel	= max8997_set_voltage_safeout_sel,
771*4882a593Smuzhiyun 	.set_suspend_disable	= max8997_reg_disable_suspend,
772*4882a593Smuzhiyun };
773*4882a593Smuzhiyun 
774*4882a593Smuzhiyun static const struct regulator_ops max8997_fixedstate_ops = {
775*4882a593Smuzhiyun 	.list_voltage		= max8997_list_voltage_charger_cv,
776*4882a593Smuzhiyun 	.get_voltage_sel	= max8997_get_voltage_sel,
777*4882a593Smuzhiyun 	.set_voltage		= max8997_set_voltage_charger_cv,
778*4882a593Smuzhiyun };
779*4882a593Smuzhiyun 
max8997_set_current_limit(struct regulator_dev * rdev,int min_uA,int max_uA)780*4882a593Smuzhiyun static int max8997_set_current_limit(struct regulator_dev *rdev,
781*4882a593Smuzhiyun 				     int min_uA, int max_uA)
782*4882a593Smuzhiyun {
783*4882a593Smuzhiyun 	unsigned dummy;
784*4882a593Smuzhiyun 	int rid = rdev_get_id(rdev);
785*4882a593Smuzhiyun 
786*4882a593Smuzhiyun 	if (rid != MAX8997_CHARGER && rid != MAX8997_CHARGER_TOPOFF)
787*4882a593Smuzhiyun 		return -EINVAL;
788*4882a593Smuzhiyun 
789*4882a593Smuzhiyun 	/* Reuse max8997_set_voltage_ldobuck to set current_limit. */
790*4882a593Smuzhiyun 	return max8997_set_voltage_ldobuck(rdev, min_uA, max_uA, &dummy);
791*4882a593Smuzhiyun }
792*4882a593Smuzhiyun 
max8997_get_current_limit(struct regulator_dev * rdev)793*4882a593Smuzhiyun static int max8997_get_current_limit(struct regulator_dev *rdev)
794*4882a593Smuzhiyun {
795*4882a593Smuzhiyun 	int sel, rid = rdev_get_id(rdev);
796*4882a593Smuzhiyun 
797*4882a593Smuzhiyun 	if (rid != MAX8997_CHARGER && rid != MAX8997_CHARGER_TOPOFF)
798*4882a593Smuzhiyun 		return -EINVAL;
799*4882a593Smuzhiyun 
800*4882a593Smuzhiyun 	sel = max8997_get_voltage_sel(rdev);
801*4882a593Smuzhiyun 	if (sel < 0)
802*4882a593Smuzhiyun 		return sel;
803*4882a593Smuzhiyun 
804*4882a593Smuzhiyun 	/* Reuse max8997_list_voltage to get current_limit. */
805*4882a593Smuzhiyun 	return max8997_list_voltage(rdev, sel);
806*4882a593Smuzhiyun }
807*4882a593Smuzhiyun 
808*4882a593Smuzhiyun static const struct regulator_ops max8997_charger_ops = {
809*4882a593Smuzhiyun 	.is_enabled		= max8997_reg_is_enabled,
810*4882a593Smuzhiyun 	.enable			= max8997_reg_enable,
811*4882a593Smuzhiyun 	.disable		= max8997_reg_disable,
812*4882a593Smuzhiyun 	.get_current_limit	= max8997_get_current_limit,
813*4882a593Smuzhiyun 	.set_current_limit	= max8997_set_current_limit,
814*4882a593Smuzhiyun };
815*4882a593Smuzhiyun 
816*4882a593Smuzhiyun static const struct regulator_ops max8997_charger_fixedstate_ops = {
817*4882a593Smuzhiyun 	.get_current_limit	= max8997_get_current_limit,
818*4882a593Smuzhiyun 	.set_current_limit	= max8997_set_current_limit,
819*4882a593Smuzhiyun };
820*4882a593Smuzhiyun 
821*4882a593Smuzhiyun #define MAX8997_VOLTAGE_REGULATOR(_name, _ops) {\
822*4882a593Smuzhiyun 	.name		= #_name,		\
823*4882a593Smuzhiyun 	.id		= MAX8997_##_name,	\
824*4882a593Smuzhiyun 	.ops		= &_ops,		\
825*4882a593Smuzhiyun 	.type		= REGULATOR_VOLTAGE,	\
826*4882a593Smuzhiyun 	.owner		= THIS_MODULE,		\
827*4882a593Smuzhiyun }
828*4882a593Smuzhiyun 
829*4882a593Smuzhiyun #define MAX8997_CURRENT_REGULATOR(_name, _ops) {\
830*4882a593Smuzhiyun 	.name		= #_name,		\
831*4882a593Smuzhiyun 	.id		= MAX8997_##_name,	\
832*4882a593Smuzhiyun 	.ops		= &_ops,		\
833*4882a593Smuzhiyun 	.type		= REGULATOR_CURRENT,	\
834*4882a593Smuzhiyun 	.owner		= THIS_MODULE,		\
835*4882a593Smuzhiyun }
836*4882a593Smuzhiyun 
837*4882a593Smuzhiyun static struct regulator_desc regulators[] = {
838*4882a593Smuzhiyun 	MAX8997_VOLTAGE_REGULATOR(LDO1, max8997_ldo_ops),
839*4882a593Smuzhiyun 	MAX8997_VOLTAGE_REGULATOR(LDO2, max8997_ldo_ops),
840*4882a593Smuzhiyun 	MAX8997_VOLTAGE_REGULATOR(LDO3, max8997_ldo_ops),
841*4882a593Smuzhiyun 	MAX8997_VOLTAGE_REGULATOR(LDO4, max8997_ldo_ops),
842*4882a593Smuzhiyun 	MAX8997_VOLTAGE_REGULATOR(LDO5, max8997_ldo_ops),
843*4882a593Smuzhiyun 	MAX8997_VOLTAGE_REGULATOR(LDO6, max8997_ldo_ops),
844*4882a593Smuzhiyun 	MAX8997_VOLTAGE_REGULATOR(LDO7, max8997_ldo_ops),
845*4882a593Smuzhiyun 	MAX8997_VOLTAGE_REGULATOR(LDO8, max8997_ldo_ops),
846*4882a593Smuzhiyun 	MAX8997_VOLTAGE_REGULATOR(LDO9, max8997_ldo_ops),
847*4882a593Smuzhiyun 	MAX8997_VOLTAGE_REGULATOR(LDO10, max8997_ldo_ops),
848*4882a593Smuzhiyun 	MAX8997_VOLTAGE_REGULATOR(LDO11, max8997_ldo_ops),
849*4882a593Smuzhiyun 	MAX8997_VOLTAGE_REGULATOR(LDO12, max8997_ldo_ops),
850*4882a593Smuzhiyun 	MAX8997_VOLTAGE_REGULATOR(LDO13, max8997_ldo_ops),
851*4882a593Smuzhiyun 	MAX8997_VOLTAGE_REGULATOR(LDO14, max8997_ldo_ops),
852*4882a593Smuzhiyun 	MAX8997_VOLTAGE_REGULATOR(LDO15, max8997_ldo_ops),
853*4882a593Smuzhiyun 	MAX8997_VOLTAGE_REGULATOR(LDO16, max8997_ldo_ops),
854*4882a593Smuzhiyun 	MAX8997_VOLTAGE_REGULATOR(LDO17, max8997_ldo_ops),
855*4882a593Smuzhiyun 	MAX8997_VOLTAGE_REGULATOR(LDO18, max8997_ldo_ops),
856*4882a593Smuzhiyun 	MAX8997_VOLTAGE_REGULATOR(LDO21, max8997_ldo_ops),
857*4882a593Smuzhiyun 	MAX8997_VOLTAGE_REGULATOR(BUCK1, max8997_buck_ops),
858*4882a593Smuzhiyun 	MAX8997_VOLTAGE_REGULATOR(BUCK2, max8997_buck_ops),
859*4882a593Smuzhiyun 	MAX8997_VOLTAGE_REGULATOR(BUCK3, max8997_buck_ops),
860*4882a593Smuzhiyun 	MAX8997_VOLTAGE_REGULATOR(BUCK4, max8997_buck_ops),
861*4882a593Smuzhiyun 	MAX8997_VOLTAGE_REGULATOR(BUCK5, max8997_buck_ops),
862*4882a593Smuzhiyun 	MAX8997_VOLTAGE_REGULATOR(BUCK6, max8997_fixedvolt_ops),
863*4882a593Smuzhiyun 	MAX8997_VOLTAGE_REGULATOR(BUCK7, max8997_buck_ops),
864*4882a593Smuzhiyun 	MAX8997_VOLTAGE_REGULATOR(EN32KHZ_AP, max8997_fixedvolt_ops),
865*4882a593Smuzhiyun 	MAX8997_VOLTAGE_REGULATOR(EN32KHZ_CP, max8997_fixedvolt_ops),
866*4882a593Smuzhiyun 	MAX8997_VOLTAGE_REGULATOR(ENVICHG, max8997_fixedvolt_ops),
867*4882a593Smuzhiyun 	MAX8997_VOLTAGE_REGULATOR(ESAFEOUT1, max8997_safeout_ops),
868*4882a593Smuzhiyun 	MAX8997_VOLTAGE_REGULATOR(ESAFEOUT2, max8997_safeout_ops),
869*4882a593Smuzhiyun 	MAX8997_VOLTAGE_REGULATOR(CHARGER_CV, max8997_fixedstate_ops),
870*4882a593Smuzhiyun 	MAX8997_CURRENT_REGULATOR(CHARGER, max8997_charger_ops),
871*4882a593Smuzhiyun 	MAX8997_CURRENT_REGULATOR(CHARGER_TOPOFF,
872*4882a593Smuzhiyun 				  max8997_charger_fixedstate_ops),
873*4882a593Smuzhiyun };
874*4882a593Smuzhiyun 
875*4882a593Smuzhiyun #ifdef CONFIG_OF
max8997_pmic_dt_parse_dvs_gpio(struct platform_device * pdev,struct max8997_platform_data * pdata,struct device_node * pmic_np)876*4882a593Smuzhiyun static int max8997_pmic_dt_parse_dvs_gpio(struct platform_device *pdev,
877*4882a593Smuzhiyun 			struct max8997_platform_data *pdata,
878*4882a593Smuzhiyun 			struct device_node *pmic_np)
879*4882a593Smuzhiyun {
880*4882a593Smuzhiyun 	int i, gpio;
881*4882a593Smuzhiyun 
882*4882a593Smuzhiyun 	for (i = 0; i < 3; i++) {
883*4882a593Smuzhiyun 		gpio = of_get_named_gpio(pmic_np,
884*4882a593Smuzhiyun 					"max8997,pmic-buck125-dvs-gpios", i);
885*4882a593Smuzhiyun 		if (!gpio_is_valid(gpio)) {
886*4882a593Smuzhiyun 			dev_err(&pdev->dev, "invalid gpio[%d]: %d\n", i, gpio);
887*4882a593Smuzhiyun 			return -EINVAL;
888*4882a593Smuzhiyun 		}
889*4882a593Smuzhiyun 		pdata->buck125_gpios[i] = gpio;
890*4882a593Smuzhiyun 	}
891*4882a593Smuzhiyun 	return 0;
892*4882a593Smuzhiyun }
893*4882a593Smuzhiyun 
max8997_pmic_dt_parse_pdata(struct platform_device * pdev,struct max8997_platform_data * pdata)894*4882a593Smuzhiyun static int max8997_pmic_dt_parse_pdata(struct platform_device *pdev,
895*4882a593Smuzhiyun 					struct max8997_platform_data *pdata)
896*4882a593Smuzhiyun {
897*4882a593Smuzhiyun 	struct max8997_dev *iodev = dev_get_drvdata(pdev->dev.parent);
898*4882a593Smuzhiyun 	struct device_node *pmic_np, *regulators_np, *reg_np;
899*4882a593Smuzhiyun 	struct max8997_regulator_data *rdata;
900*4882a593Smuzhiyun 	unsigned int i, dvs_voltage_nr = 1, ret;
901*4882a593Smuzhiyun 
902*4882a593Smuzhiyun 	pmic_np = iodev->dev->of_node;
903*4882a593Smuzhiyun 	if (!pmic_np) {
904*4882a593Smuzhiyun 		dev_err(&pdev->dev, "could not find pmic sub-node\n");
905*4882a593Smuzhiyun 		return -ENODEV;
906*4882a593Smuzhiyun 	}
907*4882a593Smuzhiyun 
908*4882a593Smuzhiyun 	regulators_np = of_get_child_by_name(pmic_np, "regulators");
909*4882a593Smuzhiyun 	if (!regulators_np) {
910*4882a593Smuzhiyun 		dev_err(&pdev->dev, "could not find regulators sub-node\n");
911*4882a593Smuzhiyun 		return -EINVAL;
912*4882a593Smuzhiyun 	}
913*4882a593Smuzhiyun 
914*4882a593Smuzhiyun 	/* count the number of regulators to be supported in pmic */
915*4882a593Smuzhiyun 	pdata->num_regulators = of_get_child_count(regulators_np);
916*4882a593Smuzhiyun 
917*4882a593Smuzhiyun 	rdata = devm_kcalloc(&pdev->dev,
918*4882a593Smuzhiyun 			     pdata->num_regulators, sizeof(*rdata),
919*4882a593Smuzhiyun 			     GFP_KERNEL);
920*4882a593Smuzhiyun 	if (!rdata) {
921*4882a593Smuzhiyun 		of_node_put(regulators_np);
922*4882a593Smuzhiyun 		return -ENOMEM;
923*4882a593Smuzhiyun 	}
924*4882a593Smuzhiyun 
925*4882a593Smuzhiyun 	pdata->regulators = rdata;
926*4882a593Smuzhiyun 	for_each_child_of_node(regulators_np, reg_np) {
927*4882a593Smuzhiyun 		for (i = 0; i < ARRAY_SIZE(regulators); i++)
928*4882a593Smuzhiyun 			if (of_node_name_eq(reg_np, regulators[i].name))
929*4882a593Smuzhiyun 				break;
930*4882a593Smuzhiyun 
931*4882a593Smuzhiyun 		if (i == ARRAY_SIZE(regulators)) {
932*4882a593Smuzhiyun 			dev_warn(&pdev->dev, "don't know how to configure regulator %pOFn\n",
933*4882a593Smuzhiyun 				 reg_np);
934*4882a593Smuzhiyun 			continue;
935*4882a593Smuzhiyun 		}
936*4882a593Smuzhiyun 
937*4882a593Smuzhiyun 		rdata->id = i;
938*4882a593Smuzhiyun 		rdata->initdata = of_get_regulator_init_data(&pdev->dev,
939*4882a593Smuzhiyun 							     reg_np,
940*4882a593Smuzhiyun 							     &regulators[i]);
941*4882a593Smuzhiyun 		rdata->reg_node = reg_np;
942*4882a593Smuzhiyun 		rdata++;
943*4882a593Smuzhiyun 	}
944*4882a593Smuzhiyun 	of_node_put(regulators_np);
945*4882a593Smuzhiyun 
946*4882a593Smuzhiyun 	if (of_get_property(pmic_np, "max8997,pmic-buck1-uses-gpio-dvs", NULL))
947*4882a593Smuzhiyun 		pdata->buck1_gpiodvs = true;
948*4882a593Smuzhiyun 
949*4882a593Smuzhiyun 	if (of_get_property(pmic_np, "max8997,pmic-buck2-uses-gpio-dvs", NULL))
950*4882a593Smuzhiyun 		pdata->buck2_gpiodvs = true;
951*4882a593Smuzhiyun 
952*4882a593Smuzhiyun 	if (of_get_property(pmic_np, "max8997,pmic-buck5-uses-gpio-dvs", NULL))
953*4882a593Smuzhiyun 		pdata->buck5_gpiodvs = true;
954*4882a593Smuzhiyun 
955*4882a593Smuzhiyun 	if (pdata->buck1_gpiodvs || pdata->buck2_gpiodvs ||
956*4882a593Smuzhiyun 						pdata->buck5_gpiodvs) {
957*4882a593Smuzhiyun 		ret = max8997_pmic_dt_parse_dvs_gpio(pdev, pdata, pmic_np);
958*4882a593Smuzhiyun 		if (ret)
959*4882a593Smuzhiyun 			return -EINVAL;
960*4882a593Smuzhiyun 
961*4882a593Smuzhiyun 		if (of_property_read_u32(pmic_np,
962*4882a593Smuzhiyun 				"max8997,pmic-buck125-default-dvs-idx",
963*4882a593Smuzhiyun 				&pdata->buck125_default_idx)) {
964*4882a593Smuzhiyun 			pdata->buck125_default_idx = 0;
965*4882a593Smuzhiyun 		} else {
966*4882a593Smuzhiyun 			if (pdata->buck125_default_idx >= 8) {
967*4882a593Smuzhiyun 				pdata->buck125_default_idx = 0;
968*4882a593Smuzhiyun 				dev_info(&pdev->dev, "invalid value for default dvs index, using 0 instead\n");
969*4882a593Smuzhiyun 			}
970*4882a593Smuzhiyun 		}
971*4882a593Smuzhiyun 
972*4882a593Smuzhiyun 		if (of_get_property(pmic_np,
973*4882a593Smuzhiyun 			"max8997,pmic-ignore-gpiodvs-side-effect", NULL))
974*4882a593Smuzhiyun 			pdata->ignore_gpiodvs_side_effect = true;
975*4882a593Smuzhiyun 
976*4882a593Smuzhiyun 		dvs_voltage_nr = 8;
977*4882a593Smuzhiyun 	}
978*4882a593Smuzhiyun 
979*4882a593Smuzhiyun 	if (of_property_read_u32_array(pmic_np,
980*4882a593Smuzhiyun 				"max8997,pmic-buck1-dvs-voltage",
981*4882a593Smuzhiyun 				pdata->buck1_voltage, dvs_voltage_nr)) {
982*4882a593Smuzhiyun 		dev_err(&pdev->dev, "buck1 voltages not specified\n");
983*4882a593Smuzhiyun 		return -EINVAL;
984*4882a593Smuzhiyun 	}
985*4882a593Smuzhiyun 
986*4882a593Smuzhiyun 	if (of_property_read_u32_array(pmic_np,
987*4882a593Smuzhiyun 				"max8997,pmic-buck2-dvs-voltage",
988*4882a593Smuzhiyun 				pdata->buck2_voltage, dvs_voltage_nr)) {
989*4882a593Smuzhiyun 		dev_err(&pdev->dev, "buck2 voltages not specified\n");
990*4882a593Smuzhiyun 		return -EINVAL;
991*4882a593Smuzhiyun 	}
992*4882a593Smuzhiyun 
993*4882a593Smuzhiyun 	if (of_property_read_u32_array(pmic_np,
994*4882a593Smuzhiyun 				"max8997,pmic-buck5-dvs-voltage",
995*4882a593Smuzhiyun 				pdata->buck5_voltage, dvs_voltage_nr)) {
996*4882a593Smuzhiyun 		dev_err(&pdev->dev, "buck5 voltages not specified\n");
997*4882a593Smuzhiyun 		return -EINVAL;
998*4882a593Smuzhiyun 	}
999*4882a593Smuzhiyun 
1000*4882a593Smuzhiyun 	return 0;
1001*4882a593Smuzhiyun }
1002*4882a593Smuzhiyun #else
max8997_pmic_dt_parse_pdata(struct platform_device * pdev,struct max8997_platform_data * pdata)1003*4882a593Smuzhiyun static int max8997_pmic_dt_parse_pdata(struct platform_device *pdev,
1004*4882a593Smuzhiyun 					struct max8997_platform_data *pdata)
1005*4882a593Smuzhiyun {
1006*4882a593Smuzhiyun 	return 0;
1007*4882a593Smuzhiyun }
1008*4882a593Smuzhiyun #endif /* CONFIG_OF */
1009*4882a593Smuzhiyun 
max8997_pmic_probe(struct platform_device * pdev)1010*4882a593Smuzhiyun static int max8997_pmic_probe(struct platform_device *pdev)
1011*4882a593Smuzhiyun {
1012*4882a593Smuzhiyun 	struct max8997_dev *iodev = dev_get_drvdata(pdev->dev.parent);
1013*4882a593Smuzhiyun 	struct max8997_platform_data *pdata = iodev->pdata;
1014*4882a593Smuzhiyun 	struct regulator_config config = { };
1015*4882a593Smuzhiyun 	struct regulator_dev *rdev;
1016*4882a593Smuzhiyun 	struct max8997_data *max8997;
1017*4882a593Smuzhiyun 	struct i2c_client *i2c;
1018*4882a593Smuzhiyun 	int i, ret, nr_dvs;
1019*4882a593Smuzhiyun 	u8 max_buck1 = 0, max_buck2 = 0, max_buck5 = 0;
1020*4882a593Smuzhiyun 
1021*4882a593Smuzhiyun 	if (!pdata) {
1022*4882a593Smuzhiyun 		dev_err(&pdev->dev, "No platform init data supplied.\n");
1023*4882a593Smuzhiyun 		return -ENODEV;
1024*4882a593Smuzhiyun 	}
1025*4882a593Smuzhiyun 
1026*4882a593Smuzhiyun 	if (iodev->dev->of_node) {
1027*4882a593Smuzhiyun 		ret = max8997_pmic_dt_parse_pdata(pdev, pdata);
1028*4882a593Smuzhiyun 		if (ret)
1029*4882a593Smuzhiyun 			return ret;
1030*4882a593Smuzhiyun 	}
1031*4882a593Smuzhiyun 
1032*4882a593Smuzhiyun 	max8997 = devm_kzalloc(&pdev->dev, sizeof(struct max8997_data),
1033*4882a593Smuzhiyun 			       GFP_KERNEL);
1034*4882a593Smuzhiyun 	if (!max8997)
1035*4882a593Smuzhiyun 		return -ENOMEM;
1036*4882a593Smuzhiyun 
1037*4882a593Smuzhiyun 	max8997->dev = &pdev->dev;
1038*4882a593Smuzhiyun 	max8997->iodev = iodev;
1039*4882a593Smuzhiyun 	max8997->num_regulators = pdata->num_regulators;
1040*4882a593Smuzhiyun 	platform_set_drvdata(pdev, max8997);
1041*4882a593Smuzhiyun 	i2c = max8997->iodev->i2c;
1042*4882a593Smuzhiyun 
1043*4882a593Smuzhiyun 	max8997->buck125_gpioindex = pdata->buck125_default_idx;
1044*4882a593Smuzhiyun 	max8997->buck1_gpiodvs = pdata->buck1_gpiodvs;
1045*4882a593Smuzhiyun 	max8997->buck2_gpiodvs = pdata->buck2_gpiodvs;
1046*4882a593Smuzhiyun 	max8997->buck5_gpiodvs = pdata->buck5_gpiodvs;
1047*4882a593Smuzhiyun 	memcpy(max8997->buck125_gpios, pdata->buck125_gpios, sizeof(int) * 3);
1048*4882a593Smuzhiyun 	max8997->ignore_gpiodvs_side_effect = pdata->ignore_gpiodvs_side_effect;
1049*4882a593Smuzhiyun 
1050*4882a593Smuzhiyun 	nr_dvs = (pdata->buck1_gpiodvs || pdata->buck2_gpiodvs ||
1051*4882a593Smuzhiyun 			pdata->buck5_gpiodvs) ? 8 : 1;
1052*4882a593Smuzhiyun 
1053*4882a593Smuzhiyun 	for (i = 0; i < nr_dvs; i++) {
1054*4882a593Smuzhiyun 		max8997->buck1_vol[i] = ret =
1055*4882a593Smuzhiyun 			max8997_get_voltage_proper_val(
1056*4882a593Smuzhiyun 					&buck1245_voltage_map_desc,
1057*4882a593Smuzhiyun 					pdata->buck1_voltage[i],
1058*4882a593Smuzhiyun 					pdata->buck1_voltage[i] +
1059*4882a593Smuzhiyun 					buck1245_voltage_map_desc.step);
1060*4882a593Smuzhiyun 		if (ret < 0)
1061*4882a593Smuzhiyun 			return ret;
1062*4882a593Smuzhiyun 
1063*4882a593Smuzhiyun 		max8997->buck2_vol[i] = ret =
1064*4882a593Smuzhiyun 			max8997_get_voltage_proper_val(
1065*4882a593Smuzhiyun 					&buck1245_voltage_map_desc,
1066*4882a593Smuzhiyun 					pdata->buck2_voltage[i],
1067*4882a593Smuzhiyun 					pdata->buck2_voltage[i] +
1068*4882a593Smuzhiyun 					buck1245_voltage_map_desc.step);
1069*4882a593Smuzhiyun 		if (ret < 0)
1070*4882a593Smuzhiyun 			return ret;
1071*4882a593Smuzhiyun 
1072*4882a593Smuzhiyun 		max8997->buck5_vol[i] = ret =
1073*4882a593Smuzhiyun 			max8997_get_voltage_proper_val(
1074*4882a593Smuzhiyun 					&buck1245_voltage_map_desc,
1075*4882a593Smuzhiyun 					pdata->buck5_voltage[i],
1076*4882a593Smuzhiyun 					pdata->buck5_voltage[i] +
1077*4882a593Smuzhiyun 					buck1245_voltage_map_desc.step);
1078*4882a593Smuzhiyun 		if (ret < 0)
1079*4882a593Smuzhiyun 			return ret;
1080*4882a593Smuzhiyun 
1081*4882a593Smuzhiyun 		if (max_buck1 < max8997->buck1_vol[i])
1082*4882a593Smuzhiyun 			max_buck1 = max8997->buck1_vol[i];
1083*4882a593Smuzhiyun 		if (max_buck2 < max8997->buck2_vol[i])
1084*4882a593Smuzhiyun 			max_buck2 = max8997->buck2_vol[i];
1085*4882a593Smuzhiyun 		if (max_buck5 < max8997->buck5_vol[i])
1086*4882a593Smuzhiyun 			max_buck5 = max8997->buck5_vol[i];
1087*4882a593Smuzhiyun 	}
1088*4882a593Smuzhiyun 
1089*4882a593Smuzhiyun 	/* For the safety, set max voltage before setting up */
1090*4882a593Smuzhiyun 	for (i = 0; i < 8; i++) {
1091*4882a593Smuzhiyun 		max8997_update_reg(i2c, MAX8997_REG_BUCK1DVS1 + i,
1092*4882a593Smuzhiyun 				max_buck1, 0x3f);
1093*4882a593Smuzhiyun 		max8997_update_reg(i2c, MAX8997_REG_BUCK2DVS1 + i,
1094*4882a593Smuzhiyun 				max_buck2, 0x3f);
1095*4882a593Smuzhiyun 		max8997_update_reg(i2c, MAX8997_REG_BUCK5DVS1 + i,
1096*4882a593Smuzhiyun 				max_buck5, 0x3f);
1097*4882a593Smuzhiyun 	}
1098*4882a593Smuzhiyun 
1099*4882a593Smuzhiyun 	/* Initialize all the DVS related BUCK registers */
1100*4882a593Smuzhiyun 	for (i = 0; i < nr_dvs; i++) {
1101*4882a593Smuzhiyun 		max8997_update_reg(i2c, MAX8997_REG_BUCK1DVS1 + i,
1102*4882a593Smuzhiyun 				max8997->buck1_vol[i],
1103*4882a593Smuzhiyun 				0x3f);
1104*4882a593Smuzhiyun 		max8997_update_reg(i2c, MAX8997_REG_BUCK2DVS1 + i,
1105*4882a593Smuzhiyun 				max8997->buck2_vol[i],
1106*4882a593Smuzhiyun 				0x3f);
1107*4882a593Smuzhiyun 		max8997_update_reg(i2c, MAX8997_REG_BUCK5DVS1 + i,
1108*4882a593Smuzhiyun 				max8997->buck5_vol[i],
1109*4882a593Smuzhiyun 				0x3f);
1110*4882a593Smuzhiyun 	}
1111*4882a593Smuzhiyun 
1112*4882a593Smuzhiyun 	/*
1113*4882a593Smuzhiyun 	 * If buck 1, 2, and 5 do not care DVS GPIO settings, ignore them.
1114*4882a593Smuzhiyun 	 * If at least one of them cares, set gpios.
1115*4882a593Smuzhiyun 	 */
1116*4882a593Smuzhiyun 	if (pdata->buck1_gpiodvs || pdata->buck2_gpiodvs ||
1117*4882a593Smuzhiyun 			pdata->buck5_gpiodvs) {
1118*4882a593Smuzhiyun 
1119*4882a593Smuzhiyun 		if (!gpio_is_valid(pdata->buck125_gpios[0]) ||
1120*4882a593Smuzhiyun 				!gpio_is_valid(pdata->buck125_gpios[1]) ||
1121*4882a593Smuzhiyun 				!gpio_is_valid(pdata->buck125_gpios[2])) {
1122*4882a593Smuzhiyun 			dev_err(&pdev->dev, "GPIO NOT VALID\n");
1123*4882a593Smuzhiyun 			return -EINVAL;
1124*4882a593Smuzhiyun 		}
1125*4882a593Smuzhiyun 
1126*4882a593Smuzhiyun 		ret = devm_gpio_request(&pdev->dev, pdata->buck125_gpios[0],
1127*4882a593Smuzhiyun 					"MAX8997 SET1");
1128*4882a593Smuzhiyun 		if (ret)
1129*4882a593Smuzhiyun 			return ret;
1130*4882a593Smuzhiyun 
1131*4882a593Smuzhiyun 		ret = devm_gpio_request(&pdev->dev, pdata->buck125_gpios[1],
1132*4882a593Smuzhiyun 					"MAX8997 SET2");
1133*4882a593Smuzhiyun 		if (ret)
1134*4882a593Smuzhiyun 			return ret;
1135*4882a593Smuzhiyun 
1136*4882a593Smuzhiyun 		ret = devm_gpio_request(&pdev->dev, pdata->buck125_gpios[2],
1137*4882a593Smuzhiyun 				"MAX8997 SET3");
1138*4882a593Smuzhiyun 		if (ret)
1139*4882a593Smuzhiyun 			return ret;
1140*4882a593Smuzhiyun 
1141*4882a593Smuzhiyun 		gpio_direction_output(pdata->buck125_gpios[0],
1142*4882a593Smuzhiyun 				(max8997->buck125_gpioindex >> 2)
1143*4882a593Smuzhiyun 				& 0x1); /* SET1 */
1144*4882a593Smuzhiyun 		gpio_direction_output(pdata->buck125_gpios[1],
1145*4882a593Smuzhiyun 				(max8997->buck125_gpioindex >> 1)
1146*4882a593Smuzhiyun 				& 0x1); /* SET2 */
1147*4882a593Smuzhiyun 		gpio_direction_output(pdata->buck125_gpios[2],
1148*4882a593Smuzhiyun 				(max8997->buck125_gpioindex >> 0)
1149*4882a593Smuzhiyun 				& 0x1); /* SET3 */
1150*4882a593Smuzhiyun 	}
1151*4882a593Smuzhiyun 
1152*4882a593Smuzhiyun 	/* DVS-GPIO disabled */
1153*4882a593Smuzhiyun 	max8997_update_reg(i2c, MAX8997_REG_BUCK1CTRL, (pdata->buck1_gpiodvs) ?
1154*4882a593Smuzhiyun 			(1 << 1) : (0 << 1), 1 << 1);
1155*4882a593Smuzhiyun 	max8997_update_reg(i2c, MAX8997_REG_BUCK2CTRL, (pdata->buck2_gpiodvs) ?
1156*4882a593Smuzhiyun 			(1 << 1) : (0 << 1), 1 << 1);
1157*4882a593Smuzhiyun 	max8997_update_reg(i2c, MAX8997_REG_BUCK5CTRL, (pdata->buck5_gpiodvs) ?
1158*4882a593Smuzhiyun 			(1 << 1) : (0 << 1), 1 << 1);
1159*4882a593Smuzhiyun 
1160*4882a593Smuzhiyun 	/* Misc Settings */
1161*4882a593Smuzhiyun 	max8997->ramp_delay = 10; /* set 10mV/us, which is the default */
1162*4882a593Smuzhiyun 	max8997_write_reg(i2c, MAX8997_REG_BUCKRAMP, (0xf << 4) | 0x9);
1163*4882a593Smuzhiyun 
1164*4882a593Smuzhiyun 	for (i = 0; i < pdata->num_regulators; i++) {
1165*4882a593Smuzhiyun 		const struct voltage_map_desc *desc;
1166*4882a593Smuzhiyun 		int id = pdata->regulators[i].id;
1167*4882a593Smuzhiyun 
1168*4882a593Smuzhiyun 		desc = reg_voltage_map[id];
1169*4882a593Smuzhiyun 		if (desc) {
1170*4882a593Smuzhiyun 			regulators[id].n_voltages =
1171*4882a593Smuzhiyun 				(desc->max - desc->min) / desc->step + 1;
1172*4882a593Smuzhiyun 		} else if (id == MAX8997_ESAFEOUT1 || id == MAX8997_ESAFEOUT2) {
1173*4882a593Smuzhiyun 			regulators[id].volt_table = safeoutvolt;
1174*4882a593Smuzhiyun 			regulators[id].n_voltages = ARRAY_SIZE(safeoutvolt);
1175*4882a593Smuzhiyun 		} else if (id == MAX8997_CHARGER_CV) {
1176*4882a593Smuzhiyun 			regulators[id].n_voltages = 16;
1177*4882a593Smuzhiyun 		}
1178*4882a593Smuzhiyun 
1179*4882a593Smuzhiyun 		config.dev = max8997->dev;
1180*4882a593Smuzhiyun 		config.init_data = pdata->regulators[i].initdata;
1181*4882a593Smuzhiyun 		config.driver_data = max8997;
1182*4882a593Smuzhiyun 		config.of_node = pdata->regulators[i].reg_node;
1183*4882a593Smuzhiyun 
1184*4882a593Smuzhiyun 		rdev = devm_regulator_register(&pdev->dev, &regulators[id],
1185*4882a593Smuzhiyun 					       &config);
1186*4882a593Smuzhiyun 		if (IS_ERR(rdev)) {
1187*4882a593Smuzhiyun 			dev_err(max8997->dev, "regulator init failed for %d\n",
1188*4882a593Smuzhiyun 					id);
1189*4882a593Smuzhiyun 			return PTR_ERR(rdev);
1190*4882a593Smuzhiyun 		}
1191*4882a593Smuzhiyun 	}
1192*4882a593Smuzhiyun 
1193*4882a593Smuzhiyun 	return 0;
1194*4882a593Smuzhiyun }
1195*4882a593Smuzhiyun 
1196*4882a593Smuzhiyun static const struct platform_device_id max8997_pmic_id[] = {
1197*4882a593Smuzhiyun 	{ "max8997-pmic", 0},
1198*4882a593Smuzhiyun 	{ },
1199*4882a593Smuzhiyun };
1200*4882a593Smuzhiyun MODULE_DEVICE_TABLE(platform, max8997_pmic_id);
1201*4882a593Smuzhiyun 
1202*4882a593Smuzhiyun static struct platform_driver max8997_pmic_driver = {
1203*4882a593Smuzhiyun 	.driver = {
1204*4882a593Smuzhiyun 		.name = "max8997-pmic",
1205*4882a593Smuzhiyun 	},
1206*4882a593Smuzhiyun 	.probe = max8997_pmic_probe,
1207*4882a593Smuzhiyun 	.id_table = max8997_pmic_id,
1208*4882a593Smuzhiyun };
1209*4882a593Smuzhiyun 
max8997_pmic_init(void)1210*4882a593Smuzhiyun static int __init max8997_pmic_init(void)
1211*4882a593Smuzhiyun {
1212*4882a593Smuzhiyun 	return platform_driver_register(&max8997_pmic_driver);
1213*4882a593Smuzhiyun }
1214*4882a593Smuzhiyun subsys_initcall(max8997_pmic_init);
1215*4882a593Smuzhiyun 
max8997_pmic_cleanup(void)1216*4882a593Smuzhiyun static void __exit max8997_pmic_cleanup(void)
1217*4882a593Smuzhiyun {
1218*4882a593Smuzhiyun 	platform_driver_unregister(&max8997_pmic_driver);
1219*4882a593Smuzhiyun }
1220*4882a593Smuzhiyun module_exit(max8997_pmic_cleanup);
1221*4882a593Smuzhiyun 
1222*4882a593Smuzhiyun MODULE_DESCRIPTION("MAXIM 8997/8966 Regulator Driver");
1223*4882a593Smuzhiyun MODULE_AUTHOR("MyungJoo Ham <myungjoo.ham@samsung.com>");
1224*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1225