xref: /OK3568_Linux_fs/kernel/drivers/regulator/max8907-regulator.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * max8907-regulator.c -- support regulators in max8907
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2010 Gyungoh Yoo <jack.yoo@maxim-ic.com>
6*4882a593Smuzhiyun  * Copyright (C) 2010-2012, NVIDIA CORPORATION. All rights reserved.
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * Portions based on drivers/regulator/tps65910-regulator.c,
9*4882a593Smuzhiyun  *     Copyright 2010 Texas Instruments Inc.
10*4882a593Smuzhiyun  *     Author: Graeme Gregory <gg@slimlogic.co.uk>
11*4882a593Smuzhiyun  *     Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
12*4882a593Smuzhiyun  */
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include <linux/err.h>
15*4882a593Smuzhiyun #include <linux/init.h>
16*4882a593Smuzhiyun #include <linux/mfd/core.h>
17*4882a593Smuzhiyun #include <linux/mfd/max8907.h>
18*4882a593Smuzhiyun #include <linux/module.h>
19*4882a593Smuzhiyun #include <linux/of.h>
20*4882a593Smuzhiyun #include <linux/platform_device.h>
21*4882a593Smuzhiyun #include <linux/regulator/driver.h>
22*4882a593Smuzhiyun #include <linux/regulator/machine.h>
23*4882a593Smuzhiyun #include <linux/regulator/of_regulator.h>
24*4882a593Smuzhiyun #include <linux/regmap.h>
25*4882a593Smuzhiyun #include <linux/slab.h>
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun #define MAX8907_II2RR_VERSION_MASK	0xF0
28*4882a593Smuzhiyun #define MAX8907_II2RR_VERSION_REV_A	0x00
29*4882a593Smuzhiyun #define MAX8907_II2RR_VERSION_REV_B	0x10
30*4882a593Smuzhiyun #define MAX8907_II2RR_VERSION_REV_C	0x30
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun struct max8907_regulator {
33*4882a593Smuzhiyun 	struct regulator_desc desc[MAX8907_NUM_REGULATORS];
34*4882a593Smuzhiyun };
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun #define REG_MBATT() \
37*4882a593Smuzhiyun 	[MAX8907_MBATT] = { \
38*4882a593Smuzhiyun 		.name = "MBATT", \
39*4882a593Smuzhiyun 		.supply_name = "mbatt", \
40*4882a593Smuzhiyun 		.id = MAX8907_MBATT, \
41*4882a593Smuzhiyun 		.ops = &max8907_mbatt_ops, \
42*4882a593Smuzhiyun 		.type = REGULATOR_VOLTAGE, \
43*4882a593Smuzhiyun 		.owner = THIS_MODULE, \
44*4882a593Smuzhiyun 	}
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun #define REG_LDO(ids, supply, base, min, max, step) \
47*4882a593Smuzhiyun 	[MAX8907_##ids] = { \
48*4882a593Smuzhiyun 		.name = #ids, \
49*4882a593Smuzhiyun 		.supply_name = supply, \
50*4882a593Smuzhiyun 		.id = MAX8907_##ids, \
51*4882a593Smuzhiyun 		.n_voltages = ((max) - (min)) / (step) + 1, \
52*4882a593Smuzhiyun 		.ops = &max8907_ldo_ops, \
53*4882a593Smuzhiyun 		.type = REGULATOR_VOLTAGE, \
54*4882a593Smuzhiyun 		.owner = THIS_MODULE, \
55*4882a593Smuzhiyun 		.min_uV = (min), \
56*4882a593Smuzhiyun 		.uV_step = (step), \
57*4882a593Smuzhiyun 		.vsel_reg = (base) + MAX8907_VOUT, \
58*4882a593Smuzhiyun 		.vsel_mask = 0x3f, \
59*4882a593Smuzhiyun 		.enable_reg = (base) + MAX8907_CTL, \
60*4882a593Smuzhiyun 		.enable_mask = MAX8907_MASK_LDO_EN, \
61*4882a593Smuzhiyun 	}
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun #define REG_FIXED(ids, supply, voltage) \
64*4882a593Smuzhiyun 	[MAX8907_##ids] = { \
65*4882a593Smuzhiyun 		.name = #ids, \
66*4882a593Smuzhiyun 		.supply_name = supply, \
67*4882a593Smuzhiyun 		.id = MAX8907_##ids, \
68*4882a593Smuzhiyun 		.n_voltages = 1, \
69*4882a593Smuzhiyun 		.ops = &max8907_fixed_ops, \
70*4882a593Smuzhiyun 		.type = REGULATOR_VOLTAGE, \
71*4882a593Smuzhiyun 		.owner = THIS_MODULE, \
72*4882a593Smuzhiyun 		.min_uV = (voltage), \
73*4882a593Smuzhiyun 	}
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun #define REG_OUT5V(ids, supply, base, voltage) \
76*4882a593Smuzhiyun 	[MAX8907_##ids] = { \
77*4882a593Smuzhiyun 		.name = #ids, \
78*4882a593Smuzhiyun 		.supply_name = supply, \
79*4882a593Smuzhiyun 		.id = MAX8907_##ids, \
80*4882a593Smuzhiyun 		.n_voltages = 1, \
81*4882a593Smuzhiyun 		.ops = &max8907_out5v_ops, \
82*4882a593Smuzhiyun 		.type = REGULATOR_VOLTAGE, \
83*4882a593Smuzhiyun 		.owner = THIS_MODULE, \
84*4882a593Smuzhiyun 		.min_uV = (voltage), \
85*4882a593Smuzhiyun 		.enable_reg = (base), \
86*4882a593Smuzhiyun 		.enable_mask = MAX8907_MASK_OUT5V_EN, \
87*4882a593Smuzhiyun 	}
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun #define REG_BBAT(ids, supply, base, min, max, step) \
90*4882a593Smuzhiyun 	[MAX8907_##ids] = { \
91*4882a593Smuzhiyun 		.name = #ids, \
92*4882a593Smuzhiyun 		.supply_name = supply, \
93*4882a593Smuzhiyun 		.id = MAX8907_##ids, \
94*4882a593Smuzhiyun 		.n_voltages = ((max) - (min)) / (step) + 1, \
95*4882a593Smuzhiyun 		.ops = &max8907_bbat_ops, \
96*4882a593Smuzhiyun 		.type = REGULATOR_VOLTAGE, \
97*4882a593Smuzhiyun 		.owner = THIS_MODULE, \
98*4882a593Smuzhiyun 		.min_uV = (min), \
99*4882a593Smuzhiyun 		.uV_step = (step), \
100*4882a593Smuzhiyun 		.vsel_reg = (base), \
101*4882a593Smuzhiyun 		.vsel_mask = MAX8907_MASK_VBBATTCV, \
102*4882a593Smuzhiyun 	}
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun #define LDO_750_50(id, supply, base) REG_LDO(id, supply, (base), \
105*4882a593Smuzhiyun 			750000, 3900000, 50000)
106*4882a593Smuzhiyun #define LDO_650_25(id, supply, base) REG_LDO(id, supply, (base), \
107*4882a593Smuzhiyun 			650000, 2225000, 25000)
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun static const struct regulator_ops max8907_mbatt_ops = {
110*4882a593Smuzhiyun };
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun static const struct regulator_ops max8907_ldo_ops = {
113*4882a593Smuzhiyun 	.list_voltage = regulator_list_voltage_linear,
114*4882a593Smuzhiyun 	.set_voltage_sel = regulator_set_voltage_sel_regmap,
115*4882a593Smuzhiyun 	.get_voltage_sel = regulator_get_voltage_sel_regmap,
116*4882a593Smuzhiyun 	.enable = regulator_enable_regmap,
117*4882a593Smuzhiyun 	.disable = regulator_disable_regmap,
118*4882a593Smuzhiyun 	.is_enabled = regulator_is_enabled_regmap,
119*4882a593Smuzhiyun };
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun static const struct regulator_ops max8907_ldo_hwctl_ops = {
122*4882a593Smuzhiyun 	.list_voltage = regulator_list_voltage_linear,
123*4882a593Smuzhiyun 	.set_voltage_sel = regulator_set_voltage_sel_regmap,
124*4882a593Smuzhiyun 	.get_voltage_sel = regulator_get_voltage_sel_regmap,
125*4882a593Smuzhiyun };
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun static const struct regulator_ops max8907_fixed_ops = {
128*4882a593Smuzhiyun 	.list_voltage = regulator_list_voltage_linear,
129*4882a593Smuzhiyun };
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun static const struct regulator_ops max8907_out5v_ops = {
132*4882a593Smuzhiyun 	.list_voltage = regulator_list_voltage_linear,
133*4882a593Smuzhiyun 	.enable = regulator_enable_regmap,
134*4882a593Smuzhiyun 	.disable = regulator_disable_regmap,
135*4882a593Smuzhiyun 	.is_enabled = regulator_is_enabled_regmap,
136*4882a593Smuzhiyun };
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun static const struct regulator_ops max8907_out5v_hwctl_ops = {
139*4882a593Smuzhiyun 	.list_voltage = regulator_list_voltage_linear,
140*4882a593Smuzhiyun };
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun static const struct regulator_ops max8907_bbat_ops = {
143*4882a593Smuzhiyun 	.list_voltage = regulator_list_voltage_linear,
144*4882a593Smuzhiyun 	.set_voltage_sel = regulator_set_voltage_sel_regmap,
145*4882a593Smuzhiyun 	.get_voltage_sel = regulator_get_voltage_sel_regmap,
146*4882a593Smuzhiyun };
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun static const struct regulator_desc max8907_regulators[] = {
149*4882a593Smuzhiyun 	REG_MBATT(),
150*4882a593Smuzhiyun 	REG_LDO(SD1, "in-v1", MAX8907_REG_SDCTL1, 650000, 2225000, 25000),
151*4882a593Smuzhiyun 	REG_LDO(SD2, "in-v2", MAX8907_REG_SDCTL2, 637500, 1425000, 12500),
152*4882a593Smuzhiyun 	REG_LDO(SD3, "in-v3", MAX8907_REG_SDCTL3, 750000, 3900000, 50000),
153*4882a593Smuzhiyun 	LDO_750_50(LDO1, "in1", MAX8907_REG_LDOCTL1),
154*4882a593Smuzhiyun 	LDO_650_25(LDO2, "in2", MAX8907_REG_LDOCTL2),
155*4882a593Smuzhiyun 	LDO_650_25(LDO3, "in3", MAX8907_REG_LDOCTL3),
156*4882a593Smuzhiyun 	LDO_750_50(LDO4, "in4", MAX8907_REG_LDOCTL4),
157*4882a593Smuzhiyun 	LDO_750_50(LDO5, "in5", MAX8907_REG_LDOCTL5),
158*4882a593Smuzhiyun 	LDO_750_50(LDO6, "in6", MAX8907_REG_LDOCTL6),
159*4882a593Smuzhiyun 	LDO_750_50(LDO7, "in7", MAX8907_REG_LDOCTL7),
160*4882a593Smuzhiyun 	LDO_750_50(LDO8, "in8", MAX8907_REG_LDOCTL8),
161*4882a593Smuzhiyun 	LDO_750_50(LDO9, "in9", MAX8907_REG_LDOCTL9),
162*4882a593Smuzhiyun 	LDO_750_50(LDO10, "in10", MAX8907_REG_LDOCTL10),
163*4882a593Smuzhiyun 	LDO_750_50(LDO11, "in11", MAX8907_REG_LDOCTL11),
164*4882a593Smuzhiyun 	LDO_750_50(LDO12, "in12", MAX8907_REG_LDOCTL12),
165*4882a593Smuzhiyun 	LDO_750_50(LDO13, "in13", MAX8907_REG_LDOCTL13),
166*4882a593Smuzhiyun 	LDO_750_50(LDO14, "in14", MAX8907_REG_LDOCTL14),
167*4882a593Smuzhiyun 	LDO_750_50(LDO15, "in15", MAX8907_REG_LDOCTL15),
168*4882a593Smuzhiyun 	LDO_750_50(LDO16, "in16", MAX8907_REG_LDOCTL16),
169*4882a593Smuzhiyun 	LDO_650_25(LDO17, "in17", MAX8907_REG_LDOCTL17),
170*4882a593Smuzhiyun 	LDO_650_25(LDO18, "in18", MAX8907_REG_LDOCTL18),
171*4882a593Smuzhiyun 	LDO_750_50(LDO19, "in19", MAX8907_REG_LDOCTL19),
172*4882a593Smuzhiyun 	LDO_750_50(LDO20, "in20", MAX8907_REG_LDOCTL20),
173*4882a593Smuzhiyun 	REG_OUT5V(OUT5V, "mbatt", MAX8907_REG_OUT5VEN, 5000000),
174*4882a593Smuzhiyun 	REG_OUT5V(OUT33V, "mbatt",  MAX8907_REG_OUT33VEN, 3300000),
175*4882a593Smuzhiyun 	REG_BBAT(BBAT, "MBATT", MAX8907_REG_BBAT_CNFG,
176*4882a593Smuzhiyun 						2400000, 3000000, 200000),
177*4882a593Smuzhiyun 	REG_FIXED(SDBY, "MBATT", 1200000),
178*4882a593Smuzhiyun 	REG_FIXED(VRTC, "MBATT", 3300000),
179*4882a593Smuzhiyun };
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun #ifdef CONFIG_OF
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun #define MATCH(_name, _id) \
184*4882a593Smuzhiyun 	[MAX8907_##_id] = { \
185*4882a593Smuzhiyun 		.name = #_name, \
186*4882a593Smuzhiyun 		.driver_data = (void *)&max8907_regulators[MAX8907_##_id], \
187*4882a593Smuzhiyun 	}
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun static struct of_regulator_match max8907_matches[] = {
190*4882a593Smuzhiyun 	MATCH(mbatt, MBATT),
191*4882a593Smuzhiyun 	MATCH(sd1, SD1),
192*4882a593Smuzhiyun 	MATCH(sd2, SD2),
193*4882a593Smuzhiyun 	MATCH(sd3, SD3),
194*4882a593Smuzhiyun 	MATCH(ldo1, LDO1),
195*4882a593Smuzhiyun 	MATCH(ldo2, LDO2),
196*4882a593Smuzhiyun 	MATCH(ldo3, LDO3),
197*4882a593Smuzhiyun 	MATCH(ldo4, LDO4),
198*4882a593Smuzhiyun 	MATCH(ldo5, LDO5),
199*4882a593Smuzhiyun 	MATCH(ldo6, LDO6),
200*4882a593Smuzhiyun 	MATCH(ldo7, LDO7),
201*4882a593Smuzhiyun 	MATCH(ldo8, LDO8),
202*4882a593Smuzhiyun 	MATCH(ldo9, LDO9),
203*4882a593Smuzhiyun 	MATCH(ldo10, LDO10),
204*4882a593Smuzhiyun 	MATCH(ldo11, LDO11),
205*4882a593Smuzhiyun 	MATCH(ldo12, LDO12),
206*4882a593Smuzhiyun 	MATCH(ldo13, LDO13),
207*4882a593Smuzhiyun 	MATCH(ldo14, LDO14),
208*4882a593Smuzhiyun 	MATCH(ldo15, LDO15),
209*4882a593Smuzhiyun 	MATCH(ldo16, LDO16),
210*4882a593Smuzhiyun 	MATCH(ldo17, LDO17),
211*4882a593Smuzhiyun 	MATCH(ldo18, LDO18),
212*4882a593Smuzhiyun 	MATCH(ldo19, LDO19),
213*4882a593Smuzhiyun 	MATCH(ldo20, LDO20),
214*4882a593Smuzhiyun 	MATCH(out5v, OUT5V),
215*4882a593Smuzhiyun 	MATCH(out33v, OUT33V),
216*4882a593Smuzhiyun 	MATCH(bbat, BBAT),
217*4882a593Smuzhiyun 	MATCH(sdby, SDBY),
218*4882a593Smuzhiyun 	MATCH(vrtc, VRTC),
219*4882a593Smuzhiyun };
220*4882a593Smuzhiyun 
max8907_regulator_parse_dt(struct platform_device * pdev)221*4882a593Smuzhiyun static int max8907_regulator_parse_dt(struct platform_device *pdev)
222*4882a593Smuzhiyun {
223*4882a593Smuzhiyun 	struct device_node *np, *regulators;
224*4882a593Smuzhiyun 	int ret;
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun 	np = pdev->dev.parent->of_node;
227*4882a593Smuzhiyun 	if (!np)
228*4882a593Smuzhiyun 		return 0;
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 	regulators = of_get_child_by_name(np, "regulators");
231*4882a593Smuzhiyun 	if (!regulators) {
232*4882a593Smuzhiyun 		dev_err(&pdev->dev, "regulators node not found\n");
233*4882a593Smuzhiyun 		return -EINVAL;
234*4882a593Smuzhiyun 	}
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun 	ret = of_regulator_match(&pdev->dev, regulators, max8907_matches,
237*4882a593Smuzhiyun 				 ARRAY_SIZE(max8907_matches));
238*4882a593Smuzhiyun 	of_node_put(regulators);
239*4882a593Smuzhiyun 	if (ret < 0) {
240*4882a593Smuzhiyun 		dev_err(&pdev->dev, "Error parsing regulator init data: %d\n",
241*4882a593Smuzhiyun 			ret);
242*4882a593Smuzhiyun 		return ret;
243*4882a593Smuzhiyun 	}
244*4882a593Smuzhiyun 
245*4882a593Smuzhiyun 	return 0;
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun 
match_init_data(int index)248*4882a593Smuzhiyun static inline struct regulator_init_data *match_init_data(int index)
249*4882a593Smuzhiyun {
250*4882a593Smuzhiyun 	return max8907_matches[index].init_data;
251*4882a593Smuzhiyun }
252*4882a593Smuzhiyun 
match_of_node(int index)253*4882a593Smuzhiyun static inline struct device_node *match_of_node(int index)
254*4882a593Smuzhiyun {
255*4882a593Smuzhiyun 	return max8907_matches[index].of_node;
256*4882a593Smuzhiyun }
257*4882a593Smuzhiyun #else
max8907_regulator_parse_dt(struct platform_device * pdev)258*4882a593Smuzhiyun static int max8907_regulator_parse_dt(struct platform_device *pdev)
259*4882a593Smuzhiyun {
260*4882a593Smuzhiyun 	return 0;
261*4882a593Smuzhiyun }
262*4882a593Smuzhiyun 
match_init_data(int index)263*4882a593Smuzhiyun static inline struct regulator_init_data *match_init_data(int index)
264*4882a593Smuzhiyun {
265*4882a593Smuzhiyun 	return NULL;
266*4882a593Smuzhiyun }
267*4882a593Smuzhiyun 
match_of_node(int index)268*4882a593Smuzhiyun static inline struct device_node *match_of_node(int index)
269*4882a593Smuzhiyun {
270*4882a593Smuzhiyun 	return NULL;
271*4882a593Smuzhiyun }
272*4882a593Smuzhiyun #endif
273*4882a593Smuzhiyun 
max8907_regulator_probe(struct platform_device * pdev)274*4882a593Smuzhiyun static int max8907_regulator_probe(struct platform_device *pdev)
275*4882a593Smuzhiyun {
276*4882a593Smuzhiyun 	struct max8907 *max8907 = dev_get_drvdata(pdev->dev.parent);
277*4882a593Smuzhiyun 	struct max8907_platform_data *pdata = dev_get_platdata(max8907->dev);
278*4882a593Smuzhiyun 	int ret;
279*4882a593Smuzhiyun 	struct max8907_regulator *pmic;
280*4882a593Smuzhiyun 	unsigned int val;
281*4882a593Smuzhiyun 	int i;
282*4882a593Smuzhiyun 	struct regulator_config config = {};
283*4882a593Smuzhiyun 	struct regulator_init_data *idata;
284*4882a593Smuzhiyun 	const char *mbatt_rail_name = NULL;
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun 	ret = max8907_regulator_parse_dt(pdev);
287*4882a593Smuzhiyun 	if (ret)
288*4882a593Smuzhiyun 		return ret;
289*4882a593Smuzhiyun 
290*4882a593Smuzhiyun 	pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
291*4882a593Smuzhiyun 	if (!pmic)
292*4882a593Smuzhiyun 		return -ENOMEM;
293*4882a593Smuzhiyun 
294*4882a593Smuzhiyun 	platform_set_drvdata(pdev, pmic);
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun 	memcpy(pmic->desc, max8907_regulators, sizeof(pmic->desc));
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun 	/* Backwards compatibility with MAX8907B; SD1 uses different voltages */
299*4882a593Smuzhiyun 	ret = regmap_read(max8907->regmap_gen, MAX8907_REG_II2RR, &val);
300*4882a593Smuzhiyun 	if (ret)
301*4882a593Smuzhiyun 		return ret;
302*4882a593Smuzhiyun 
303*4882a593Smuzhiyun 	if ((val & MAX8907_II2RR_VERSION_MASK) ==
304*4882a593Smuzhiyun 	    MAX8907_II2RR_VERSION_REV_B) {
305*4882a593Smuzhiyun 		pmic->desc[MAX8907_SD1].min_uV = 637500;
306*4882a593Smuzhiyun 		pmic->desc[MAX8907_SD1].uV_step = 12500;
307*4882a593Smuzhiyun 		pmic->desc[MAX8907_SD1].n_voltages =
308*4882a593Smuzhiyun 						(1425000 - 637500) / 12500 + 1;
309*4882a593Smuzhiyun 	}
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun 	for (i = 0; i < MAX8907_NUM_REGULATORS; i++) {
312*4882a593Smuzhiyun 		struct regulator_dev *rdev;
313*4882a593Smuzhiyun 
314*4882a593Smuzhiyun 		config.dev = pdev->dev.parent;
315*4882a593Smuzhiyun 		if (pdata)
316*4882a593Smuzhiyun 			idata = pdata->init_data[i];
317*4882a593Smuzhiyun 		else
318*4882a593Smuzhiyun 			idata = match_init_data(i);
319*4882a593Smuzhiyun 		config.init_data = idata;
320*4882a593Smuzhiyun 		config.driver_data = pmic;
321*4882a593Smuzhiyun 		config.regmap = max8907->regmap_gen;
322*4882a593Smuzhiyun 		config.of_node = match_of_node(i);
323*4882a593Smuzhiyun 
324*4882a593Smuzhiyun 		switch (pmic->desc[i].id) {
325*4882a593Smuzhiyun 		case MAX8907_MBATT:
326*4882a593Smuzhiyun 			if (idata && idata->constraints.name)
327*4882a593Smuzhiyun 				mbatt_rail_name = idata->constraints.name;
328*4882a593Smuzhiyun 			else
329*4882a593Smuzhiyun 				mbatt_rail_name = pmic->desc[i].name;
330*4882a593Smuzhiyun 			break;
331*4882a593Smuzhiyun 		case MAX8907_BBAT:
332*4882a593Smuzhiyun 		case MAX8907_SDBY:
333*4882a593Smuzhiyun 		case MAX8907_VRTC:
334*4882a593Smuzhiyun 			idata->supply_regulator = mbatt_rail_name;
335*4882a593Smuzhiyun 			break;
336*4882a593Smuzhiyun 		}
337*4882a593Smuzhiyun 
338*4882a593Smuzhiyun 		if (pmic->desc[i].ops == &max8907_ldo_ops) {
339*4882a593Smuzhiyun 			ret = regmap_read(config.regmap, pmic->desc[i].enable_reg,
340*4882a593Smuzhiyun 				    &val);
341*4882a593Smuzhiyun 			if (ret)
342*4882a593Smuzhiyun 				return ret;
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun 			if ((val & MAX8907_MASK_LDO_SEQ) !=
345*4882a593Smuzhiyun 			    MAX8907_MASK_LDO_SEQ)
346*4882a593Smuzhiyun 				pmic->desc[i].ops = &max8907_ldo_hwctl_ops;
347*4882a593Smuzhiyun 		} else if (pmic->desc[i].ops == &max8907_out5v_ops) {
348*4882a593Smuzhiyun 			ret = regmap_read(config.regmap, pmic->desc[i].enable_reg,
349*4882a593Smuzhiyun 				    &val);
350*4882a593Smuzhiyun 			if (ret)
351*4882a593Smuzhiyun 				return ret;
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun 			if ((val & (MAX8907_MASK_OUT5V_VINEN |
354*4882a593Smuzhiyun 						MAX8907_MASK_OUT5V_ENSRC)) !=
355*4882a593Smuzhiyun 			    MAX8907_MASK_OUT5V_ENSRC)
356*4882a593Smuzhiyun 				pmic->desc[i].ops = &max8907_out5v_hwctl_ops;
357*4882a593Smuzhiyun 		}
358*4882a593Smuzhiyun 
359*4882a593Smuzhiyun 		rdev = devm_regulator_register(&pdev->dev,
360*4882a593Smuzhiyun 						&pmic->desc[i], &config);
361*4882a593Smuzhiyun 		if (IS_ERR(rdev)) {
362*4882a593Smuzhiyun 			dev_err(&pdev->dev,
363*4882a593Smuzhiyun 				"failed to register %s regulator\n",
364*4882a593Smuzhiyun 				pmic->desc[i].name);
365*4882a593Smuzhiyun 			return PTR_ERR(rdev);
366*4882a593Smuzhiyun 		}
367*4882a593Smuzhiyun 	}
368*4882a593Smuzhiyun 
369*4882a593Smuzhiyun 	return 0;
370*4882a593Smuzhiyun }
371*4882a593Smuzhiyun 
372*4882a593Smuzhiyun static struct platform_driver max8907_regulator_driver = {
373*4882a593Smuzhiyun 	.driver = {
374*4882a593Smuzhiyun 		   .name = "max8907-regulator",
375*4882a593Smuzhiyun 		   },
376*4882a593Smuzhiyun 	.probe = max8907_regulator_probe,
377*4882a593Smuzhiyun };
378*4882a593Smuzhiyun 
max8907_regulator_init(void)379*4882a593Smuzhiyun static int __init max8907_regulator_init(void)
380*4882a593Smuzhiyun {
381*4882a593Smuzhiyun 	return platform_driver_register(&max8907_regulator_driver);
382*4882a593Smuzhiyun }
383*4882a593Smuzhiyun 
384*4882a593Smuzhiyun subsys_initcall(max8907_regulator_init);
385*4882a593Smuzhiyun 
max8907_reg_exit(void)386*4882a593Smuzhiyun static void __exit max8907_reg_exit(void)
387*4882a593Smuzhiyun {
388*4882a593Smuzhiyun 	platform_driver_unregister(&max8907_regulator_driver);
389*4882a593Smuzhiyun }
390*4882a593Smuzhiyun 
391*4882a593Smuzhiyun module_exit(max8907_reg_exit);
392*4882a593Smuzhiyun 
393*4882a593Smuzhiyun MODULE_DESCRIPTION("MAX8907 regulator driver");
394*4882a593Smuzhiyun MODULE_AUTHOR("Gyungoh Yoo <jack.yoo@maxim-ic.com>");
395*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
396*4882a593Smuzhiyun MODULE_ALIAS("platform:max8907-regulator");
397