xref: /OK3568_Linux_fs/kernel/drivers/regulator/max8660.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * max8660.c  --  Voltage regulation for the Maxim 8660/8661
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * based on max1586.c and wm8400-regulator.c
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Copyright (C) 2009 Wolfram Sang, Pengutronix e.K.
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * Some info:
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  * Datasheet: http://datasheets.maxim-ic.com/en/ds/MAX8660-MAX8661.pdf
12*4882a593Smuzhiyun  *
13*4882a593Smuzhiyun  * This chip is a bit nasty because it is a write-only device. Thus, the driver
14*4882a593Smuzhiyun  * uses shadow registers to keep track of its values. The main problem appears
15*4882a593Smuzhiyun  * to be the initialization: When Linux boots up, we cannot know if the chip is
16*4882a593Smuzhiyun  * in the default state or not, so we would have to pass such information in
17*4882a593Smuzhiyun  * platform_data. As this adds a bit of complexity to the driver, this is left
18*4882a593Smuzhiyun  * out for now until it is really needed.
19*4882a593Smuzhiyun  *
20*4882a593Smuzhiyun  * [A|S|M]DTV1 registers are currently not used, but [A|S|M]DTV2.
21*4882a593Smuzhiyun  *
22*4882a593Smuzhiyun  * If the driver is feature complete, it might be worth to check if one set of
23*4882a593Smuzhiyun  * functions for V3-V7 is sufficient. For maximum flexibility during
24*4882a593Smuzhiyun  * development, they are separated for now.
25*4882a593Smuzhiyun  */
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun #include <linux/module.h>
28*4882a593Smuzhiyun #include <linux/err.h>
29*4882a593Smuzhiyun #include <linux/i2c.h>
30*4882a593Smuzhiyun #include <linux/platform_device.h>
31*4882a593Smuzhiyun #include <linux/regulator/driver.h>
32*4882a593Smuzhiyun #include <linux/slab.h>
33*4882a593Smuzhiyun #include <linux/regulator/max8660.h>
34*4882a593Smuzhiyun #include <linux/of.h>
35*4882a593Smuzhiyun #include <linux/of_device.h>
36*4882a593Smuzhiyun #include <linux/regulator/of_regulator.h>
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun #define MAX8660_DCDC_MIN_UV	 725000
39*4882a593Smuzhiyun #define MAX8660_DCDC_MAX_UV	1800000
40*4882a593Smuzhiyun #define MAX8660_DCDC_STEP	  25000
41*4882a593Smuzhiyun #define MAX8660_DCDC_MAX_SEL	0x2b
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun #define MAX8660_LDO5_MIN_UV	1700000
44*4882a593Smuzhiyun #define MAX8660_LDO5_MAX_UV	2000000
45*4882a593Smuzhiyun #define MAX8660_LDO5_STEP	  25000
46*4882a593Smuzhiyun #define MAX8660_LDO5_MAX_SEL	0x0c
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun #define MAX8660_LDO67_MIN_UV	1800000
49*4882a593Smuzhiyun #define MAX8660_LDO67_MAX_UV	3300000
50*4882a593Smuzhiyun #define MAX8660_LDO67_STEP	 100000
51*4882a593Smuzhiyun #define MAX8660_LDO67_MAX_SEL	0x0f
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun enum {
54*4882a593Smuzhiyun 	MAX8660_OVER1,
55*4882a593Smuzhiyun 	MAX8660_OVER2,
56*4882a593Smuzhiyun 	MAX8660_VCC1,
57*4882a593Smuzhiyun 	MAX8660_ADTV1,
58*4882a593Smuzhiyun 	MAX8660_ADTV2,
59*4882a593Smuzhiyun 	MAX8660_SDTV1,
60*4882a593Smuzhiyun 	MAX8660_SDTV2,
61*4882a593Smuzhiyun 	MAX8660_MDTV1,
62*4882a593Smuzhiyun 	MAX8660_MDTV2,
63*4882a593Smuzhiyun 	MAX8660_L12VCR,
64*4882a593Smuzhiyun 	MAX8660_FPWM,
65*4882a593Smuzhiyun 	MAX8660_N_REGS,	/* not a real register */
66*4882a593Smuzhiyun };
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun struct max8660 {
69*4882a593Smuzhiyun 	struct i2c_client *client;
70*4882a593Smuzhiyun 	u8 shadow_regs[MAX8660_N_REGS];		/* as chip is write only */
71*4882a593Smuzhiyun };
72*4882a593Smuzhiyun 
max8660_write(struct max8660 * max8660,u8 reg,u8 mask,u8 val)73*4882a593Smuzhiyun static int max8660_write(struct max8660 *max8660, u8 reg, u8 mask, u8 val)
74*4882a593Smuzhiyun {
75*4882a593Smuzhiyun 	static const u8 max8660_addresses[MAX8660_N_REGS] = {
76*4882a593Smuzhiyun 	 0x10, 0x12, 0x20, 0x23, 0x24, 0x29, 0x2a, 0x32, 0x33, 0x39, 0x80
77*4882a593Smuzhiyun 	};
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 	int ret;
80*4882a593Smuzhiyun 	u8 reg_val = (max8660->shadow_regs[reg] & mask) | val;
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 	dev_vdbg(&max8660->client->dev, "Writing reg %02x with %02x\n",
83*4882a593Smuzhiyun 			max8660_addresses[reg], reg_val);
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	ret = i2c_smbus_write_byte_data(max8660->client,
86*4882a593Smuzhiyun 			max8660_addresses[reg], reg_val);
87*4882a593Smuzhiyun 	if (ret == 0)
88*4882a593Smuzhiyun 		max8660->shadow_regs[reg] = reg_val;
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun 	return ret;
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun /*
95*4882a593Smuzhiyun  * DCDC functions
96*4882a593Smuzhiyun  */
97*4882a593Smuzhiyun 
max8660_dcdc_is_enabled(struct regulator_dev * rdev)98*4882a593Smuzhiyun static int max8660_dcdc_is_enabled(struct regulator_dev *rdev)
99*4882a593Smuzhiyun {
100*4882a593Smuzhiyun 	struct max8660 *max8660 = rdev_get_drvdata(rdev);
101*4882a593Smuzhiyun 	u8 val = max8660->shadow_regs[MAX8660_OVER1];
102*4882a593Smuzhiyun 	u8 mask = (rdev_get_id(rdev) == MAX8660_V3) ? 1 : 4;
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 	return !!(val & mask);
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun 
max8660_dcdc_enable(struct regulator_dev * rdev)107*4882a593Smuzhiyun static int max8660_dcdc_enable(struct regulator_dev *rdev)
108*4882a593Smuzhiyun {
109*4882a593Smuzhiyun 	struct max8660 *max8660 = rdev_get_drvdata(rdev);
110*4882a593Smuzhiyun 	u8 bit = (rdev_get_id(rdev) == MAX8660_V3) ? 1 : 4;
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun 	return max8660_write(max8660, MAX8660_OVER1, 0xff, bit);
113*4882a593Smuzhiyun }
114*4882a593Smuzhiyun 
max8660_dcdc_disable(struct regulator_dev * rdev)115*4882a593Smuzhiyun static int max8660_dcdc_disable(struct regulator_dev *rdev)
116*4882a593Smuzhiyun {
117*4882a593Smuzhiyun 	struct max8660 *max8660 = rdev_get_drvdata(rdev);
118*4882a593Smuzhiyun 	u8 mask = (rdev_get_id(rdev) == MAX8660_V3) ? ~1 : ~4;
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	return max8660_write(max8660, MAX8660_OVER1, mask, 0);
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun 
max8660_dcdc_get_voltage_sel(struct regulator_dev * rdev)123*4882a593Smuzhiyun static int max8660_dcdc_get_voltage_sel(struct regulator_dev *rdev)
124*4882a593Smuzhiyun {
125*4882a593Smuzhiyun 	struct max8660 *max8660 = rdev_get_drvdata(rdev);
126*4882a593Smuzhiyun 	u8 reg = (rdev_get_id(rdev) == MAX8660_V3) ? MAX8660_ADTV2 : MAX8660_SDTV2;
127*4882a593Smuzhiyun 	u8 selector = max8660->shadow_regs[reg];
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 	return selector;
130*4882a593Smuzhiyun }
131*4882a593Smuzhiyun 
max8660_dcdc_set_voltage_sel(struct regulator_dev * rdev,unsigned int selector)132*4882a593Smuzhiyun static int max8660_dcdc_set_voltage_sel(struct regulator_dev *rdev,
133*4882a593Smuzhiyun 					unsigned int selector)
134*4882a593Smuzhiyun {
135*4882a593Smuzhiyun 	struct max8660 *max8660 = rdev_get_drvdata(rdev);
136*4882a593Smuzhiyun 	u8 reg, bits;
137*4882a593Smuzhiyun 	int ret;
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun 	reg = (rdev_get_id(rdev) == MAX8660_V3) ? MAX8660_ADTV2 : MAX8660_SDTV2;
140*4882a593Smuzhiyun 	ret = max8660_write(max8660, reg, 0, selector);
141*4882a593Smuzhiyun 	if (ret)
142*4882a593Smuzhiyun 		return ret;
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	/* Select target voltage register and activate regulation */
145*4882a593Smuzhiyun 	bits = (rdev_get_id(rdev) == MAX8660_V3) ? 0x03 : 0x30;
146*4882a593Smuzhiyun 	return max8660_write(max8660, MAX8660_VCC1, 0xff, bits);
147*4882a593Smuzhiyun }
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun static struct regulator_ops max8660_dcdc_ops = {
150*4882a593Smuzhiyun 	.is_enabled = max8660_dcdc_is_enabled,
151*4882a593Smuzhiyun 	.list_voltage = regulator_list_voltage_linear,
152*4882a593Smuzhiyun 	.map_voltage = regulator_map_voltage_linear,
153*4882a593Smuzhiyun 	.set_voltage_sel = max8660_dcdc_set_voltage_sel,
154*4882a593Smuzhiyun 	.get_voltage_sel = max8660_dcdc_get_voltage_sel,
155*4882a593Smuzhiyun };
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun /*
159*4882a593Smuzhiyun  * LDO5 functions
160*4882a593Smuzhiyun  */
161*4882a593Smuzhiyun 
max8660_ldo5_get_voltage_sel(struct regulator_dev * rdev)162*4882a593Smuzhiyun static int max8660_ldo5_get_voltage_sel(struct regulator_dev *rdev)
163*4882a593Smuzhiyun {
164*4882a593Smuzhiyun 	struct max8660 *max8660 = rdev_get_drvdata(rdev);
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 	u8 selector = max8660->shadow_regs[MAX8660_MDTV2];
167*4882a593Smuzhiyun 	return selector;
168*4882a593Smuzhiyun }
169*4882a593Smuzhiyun 
max8660_ldo5_set_voltage_sel(struct regulator_dev * rdev,unsigned int selector)170*4882a593Smuzhiyun static int max8660_ldo5_set_voltage_sel(struct regulator_dev *rdev,
171*4882a593Smuzhiyun 					unsigned int selector)
172*4882a593Smuzhiyun {
173*4882a593Smuzhiyun 	struct max8660 *max8660 = rdev_get_drvdata(rdev);
174*4882a593Smuzhiyun 	int ret;
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun 	ret = max8660_write(max8660, MAX8660_MDTV2, 0, selector);
177*4882a593Smuzhiyun 	if (ret)
178*4882a593Smuzhiyun 		return ret;
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun 	/* Select target voltage register and activate regulation */
181*4882a593Smuzhiyun 	return max8660_write(max8660, MAX8660_VCC1, 0xff, 0xc0);
182*4882a593Smuzhiyun }
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun static const struct regulator_ops max8660_ldo5_ops = {
185*4882a593Smuzhiyun 	.list_voltage = regulator_list_voltage_linear,
186*4882a593Smuzhiyun 	.map_voltage = regulator_map_voltage_linear,
187*4882a593Smuzhiyun 	.set_voltage_sel = max8660_ldo5_set_voltage_sel,
188*4882a593Smuzhiyun 	.get_voltage_sel = max8660_ldo5_get_voltage_sel,
189*4882a593Smuzhiyun };
190*4882a593Smuzhiyun 
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun /*
193*4882a593Smuzhiyun  * LDO67 functions
194*4882a593Smuzhiyun  */
195*4882a593Smuzhiyun 
max8660_ldo67_is_enabled(struct regulator_dev * rdev)196*4882a593Smuzhiyun static int max8660_ldo67_is_enabled(struct regulator_dev *rdev)
197*4882a593Smuzhiyun {
198*4882a593Smuzhiyun 	struct max8660 *max8660 = rdev_get_drvdata(rdev);
199*4882a593Smuzhiyun 	u8 val = max8660->shadow_regs[MAX8660_OVER2];
200*4882a593Smuzhiyun 	u8 mask = (rdev_get_id(rdev) == MAX8660_V6) ? 2 : 4;
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun 	return !!(val & mask);
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun 
max8660_ldo67_enable(struct regulator_dev * rdev)205*4882a593Smuzhiyun static int max8660_ldo67_enable(struct regulator_dev *rdev)
206*4882a593Smuzhiyun {
207*4882a593Smuzhiyun 	struct max8660 *max8660 = rdev_get_drvdata(rdev);
208*4882a593Smuzhiyun 	u8 bit = (rdev_get_id(rdev) == MAX8660_V6) ? 2 : 4;
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun 	return max8660_write(max8660, MAX8660_OVER2, 0xff, bit);
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun 
max8660_ldo67_disable(struct regulator_dev * rdev)213*4882a593Smuzhiyun static int max8660_ldo67_disable(struct regulator_dev *rdev)
214*4882a593Smuzhiyun {
215*4882a593Smuzhiyun 	struct max8660 *max8660 = rdev_get_drvdata(rdev);
216*4882a593Smuzhiyun 	u8 mask = (rdev_get_id(rdev) == MAX8660_V6) ? ~2 : ~4;
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun 	return max8660_write(max8660, MAX8660_OVER2, mask, 0);
219*4882a593Smuzhiyun }
220*4882a593Smuzhiyun 
max8660_ldo67_get_voltage_sel(struct regulator_dev * rdev)221*4882a593Smuzhiyun static int max8660_ldo67_get_voltage_sel(struct regulator_dev *rdev)
222*4882a593Smuzhiyun {
223*4882a593Smuzhiyun 	struct max8660 *max8660 = rdev_get_drvdata(rdev);
224*4882a593Smuzhiyun 	u8 shift = (rdev_get_id(rdev) == MAX8660_V6) ? 0 : 4;
225*4882a593Smuzhiyun 	u8 selector = (max8660->shadow_regs[MAX8660_L12VCR] >> shift) & 0xf;
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun 	return selector;
228*4882a593Smuzhiyun }
229*4882a593Smuzhiyun 
max8660_ldo67_set_voltage_sel(struct regulator_dev * rdev,unsigned int selector)230*4882a593Smuzhiyun static int max8660_ldo67_set_voltage_sel(struct regulator_dev *rdev,
231*4882a593Smuzhiyun 					 unsigned int selector)
232*4882a593Smuzhiyun {
233*4882a593Smuzhiyun 	struct max8660 *max8660 = rdev_get_drvdata(rdev);
234*4882a593Smuzhiyun 
235*4882a593Smuzhiyun 	if (rdev_get_id(rdev) == MAX8660_V6)
236*4882a593Smuzhiyun 		return max8660_write(max8660, MAX8660_L12VCR, 0xf0, selector);
237*4882a593Smuzhiyun 	else
238*4882a593Smuzhiyun 		return max8660_write(max8660, MAX8660_L12VCR, 0x0f,
239*4882a593Smuzhiyun 				     selector << 4);
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun static const struct regulator_ops max8660_ldo67_ops = {
243*4882a593Smuzhiyun 	.is_enabled = max8660_ldo67_is_enabled,
244*4882a593Smuzhiyun 	.enable = max8660_ldo67_enable,
245*4882a593Smuzhiyun 	.disable = max8660_ldo67_disable,
246*4882a593Smuzhiyun 	.list_voltage = regulator_list_voltage_linear,
247*4882a593Smuzhiyun 	.map_voltage = regulator_map_voltage_linear,
248*4882a593Smuzhiyun 	.get_voltage_sel = max8660_ldo67_get_voltage_sel,
249*4882a593Smuzhiyun 	.set_voltage_sel = max8660_ldo67_set_voltage_sel,
250*4882a593Smuzhiyun };
251*4882a593Smuzhiyun 
252*4882a593Smuzhiyun static const struct regulator_desc max8660_reg[] = {
253*4882a593Smuzhiyun 	{
254*4882a593Smuzhiyun 		.name = "V3(DCDC)",
255*4882a593Smuzhiyun 		.id = MAX8660_V3,
256*4882a593Smuzhiyun 		.ops = &max8660_dcdc_ops,
257*4882a593Smuzhiyun 		.type = REGULATOR_VOLTAGE,
258*4882a593Smuzhiyun 		.n_voltages = MAX8660_DCDC_MAX_SEL + 1,
259*4882a593Smuzhiyun 		.owner = THIS_MODULE,
260*4882a593Smuzhiyun 		.min_uV = MAX8660_DCDC_MIN_UV,
261*4882a593Smuzhiyun 		.uV_step = MAX8660_DCDC_STEP,
262*4882a593Smuzhiyun 	},
263*4882a593Smuzhiyun 	{
264*4882a593Smuzhiyun 		.name = "V4(DCDC)",
265*4882a593Smuzhiyun 		.id = MAX8660_V4,
266*4882a593Smuzhiyun 		.ops = &max8660_dcdc_ops,
267*4882a593Smuzhiyun 		.type = REGULATOR_VOLTAGE,
268*4882a593Smuzhiyun 		.n_voltages = MAX8660_DCDC_MAX_SEL + 1,
269*4882a593Smuzhiyun 		.owner = THIS_MODULE,
270*4882a593Smuzhiyun 		.min_uV = MAX8660_DCDC_MIN_UV,
271*4882a593Smuzhiyun 		.uV_step = MAX8660_DCDC_STEP,
272*4882a593Smuzhiyun 	},
273*4882a593Smuzhiyun 	{
274*4882a593Smuzhiyun 		.name = "V5(LDO)",
275*4882a593Smuzhiyun 		.id = MAX8660_V5,
276*4882a593Smuzhiyun 		.ops = &max8660_ldo5_ops,
277*4882a593Smuzhiyun 		.type = REGULATOR_VOLTAGE,
278*4882a593Smuzhiyun 		.n_voltages = MAX8660_LDO5_MAX_SEL + 1,
279*4882a593Smuzhiyun 		.owner = THIS_MODULE,
280*4882a593Smuzhiyun 		.min_uV = MAX8660_LDO5_MIN_UV,
281*4882a593Smuzhiyun 		.uV_step = MAX8660_LDO5_STEP,
282*4882a593Smuzhiyun 	},
283*4882a593Smuzhiyun 	{
284*4882a593Smuzhiyun 		.name = "V6(LDO)",
285*4882a593Smuzhiyun 		.id = MAX8660_V6,
286*4882a593Smuzhiyun 		.ops = &max8660_ldo67_ops,
287*4882a593Smuzhiyun 		.type = REGULATOR_VOLTAGE,
288*4882a593Smuzhiyun 		.n_voltages = MAX8660_LDO67_MAX_SEL + 1,
289*4882a593Smuzhiyun 		.owner = THIS_MODULE,
290*4882a593Smuzhiyun 		.min_uV = MAX8660_LDO67_MIN_UV,
291*4882a593Smuzhiyun 		.uV_step = MAX8660_LDO67_STEP,
292*4882a593Smuzhiyun 	},
293*4882a593Smuzhiyun 	{
294*4882a593Smuzhiyun 		.name = "V7(LDO)",
295*4882a593Smuzhiyun 		.id = MAX8660_V7,
296*4882a593Smuzhiyun 		.ops = &max8660_ldo67_ops,
297*4882a593Smuzhiyun 		.type = REGULATOR_VOLTAGE,
298*4882a593Smuzhiyun 		.n_voltages = MAX8660_LDO67_MAX_SEL + 1,
299*4882a593Smuzhiyun 		.owner = THIS_MODULE,
300*4882a593Smuzhiyun 		.min_uV = MAX8660_LDO67_MIN_UV,
301*4882a593Smuzhiyun 		.uV_step = MAX8660_LDO67_STEP,
302*4882a593Smuzhiyun 	},
303*4882a593Smuzhiyun };
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun enum {
306*4882a593Smuzhiyun 	MAX8660 = 0,
307*4882a593Smuzhiyun 	MAX8661 = 1,
308*4882a593Smuzhiyun };
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun #ifdef CONFIG_OF
311*4882a593Smuzhiyun static const struct of_device_id max8660_dt_ids[] = {
312*4882a593Smuzhiyun 	{ .compatible = "maxim,max8660", .data = (void *) MAX8660 },
313*4882a593Smuzhiyun 	{ .compatible = "maxim,max8661", .data = (void *) MAX8661 },
314*4882a593Smuzhiyun 	{ }
315*4882a593Smuzhiyun };
316*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, max8660_dt_ids);
317*4882a593Smuzhiyun 
max8660_pdata_from_dt(struct device * dev,struct device_node ** of_node,struct max8660_platform_data * pdata)318*4882a593Smuzhiyun static int max8660_pdata_from_dt(struct device *dev,
319*4882a593Smuzhiyun 				 struct device_node **of_node,
320*4882a593Smuzhiyun 				 struct max8660_platform_data *pdata)
321*4882a593Smuzhiyun {
322*4882a593Smuzhiyun 	int matched, i;
323*4882a593Smuzhiyun 	struct device_node *np;
324*4882a593Smuzhiyun 	struct max8660_subdev_data *sub;
325*4882a593Smuzhiyun 	struct of_regulator_match rmatch[ARRAY_SIZE(max8660_reg)] = { };
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun 	np = of_get_child_by_name(dev->of_node, "regulators");
328*4882a593Smuzhiyun 	if (!np) {
329*4882a593Smuzhiyun 		dev_err(dev, "missing 'regulators' subnode in DT\n");
330*4882a593Smuzhiyun 		return -EINVAL;
331*4882a593Smuzhiyun 	}
332*4882a593Smuzhiyun 
333*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(rmatch); i++)
334*4882a593Smuzhiyun 		rmatch[i].name = max8660_reg[i].name;
335*4882a593Smuzhiyun 
336*4882a593Smuzhiyun 	matched = of_regulator_match(dev, np, rmatch, ARRAY_SIZE(rmatch));
337*4882a593Smuzhiyun 	of_node_put(np);
338*4882a593Smuzhiyun 	if (matched <= 0)
339*4882a593Smuzhiyun 		return matched;
340*4882a593Smuzhiyun 
341*4882a593Smuzhiyun 	pdata->subdevs = devm_kcalloc(dev,
342*4882a593Smuzhiyun 				      matched,
343*4882a593Smuzhiyun 				      sizeof(struct max8660_subdev_data),
344*4882a593Smuzhiyun 				      GFP_KERNEL);
345*4882a593Smuzhiyun 	if (!pdata->subdevs)
346*4882a593Smuzhiyun 		return -ENOMEM;
347*4882a593Smuzhiyun 
348*4882a593Smuzhiyun 	pdata->num_subdevs = matched;
349*4882a593Smuzhiyun 	sub = pdata->subdevs;
350*4882a593Smuzhiyun 
351*4882a593Smuzhiyun 	for (i = 0; i < matched; i++) {
352*4882a593Smuzhiyun 		sub->id = i;
353*4882a593Smuzhiyun 		sub->name = rmatch[i].name;
354*4882a593Smuzhiyun 		sub->platform_data = rmatch[i].init_data;
355*4882a593Smuzhiyun 		of_node[i] = rmatch[i].of_node;
356*4882a593Smuzhiyun 		sub++;
357*4882a593Smuzhiyun 	}
358*4882a593Smuzhiyun 
359*4882a593Smuzhiyun 	return 0;
360*4882a593Smuzhiyun }
361*4882a593Smuzhiyun #else
max8660_pdata_from_dt(struct device * dev,struct device_node ** of_node,struct max8660_platform_data * pdata)362*4882a593Smuzhiyun static inline int max8660_pdata_from_dt(struct device *dev,
363*4882a593Smuzhiyun 					struct device_node **of_node,
364*4882a593Smuzhiyun 					struct max8660_platform_data *pdata)
365*4882a593Smuzhiyun {
366*4882a593Smuzhiyun 	return 0;
367*4882a593Smuzhiyun }
368*4882a593Smuzhiyun #endif
369*4882a593Smuzhiyun 
max8660_probe(struct i2c_client * client,const struct i2c_device_id * i2c_id)370*4882a593Smuzhiyun static int max8660_probe(struct i2c_client *client,
371*4882a593Smuzhiyun 				   const struct i2c_device_id *i2c_id)
372*4882a593Smuzhiyun {
373*4882a593Smuzhiyun 	struct device *dev = &client->dev;
374*4882a593Smuzhiyun 	struct max8660_platform_data pdata_of, *pdata = dev_get_platdata(dev);
375*4882a593Smuzhiyun 	struct regulator_config config = { };
376*4882a593Smuzhiyun 	struct max8660 *max8660;
377*4882a593Smuzhiyun 	int boot_on, i, id, ret = -EINVAL;
378*4882a593Smuzhiyun 	struct device_node *of_node[MAX8660_V_END];
379*4882a593Smuzhiyun 	unsigned long type;
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun 	if (dev->of_node && !pdata) {
382*4882a593Smuzhiyun 		const struct of_device_id *id;
383*4882a593Smuzhiyun 
384*4882a593Smuzhiyun 		id = of_match_device(of_match_ptr(max8660_dt_ids), dev);
385*4882a593Smuzhiyun 		if (!id)
386*4882a593Smuzhiyun 			return -ENODEV;
387*4882a593Smuzhiyun 
388*4882a593Smuzhiyun 		ret = max8660_pdata_from_dt(dev, of_node, &pdata_of);
389*4882a593Smuzhiyun 		if (ret < 0)
390*4882a593Smuzhiyun 			return ret;
391*4882a593Smuzhiyun 
392*4882a593Smuzhiyun 		pdata = &pdata_of;
393*4882a593Smuzhiyun 		type = (unsigned long) id->data;
394*4882a593Smuzhiyun 	} else {
395*4882a593Smuzhiyun 		type = i2c_id->driver_data;
396*4882a593Smuzhiyun 		memset(of_node, 0, sizeof(of_node));
397*4882a593Smuzhiyun 	}
398*4882a593Smuzhiyun 
399*4882a593Smuzhiyun 	if (pdata->num_subdevs > MAX8660_V_END) {
400*4882a593Smuzhiyun 		dev_err(dev, "Too many regulators found!\n");
401*4882a593Smuzhiyun 		return -EINVAL;
402*4882a593Smuzhiyun 	}
403*4882a593Smuzhiyun 
404*4882a593Smuzhiyun 	max8660 = devm_kzalloc(dev, sizeof(struct max8660), GFP_KERNEL);
405*4882a593Smuzhiyun 	if (!max8660)
406*4882a593Smuzhiyun 		return -ENOMEM;
407*4882a593Smuzhiyun 
408*4882a593Smuzhiyun 	max8660->client = client;
409*4882a593Smuzhiyun 
410*4882a593Smuzhiyun 	if (pdata->en34_is_high) {
411*4882a593Smuzhiyun 		/* Simulate always on */
412*4882a593Smuzhiyun 		max8660->shadow_regs[MAX8660_OVER1] = 5;
413*4882a593Smuzhiyun 	} else {
414*4882a593Smuzhiyun 		/* Otherwise devices can be toggled via software */
415*4882a593Smuzhiyun 		max8660_dcdc_ops.enable = max8660_dcdc_enable;
416*4882a593Smuzhiyun 		max8660_dcdc_ops.disable = max8660_dcdc_disable;
417*4882a593Smuzhiyun 	}
418*4882a593Smuzhiyun 
419*4882a593Smuzhiyun 	/*
420*4882a593Smuzhiyun 	 * First, set up shadow registers to prevent glitches. As some
421*4882a593Smuzhiyun 	 * registers are shared between regulators, everything must be properly
422*4882a593Smuzhiyun 	 * set up for all regulators in advance.
423*4882a593Smuzhiyun 	 */
424*4882a593Smuzhiyun 	max8660->shadow_regs[MAX8660_ADTV1] =
425*4882a593Smuzhiyun 		max8660->shadow_regs[MAX8660_ADTV2] =
426*4882a593Smuzhiyun 		max8660->shadow_regs[MAX8660_SDTV1] =
427*4882a593Smuzhiyun 		max8660->shadow_regs[MAX8660_SDTV2] = 0x1b;
428*4882a593Smuzhiyun 	max8660->shadow_regs[MAX8660_MDTV1] =
429*4882a593Smuzhiyun 		max8660->shadow_regs[MAX8660_MDTV2] = 0x04;
430*4882a593Smuzhiyun 
431*4882a593Smuzhiyun 	for (i = 0; i < pdata->num_subdevs; i++) {
432*4882a593Smuzhiyun 
433*4882a593Smuzhiyun 		if (!pdata->subdevs[i].platform_data)
434*4882a593Smuzhiyun 			boot_on = false;
435*4882a593Smuzhiyun 		else
436*4882a593Smuzhiyun 			boot_on = pdata->subdevs[i].platform_data->constraints.boot_on;
437*4882a593Smuzhiyun 
438*4882a593Smuzhiyun 		switch (pdata->subdevs[i].id) {
439*4882a593Smuzhiyun 		case MAX8660_V3:
440*4882a593Smuzhiyun 			if (boot_on)
441*4882a593Smuzhiyun 				max8660->shadow_regs[MAX8660_OVER1] |= 1;
442*4882a593Smuzhiyun 			break;
443*4882a593Smuzhiyun 
444*4882a593Smuzhiyun 		case MAX8660_V4:
445*4882a593Smuzhiyun 			if (boot_on)
446*4882a593Smuzhiyun 				max8660->shadow_regs[MAX8660_OVER1] |= 4;
447*4882a593Smuzhiyun 			break;
448*4882a593Smuzhiyun 
449*4882a593Smuzhiyun 		case MAX8660_V5:
450*4882a593Smuzhiyun 			break;
451*4882a593Smuzhiyun 
452*4882a593Smuzhiyun 		case MAX8660_V6:
453*4882a593Smuzhiyun 			if (boot_on)
454*4882a593Smuzhiyun 				max8660->shadow_regs[MAX8660_OVER2] |= 2;
455*4882a593Smuzhiyun 			break;
456*4882a593Smuzhiyun 
457*4882a593Smuzhiyun 		case MAX8660_V7:
458*4882a593Smuzhiyun 			if (type == MAX8661) {
459*4882a593Smuzhiyun 				dev_err(dev, "Regulator not on this chip!\n");
460*4882a593Smuzhiyun 				return -EINVAL;
461*4882a593Smuzhiyun 			}
462*4882a593Smuzhiyun 
463*4882a593Smuzhiyun 			if (boot_on)
464*4882a593Smuzhiyun 				max8660->shadow_regs[MAX8660_OVER2] |= 4;
465*4882a593Smuzhiyun 			break;
466*4882a593Smuzhiyun 
467*4882a593Smuzhiyun 		default:
468*4882a593Smuzhiyun 			dev_err(dev, "invalid regulator %s\n",
469*4882a593Smuzhiyun 				 pdata->subdevs[i].name);
470*4882a593Smuzhiyun 			return ret;
471*4882a593Smuzhiyun 		}
472*4882a593Smuzhiyun 	}
473*4882a593Smuzhiyun 
474*4882a593Smuzhiyun 	/* Finally register devices */
475*4882a593Smuzhiyun 	for (i = 0; i < pdata->num_subdevs; i++) {
476*4882a593Smuzhiyun 		struct regulator_dev *rdev;
477*4882a593Smuzhiyun 
478*4882a593Smuzhiyun 		id = pdata->subdevs[i].id;
479*4882a593Smuzhiyun 
480*4882a593Smuzhiyun 		config.dev = dev;
481*4882a593Smuzhiyun 		config.init_data = pdata->subdevs[i].platform_data;
482*4882a593Smuzhiyun 		config.of_node = of_node[i];
483*4882a593Smuzhiyun 		config.driver_data = max8660;
484*4882a593Smuzhiyun 
485*4882a593Smuzhiyun 		rdev = devm_regulator_register(&client->dev,
486*4882a593Smuzhiyun 						  &max8660_reg[id], &config);
487*4882a593Smuzhiyun 		if (IS_ERR(rdev)) {
488*4882a593Smuzhiyun 			dev_err(&client->dev, "failed to register %s\n",
489*4882a593Smuzhiyun 				max8660_reg[id].name);
490*4882a593Smuzhiyun 			return PTR_ERR(rdev);
491*4882a593Smuzhiyun 		}
492*4882a593Smuzhiyun 	}
493*4882a593Smuzhiyun 
494*4882a593Smuzhiyun 	i2c_set_clientdata(client, max8660);
495*4882a593Smuzhiyun 	return 0;
496*4882a593Smuzhiyun }
497*4882a593Smuzhiyun 
498*4882a593Smuzhiyun static const struct i2c_device_id max8660_id[] = {
499*4882a593Smuzhiyun 	{ .name = "max8660", .driver_data = MAX8660 },
500*4882a593Smuzhiyun 	{ .name = "max8661", .driver_data = MAX8661 },
501*4882a593Smuzhiyun 	{ }
502*4882a593Smuzhiyun };
503*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, max8660_id);
504*4882a593Smuzhiyun 
505*4882a593Smuzhiyun static struct i2c_driver max8660_driver = {
506*4882a593Smuzhiyun 	.probe = max8660_probe,
507*4882a593Smuzhiyun 	.driver		= {
508*4882a593Smuzhiyun 		.name	= "max8660",
509*4882a593Smuzhiyun 	},
510*4882a593Smuzhiyun 	.id_table	= max8660_id,
511*4882a593Smuzhiyun };
512*4882a593Smuzhiyun 
max8660_init(void)513*4882a593Smuzhiyun static int __init max8660_init(void)
514*4882a593Smuzhiyun {
515*4882a593Smuzhiyun 	return i2c_add_driver(&max8660_driver);
516*4882a593Smuzhiyun }
517*4882a593Smuzhiyun subsys_initcall(max8660_init);
518*4882a593Smuzhiyun 
max8660_exit(void)519*4882a593Smuzhiyun static void __exit max8660_exit(void)
520*4882a593Smuzhiyun {
521*4882a593Smuzhiyun 	i2c_del_driver(&max8660_driver);
522*4882a593Smuzhiyun }
523*4882a593Smuzhiyun module_exit(max8660_exit);
524*4882a593Smuzhiyun 
525*4882a593Smuzhiyun /* Module information */
526*4882a593Smuzhiyun MODULE_DESCRIPTION("MAXIM 8660/8661 voltage regulator driver");
527*4882a593Smuzhiyun MODULE_AUTHOR("Wolfram Sang");
528*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
529