1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // max77802.c - Regulator driver for the Maxim 77802
4*4882a593Smuzhiyun //
5*4882a593Smuzhiyun // Copyright (C) 2013-2014 Google, Inc
6*4882a593Smuzhiyun // Simon Glass <sjg@chromium.org>
7*4882a593Smuzhiyun //
8*4882a593Smuzhiyun // Copyright (C) 2012 Samsung Electronics
9*4882a593Smuzhiyun // Chiwoong Byun <woong.byun@samsung.com>
10*4882a593Smuzhiyun // Jonghwa Lee <jonghwa3.lee@samsung.com>
11*4882a593Smuzhiyun //
12*4882a593Smuzhiyun // This driver is based on max8997.c
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #include <linux/kernel.h>
15*4882a593Smuzhiyun #include <linux/bug.h>
16*4882a593Smuzhiyun #include <linux/err.h>
17*4882a593Smuzhiyun #include <linux/slab.h>
18*4882a593Smuzhiyun #include <linux/module.h>
19*4882a593Smuzhiyun #include <linux/platform_device.h>
20*4882a593Smuzhiyun #include <linux/regulator/driver.h>
21*4882a593Smuzhiyun #include <linux/regulator/machine.h>
22*4882a593Smuzhiyun #include <linux/regulator/of_regulator.h>
23*4882a593Smuzhiyun #include <linux/mfd/max77686.h>
24*4882a593Smuzhiyun #include <linux/mfd/max77686-private.h>
25*4882a593Smuzhiyun #include <dt-bindings/regulator/maxim,max77802.h>
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun /* Default ramp delay in case it is not manually set */
28*4882a593Smuzhiyun #define MAX77802_RAMP_DELAY 100000 /* uV/us */
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #define MAX77802_OPMODE_SHIFT_LDO 6
31*4882a593Smuzhiyun #define MAX77802_OPMODE_BUCK234_SHIFT 4
32*4882a593Smuzhiyun #define MAX77802_OPMODE_MASK 0x3
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun #define MAX77802_VSEL_MASK 0x3F
35*4882a593Smuzhiyun #define MAX77802_DVS_VSEL_MASK 0xFF
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun #define MAX77802_RAMP_RATE_MASK_2BIT 0xC0
38*4882a593Smuzhiyun #define MAX77802_RAMP_RATE_SHIFT_2BIT 6
39*4882a593Smuzhiyun #define MAX77802_RAMP_RATE_MASK_4BIT 0xF0
40*4882a593Smuzhiyun #define MAX77802_RAMP_RATE_SHIFT_4BIT 4
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun #define MAX77802_STATUS_OFF 0x0
43*4882a593Smuzhiyun #define MAX77802_OFF_PWRREQ 0x1
44*4882a593Smuzhiyun #define MAX77802_LP_PWRREQ 0x2
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun /* MAX77802 has two register formats: 2-bit and 4-bit */
47*4882a593Smuzhiyun static const unsigned int ramp_table_77802_2bit[] = {
48*4882a593Smuzhiyun 12500,
49*4882a593Smuzhiyun 25000,
50*4882a593Smuzhiyun 50000,
51*4882a593Smuzhiyun 100000,
52*4882a593Smuzhiyun };
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun static unsigned int ramp_table_77802_4bit[] = {
55*4882a593Smuzhiyun 1000, 2000, 3030, 4000,
56*4882a593Smuzhiyun 5000, 5880, 7140, 8330,
57*4882a593Smuzhiyun 9090, 10000, 11110, 12500,
58*4882a593Smuzhiyun 16670, 25000, 50000, 100000,
59*4882a593Smuzhiyun };
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun struct max77802_regulator_prv {
62*4882a593Smuzhiyun /* Array indexed by regulator id */
63*4882a593Smuzhiyun unsigned int opmode[MAX77802_REG_MAX];
64*4882a593Smuzhiyun };
65*4882a593Smuzhiyun
max77802_map_mode(unsigned int mode)66*4882a593Smuzhiyun static inline unsigned int max77802_map_mode(unsigned int mode)
67*4882a593Smuzhiyun {
68*4882a593Smuzhiyun return mode == MAX77802_OPMODE_NORMAL ?
69*4882a593Smuzhiyun REGULATOR_MODE_NORMAL : REGULATOR_MODE_STANDBY;
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun
max77802_get_opmode_shift(int id)72*4882a593Smuzhiyun static int max77802_get_opmode_shift(int id)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun if (id == MAX77802_BUCK1 || (id >= MAX77802_BUCK5 &&
75*4882a593Smuzhiyun id <= MAX77802_BUCK10))
76*4882a593Smuzhiyun return 0;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun if (id >= MAX77802_BUCK2 && id <= MAX77802_BUCK4)
79*4882a593Smuzhiyun return MAX77802_OPMODE_BUCK234_SHIFT;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun if (id >= MAX77802_LDO1 && id <= MAX77802_LDO35)
82*4882a593Smuzhiyun return MAX77802_OPMODE_SHIFT_LDO;
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun return -EINVAL;
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun /**
88*4882a593Smuzhiyun * max77802_set_suspend_disable - Disable the regulator during system suspend
89*4882a593Smuzhiyun * @rdev: regulator to mark as disabled
90*4882a593Smuzhiyun *
91*4882a593Smuzhiyun * All regulators expect LDO 1, 3, 20 and 21 support OFF by PWRREQ.
92*4882a593Smuzhiyun * Configure the regulator so the PMIC will turn it OFF during system suspend.
93*4882a593Smuzhiyun */
max77802_set_suspend_disable(struct regulator_dev * rdev)94*4882a593Smuzhiyun static int max77802_set_suspend_disable(struct regulator_dev *rdev)
95*4882a593Smuzhiyun {
96*4882a593Smuzhiyun unsigned int val = MAX77802_OFF_PWRREQ;
97*4882a593Smuzhiyun struct max77802_regulator_prv *max77802 = rdev_get_drvdata(rdev);
98*4882a593Smuzhiyun int id = rdev_get_id(rdev);
99*4882a593Smuzhiyun int shift = max77802_get_opmode_shift(id);
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun max77802->opmode[id] = val;
102*4882a593Smuzhiyun return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,
103*4882a593Smuzhiyun rdev->desc->enable_mask, val << shift);
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun /*
107*4882a593Smuzhiyun * Some LDOs support Low Power Mode while the system is running.
108*4882a593Smuzhiyun *
109*4882a593Smuzhiyun * LDOs 1, 3, 20, 21.
110*4882a593Smuzhiyun */
max77802_set_mode(struct regulator_dev * rdev,unsigned int mode)111*4882a593Smuzhiyun static int max77802_set_mode(struct regulator_dev *rdev, unsigned int mode)
112*4882a593Smuzhiyun {
113*4882a593Smuzhiyun struct max77802_regulator_prv *max77802 = rdev_get_drvdata(rdev);
114*4882a593Smuzhiyun int id = rdev_get_id(rdev);
115*4882a593Smuzhiyun unsigned int val;
116*4882a593Smuzhiyun int shift = max77802_get_opmode_shift(id);
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun switch (mode) {
119*4882a593Smuzhiyun case REGULATOR_MODE_STANDBY:
120*4882a593Smuzhiyun val = MAX77802_OPMODE_LP; /* ON in Low Power Mode */
121*4882a593Smuzhiyun break;
122*4882a593Smuzhiyun case REGULATOR_MODE_NORMAL:
123*4882a593Smuzhiyun val = MAX77802_OPMODE_NORMAL; /* ON in Normal Mode */
124*4882a593Smuzhiyun break;
125*4882a593Smuzhiyun default:
126*4882a593Smuzhiyun dev_warn(&rdev->dev, "%s: regulator mode: 0x%x not supported\n",
127*4882a593Smuzhiyun rdev->desc->name, mode);
128*4882a593Smuzhiyun return -EINVAL;
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun max77802->opmode[id] = val;
132*4882a593Smuzhiyun return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,
133*4882a593Smuzhiyun rdev->desc->enable_mask, val << shift);
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun
max77802_get_mode(struct regulator_dev * rdev)136*4882a593Smuzhiyun static unsigned max77802_get_mode(struct regulator_dev *rdev)
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun struct max77802_regulator_prv *max77802 = rdev_get_drvdata(rdev);
139*4882a593Smuzhiyun int id = rdev_get_id(rdev);
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun return max77802_map_mode(max77802->opmode[id]);
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun /**
145*4882a593Smuzhiyun * max77802_set_suspend_mode - set regulator opmode when the system is suspended
146*4882a593Smuzhiyun * @rdev: regulator to change mode
147*4882a593Smuzhiyun * @mode: operating mode to be set
148*4882a593Smuzhiyun *
149*4882a593Smuzhiyun * Will set the operating mode for the regulators during system suspend.
150*4882a593Smuzhiyun * This function is valid for the three different enable control logics:
151*4882a593Smuzhiyun *
152*4882a593Smuzhiyun * Enable Control Logic1 by PWRREQ (BUCK 2-4 and LDOs 2, 4-19, 22-35)
153*4882a593Smuzhiyun * Enable Control Logic2 by PWRREQ (LDOs 1, 20, 21)
154*4882a593Smuzhiyun * Enable Control Logic3 by PWRREQ (LDO 3)
155*4882a593Smuzhiyun *
156*4882a593Smuzhiyun * If setting the regulator mode fails, the function only warns but does
157*4882a593Smuzhiyun * not return an error code to avoid the regulator core to stop setting
158*4882a593Smuzhiyun * the operating mode for the remaining regulators.
159*4882a593Smuzhiyun */
max77802_set_suspend_mode(struct regulator_dev * rdev,unsigned int mode)160*4882a593Smuzhiyun static int max77802_set_suspend_mode(struct regulator_dev *rdev,
161*4882a593Smuzhiyun unsigned int mode)
162*4882a593Smuzhiyun {
163*4882a593Smuzhiyun struct max77802_regulator_prv *max77802 = rdev_get_drvdata(rdev);
164*4882a593Smuzhiyun int id = rdev_get_id(rdev);
165*4882a593Smuzhiyun unsigned int val;
166*4882a593Smuzhiyun int shift = max77802_get_opmode_shift(id);
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun /*
169*4882a593Smuzhiyun * If the regulator has been disabled for suspend
170*4882a593Smuzhiyun * then is invalid to try setting a suspend mode.
171*4882a593Smuzhiyun */
172*4882a593Smuzhiyun if (max77802->opmode[id] == MAX77802_OFF_PWRREQ) {
173*4882a593Smuzhiyun dev_warn(&rdev->dev, "%s: is disabled, mode: 0x%x not set\n",
174*4882a593Smuzhiyun rdev->desc->name, mode);
175*4882a593Smuzhiyun return 0;
176*4882a593Smuzhiyun }
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun switch (mode) {
179*4882a593Smuzhiyun case REGULATOR_MODE_STANDBY:
180*4882a593Smuzhiyun /*
181*4882a593Smuzhiyun * If the regulator opmode is normal then enable
182*4882a593Smuzhiyun * ON in Low Power Mode by PWRREQ. If the mode is
183*4882a593Smuzhiyun * already Low Power then no action is required.
184*4882a593Smuzhiyun */
185*4882a593Smuzhiyun if (max77802->opmode[id] == MAX77802_OPMODE_NORMAL)
186*4882a593Smuzhiyun val = MAX77802_LP_PWRREQ;
187*4882a593Smuzhiyun else
188*4882a593Smuzhiyun return 0;
189*4882a593Smuzhiyun break;
190*4882a593Smuzhiyun case REGULATOR_MODE_NORMAL:
191*4882a593Smuzhiyun /*
192*4882a593Smuzhiyun * If the regulator operating mode is Low Power then
193*4882a593Smuzhiyun * normal is not a valid opmode in suspend. If the
194*4882a593Smuzhiyun * mode is already normal then no action is required.
195*4882a593Smuzhiyun */
196*4882a593Smuzhiyun if (max77802->opmode[id] == MAX77802_OPMODE_LP)
197*4882a593Smuzhiyun dev_warn(&rdev->dev, "%s: in Low Power: 0x%x invalid\n",
198*4882a593Smuzhiyun rdev->desc->name, mode);
199*4882a593Smuzhiyun return 0;
200*4882a593Smuzhiyun default:
201*4882a593Smuzhiyun dev_warn(&rdev->dev, "%s: regulator mode: 0x%x not supported\n",
202*4882a593Smuzhiyun rdev->desc->name, mode);
203*4882a593Smuzhiyun return -EINVAL;
204*4882a593Smuzhiyun }
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,
207*4882a593Smuzhiyun rdev->desc->enable_mask, val << shift);
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun
max77802_enable(struct regulator_dev * rdev)210*4882a593Smuzhiyun static int max77802_enable(struct regulator_dev *rdev)
211*4882a593Smuzhiyun {
212*4882a593Smuzhiyun struct max77802_regulator_prv *max77802 = rdev_get_drvdata(rdev);
213*4882a593Smuzhiyun int id = rdev_get_id(rdev);
214*4882a593Smuzhiyun int shift = max77802_get_opmode_shift(id);
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun if (max77802->opmode[id] == MAX77802_OFF_PWRREQ)
217*4882a593Smuzhiyun max77802->opmode[id] = MAX77802_OPMODE_NORMAL;
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,
220*4882a593Smuzhiyun rdev->desc->enable_mask,
221*4882a593Smuzhiyun max77802->opmode[id] << shift);
222*4882a593Smuzhiyun }
223*4882a593Smuzhiyun
max77802_find_ramp_value(struct regulator_dev * rdev,const unsigned int limits[],int size,unsigned int ramp_delay)224*4882a593Smuzhiyun static int max77802_find_ramp_value(struct regulator_dev *rdev,
225*4882a593Smuzhiyun const unsigned int limits[], int size,
226*4882a593Smuzhiyun unsigned int ramp_delay)
227*4882a593Smuzhiyun {
228*4882a593Smuzhiyun int i;
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun for (i = 0; i < size; i++) {
231*4882a593Smuzhiyun if (ramp_delay <= limits[i])
232*4882a593Smuzhiyun return i;
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun /* Use maximum value for no ramp control */
236*4882a593Smuzhiyun dev_warn(&rdev->dev, "%s: ramp_delay: %d not supported, setting 100000\n",
237*4882a593Smuzhiyun rdev->desc->name, ramp_delay);
238*4882a593Smuzhiyun return size - 1;
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun /* Used for BUCKs 2-4 */
max77802_set_ramp_delay_2bit(struct regulator_dev * rdev,int ramp_delay)242*4882a593Smuzhiyun static int max77802_set_ramp_delay_2bit(struct regulator_dev *rdev,
243*4882a593Smuzhiyun int ramp_delay)
244*4882a593Smuzhiyun {
245*4882a593Smuzhiyun int id = rdev_get_id(rdev);
246*4882a593Smuzhiyun unsigned int ramp_value;
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun if (id > MAX77802_BUCK4) {
249*4882a593Smuzhiyun dev_warn(&rdev->dev,
250*4882a593Smuzhiyun "%s: regulator: ramp delay not supported\n",
251*4882a593Smuzhiyun rdev->desc->name);
252*4882a593Smuzhiyun return -EINVAL;
253*4882a593Smuzhiyun }
254*4882a593Smuzhiyun ramp_value = max77802_find_ramp_value(rdev, ramp_table_77802_2bit,
255*4882a593Smuzhiyun ARRAY_SIZE(ramp_table_77802_2bit), ramp_delay);
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,
258*4882a593Smuzhiyun MAX77802_RAMP_RATE_MASK_2BIT,
259*4882a593Smuzhiyun ramp_value << MAX77802_RAMP_RATE_SHIFT_2BIT);
260*4882a593Smuzhiyun }
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun /* For BUCK1, 6 */
max77802_set_ramp_delay_4bit(struct regulator_dev * rdev,int ramp_delay)263*4882a593Smuzhiyun static int max77802_set_ramp_delay_4bit(struct regulator_dev *rdev,
264*4882a593Smuzhiyun int ramp_delay)
265*4882a593Smuzhiyun {
266*4882a593Smuzhiyun unsigned int ramp_value;
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun ramp_value = max77802_find_ramp_value(rdev, ramp_table_77802_4bit,
269*4882a593Smuzhiyun ARRAY_SIZE(ramp_table_77802_4bit), ramp_delay);
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,
272*4882a593Smuzhiyun MAX77802_RAMP_RATE_MASK_4BIT,
273*4882a593Smuzhiyun ramp_value << MAX77802_RAMP_RATE_SHIFT_4BIT);
274*4882a593Smuzhiyun }
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun /*
277*4882a593Smuzhiyun * LDOs 2, 4-19, 22-35
278*4882a593Smuzhiyun */
279*4882a593Smuzhiyun static const struct regulator_ops max77802_ldo_ops_logic1 = {
280*4882a593Smuzhiyun .list_voltage = regulator_list_voltage_linear,
281*4882a593Smuzhiyun .map_voltage = regulator_map_voltage_linear,
282*4882a593Smuzhiyun .is_enabled = regulator_is_enabled_regmap,
283*4882a593Smuzhiyun .enable = max77802_enable,
284*4882a593Smuzhiyun .disable = regulator_disable_regmap,
285*4882a593Smuzhiyun .get_voltage_sel = regulator_get_voltage_sel_regmap,
286*4882a593Smuzhiyun .set_voltage_sel = regulator_set_voltage_sel_regmap,
287*4882a593Smuzhiyun .set_voltage_time_sel = regulator_set_voltage_time_sel,
288*4882a593Smuzhiyun .set_suspend_disable = max77802_set_suspend_disable,
289*4882a593Smuzhiyun .set_suspend_mode = max77802_set_suspend_mode,
290*4882a593Smuzhiyun };
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun /*
293*4882a593Smuzhiyun * LDOs 1, 20, 21, 3
294*4882a593Smuzhiyun */
295*4882a593Smuzhiyun static const struct regulator_ops max77802_ldo_ops_logic2 = {
296*4882a593Smuzhiyun .list_voltage = regulator_list_voltage_linear,
297*4882a593Smuzhiyun .map_voltage = regulator_map_voltage_linear,
298*4882a593Smuzhiyun .is_enabled = regulator_is_enabled_regmap,
299*4882a593Smuzhiyun .enable = max77802_enable,
300*4882a593Smuzhiyun .disable = regulator_disable_regmap,
301*4882a593Smuzhiyun .get_voltage_sel = regulator_get_voltage_sel_regmap,
302*4882a593Smuzhiyun .set_voltage_sel = regulator_set_voltage_sel_regmap,
303*4882a593Smuzhiyun .set_voltage_time_sel = regulator_set_voltage_time_sel,
304*4882a593Smuzhiyun .set_mode = max77802_set_mode,
305*4882a593Smuzhiyun .get_mode = max77802_get_mode,
306*4882a593Smuzhiyun .set_suspend_mode = max77802_set_suspend_mode,
307*4882a593Smuzhiyun };
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun /* BUCKS 1, 6 */
310*4882a593Smuzhiyun static const struct regulator_ops max77802_buck_16_dvs_ops = {
311*4882a593Smuzhiyun .list_voltage = regulator_list_voltage_linear,
312*4882a593Smuzhiyun .map_voltage = regulator_map_voltage_linear,
313*4882a593Smuzhiyun .is_enabled = regulator_is_enabled_regmap,
314*4882a593Smuzhiyun .enable = max77802_enable,
315*4882a593Smuzhiyun .disable = regulator_disable_regmap,
316*4882a593Smuzhiyun .get_voltage_sel = regulator_get_voltage_sel_regmap,
317*4882a593Smuzhiyun .set_voltage_sel = regulator_set_voltage_sel_regmap,
318*4882a593Smuzhiyun .set_voltage_time_sel = regulator_set_voltage_time_sel,
319*4882a593Smuzhiyun .set_ramp_delay = max77802_set_ramp_delay_4bit,
320*4882a593Smuzhiyun .set_suspend_disable = max77802_set_suspend_disable,
321*4882a593Smuzhiyun };
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun /* BUCKs 2-4 */
324*4882a593Smuzhiyun static const struct regulator_ops max77802_buck_234_ops = {
325*4882a593Smuzhiyun .list_voltage = regulator_list_voltage_linear,
326*4882a593Smuzhiyun .map_voltage = regulator_map_voltage_linear,
327*4882a593Smuzhiyun .is_enabled = regulator_is_enabled_regmap,
328*4882a593Smuzhiyun .enable = max77802_enable,
329*4882a593Smuzhiyun .disable = regulator_disable_regmap,
330*4882a593Smuzhiyun .get_voltage_sel = regulator_get_voltage_sel_regmap,
331*4882a593Smuzhiyun .set_voltage_sel = regulator_set_voltage_sel_regmap,
332*4882a593Smuzhiyun .set_voltage_time_sel = regulator_set_voltage_time_sel,
333*4882a593Smuzhiyun .set_ramp_delay = max77802_set_ramp_delay_2bit,
334*4882a593Smuzhiyun .set_suspend_disable = max77802_set_suspend_disable,
335*4882a593Smuzhiyun .set_suspend_mode = max77802_set_suspend_mode,
336*4882a593Smuzhiyun };
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun /* BUCKs 5, 7-10 */
339*4882a593Smuzhiyun static const struct regulator_ops max77802_buck_dvs_ops = {
340*4882a593Smuzhiyun .list_voltage = regulator_list_voltage_linear,
341*4882a593Smuzhiyun .map_voltage = regulator_map_voltage_linear,
342*4882a593Smuzhiyun .is_enabled = regulator_is_enabled_regmap,
343*4882a593Smuzhiyun .enable = max77802_enable,
344*4882a593Smuzhiyun .disable = regulator_disable_regmap,
345*4882a593Smuzhiyun .get_voltage_sel = regulator_get_voltage_sel_regmap,
346*4882a593Smuzhiyun .set_voltage_sel = regulator_set_voltage_sel_regmap,
347*4882a593Smuzhiyun .set_voltage_time_sel = regulator_set_voltage_time_sel,
348*4882a593Smuzhiyun .set_ramp_delay = max77802_set_ramp_delay_2bit,
349*4882a593Smuzhiyun .set_suspend_disable = max77802_set_suspend_disable,
350*4882a593Smuzhiyun };
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun /* LDOs 3-7, 9-14, 18-26, 28, 29, 32-34 */
353*4882a593Smuzhiyun #define regulator_77802_desc_p_ldo(num, supply, log) { \
354*4882a593Smuzhiyun .name = "LDO"#num, \
355*4882a593Smuzhiyun .of_match = of_match_ptr("LDO"#num), \
356*4882a593Smuzhiyun .regulators_node = of_match_ptr("regulators"), \
357*4882a593Smuzhiyun .id = MAX77802_LDO##num, \
358*4882a593Smuzhiyun .supply_name = "inl"#supply, \
359*4882a593Smuzhiyun .ops = &max77802_ldo_ops_logic##log, \
360*4882a593Smuzhiyun .type = REGULATOR_VOLTAGE, \
361*4882a593Smuzhiyun .owner = THIS_MODULE, \
362*4882a593Smuzhiyun .min_uV = 800000, \
363*4882a593Smuzhiyun .uV_step = 50000, \
364*4882a593Smuzhiyun .ramp_delay = MAX77802_RAMP_DELAY, \
365*4882a593Smuzhiyun .n_voltages = 1 << 6, \
366*4882a593Smuzhiyun .vsel_reg = MAX77802_REG_LDO1CTRL1 + num - 1, \
367*4882a593Smuzhiyun .vsel_mask = MAX77802_VSEL_MASK, \
368*4882a593Smuzhiyun .enable_reg = MAX77802_REG_LDO1CTRL1 + num - 1, \
369*4882a593Smuzhiyun .enable_mask = MAX77802_OPMODE_MASK << MAX77802_OPMODE_SHIFT_LDO, \
370*4882a593Smuzhiyun .of_map_mode = max77802_map_mode, \
371*4882a593Smuzhiyun }
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun /* LDOs 1, 2, 8, 15, 17, 27, 30, 35 */
374*4882a593Smuzhiyun #define regulator_77802_desc_n_ldo(num, supply, log) { \
375*4882a593Smuzhiyun .name = "LDO"#num, \
376*4882a593Smuzhiyun .of_match = of_match_ptr("LDO"#num), \
377*4882a593Smuzhiyun .regulators_node = of_match_ptr("regulators"), \
378*4882a593Smuzhiyun .id = MAX77802_LDO##num, \
379*4882a593Smuzhiyun .supply_name = "inl"#supply, \
380*4882a593Smuzhiyun .ops = &max77802_ldo_ops_logic##log, \
381*4882a593Smuzhiyun .type = REGULATOR_VOLTAGE, \
382*4882a593Smuzhiyun .owner = THIS_MODULE, \
383*4882a593Smuzhiyun .min_uV = 800000, \
384*4882a593Smuzhiyun .uV_step = 25000, \
385*4882a593Smuzhiyun .ramp_delay = MAX77802_RAMP_DELAY, \
386*4882a593Smuzhiyun .n_voltages = 1 << 6, \
387*4882a593Smuzhiyun .vsel_reg = MAX77802_REG_LDO1CTRL1 + num - 1, \
388*4882a593Smuzhiyun .vsel_mask = MAX77802_VSEL_MASK, \
389*4882a593Smuzhiyun .enable_reg = MAX77802_REG_LDO1CTRL1 + num - 1, \
390*4882a593Smuzhiyun .enable_mask = MAX77802_OPMODE_MASK << MAX77802_OPMODE_SHIFT_LDO, \
391*4882a593Smuzhiyun .of_map_mode = max77802_map_mode, \
392*4882a593Smuzhiyun }
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun /* BUCKs 1, 6 */
395*4882a593Smuzhiyun #define regulator_77802_desc_16_buck(num) { \
396*4882a593Smuzhiyun .name = "BUCK"#num, \
397*4882a593Smuzhiyun .of_match = of_match_ptr("BUCK"#num), \
398*4882a593Smuzhiyun .regulators_node = of_match_ptr("regulators"), \
399*4882a593Smuzhiyun .id = MAX77802_BUCK##num, \
400*4882a593Smuzhiyun .supply_name = "inb"#num, \
401*4882a593Smuzhiyun .ops = &max77802_buck_16_dvs_ops, \
402*4882a593Smuzhiyun .type = REGULATOR_VOLTAGE, \
403*4882a593Smuzhiyun .owner = THIS_MODULE, \
404*4882a593Smuzhiyun .min_uV = 612500, \
405*4882a593Smuzhiyun .uV_step = 6250, \
406*4882a593Smuzhiyun .ramp_delay = MAX77802_RAMP_DELAY, \
407*4882a593Smuzhiyun .n_voltages = 1 << 8, \
408*4882a593Smuzhiyun .vsel_reg = MAX77802_REG_BUCK ## num ## DVS1, \
409*4882a593Smuzhiyun .vsel_mask = MAX77802_DVS_VSEL_MASK, \
410*4882a593Smuzhiyun .enable_reg = MAX77802_REG_BUCK ## num ## CTRL, \
411*4882a593Smuzhiyun .enable_mask = MAX77802_OPMODE_MASK, \
412*4882a593Smuzhiyun .of_map_mode = max77802_map_mode, \
413*4882a593Smuzhiyun }
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun /* BUCKS 2-4 */
416*4882a593Smuzhiyun #define regulator_77802_desc_234_buck(num) { \
417*4882a593Smuzhiyun .name = "BUCK"#num, \
418*4882a593Smuzhiyun .of_match = of_match_ptr("BUCK"#num), \
419*4882a593Smuzhiyun .regulators_node = of_match_ptr("regulators"), \
420*4882a593Smuzhiyun .id = MAX77802_BUCK##num, \
421*4882a593Smuzhiyun .supply_name = "inb"#num, \
422*4882a593Smuzhiyun .ops = &max77802_buck_234_ops, \
423*4882a593Smuzhiyun .type = REGULATOR_VOLTAGE, \
424*4882a593Smuzhiyun .owner = THIS_MODULE, \
425*4882a593Smuzhiyun .min_uV = 600000, \
426*4882a593Smuzhiyun .uV_step = 6250, \
427*4882a593Smuzhiyun .ramp_delay = MAX77802_RAMP_DELAY, \
428*4882a593Smuzhiyun .n_voltages = 0x91, \
429*4882a593Smuzhiyun .vsel_reg = MAX77802_REG_BUCK ## num ## DVS1, \
430*4882a593Smuzhiyun .vsel_mask = MAX77802_DVS_VSEL_MASK, \
431*4882a593Smuzhiyun .enable_reg = MAX77802_REG_BUCK ## num ## CTRL1, \
432*4882a593Smuzhiyun .enable_mask = MAX77802_OPMODE_MASK << \
433*4882a593Smuzhiyun MAX77802_OPMODE_BUCK234_SHIFT, \
434*4882a593Smuzhiyun .of_map_mode = max77802_map_mode, \
435*4882a593Smuzhiyun }
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun /* BUCK 5 */
438*4882a593Smuzhiyun #define regulator_77802_desc_buck5(num) { \
439*4882a593Smuzhiyun .name = "BUCK"#num, \
440*4882a593Smuzhiyun .of_match = of_match_ptr("BUCK"#num), \
441*4882a593Smuzhiyun .regulators_node = of_match_ptr("regulators"), \
442*4882a593Smuzhiyun .id = MAX77802_BUCK##num, \
443*4882a593Smuzhiyun .supply_name = "inb"#num, \
444*4882a593Smuzhiyun .ops = &max77802_buck_dvs_ops, \
445*4882a593Smuzhiyun .type = REGULATOR_VOLTAGE, \
446*4882a593Smuzhiyun .owner = THIS_MODULE, \
447*4882a593Smuzhiyun .min_uV = 750000, \
448*4882a593Smuzhiyun .uV_step = 50000, \
449*4882a593Smuzhiyun .ramp_delay = MAX77802_RAMP_DELAY, \
450*4882a593Smuzhiyun .n_voltages = 1 << 6, \
451*4882a593Smuzhiyun .vsel_reg = MAX77802_REG_BUCK5OUT, \
452*4882a593Smuzhiyun .vsel_mask = MAX77802_VSEL_MASK, \
453*4882a593Smuzhiyun .enable_reg = MAX77802_REG_BUCK5CTRL, \
454*4882a593Smuzhiyun .enable_mask = MAX77802_OPMODE_MASK, \
455*4882a593Smuzhiyun .of_map_mode = max77802_map_mode, \
456*4882a593Smuzhiyun }
457*4882a593Smuzhiyun
458*4882a593Smuzhiyun /* BUCKs 7-10 */
459*4882a593Smuzhiyun #define regulator_77802_desc_buck7_10(num) { \
460*4882a593Smuzhiyun .name = "BUCK"#num, \
461*4882a593Smuzhiyun .of_match = of_match_ptr("BUCK"#num), \
462*4882a593Smuzhiyun .regulators_node = of_match_ptr("regulators"), \
463*4882a593Smuzhiyun .id = MAX77802_BUCK##num, \
464*4882a593Smuzhiyun .supply_name = "inb"#num, \
465*4882a593Smuzhiyun .ops = &max77802_buck_dvs_ops, \
466*4882a593Smuzhiyun .type = REGULATOR_VOLTAGE, \
467*4882a593Smuzhiyun .owner = THIS_MODULE, \
468*4882a593Smuzhiyun .min_uV = 750000, \
469*4882a593Smuzhiyun .uV_step = 50000, \
470*4882a593Smuzhiyun .ramp_delay = MAX77802_RAMP_DELAY, \
471*4882a593Smuzhiyun .n_voltages = 1 << 6, \
472*4882a593Smuzhiyun .vsel_reg = MAX77802_REG_BUCK7OUT + (num - 7) * 3, \
473*4882a593Smuzhiyun .vsel_mask = MAX77802_VSEL_MASK, \
474*4882a593Smuzhiyun .enable_reg = MAX77802_REG_BUCK7CTRL + (num - 7) * 3, \
475*4882a593Smuzhiyun .enable_mask = MAX77802_OPMODE_MASK, \
476*4882a593Smuzhiyun .of_map_mode = max77802_map_mode, \
477*4882a593Smuzhiyun }
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun static const struct regulator_desc regulators[] = {
480*4882a593Smuzhiyun regulator_77802_desc_16_buck(1),
481*4882a593Smuzhiyun regulator_77802_desc_234_buck(2),
482*4882a593Smuzhiyun regulator_77802_desc_234_buck(3),
483*4882a593Smuzhiyun regulator_77802_desc_234_buck(4),
484*4882a593Smuzhiyun regulator_77802_desc_buck5(5),
485*4882a593Smuzhiyun regulator_77802_desc_16_buck(6),
486*4882a593Smuzhiyun regulator_77802_desc_buck7_10(7),
487*4882a593Smuzhiyun regulator_77802_desc_buck7_10(8),
488*4882a593Smuzhiyun regulator_77802_desc_buck7_10(9),
489*4882a593Smuzhiyun regulator_77802_desc_buck7_10(10),
490*4882a593Smuzhiyun regulator_77802_desc_n_ldo(1, 10, 2),
491*4882a593Smuzhiyun regulator_77802_desc_n_ldo(2, 10, 1),
492*4882a593Smuzhiyun regulator_77802_desc_p_ldo(3, 3, 2),
493*4882a593Smuzhiyun regulator_77802_desc_p_ldo(4, 6, 1),
494*4882a593Smuzhiyun regulator_77802_desc_p_ldo(5, 3, 1),
495*4882a593Smuzhiyun regulator_77802_desc_p_ldo(6, 3, 1),
496*4882a593Smuzhiyun regulator_77802_desc_p_ldo(7, 3, 1),
497*4882a593Smuzhiyun regulator_77802_desc_n_ldo(8, 1, 1),
498*4882a593Smuzhiyun regulator_77802_desc_p_ldo(9, 5, 1),
499*4882a593Smuzhiyun regulator_77802_desc_p_ldo(10, 4, 1),
500*4882a593Smuzhiyun regulator_77802_desc_p_ldo(11, 4, 1),
501*4882a593Smuzhiyun regulator_77802_desc_p_ldo(12, 9, 1),
502*4882a593Smuzhiyun regulator_77802_desc_p_ldo(13, 4, 1),
503*4882a593Smuzhiyun regulator_77802_desc_p_ldo(14, 4, 1),
504*4882a593Smuzhiyun regulator_77802_desc_n_ldo(15, 1, 1),
505*4882a593Smuzhiyun regulator_77802_desc_n_ldo(17, 2, 1),
506*4882a593Smuzhiyun regulator_77802_desc_p_ldo(18, 7, 1),
507*4882a593Smuzhiyun regulator_77802_desc_p_ldo(19, 5, 1),
508*4882a593Smuzhiyun regulator_77802_desc_p_ldo(20, 7, 2),
509*4882a593Smuzhiyun regulator_77802_desc_p_ldo(21, 6, 2),
510*4882a593Smuzhiyun regulator_77802_desc_p_ldo(23, 9, 1),
511*4882a593Smuzhiyun regulator_77802_desc_p_ldo(24, 6, 1),
512*4882a593Smuzhiyun regulator_77802_desc_p_ldo(25, 9, 1),
513*4882a593Smuzhiyun regulator_77802_desc_p_ldo(26, 9, 1),
514*4882a593Smuzhiyun regulator_77802_desc_n_ldo(27, 2, 1),
515*4882a593Smuzhiyun regulator_77802_desc_p_ldo(28, 7, 1),
516*4882a593Smuzhiyun regulator_77802_desc_p_ldo(29, 7, 1),
517*4882a593Smuzhiyun regulator_77802_desc_n_ldo(30, 2, 1),
518*4882a593Smuzhiyun regulator_77802_desc_p_ldo(32, 9, 1),
519*4882a593Smuzhiyun regulator_77802_desc_p_ldo(33, 6, 1),
520*4882a593Smuzhiyun regulator_77802_desc_p_ldo(34, 9, 1),
521*4882a593Smuzhiyun regulator_77802_desc_n_ldo(35, 2, 1),
522*4882a593Smuzhiyun };
523*4882a593Smuzhiyun
max77802_pmic_probe(struct platform_device * pdev)524*4882a593Smuzhiyun static int max77802_pmic_probe(struct platform_device *pdev)
525*4882a593Smuzhiyun {
526*4882a593Smuzhiyun struct max77686_dev *iodev = dev_get_drvdata(pdev->dev.parent);
527*4882a593Smuzhiyun struct max77802_regulator_prv *max77802;
528*4882a593Smuzhiyun int i, val;
529*4882a593Smuzhiyun struct regulator_config config = { };
530*4882a593Smuzhiyun
531*4882a593Smuzhiyun max77802 = devm_kzalloc(&pdev->dev,
532*4882a593Smuzhiyun sizeof(struct max77802_regulator_prv),
533*4882a593Smuzhiyun GFP_KERNEL);
534*4882a593Smuzhiyun if (!max77802)
535*4882a593Smuzhiyun return -ENOMEM;
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun config.dev = iodev->dev;
538*4882a593Smuzhiyun config.regmap = iodev->regmap;
539*4882a593Smuzhiyun config.driver_data = max77802;
540*4882a593Smuzhiyun platform_set_drvdata(pdev, max77802);
541*4882a593Smuzhiyun
542*4882a593Smuzhiyun for (i = 0; i < MAX77802_REG_MAX; i++) {
543*4882a593Smuzhiyun struct regulator_dev *rdev;
544*4882a593Smuzhiyun int id = regulators[i].id;
545*4882a593Smuzhiyun int shift = max77802_get_opmode_shift(id);
546*4882a593Smuzhiyun int ret;
547*4882a593Smuzhiyun
548*4882a593Smuzhiyun ret = regmap_read(iodev->regmap, regulators[i].enable_reg, &val);
549*4882a593Smuzhiyun if (ret < 0) {
550*4882a593Smuzhiyun dev_warn(&pdev->dev,
551*4882a593Smuzhiyun "cannot read current mode for %d\n", i);
552*4882a593Smuzhiyun val = MAX77802_OPMODE_NORMAL;
553*4882a593Smuzhiyun } else {
554*4882a593Smuzhiyun val = val >> shift & MAX77802_OPMODE_MASK;
555*4882a593Smuzhiyun }
556*4882a593Smuzhiyun
557*4882a593Smuzhiyun /*
558*4882a593Smuzhiyun * If the regulator is disabled and the system warm rebooted,
559*4882a593Smuzhiyun * the hardware reports OFF as the regulator operating mode.
560*4882a593Smuzhiyun * Default to operating mode NORMAL in that case.
561*4882a593Smuzhiyun */
562*4882a593Smuzhiyun if (val == MAX77802_STATUS_OFF)
563*4882a593Smuzhiyun max77802->opmode[id] = MAX77802_OPMODE_NORMAL;
564*4882a593Smuzhiyun else
565*4882a593Smuzhiyun max77802->opmode[id] = val;
566*4882a593Smuzhiyun
567*4882a593Smuzhiyun rdev = devm_regulator_register(&pdev->dev,
568*4882a593Smuzhiyun ®ulators[i], &config);
569*4882a593Smuzhiyun if (IS_ERR(rdev)) {
570*4882a593Smuzhiyun ret = PTR_ERR(rdev);
571*4882a593Smuzhiyun dev_err(&pdev->dev,
572*4882a593Smuzhiyun "regulator init failed for %d: %d\n", i, ret);
573*4882a593Smuzhiyun return ret;
574*4882a593Smuzhiyun }
575*4882a593Smuzhiyun }
576*4882a593Smuzhiyun
577*4882a593Smuzhiyun return 0;
578*4882a593Smuzhiyun }
579*4882a593Smuzhiyun
580*4882a593Smuzhiyun static const struct platform_device_id max77802_pmic_id[] = {
581*4882a593Smuzhiyun {"max77802-pmic", 0},
582*4882a593Smuzhiyun { },
583*4882a593Smuzhiyun };
584*4882a593Smuzhiyun MODULE_DEVICE_TABLE(platform, max77802_pmic_id);
585*4882a593Smuzhiyun
586*4882a593Smuzhiyun static struct platform_driver max77802_pmic_driver = {
587*4882a593Smuzhiyun .driver = {
588*4882a593Smuzhiyun .name = "max77802-pmic",
589*4882a593Smuzhiyun },
590*4882a593Smuzhiyun .probe = max77802_pmic_probe,
591*4882a593Smuzhiyun .id_table = max77802_pmic_id,
592*4882a593Smuzhiyun };
593*4882a593Smuzhiyun
594*4882a593Smuzhiyun module_platform_driver(max77802_pmic_driver);
595*4882a593Smuzhiyun
596*4882a593Smuzhiyun MODULE_DESCRIPTION("MAXIM 77802 Regulator Driver");
597*4882a593Smuzhiyun MODULE_AUTHOR("Simon Glass <sjg@chromium.org>");
598*4882a593Smuzhiyun MODULE_LICENSE("GPL");
599