xref: /OK3568_Linux_fs/kernel/drivers/regulator/max77686-regulator.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // max77686.c - Regulator driver for the Maxim 77686
4*4882a593Smuzhiyun //
5*4882a593Smuzhiyun // Copyright (C) 2012 Samsung Electronics
6*4882a593Smuzhiyun // Chiwoong Byun <woong.byun@samsung.com>
7*4882a593Smuzhiyun // Jonghwa Lee <jonghwa3.lee@samsung.com>
8*4882a593Smuzhiyun //
9*4882a593Smuzhiyun // This driver is based on max8997.c
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include <linux/kernel.h>
12*4882a593Smuzhiyun #include <linux/bug.h>
13*4882a593Smuzhiyun #include <linux/err.h>
14*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
15*4882a593Smuzhiyun #include <linux/slab.h>
16*4882a593Smuzhiyun #include <linux/platform_device.h>
17*4882a593Smuzhiyun #include <linux/regulator/driver.h>
18*4882a593Smuzhiyun #include <linux/regulator/machine.h>
19*4882a593Smuzhiyun #include <linux/regulator/of_regulator.h>
20*4882a593Smuzhiyun #include <linux/mfd/max77686.h>
21*4882a593Smuzhiyun #include <linux/mfd/max77686-private.h>
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #define MAX77686_LDO_MINUV	800000
24*4882a593Smuzhiyun #define MAX77686_LDO_UVSTEP	50000
25*4882a593Smuzhiyun #define MAX77686_LDO_LOW_MINUV	800000
26*4882a593Smuzhiyun #define MAX77686_LDO_LOW_UVSTEP	25000
27*4882a593Smuzhiyun #define MAX77686_BUCK_MINUV	750000
28*4882a593Smuzhiyun #define MAX77686_BUCK_UVSTEP	50000
29*4882a593Smuzhiyun #define MAX77686_BUCK_ENABLE_TIME	40		/* us */
30*4882a593Smuzhiyun #define MAX77686_DVS_ENABLE_TIME	22		/* us */
31*4882a593Smuzhiyun #define MAX77686_RAMP_DELAY	100000			/* uV/us */
32*4882a593Smuzhiyun #define MAX77686_DVS_RAMP_DELAY	27500			/* uV/us */
33*4882a593Smuzhiyun #define MAX77686_DVS_MINUV	600000
34*4882a593Smuzhiyun #define MAX77686_DVS_UVSTEP	12500
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun /*
37*4882a593Smuzhiyun  * Value for configuring buck[89] and LDO{20,21,22} as GPIO control.
38*4882a593Smuzhiyun  * It is the same as 'off' for other regulators.
39*4882a593Smuzhiyun  */
40*4882a593Smuzhiyun #define MAX77686_GPIO_CONTROL		0x0
41*4882a593Smuzhiyun /*
42*4882a593Smuzhiyun  * Values used for configuring LDOs and bucks.
43*4882a593Smuzhiyun  * Forcing low power mode: LDO1, 3-5, 9, 13, 17-26
44*4882a593Smuzhiyun  */
45*4882a593Smuzhiyun #define MAX77686_LDO_LOWPOWER		0x1
46*4882a593Smuzhiyun /*
47*4882a593Smuzhiyun  * On/off controlled by PWRREQ:
48*4882a593Smuzhiyun  *  - LDO2, 6-8, 10-12, 14-16
49*4882a593Smuzhiyun  *  - buck[1234]
50*4882a593Smuzhiyun  */
51*4882a593Smuzhiyun #define MAX77686_OFF_PWRREQ		0x1
52*4882a593Smuzhiyun /* Low power mode controlled by PWRREQ: All LDOs */
53*4882a593Smuzhiyun #define MAX77686_LDO_LOWPOWER_PWRREQ	0x2
54*4882a593Smuzhiyun /* Forcing low power mode: buck[234] */
55*4882a593Smuzhiyun #define MAX77686_BUCK_LOWPOWER		0x2
56*4882a593Smuzhiyun #define MAX77686_NORMAL			0x3
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun #define MAX77686_OPMODE_SHIFT	6
59*4882a593Smuzhiyun #define MAX77686_OPMODE_BUCK234_SHIFT	4
60*4882a593Smuzhiyun #define MAX77686_OPMODE_MASK	0x3
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun #define MAX77686_VSEL_MASK	0x3F
63*4882a593Smuzhiyun #define MAX77686_DVS_VSEL_MASK	0xFF
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun #define MAX77686_RAMP_RATE_MASK	0xC0
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun #define MAX77686_REGULATORS	MAX77686_REG_MAX
68*4882a593Smuzhiyun #define MAX77686_LDOS		26
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun enum max77686_ramp_rate {
71*4882a593Smuzhiyun 	RAMP_RATE_13P75MV,
72*4882a593Smuzhiyun 	RAMP_RATE_27P5MV,
73*4882a593Smuzhiyun 	RAMP_RATE_55MV,
74*4882a593Smuzhiyun 	RAMP_RATE_NO_CTRL,	/* 100mV/us */
75*4882a593Smuzhiyun };
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun struct max77686_data {
78*4882a593Smuzhiyun 	struct device *dev;
79*4882a593Smuzhiyun 	DECLARE_BITMAP(gpio_enabled, MAX77686_REGULATORS);
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun 	/* Array indexed by regulator id */
82*4882a593Smuzhiyun 	unsigned int opmode[MAX77686_REGULATORS];
83*4882a593Smuzhiyun };
84*4882a593Smuzhiyun 
max77686_get_opmode_shift(int id)85*4882a593Smuzhiyun static unsigned int max77686_get_opmode_shift(int id)
86*4882a593Smuzhiyun {
87*4882a593Smuzhiyun 	switch (id) {
88*4882a593Smuzhiyun 	case MAX77686_BUCK1:
89*4882a593Smuzhiyun 	case MAX77686_BUCK5 ... MAX77686_BUCK9:
90*4882a593Smuzhiyun 		return 0;
91*4882a593Smuzhiyun 	case MAX77686_BUCK2 ... MAX77686_BUCK4:
92*4882a593Smuzhiyun 		return MAX77686_OPMODE_BUCK234_SHIFT;
93*4882a593Smuzhiyun 	default:
94*4882a593Smuzhiyun 		/* all LDOs */
95*4882a593Smuzhiyun 		return MAX77686_OPMODE_SHIFT;
96*4882a593Smuzhiyun 	}
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun /*
100*4882a593Smuzhiyun  * When regulator is configured for GPIO control then it
101*4882a593Smuzhiyun  * replaces "normal" mode. Any change from low power mode to normal
102*4882a593Smuzhiyun  * should actually change to GPIO control.
103*4882a593Smuzhiyun  * Map normal mode to proper value for such regulators.
104*4882a593Smuzhiyun  */
max77686_map_normal_mode(struct max77686_data * max77686,int id)105*4882a593Smuzhiyun static unsigned int max77686_map_normal_mode(struct max77686_data *max77686,
106*4882a593Smuzhiyun 					     int id)
107*4882a593Smuzhiyun {
108*4882a593Smuzhiyun 	switch (id) {
109*4882a593Smuzhiyun 	case MAX77686_BUCK8:
110*4882a593Smuzhiyun 	case MAX77686_BUCK9:
111*4882a593Smuzhiyun 	case MAX77686_LDO20 ... MAX77686_LDO22:
112*4882a593Smuzhiyun 		if (test_bit(id, max77686->gpio_enabled))
113*4882a593Smuzhiyun 			return MAX77686_GPIO_CONTROL;
114*4882a593Smuzhiyun 	}
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	return MAX77686_NORMAL;
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun /* Some BUCKs and LDOs supports Normal[ON/OFF] mode during suspend */
max77686_set_suspend_disable(struct regulator_dev * rdev)120*4882a593Smuzhiyun static int max77686_set_suspend_disable(struct regulator_dev *rdev)
121*4882a593Smuzhiyun {
122*4882a593Smuzhiyun 	unsigned int val, shift;
123*4882a593Smuzhiyun 	struct max77686_data *max77686 = rdev_get_drvdata(rdev);
124*4882a593Smuzhiyun 	int ret, id = rdev_get_id(rdev);
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 	shift = max77686_get_opmode_shift(id);
127*4882a593Smuzhiyun 	val = MAX77686_OFF_PWRREQ;
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 	ret = regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,
130*4882a593Smuzhiyun 				 rdev->desc->enable_mask, val << shift);
131*4882a593Smuzhiyun 	if (ret)
132*4882a593Smuzhiyun 		return ret;
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun 	max77686->opmode[id] = val;
135*4882a593Smuzhiyun 	return 0;
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun /* Some LDOs supports [LPM/Normal]ON mode during suspend state */
max77686_set_suspend_mode(struct regulator_dev * rdev,unsigned int mode)139*4882a593Smuzhiyun static int max77686_set_suspend_mode(struct regulator_dev *rdev,
140*4882a593Smuzhiyun 				     unsigned int mode)
141*4882a593Smuzhiyun {
142*4882a593Smuzhiyun 	struct max77686_data *max77686 = rdev_get_drvdata(rdev);
143*4882a593Smuzhiyun 	unsigned int val;
144*4882a593Smuzhiyun 	int ret, id = rdev_get_id(rdev);
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 	/* BUCK[5-9] doesn't support this feature */
147*4882a593Smuzhiyun 	if (id >= MAX77686_BUCK5)
148*4882a593Smuzhiyun 		return 0;
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun 	switch (mode) {
151*4882a593Smuzhiyun 	case REGULATOR_MODE_IDLE:			/* ON in LP Mode */
152*4882a593Smuzhiyun 		val = MAX77686_LDO_LOWPOWER_PWRREQ;
153*4882a593Smuzhiyun 		break;
154*4882a593Smuzhiyun 	case REGULATOR_MODE_NORMAL:			/* ON in Normal Mode */
155*4882a593Smuzhiyun 		val = max77686_map_normal_mode(max77686, id);
156*4882a593Smuzhiyun 		break;
157*4882a593Smuzhiyun 	default:
158*4882a593Smuzhiyun 		pr_warn("%s: regulator_suspend_mode : 0x%x not supported\n",
159*4882a593Smuzhiyun 			rdev->desc->name, mode);
160*4882a593Smuzhiyun 		return -EINVAL;
161*4882a593Smuzhiyun 	}
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 	ret = regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,
164*4882a593Smuzhiyun 				  rdev->desc->enable_mask,
165*4882a593Smuzhiyun 				  val << MAX77686_OPMODE_SHIFT);
166*4882a593Smuzhiyun 	if (ret)
167*4882a593Smuzhiyun 		return ret;
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun 	max77686->opmode[id] = val;
170*4882a593Smuzhiyun 	return 0;
171*4882a593Smuzhiyun }
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun /* Some LDOs supports LPM-ON/OFF/Normal-ON mode during suspend state */
max77686_ldo_set_suspend_mode(struct regulator_dev * rdev,unsigned int mode)174*4882a593Smuzhiyun static int max77686_ldo_set_suspend_mode(struct regulator_dev *rdev,
175*4882a593Smuzhiyun 				     unsigned int mode)
176*4882a593Smuzhiyun {
177*4882a593Smuzhiyun 	unsigned int val;
178*4882a593Smuzhiyun 	struct max77686_data *max77686 = rdev_get_drvdata(rdev);
179*4882a593Smuzhiyun 	int ret, id = rdev_get_id(rdev);
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun 	switch (mode) {
182*4882a593Smuzhiyun 	case REGULATOR_MODE_STANDBY:			/* switch off */
183*4882a593Smuzhiyun 		val = MAX77686_OFF_PWRREQ;
184*4882a593Smuzhiyun 		break;
185*4882a593Smuzhiyun 	case REGULATOR_MODE_IDLE:			/* ON in LP Mode */
186*4882a593Smuzhiyun 		val = MAX77686_LDO_LOWPOWER_PWRREQ;
187*4882a593Smuzhiyun 		break;
188*4882a593Smuzhiyun 	case REGULATOR_MODE_NORMAL:			/* ON in Normal Mode */
189*4882a593Smuzhiyun 		val = max77686_map_normal_mode(max77686, id);
190*4882a593Smuzhiyun 		break;
191*4882a593Smuzhiyun 	default:
192*4882a593Smuzhiyun 		pr_warn("%s: regulator_suspend_mode : 0x%x not supported\n",
193*4882a593Smuzhiyun 			rdev->desc->name, mode);
194*4882a593Smuzhiyun 		return -EINVAL;
195*4882a593Smuzhiyun 	}
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun 	ret = regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,
198*4882a593Smuzhiyun 				 rdev->desc->enable_mask,
199*4882a593Smuzhiyun 				 val << MAX77686_OPMODE_SHIFT);
200*4882a593Smuzhiyun 	if (ret)
201*4882a593Smuzhiyun 		return ret;
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun 	max77686->opmode[id] = val;
204*4882a593Smuzhiyun 	return 0;
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun 
max77686_enable(struct regulator_dev * rdev)207*4882a593Smuzhiyun static int max77686_enable(struct regulator_dev *rdev)
208*4882a593Smuzhiyun {
209*4882a593Smuzhiyun 	struct max77686_data *max77686 = rdev_get_drvdata(rdev);
210*4882a593Smuzhiyun 	unsigned int shift;
211*4882a593Smuzhiyun 	int id = rdev_get_id(rdev);
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun 	shift = max77686_get_opmode_shift(id);
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun 	if (max77686->opmode[id] == MAX77686_OFF_PWRREQ)
216*4882a593Smuzhiyun 		max77686->opmode[id] = max77686_map_normal_mode(max77686, id);
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun 	return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,
219*4882a593Smuzhiyun 				  rdev->desc->enable_mask,
220*4882a593Smuzhiyun 				  max77686->opmode[id] << shift);
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun 
max77686_set_ramp_delay(struct regulator_dev * rdev,int ramp_delay)223*4882a593Smuzhiyun static int max77686_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay)
224*4882a593Smuzhiyun {
225*4882a593Smuzhiyun 	unsigned int ramp_value = RAMP_RATE_NO_CTRL;
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun 	switch (ramp_delay) {
228*4882a593Smuzhiyun 	case 1 ... 13750:
229*4882a593Smuzhiyun 		ramp_value = RAMP_RATE_13P75MV;
230*4882a593Smuzhiyun 		break;
231*4882a593Smuzhiyun 	case 13751 ... 27500:
232*4882a593Smuzhiyun 		ramp_value = RAMP_RATE_27P5MV;
233*4882a593Smuzhiyun 		break;
234*4882a593Smuzhiyun 	case 27501 ... 55000:
235*4882a593Smuzhiyun 		ramp_value = RAMP_RATE_55MV;
236*4882a593Smuzhiyun 		break;
237*4882a593Smuzhiyun 	case 55001 ... 100000:
238*4882a593Smuzhiyun 		break;
239*4882a593Smuzhiyun 	default:
240*4882a593Smuzhiyun 		pr_warn("%s: ramp_delay: %d not supported, setting 100000\n",
241*4882a593Smuzhiyun 			rdev->desc->name, ramp_delay);
242*4882a593Smuzhiyun 	}
243*4882a593Smuzhiyun 
244*4882a593Smuzhiyun 	return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,
245*4882a593Smuzhiyun 				  MAX77686_RAMP_RATE_MASK, ramp_value << 6);
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun 
max77686_of_parse_cb(struct device_node * np,const struct regulator_desc * desc,struct regulator_config * config)248*4882a593Smuzhiyun static int max77686_of_parse_cb(struct device_node *np,
249*4882a593Smuzhiyun 		const struct regulator_desc *desc,
250*4882a593Smuzhiyun 		struct regulator_config *config)
251*4882a593Smuzhiyun {
252*4882a593Smuzhiyun 	struct max77686_data *max77686 = config->driver_data;
253*4882a593Smuzhiyun 	int ret;
254*4882a593Smuzhiyun 
255*4882a593Smuzhiyun 	switch (desc->id) {
256*4882a593Smuzhiyun 	case MAX77686_BUCK8:
257*4882a593Smuzhiyun 	case MAX77686_BUCK9:
258*4882a593Smuzhiyun 	case MAX77686_LDO20 ... MAX77686_LDO22:
259*4882a593Smuzhiyun 		config->ena_gpiod = fwnode_gpiod_get_index(
260*4882a593Smuzhiyun 				of_fwnode_handle(np),
261*4882a593Smuzhiyun 				"maxim,ena",
262*4882a593Smuzhiyun 				0,
263*4882a593Smuzhiyun 				GPIOD_OUT_HIGH | GPIOD_FLAGS_BIT_NONEXCLUSIVE,
264*4882a593Smuzhiyun 				"max77686-regulator");
265*4882a593Smuzhiyun 		if (IS_ERR(config->ena_gpiod))
266*4882a593Smuzhiyun 			config->ena_gpiod = NULL;
267*4882a593Smuzhiyun 		break;
268*4882a593Smuzhiyun 	default:
269*4882a593Smuzhiyun 		return 0;
270*4882a593Smuzhiyun 	}
271*4882a593Smuzhiyun 
272*4882a593Smuzhiyun 	if (config->ena_gpiod) {
273*4882a593Smuzhiyun 		set_bit(desc->id, max77686->gpio_enabled);
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun 		ret = regmap_update_bits(config->regmap, desc->enable_reg,
276*4882a593Smuzhiyun 					 desc->enable_mask,
277*4882a593Smuzhiyun 					 MAX77686_GPIO_CONTROL);
278*4882a593Smuzhiyun 		if (ret) {
279*4882a593Smuzhiyun 			gpiod_put(config->ena_gpiod);
280*4882a593Smuzhiyun 			config->ena_gpiod = NULL;
281*4882a593Smuzhiyun 		}
282*4882a593Smuzhiyun 	}
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun 	return 0;
285*4882a593Smuzhiyun }
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun static const struct regulator_ops max77686_ops = {
288*4882a593Smuzhiyun 	.list_voltage		= regulator_list_voltage_linear,
289*4882a593Smuzhiyun 	.map_voltage		= regulator_map_voltage_linear,
290*4882a593Smuzhiyun 	.is_enabled		= regulator_is_enabled_regmap,
291*4882a593Smuzhiyun 	.enable			= max77686_enable,
292*4882a593Smuzhiyun 	.disable		= regulator_disable_regmap,
293*4882a593Smuzhiyun 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
294*4882a593Smuzhiyun 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
295*4882a593Smuzhiyun 	.set_voltage_time_sel	= regulator_set_voltage_time_sel,
296*4882a593Smuzhiyun 	.set_suspend_mode	= max77686_set_suspend_mode,
297*4882a593Smuzhiyun };
298*4882a593Smuzhiyun 
299*4882a593Smuzhiyun static const struct regulator_ops max77686_ldo_ops = {
300*4882a593Smuzhiyun 	.list_voltage		= regulator_list_voltage_linear,
301*4882a593Smuzhiyun 	.map_voltage		= regulator_map_voltage_linear,
302*4882a593Smuzhiyun 	.is_enabled		= regulator_is_enabled_regmap,
303*4882a593Smuzhiyun 	.enable			= max77686_enable,
304*4882a593Smuzhiyun 	.disable		= regulator_disable_regmap,
305*4882a593Smuzhiyun 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
306*4882a593Smuzhiyun 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
307*4882a593Smuzhiyun 	.set_voltage_time_sel	= regulator_set_voltage_time_sel,
308*4882a593Smuzhiyun 	.set_suspend_mode	= max77686_ldo_set_suspend_mode,
309*4882a593Smuzhiyun 	.set_suspend_disable	= max77686_set_suspend_disable,
310*4882a593Smuzhiyun };
311*4882a593Smuzhiyun 
312*4882a593Smuzhiyun static const struct regulator_ops max77686_buck1_ops = {
313*4882a593Smuzhiyun 	.list_voltage		= regulator_list_voltage_linear,
314*4882a593Smuzhiyun 	.map_voltage		= regulator_map_voltage_linear,
315*4882a593Smuzhiyun 	.is_enabled		= regulator_is_enabled_regmap,
316*4882a593Smuzhiyun 	.enable			= max77686_enable,
317*4882a593Smuzhiyun 	.disable		= regulator_disable_regmap,
318*4882a593Smuzhiyun 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
319*4882a593Smuzhiyun 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
320*4882a593Smuzhiyun 	.set_voltage_time_sel	= regulator_set_voltage_time_sel,
321*4882a593Smuzhiyun 	.set_suspend_disable	= max77686_set_suspend_disable,
322*4882a593Smuzhiyun };
323*4882a593Smuzhiyun 
324*4882a593Smuzhiyun static const struct regulator_ops max77686_buck_dvs_ops = {
325*4882a593Smuzhiyun 	.list_voltage		= regulator_list_voltage_linear,
326*4882a593Smuzhiyun 	.map_voltage		= regulator_map_voltage_linear,
327*4882a593Smuzhiyun 	.is_enabled		= regulator_is_enabled_regmap,
328*4882a593Smuzhiyun 	.enable			= max77686_enable,
329*4882a593Smuzhiyun 	.disable		= regulator_disable_regmap,
330*4882a593Smuzhiyun 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
331*4882a593Smuzhiyun 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
332*4882a593Smuzhiyun 	.set_voltage_time_sel	= regulator_set_voltage_time_sel,
333*4882a593Smuzhiyun 	.set_ramp_delay		= max77686_set_ramp_delay,
334*4882a593Smuzhiyun 	.set_suspend_disable	= max77686_set_suspend_disable,
335*4882a593Smuzhiyun };
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun #define regulator_desc_ldo(num)		{				\
338*4882a593Smuzhiyun 	.name		= "LDO"#num,					\
339*4882a593Smuzhiyun 	.of_match	= of_match_ptr("LDO"#num),			\
340*4882a593Smuzhiyun 	.regulators_node	= of_match_ptr("voltage-regulators"),	\
341*4882a593Smuzhiyun 	.of_parse_cb	= max77686_of_parse_cb,				\
342*4882a593Smuzhiyun 	.id		= MAX77686_LDO##num,				\
343*4882a593Smuzhiyun 	.ops		= &max77686_ops,				\
344*4882a593Smuzhiyun 	.type		= REGULATOR_VOLTAGE,				\
345*4882a593Smuzhiyun 	.owner		= THIS_MODULE,					\
346*4882a593Smuzhiyun 	.min_uV		= MAX77686_LDO_MINUV,				\
347*4882a593Smuzhiyun 	.uV_step	= MAX77686_LDO_UVSTEP,				\
348*4882a593Smuzhiyun 	.ramp_delay	= MAX77686_RAMP_DELAY,				\
349*4882a593Smuzhiyun 	.n_voltages	= MAX77686_VSEL_MASK + 1,			\
350*4882a593Smuzhiyun 	.vsel_reg	= MAX77686_REG_LDO1CTRL1 + num - 1,		\
351*4882a593Smuzhiyun 	.vsel_mask	= MAX77686_VSEL_MASK,				\
352*4882a593Smuzhiyun 	.enable_reg	= MAX77686_REG_LDO1CTRL1 + num - 1,		\
353*4882a593Smuzhiyun 	.enable_mask	= MAX77686_OPMODE_MASK				\
354*4882a593Smuzhiyun 			<< MAX77686_OPMODE_SHIFT,			\
355*4882a593Smuzhiyun }
356*4882a593Smuzhiyun #define regulator_desc_lpm_ldo(num)	{				\
357*4882a593Smuzhiyun 	.name		= "LDO"#num,					\
358*4882a593Smuzhiyun 	.of_match	= of_match_ptr("LDO"#num),			\
359*4882a593Smuzhiyun 	.regulators_node	= of_match_ptr("voltage-regulators"),	\
360*4882a593Smuzhiyun 	.id		= MAX77686_LDO##num,				\
361*4882a593Smuzhiyun 	.ops		= &max77686_ldo_ops,				\
362*4882a593Smuzhiyun 	.type		= REGULATOR_VOLTAGE,				\
363*4882a593Smuzhiyun 	.owner		= THIS_MODULE,					\
364*4882a593Smuzhiyun 	.min_uV		= MAX77686_LDO_MINUV,				\
365*4882a593Smuzhiyun 	.uV_step	= MAX77686_LDO_UVSTEP,				\
366*4882a593Smuzhiyun 	.ramp_delay	= MAX77686_RAMP_DELAY,				\
367*4882a593Smuzhiyun 	.n_voltages	= MAX77686_VSEL_MASK + 1,			\
368*4882a593Smuzhiyun 	.vsel_reg	= MAX77686_REG_LDO1CTRL1 + num - 1,		\
369*4882a593Smuzhiyun 	.vsel_mask	= MAX77686_VSEL_MASK,				\
370*4882a593Smuzhiyun 	.enable_reg	= MAX77686_REG_LDO1CTRL1 + num - 1,		\
371*4882a593Smuzhiyun 	.enable_mask	= MAX77686_OPMODE_MASK				\
372*4882a593Smuzhiyun 			<< MAX77686_OPMODE_SHIFT,			\
373*4882a593Smuzhiyun }
374*4882a593Smuzhiyun #define regulator_desc_ldo_low(num)		{			\
375*4882a593Smuzhiyun 	.name		= "LDO"#num,					\
376*4882a593Smuzhiyun 	.of_match	= of_match_ptr("LDO"#num),			\
377*4882a593Smuzhiyun 	.regulators_node	= of_match_ptr("voltage-regulators"),	\
378*4882a593Smuzhiyun 	.id		= MAX77686_LDO##num,				\
379*4882a593Smuzhiyun 	.ops		= &max77686_ldo_ops,				\
380*4882a593Smuzhiyun 	.type		= REGULATOR_VOLTAGE,				\
381*4882a593Smuzhiyun 	.owner		= THIS_MODULE,					\
382*4882a593Smuzhiyun 	.min_uV		= MAX77686_LDO_LOW_MINUV,			\
383*4882a593Smuzhiyun 	.uV_step	= MAX77686_LDO_LOW_UVSTEP,			\
384*4882a593Smuzhiyun 	.ramp_delay	= MAX77686_RAMP_DELAY,				\
385*4882a593Smuzhiyun 	.n_voltages	= MAX77686_VSEL_MASK + 1,			\
386*4882a593Smuzhiyun 	.vsel_reg	= MAX77686_REG_LDO1CTRL1 + num - 1,		\
387*4882a593Smuzhiyun 	.vsel_mask	= MAX77686_VSEL_MASK,				\
388*4882a593Smuzhiyun 	.enable_reg	= MAX77686_REG_LDO1CTRL1 + num - 1,		\
389*4882a593Smuzhiyun 	.enable_mask	= MAX77686_OPMODE_MASK				\
390*4882a593Smuzhiyun 			<< MAX77686_OPMODE_SHIFT,			\
391*4882a593Smuzhiyun }
392*4882a593Smuzhiyun #define regulator_desc_ldo1_low(num)		{			\
393*4882a593Smuzhiyun 	.name		= "LDO"#num,					\
394*4882a593Smuzhiyun 	.of_match	= of_match_ptr("LDO"#num),			\
395*4882a593Smuzhiyun 	.regulators_node	= of_match_ptr("voltage-regulators"),	\
396*4882a593Smuzhiyun 	.id		= MAX77686_LDO##num,				\
397*4882a593Smuzhiyun 	.ops		= &max77686_ops,				\
398*4882a593Smuzhiyun 	.type		= REGULATOR_VOLTAGE,				\
399*4882a593Smuzhiyun 	.owner		= THIS_MODULE,					\
400*4882a593Smuzhiyun 	.min_uV		= MAX77686_LDO_LOW_MINUV,			\
401*4882a593Smuzhiyun 	.uV_step	= MAX77686_LDO_LOW_UVSTEP,			\
402*4882a593Smuzhiyun 	.ramp_delay	= MAX77686_RAMP_DELAY,				\
403*4882a593Smuzhiyun 	.n_voltages	= MAX77686_VSEL_MASK + 1,			\
404*4882a593Smuzhiyun 	.vsel_reg	= MAX77686_REG_LDO1CTRL1 + num - 1,		\
405*4882a593Smuzhiyun 	.vsel_mask	= MAX77686_VSEL_MASK,				\
406*4882a593Smuzhiyun 	.enable_reg	= MAX77686_REG_LDO1CTRL1 + num - 1,		\
407*4882a593Smuzhiyun 	.enable_mask	= MAX77686_OPMODE_MASK				\
408*4882a593Smuzhiyun 			<< MAX77686_OPMODE_SHIFT,			\
409*4882a593Smuzhiyun }
410*4882a593Smuzhiyun #define regulator_desc_buck(num)		{			\
411*4882a593Smuzhiyun 	.name		= "BUCK"#num,					\
412*4882a593Smuzhiyun 	.of_match	= of_match_ptr("BUCK"#num),			\
413*4882a593Smuzhiyun 	.regulators_node	= of_match_ptr("voltage-regulators"),	\
414*4882a593Smuzhiyun 	.of_parse_cb	= max77686_of_parse_cb,				\
415*4882a593Smuzhiyun 	.id		= MAX77686_BUCK##num,				\
416*4882a593Smuzhiyun 	.ops		= &max77686_ops,				\
417*4882a593Smuzhiyun 	.type		= REGULATOR_VOLTAGE,				\
418*4882a593Smuzhiyun 	.owner		= THIS_MODULE,					\
419*4882a593Smuzhiyun 	.min_uV		= MAX77686_BUCK_MINUV,				\
420*4882a593Smuzhiyun 	.uV_step	= MAX77686_BUCK_UVSTEP,				\
421*4882a593Smuzhiyun 	.ramp_delay	= MAX77686_RAMP_DELAY,				\
422*4882a593Smuzhiyun 	.enable_time	= MAX77686_BUCK_ENABLE_TIME,			\
423*4882a593Smuzhiyun 	.n_voltages	= MAX77686_VSEL_MASK + 1,			\
424*4882a593Smuzhiyun 	.vsel_reg	= MAX77686_REG_BUCK5OUT + (num - 5) * 2,	\
425*4882a593Smuzhiyun 	.vsel_mask	= MAX77686_VSEL_MASK,				\
426*4882a593Smuzhiyun 	.enable_reg	= MAX77686_REG_BUCK5CTRL + (num - 5) * 2,	\
427*4882a593Smuzhiyun 	.enable_mask	= MAX77686_OPMODE_MASK,				\
428*4882a593Smuzhiyun }
429*4882a593Smuzhiyun #define regulator_desc_buck1(num)		{			\
430*4882a593Smuzhiyun 	.name		= "BUCK"#num,					\
431*4882a593Smuzhiyun 	.of_match	= of_match_ptr("BUCK"#num),			\
432*4882a593Smuzhiyun 	.regulators_node	= of_match_ptr("voltage-regulators"),	\
433*4882a593Smuzhiyun 	.id		= MAX77686_BUCK##num,				\
434*4882a593Smuzhiyun 	.ops		= &max77686_buck1_ops,				\
435*4882a593Smuzhiyun 	.type		= REGULATOR_VOLTAGE,				\
436*4882a593Smuzhiyun 	.owner		= THIS_MODULE,					\
437*4882a593Smuzhiyun 	.min_uV		= MAX77686_BUCK_MINUV,				\
438*4882a593Smuzhiyun 	.uV_step	= MAX77686_BUCK_UVSTEP,				\
439*4882a593Smuzhiyun 	.ramp_delay	= MAX77686_RAMP_DELAY,				\
440*4882a593Smuzhiyun 	.enable_time	= MAX77686_BUCK_ENABLE_TIME,			\
441*4882a593Smuzhiyun 	.n_voltages	= MAX77686_VSEL_MASK + 1,			\
442*4882a593Smuzhiyun 	.vsel_reg	= MAX77686_REG_BUCK1OUT,			\
443*4882a593Smuzhiyun 	.vsel_mask	= MAX77686_VSEL_MASK,				\
444*4882a593Smuzhiyun 	.enable_reg	= MAX77686_REG_BUCK1CTRL,			\
445*4882a593Smuzhiyun 	.enable_mask	= MAX77686_OPMODE_MASK,				\
446*4882a593Smuzhiyun }
447*4882a593Smuzhiyun #define regulator_desc_buck_dvs(num)		{			\
448*4882a593Smuzhiyun 	.name		= "BUCK"#num,					\
449*4882a593Smuzhiyun 	.of_match	= of_match_ptr("BUCK"#num),			\
450*4882a593Smuzhiyun 	.regulators_node	= of_match_ptr("voltage-regulators"),	\
451*4882a593Smuzhiyun 	.id		= MAX77686_BUCK##num,				\
452*4882a593Smuzhiyun 	.ops		= &max77686_buck_dvs_ops,			\
453*4882a593Smuzhiyun 	.type		= REGULATOR_VOLTAGE,				\
454*4882a593Smuzhiyun 	.owner		= THIS_MODULE,					\
455*4882a593Smuzhiyun 	.min_uV		= MAX77686_DVS_MINUV,				\
456*4882a593Smuzhiyun 	.uV_step	= MAX77686_DVS_UVSTEP,				\
457*4882a593Smuzhiyun 	.ramp_delay	= MAX77686_DVS_RAMP_DELAY,			\
458*4882a593Smuzhiyun 	.enable_time	= MAX77686_DVS_ENABLE_TIME,			\
459*4882a593Smuzhiyun 	.n_voltages	= MAX77686_DVS_VSEL_MASK + 1,			\
460*4882a593Smuzhiyun 	.vsel_reg	= MAX77686_REG_BUCK2DVS1 + (num - 2) * 10,	\
461*4882a593Smuzhiyun 	.vsel_mask	= MAX77686_DVS_VSEL_MASK,			\
462*4882a593Smuzhiyun 	.enable_reg	= MAX77686_REG_BUCK2CTRL1 + (num - 2) * 10,	\
463*4882a593Smuzhiyun 	.enable_mask	= MAX77686_OPMODE_MASK				\
464*4882a593Smuzhiyun 			<< MAX77686_OPMODE_BUCK234_SHIFT,		\
465*4882a593Smuzhiyun }
466*4882a593Smuzhiyun 
467*4882a593Smuzhiyun static const struct regulator_desc regulators[] = {
468*4882a593Smuzhiyun 	regulator_desc_ldo1_low(1),
469*4882a593Smuzhiyun 	regulator_desc_ldo_low(2),
470*4882a593Smuzhiyun 	regulator_desc_ldo(3),
471*4882a593Smuzhiyun 	regulator_desc_ldo(4),
472*4882a593Smuzhiyun 	regulator_desc_ldo(5),
473*4882a593Smuzhiyun 	regulator_desc_ldo_low(6),
474*4882a593Smuzhiyun 	regulator_desc_ldo_low(7),
475*4882a593Smuzhiyun 	regulator_desc_ldo_low(8),
476*4882a593Smuzhiyun 	regulator_desc_ldo(9),
477*4882a593Smuzhiyun 	regulator_desc_lpm_ldo(10),
478*4882a593Smuzhiyun 	regulator_desc_lpm_ldo(11),
479*4882a593Smuzhiyun 	regulator_desc_lpm_ldo(12),
480*4882a593Smuzhiyun 	regulator_desc_ldo(13),
481*4882a593Smuzhiyun 	regulator_desc_lpm_ldo(14),
482*4882a593Smuzhiyun 	regulator_desc_ldo_low(15),
483*4882a593Smuzhiyun 	regulator_desc_lpm_ldo(16),
484*4882a593Smuzhiyun 	regulator_desc_ldo(17),
485*4882a593Smuzhiyun 	regulator_desc_ldo(18),
486*4882a593Smuzhiyun 	regulator_desc_ldo(19),
487*4882a593Smuzhiyun 	regulator_desc_ldo(20),
488*4882a593Smuzhiyun 	regulator_desc_ldo(21),
489*4882a593Smuzhiyun 	regulator_desc_ldo(22),
490*4882a593Smuzhiyun 	regulator_desc_ldo(23),
491*4882a593Smuzhiyun 	regulator_desc_ldo(24),
492*4882a593Smuzhiyun 	regulator_desc_ldo(25),
493*4882a593Smuzhiyun 	regulator_desc_ldo(26),
494*4882a593Smuzhiyun 	regulator_desc_buck1(1),
495*4882a593Smuzhiyun 	regulator_desc_buck_dvs(2),
496*4882a593Smuzhiyun 	regulator_desc_buck_dvs(3),
497*4882a593Smuzhiyun 	regulator_desc_buck_dvs(4),
498*4882a593Smuzhiyun 	regulator_desc_buck(5),
499*4882a593Smuzhiyun 	regulator_desc_buck(6),
500*4882a593Smuzhiyun 	regulator_desc_buck(7),
501*4882a593Smuzhiyun 	regulator_desc_buck(8),
502*4882a593Smuzhiyun 	regulator_desc_buck(9),
503*4882a593Smuzhiyun };
504*4882a593Smuzhiyun 
max77686_pmic_probe(struct platform_device * pdev)505*4882a593Smuzhiyun static int max77686_pmic_probe(struct platform_device *pdev)
506*4882a593Smuzhiyun {
507*4882a593Smuzhiyun 	struct max77686_dev *iodev = dev_get_drvdata(pdev->dev.parent);
508*4882a593Smuzhiyun 	struct max77686_data *max77686;
509*4882a593Smuzhiyun 	int i;
510*4882a593Smuzhiyun 	struct regulator_config config = { };
511*4882a593Smuzhiyun 
512*4882a593Smuzhiyun 	dev_dbg(&pdev->dev, "%s\n", __func__);
513*4882a593Smuzhiyun 
514*4882a593Smuzhiyun 	max77686 = devm_kzalloc(&pdev->dev, sizeof(struct max77686_data),
515*4882a593Smuzhiyun 				GFP_KERNEL);
516*4882a593Smuzhiyun 	if (!max77686)
517*4882a593Smuzhiyun 		return -ENOMEM;
518*4882a593Smuzhiyun 
519*4882a593Smuzhiyun 	max77686->dev = &pdev->dev;
520*4882a593Smuzhiyun 	config.dev = iodev->dev;
521*4882a593Smuzhiyun 	config.regmap = iodev->regmap;
522*4882a593Smuzhiyun 	config.driver_data = max77686;
523*4882a593Smuzhiyun 	platform_set_drvdata(pdev, max77686);
524*4882a593Smuzhiyun 
525*4882a593Smuzhiyun 	for (i = 0; i < MAX77686_REGULATORS; i++) {
526*4882a593Smuzhiyun 		struct regulator_dev *rdev;
527*4882a593Smuzhiyun 		int id = regulators[i].id;
528*4882a593Smuzhiyun 
529*4882a593Smuzhiyun 		max77686->opmode[id] = MAX77686_NORMAL;
530*4882a593Smuzhiyun 		rdev = devm_regulator_register(&pdev->dev,
531*4882a593Smuzhiyun 						&regulators[i], &config);
532*4882a593Smuzhiyun 		if (IS_ERR(rdev)) {
533*4882a593Smuzhiyun 			int ret = PTR_ERR(rdev);
534*4882a593Smuzhiyun 			dev_err(&pdev->dev,
535*4882a593Smuzhiyun 				"regulator init failed for %d: %d\n", i, ret);
536*4882a593Smuzhiyun 			return ret;
537*4882a593Smuzhiyun 		}
538*4882a593Smuzhiyun 	}
539*4882a593Smuzhiyun 
540*4882a593Smuzhiyun 	return 0;
541*4882a593Smuzhiyun }
542*4882a593Smuzhiyun 
543*4882a593Smuzhiyun static const struct platform_device_id max77686_pmic_id[] = {
544*4882a593Smuzhiyun 	{"max77686-pmic", 0},
545*4882a593Smuzhiyun 	{ },
546*4882a593Smuzhiyun };
547*4882a593Smuzhiyun MODULE_DEVICE_TABLE(platform, max77686_pmic_id);
548*4882a593Smuzhiyun 
549*4882a593Smuzhiyun static struct platform_driver max77686_pmic_driver = {
550*4882a593Smuzhiyun 	.driver = {
551*4882a593Smuzhiyun 		.name = "max77686-pmic",
552*4882a593Smuzhiyun 	},
553*4882a593Smuzhiyun 	.probe = max77686_pmic_probe,
554*4882a593Smuzhiyun 	.id_table = max77686_pmic_id,
555*4882a593Smuzhiyun };
556*4882a593Smuzhiyun 
557*4882a593Smuzhiyun module_platform_driver(max77686_pmic_driver);
558*4882a593Smuzhiyun 
559*4882a593Smuzhiyun MODULE_DESCRIPTION("MAXIM 77686 Regulator Driver");
560*4882a593Smuzhiyun MODULE_AUTHOR("Chiwoong Byun <woong.byun@samsung.com>");
561*4882a593Smuzhiyun MODULE_LICENSE("GPL");
562