xref: /OK3568_Linux_fs/kernel/drivers/regulator/ltc3676.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (C) 2016 Gateworks Corporation, Inc. All Rights Reserved.
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun #include <linux/i2c.h>
6*4882a593Smuzhiyun #include <linux/init.h>
7*4882a593Smuzhiyun #include <linux/interrupt.h>
8*4882a593Smuzhiyun #include <linux/module.h>
9*4882a593Smuzhiyun #include <linux/kernel.h>
10*4882a593Smuzhiyun #include <linux/of.h>
11*4882a593Smuzhiyun #include <linux/regmap.h>
12*4882a593Smuzhiyun #include <linux/regulator/driver.h>
13*4882a593Smuzhiyun #include <linux/regulator/machine.h>
14*4882a593Smuzhiyun #include <linux/regulator/of_regulator.h>
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #define DRIVER_NAME		"ltc3676"
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun /* LTC3676 Registers */
19*4882a593Smuzhiyun #define LTC3676_BUCK1     0x01
20*4882a593Smuzhiyun #define LTC3676_BUCK2     0x02
21*4882a593Smuzhiyun #define LTC3676_BUCK3     0x03
22*4882a593Smuzhiyun #define LTC3676_BUCK4     0x04
23*4882a593Smuzhiyun #define LTC3676_LDOA      0x05
24*4882a593Smuzhiyun #define LTC3676_LDOB      0x06
25*4882a593Smuzhiyun #define LTC3676_SQD1      0x07
26*4882a593Smuzhiyun #define LTC3676_SQD2      0x08
27*4882a593Smuzhiyun #define LTC3676_CNTRL     0x09
28*4882a593Smuzhiyun #define LTC3676_DVB1A     0x0A
29*4882a593Smuzhiyun #define LTC3676_DVB1B     0x0B
30*4882a593Smuzhiyun #define LTC3676_DVB2A     0x0C
31*4882a593Smuzhiyun #define LTC3676_DVB2B     0x0D
32*4882a593Smuzhiyun #define LTC3676_DVB3A     0x0E
33*4882a593Smuzhiyun #define LTC3676_DVB3B     0x0F
34*4882a593Smuzhiyun #define LTC3676_DVB4A     0x10
35*4882a593Smuzhiyun #define LTC3676_DVB4B     0x11
36*4882a593Smuzhiyun #define LTC3676_MSKIRQ    0x12
37*4882a593Smuzhiyun #define LTC3676_MSKPG     0x13
38*4882a593Smuzhiyun #define LTC3676_USER      0x14
39*4882a593Smuzhiyun #define LTC3676_IRQSTAT   0x15
40*4882a593Smuzhiyun #define LTC3676_PGSTATL   0x16
41*4882a593Smuzhiyun #define LTC3676_PGSTATRT  0x17
42*4882a593Smuzhiyun #define LTC3676_HRST      0x1E
43*4882a593Smuzhiyun #define LTC3676_CLIRQ     0x1F
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun #define LTC3676_DVBxA_REF_SELECT	BIT(5)
46*4882a593Smuzhiyun #define LTC3676_DVBxB_PGOOD_MASK	BIT(5)
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun #define LTC3676_IRQSTAT_PGOOD_TIMEOUT	BIT(3)
49*4882a593Smuzhiyun #define LTC3676_IRQSTAT_UNDERVOLT_WARN	BIT(4)
50*4882a593Smuzhiyun #define LTC3676_IRQSTAT_UNDERVOLT_FAULT	BIT(5)
51*4882a593Smuzhiyun #define LTC3676_IRQSTAT_THERMAL_WARN	BIT(6)
52*4882a593Smuzhiyun #define LTC3676_IRQSTAT_THERMAL_FAULT	BIT(7)
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun enum ltc3676_reg {
55*4882a593Smuzhiyun 	LTC3676_SW1,
56*4882a593Smuzhiyun 	LTC3676_SW2,
57*4882a593Smuzhiyun 	LTC3676_SW3,
58*4882a593Smuzhiyun 	LTC3676_SW4,
59*4882a593Smuzhiyun 	LTC3676_LDO1,
60*4882a593Smuzhiyun 	LTC3676_LDO2,
61*4882a593Smuzhiyun 	LTC3676_LDO3,
62*4882a593Smuzhiyun 	LTC3676_LDO4,
63*4882a593Smuzhiyun 	LTC3676_NUM_REGULATORS,
64*4882a593Smuzhiyun };
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun struct ltc3676 {
67*4882a593Smuzhiyun 	struct regmap *regmap;
68*4882a593Smuzhiyun 	struct device *dev;
69*4882a593Smuzhiyun 	struct regulator_desc regulator_descs[LTC3676_NUM_REGULATORS];
70*4882a593Smuzhiyun 	struct regulator_dev *regulators[LTC3676_NUM_REGULATORS];
71*4882a593Smuzhiyun };
72*4882a593Smuzhiyun 
ltc3676_set_suspend_voltage(struct regulator_dev * rdev,int uV)73*4882a593Smuzhiyun static int ltc3676_set_suspend_voltage(struct regulator_dev *rdev, int uV)
74*4882a593Smuzhiyun {
75*4882a593Smuzhiyun 	struct ltc3676 *ltc3676 = rdev_get_drvdata(rdev);
76*4882a593Smuzhiyun 	struct device *dev = ltc3676->dev;
77*4882a593Smuzhiyun 	int dcdc = rdev_get_id(rdev);
78*4882a593Smuzhiyun 	int sel;
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun 	dev_dbg(dev, "%s id=%d uV=%d\n", __func__, dcdc, uV);
81*4882a593Smuzhiyun 	sel = regulator_map_voltage_linear(rdev, uV, uV);
82*4882a593Smuzhiyun 	if (sel < 0)
83*4882a593Smuzhiyun 		return sel;
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	/* DVBB register follows right after the corresponding DVBA register */
86*4882a593Smuzhiyun 	return regmap_update_bits(ltc3676->regmap, rdev->desc->vsel_reg + 1,
87*4882a593Smuzhiyun 				  rdev->desc->vsel_mask, sel);
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun 
ltc3676_set_suspend_mode(struct regulator_dev * rdev,unsigned int mode)90*4882a593Smuzhiyun static int ltc3676_set_suspend_mode(struct regulator_dev *rdev,
91*4882a593Smuzhiyun 				    unsigned int mode)
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun 	struct ltc3676 *ltc3676= rdev_get_drvdata(rdev);
94*4882a593Smuzhiyun 	struct device *dev = ltc3676->dev;
95*4882a593Smuzhiyun 	int mask, val;
96*4882a593Smuzhiyun 	int dcdc = rdev_get_id(rdev);
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun 	dev_dbg(dev, "%s id=%d mode=%d\n", __func__, dcdc, mode);
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	mask = LTC3676_DVBxA_REF_SELECT;
101*4882a593Smuzhiyun 	switch (mode) {
102*4882a593Smuzhiyun 	case REGULATOR_MODE_STANDBY:
103*4882a593Smuzhiyun 		val = 0; /* select DVBxA */
104*4882a593Smuzhiyun 		break;
105*4882a593Smuzhiyun 	case REGULATOR_MODE_NORMAL:
106*4882a593Smuzhiyun 		val = LTC3676_DVBxA_REF_SELECT; /* select DVBxB */
107*4882a593Smuzhiyun 		break;
108*4882a593Smuzhiyun 	default:
109*4882a593Smuzhiyun 		dev_warn(&rdev->dev, "%s: regulator mode: 0x%x not supported\n",
110*4882a593Smuzhiyun 			 rdev->desc->name, mode);
111*4882a593Smuzhiyun 		return -EINVAL;
112*4882a593Smuzhiyun 	}
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 	return regmap_update_bits(ltc3676->regmap, rdev->desc->vsel_reg,
115*4882a593Smuzhiyun 				  mask, val);
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun 
ltc3676_set_voltage_sel(struct regulator_dev * rdev,unsigned selector)118*4882a593Smuzhiyun static int ltc3676_set_voltage_sel(struct regulator_dev *rdev, unsigned selector)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun 	struct ltc3676 *ltc3676 = rdev_get_drvdata(rdev);
121*4882a593Smuzhiyun 	struct device *dev = ltc3676->dev;
122*4882a593Smuzhiyun 	int ret, dcdc = rdev_get_id(rdev);
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	dev_dbg(dev, "%s id=%d selector=%d\n", __func__, dcdc, selector);
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 	ret = regmap_update_bits(ltc3676->regmap, rdev->desc->vsel_reg + 1,
127*4882a593Smuzhiyun 				 LTC3676_DVBxB_PGOOD_MASK,
128*4882a593Smuzhiyun 				 LTC3676_DVBxB_PGOOD_MASK);
129*4882a593Smuzhiyun 	if (ret)
130*4882a593Smuzhiyun 		return ret;
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun 	return regulator_set_voltage_sel_regmap(rdev, selector);
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun 
ltc3676_scale(unsigned int uV,u32 r1,u32 r2)135*4882a593Smuzhiyun static inline unsigned int ltc3676_scale(unsigned int uV, u32 r1, u32 r2)
136*4882a593Smuzhiyun {
137*4882a593Smuzhiyun 	uint64_t tmp;
138*4882a593Smuzhiyun 	if (uV == 0)
139*4882a593Smuzhiyun 		return 0;
140*4882a593Smuzhiyun 	tmp = (uint64_t)uV * r1;
141*4882a593Smuzhiyun 	do_div(tmp, r2);
142*4882a593Smuzhiyun 	return uV + (unsigned int)tmp;
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun 
ltc3676_of_parse_cb(struct device_node * np,const struct regulator_desc * desc,struct regulator_config * config)145*4882a593Smuzhiyun static int ltc3676_of_parse_cb(struct device_node *np,
146*4882a593Smuzhiyun 			       const struct regulator_desc *desc,
147*4882a593Smuzhiyun 			       struct regulator_config *config)
148*4882a593Smuzhiyun {
149*4882a593Smuzhiyun 	struct ltc3676 *ltc3676 = config->driver_data;
150*4882a593Smuzhiyun 	struct regulator_desc *rdesc = &ltc3676->regulator_descs[desc->id];
151*4882a593Smuzhiyun 	u32 r[2];
152*4882a593Smuzhiyun 	int ret;
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun 	/* LDO3 has a fixed output */
155*4882a593Smuzhiyun 	if (desc->id == LTC3676_LDO3)
156*4882a593Smuzhiyun 		return 0;
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun 	ret = of_property_read_u32_array(np, "lltc,fb-voltage-divider", r, 2);
159*4882a593Smuzhiyun 	if (ret) {
160*4882a593Smuzhiyun 		dev_err(ltc3676->dev, "Failed to parse voltage divider: %d\n",
161*4882a593Smuzhiyun 			ret);
162*4882a593Smuzhiyun 		return ret;
163*4882a593Smuzhiyun 	}
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 	rdesc->min_uV = ltc3676_scale(desc->min_uV, r[0], r[1]);
166*4882a593Smuzhiyun 	rdesc->uV_step = ltc3676_scale(desc->uV_step, r[0], r[1]);
167*4882a593Smuzhiyun 	rdesc->fixed_uV = ltc3676_scale(desc->fixed_uV, r[0], r[1]);
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun 	return 0;
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun /* SW1, SW2, SW3, SW4 linear 0.8V-3.3V with scalar via R1/R2 feeback res */
173*4882a593Smuzhiyun static const struct regulator_ops ltc3676_linear_regulator_ops = {
174*4882a593Smuzhiyun 	.enable = regulator_enable_regmap,
175*4882a593Smuzhiyun 	.disable = regulator_disable_regmap,
176*4882a593Smuzhiyun 	.is_enabled = regulator_is_enabled_regmap,
177*4882a593Smuzhiyun 	.list_voltage = regulator_list_voltage_linear,
178*4882a593Smuzhiyun 	.set_voltage_sel = ltc3676_set_voltage_sel,
179*4882a593Smuzhiyun 	.get_voltage_sel = regulator_get_voltage_sel_regmap,
180*4882a593Smuzhiyun 	.set_suspend_voltage = ltc3676_set_suspend_voltage,
181*4882a593Smuzhiyun 	.set_suspend_mode = ltc3676_set_suspend_mode,
182*4882a593Smuzhiyun };
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun /* LDO1 always on fixed 0.8V-3.3V via scalar via R1/R2 feeback res */
185*4882a593Smuzhiyun static const struct regulator_ops ltc3676_fixed_standby_regulator_ops = {
186*4882a593Smuzhiyun };
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun /* LDO2, LDO3 fixed (LDO2 has external scalar via R1/R2 feedback res) */
189*4882a593Smuzhiyun static const struct regulator_ops ltc3676_fixed_regulator_ops = {
190*4882a593Smuzhiyun 	.enable = regulator_enable_regmap,
191*4882a593Smuzhiyun 	.disable = regulator_disable_regmap,
192*4882a593Smuzhiyun 	.is_enabled = regulator_is_enabled_regmap,
193*4882a593Smuzhiyun };
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun #define LTC3676_REG(_id, _name, _ops, en_reg, en_bit, dvba_reg, dvb_mask)   \
196*4882a593Smuzhiyun 	[LTC3676_ ## _id] = {                                        \
197*4882a593Smuzhiyun 		.name = #_name,                                \
198*4882a593Smuzhiyun 		.of_match = of_match_ptr(#_name),              \
199*4882a593Smuzhiyun 		.regulators_node = of_match_ptr("regulators"), \
200*4882a593Smuzhiyun 		.of_parse_cb = ltc3676_of_parse_cb,            \
201*4882a593Smuzhiyun 		.n_voltages = (dvb_mask) + 1,                  \
202*4882a593Smuzhiyun 		.min_uV = (dvba_reg) ? 412500 : 0,             \
203*4882a593Smuzhiyun 		.uV_step = (dvba_reg) ? 12500 : 0,             \
204*4882a593Smuzhiyun 		.ramp_delay = (dvba_reg) ? 800 : 0,            \
205*4882a593Smuzhiyun 		.fixed_uV = (dvb_mask) ? 0 : 725000,           \
206*4882a593Smuzhiyun 		.ops = &ltc3676_ ## _ops ## _regulator_ops,    \
207*4882a593Smuzhiyun 		.type = REGULATOR_VOLTAGE,                     \
208*4882a593Smuzhiyun 		.id = LTC3676_ ## _id,                         \
209*4882a593Smuzhiyun 		.owner = THIS_MODULE,                          \
210*4882a593Smuzhiyun 		.vsel_reg = (dvba_reg),                        \
211*4882a593Smuzhiyun 		.vsel_mask = (dvb_mask),                       \
212*4882a593Smuzhiyun 		.enable_reg = (en_reg),                        \
213*4882a593Smuzhiyun 		.enable_mask = (1 << en_bit),                  \
214*4882a593Smuzhiyun 	}
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun #define LTC3676_LINEAR_REG(_id, _name, _en, _dvba)                     \
217*4882a593Smuzhiyun 	LTC3676_REG(_id, _name, linear,                                \
218*4882a593Smuzhiyun 		    LTC3676_ ## _en, 7,                                \
219*4882a593Smuzhiyun 		    LTC3676_ ## _dvba, 0x1f)
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun #define LTC3676_FIXED_REG(_id, _name, _en_reg, _en_bit)                \
222*4882a593Smuzhiyun 	LTC3676_REG(_id, _name, fixed, LTC3676_ ## _en_reg, _en_bit, 0, 0)
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun static const struct regulator_desc ltc3676_regulators[LTC3676_NUM_REGULATORS] = {
225*4882a593Smuzhiyun 	LTC3676_LINEAR_REG(SW1, sw1, BUCK1, DVB1A),
226*4882a593Smuzhiyun 	LTC3676_LINEAR_REG(SW2, sw2, BUCK2, DVB2A),
227*4882a593Smuzhiyun 	LTC3676_LINEAR_REG(SW3, sw3, BUCK3, DVB3A),
228*4882a593Smuzhiyun 	LTC3676_LINEAR_REG(SW4, sw4, BUCK4, DVB4A),
229*4882a593Smuzhiyun 	LTC3676_REG(LDO1, ldo1, fixed_standby, 0, 0, 0, 0),
230*4882a593Smuzhiyun 	LTC3676_FIXED_REG(LDO2, ldo2, LDOA, 2),
231*4882a593Smuzhiyun 	LTC3676_FIXED_REG(LDO3, ldo3, LDOA, 5),
232*4882a593Smuzhiyun 	LTC3676_FIXED_REG(LDO4, ldo4, LDOB, 2),
233*4882a593Smuzhiyun };
234*4882a593Smuzhiyun 
ltc3676_readable_writeable_reg(struct device * dev,unsigned int reg)235*4882a593Smuzhiyun static bool ltc3676_readable_writeable_reg(struct device *dev, unsigned int reg)
236*4882a593Smuzhiyun {
237*4882a593Smuzhiyun 	switch (reg) {
238*4882a593Smuzhiyun 	case LTC3676_BUCK1 ... LTC3676_IRQSTAT:
239*4882a593Smuzhiyun 	case LTC3676_HRST:
240*4882a593Smuzhiyun 	case LTC3676_CLIRQ:
241*4882a593Smuzhiyun 		return true;
242*4882a593Smuzhiyun 	}
243*4882a593Smuzhiyun 	return false;
244*4882a593Smuzhiyun }
245*4882a593Smuzhiyun 
ltc3676_volatile_reg(struct device * dev,unsigned int reg)246*4882a593Smuzhiyun static bool ltc3676_volatile_reg(struct device *dev, unsigned int reg)
247*4882a593Smuzhiyun {
248*4882a593Smuzhiyun 	switch (reg) {
249*4882a593Smuzhiyun 	case LTC3676_IRQSTAT ... LTC3676_PGSTATRT:
250*4882a593Smuzhiyun 		return true;
251*4882a593Smuzhiyun 	}
252*4882a593Smuzhiyun 	return false;
253*4882a593Smuzhiyun }
254*4882a593Smuzhiyun 
255*4882a593Smuzhiyun static const struct regmap_config ltc3676_regmap_config = {
256*4882a593Smuzhiyun 	.reg_bits = 8,
257*4882a593Smuzhiyun 	.val_bits = 8,
258*4882a593Smuzhiyun 	.writeable_reg = ltc3676_readable_writeable_reg,
259*4882a593Smuzhiyun 	.readable_reg = ltc3676_readable_writeable_reg,
260*4882a593Smuzhiyun 	.volatile_reg = ltc3676_volatile_reg,
261*4882a593Smuzhiyun 	.max_register = LTC3676_CLIRQ,
262*4882a593Smuzhiyun 	.use_single_read = true,
263*4882a593Smuzhiyun 	.use_single_write = true,
264*4882a593Smuzhiyun 	.cache_type = REGCACHE_RBTREE,
265*4882a593Smuzhiyun };
266*4882a593Smuzhiyun 
ltc3676_isr(int irq,void * dev_id)267*4882a593Smuzhiyun static irqreturn_t ltc3676_isr(int irq, void *dev_id)
268*4882a593Smuzhiyun {
269*4882a593Smuzhiyun 	struct ltc3676 *ltc3676 = dev_id;
270*4882a593Smuzhiyun 	struct device *dev = ltc3676->dev;
271*4882a593Smuzhiyun 	unsigned int i, irqstat, event;
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun 	regmap_read(ltc3676->regmap, LTC3676_IRQSTAT, &irqstat);
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun 	dev_dbg(dev, "irq%d irqstat=0x%02x\n", irq, irqstat);
276*4882a593Smuzhiyun 	if (irqstat & LTC3676_IRQSTAT_THERMAL_WARN) {
277*4882a593Smuzhiyun 		dev_warn(dev, "Over-temperature Warning\n");
278*4882a593Smuzhiyun 		event = REGULATOR_EVENT_OVER_TEMP;
279*4882a593Smuzhiyun 		for (i = 0; i < LTC3676_NUM_REGULATORS; i++)
280*4882a593Smuzhiyun 			regulator_notifier_call_chain(ltc3676->regulators[i],
281*4882a593Smuzhiyun 						      event, NULL);
282*4882a593Smuzhiyun 	}
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun 	if (irqstat & LTC3676_IRQSTAT_UNDERVOLT_WARN) {
285*4882a593Smuzhiyun 		dev_info(dev, "Undervoltage Warning\n");
286*4882a593Smuzhiyun 		event = REGULATOR_EVENT_UNDER_VOLTAGE;
287*4882a593Smuzhiyun 		for (i = 0; i < LTC3676_NUM_REGULATORS; i++)
288*4882a593Smuzhiyun 			regulator_notifier_call_chain(ltc3676->regulators[i],
289*4882a593Smuzhiyun 						      event, NULL);
290*4882a593Smuzhiyun 	}
291*4882a593Smuzhiyun 
292*4882a593Smuzhiyun 	/* Clear warning condition */
293*4882a593Smuzhiyun 	regmap_write(ltc3676->regmap, LTC3676_CLIRQ, 0);
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 	return IRQ_HANDLED;
296*4882a593Smuzhiyun }
297*4882a593Smuzhiyun 
ltc3676_regulator_probe(struct i2c_client * client)298*4882a593Smuzhiyun static int ltc3676_regulator_probe(struct i2c_client *client)
299*4882a593Smuzhiyun {
300*4882a593Smuzhiyun 	struct device *dev = &client->dev;
301*4882a593Smuzhiyun 	struct regulator_init_data *init_data = dev_get_platdata(dev);
302*4882a593Smuzhiyun 	struct regulator_desc *descs;
303*4882a593Smuzhiyun 	struct ltc3676 *ltc3676;
304*4882a593Smuzhiyun 	int i, ret;
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun 	ltc3676 = devm_kzalloc(dev, sizeof(*ltc3676), GFP_KERNEL);
307*4882a593Smuzhiyun 	if (!ltc3676)
308*4882a593Smuzhiyun 		return -ENOMEM;
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun 	i2c_set_clientdata(client, ltc3676);
311*4882a593Smuzhiyun 	ltc3676->dev = dev;
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 	descs = ltc3676->regulator_descs;
314*4882a593Smuzhiyun 	memcpy(descs, ltc3676_regulators, sizeof(ltc3676_regulators));
315*4882a593Smuzhiyun 	descs[LTC3676_LDO3].fixed_uV = 1800000; /* LDO3 is fixed 1.8V */
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun 	ltc3676->regmap = devm_regmap_init_i2c(client, &ltc3676_regmap_config);
318*4882a593Smuzhiyun 	if (IS_ERR(ltc3676->regmap)) {
319*4882a593Smuzhiyun 		ret = PTR_ERR(ltc3676->regmap);
320*4882a593Smuzhiyun 		dev_err(dev, "failed to initialize regmap: %d\n", ret);
321*4882a593Smuzhiyun 		return ret;
322*4882a593Smuzhiyun 	}
323*4882a593Smuzhiyun 
324*4882a593Smuzhiyun 	for (i = 0; i < LTC3676_NUM_REGULATORS; i++) {
325*4882a593Smuzhiyun 		struct regulator_desc *desc = &ltc3676->regulator_descs[i];
326*4882a593Smuzhiyun 		struct regulator_config config = { };
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun 		if (init_data)
329*4882a593Smuzhiyun 			config.init_data = &init_data[i];
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun 		config.dev = dev;
332*4882a593Smuzhiyun 		config.driver_data = ltc3676;
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun 		ltc3676->regulators[i] = devm_regulator_register(dev, desc,
335*4882a593Smuzhiyun 								 &config);
336*4882a593Smuzhiyun 		if (IS_ERR(ltc3676->regulators[i])) {
337*4882a593Smuzhiyun 			ret = PTR_ERR(ltc3676->regulators[i]);
338*4882a593Smuzhiyun 			dev_err(dev, "failed to register regulator %s: %d\n",
339*4882a593Smuzhiyun 				desc->name, ret);
340*4882a593Smuzhiyun 			return ret;
341*4882a593Smuzhiyun 		}
342*4882a593Smuzhiyun 	}
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun 	regmap_write(ltc3676->regmap, LTC3676_CLIRQ, 0);
345*4882a593Smuzhiyun 	if (client->irq) {
346*4882a593Smuzhiyun 		ret = devm_request_threaded_irq(dev, client->irq, NULL,
347*4882a593Smuzhiyun 						ltc3676_isr,
348*4882a593Smuzhiyun 						IRQF_TRIGGER_LOW | IRQF_ONESHOT,
349*4882a593Smuzhiyun 						client->name, ltc3676);
350*4882a593Smuzhiyun 		if (ret) {
351*4882a593Smuzhiyun 			dev_err(dev, "Failed to request IRQ: %d\n", ret);
352*4882a593Smuzhiyun 			return ret;
353*4882a593Smuzhiyun 		}
354*4882a593Smuzhiyun 	}
355*4882a593Smuzhiyun 
356*4882a593Smuzhiyun 	return 0;
357*4882a593Smuzhiyun }
358*4882a593Smuzhiyun 
359*4882a593Smuzhiyun static const struct i2c_device_id ltc3676_i2c_id[] = {
360*4882a593Smuzhiyun 	{ "ltc3676" },
361*4882a593Smuzhiyun 	{ }
362*4882a593Smuzhiyun };
363*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, ltc3676_i2c_id);
364*4882a593Smuzhiyun 
365*4882a593Smuzhiyun static const struct of_device_id __maybe_unused ltc3676_of_match[] = {
366*4882a593Smuzhiyun 	{ .compatible = "lltc,ltc3676" },
367*4882a593Smuzhiyun 	{ },
368*4882a593Smuzhiyun };
369*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, ltc3676_of_match);
370*4882a593Smuzhiyun 
371*4882a593Smuzhiyun static struct i2c_driver ltc3676_driver = {
372*4882a593Smuzhiyun 	.driver = {
373*4882a593Smuzhiyun 		.name = DRIVER_NAME,
374*4882a593Smuzhiyun 		.of_match_table = of_match_ptr(ltc3676_of_match),
375*4882a593Smuzhiyun 	},
376*4882a593Smuzhiyun 	.probe_new = ltc3676_regulator_probe,
377*4882a593Smuzhiyun 	.id_table = ltc3676_i2c_id,
378*4882a593Smuzhiyun };
379*4882a593Smuzhiyun module_i2c_driver(ltc3676_driver);
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun MODULE_AUTHOR("Tim Harvey <tharvey@gateworks.com>");
382*4882a593Smuzhiyun MODULE_DESCRIPTION("Regulator driver for Linear Technology LTC3676");
383*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
384