xref: /OK3568_Linux_fs/kernel/drivers/regulator/lp8755.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * LP8755 High Performance Power Management Unit : System Interface Driver
4*4882a593Smuzhiyun  * (based on rev. 0.26)
5*4882a593Smuzhiyun  * Copyright 2012 Texas Instruments
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Author: Daniel(Geon Si) Jeong <daniel.jeong@ti.com>
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/slab.h>
12*4882a593Smuzhiyun #include <linux/i2c.h>
13*4882a593Smuzhiyun #include <linux/err.h>
14*4882a593Smuzhiyun #include <linux/irq.h>
15*4882a593Smuzhiyun #include <linux/interrupt.h>
16*4882a593Smuzhiyun #include <linux/gpio.h>
17*4882a593Smuzhiyun #include <linux/regmap.h>
18*4882a593Smuzhiyun #include <linux/uaccess.h>
19*4882a593Smuzhiyun #include <linux/regulator/driver.h>
20*4882a593Smuzhiyun #include <linux/regulator/machine.h>
21*4882a593Smuzhiyun #include <linux/platform_data/lp8755.h>
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #define LP8755_REG_BUCK0	0x00
24*4882a593Smuzhiyun #define LP8755_REG_BUCK1	0x03
25*4882a593Smuzhiyun #define LP8755_REG_BUCK2	0x04
26*4882a593Smuzhiyun #define LP8755_REG_BUCK3	0x01
27*4882a593Smuzhiyun #define LP8755_REG_BUCK4	0x05
28*4882a593Smuzhiyun #define LP8755_REG_BUCK5	0x02
29*4882a593Smuzhiyun #define LP8755_REG_MAX		0xFF
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun #define LP8755_BUCK_EN_M	BIT(7)
32*4882a593Smuzhiyun #define LP8755_BUCK_LINEAR_OUT_MAX	0x76
33*4882a593Smuzhiyun #define LP8755_BUCK_VOUT_M	0x7F
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun struct lp8755_mphase {
36*4882a593Smuzhiyun 	int nreg;
37*4882a593Smuzhiyun 	int buck_num[LP8755_BUCK_MAX];
38*4882a593Smuzhiyun };
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun struct lp8755_chip {
41*4882a593Smuzhiyun 	struct device *dev;
42*4882a593Smuzhiyun 	struct regmap *regmap;
43*4882a593Smuzhiyun 	struct lp8755_platform_data *pdata;
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun 	int irq;
46*4882a593Smuzhiyun 	unsigned int irqmask;
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun 	int mphase;
49*4882a593Smuzhiyun 	struct regulator_dev *rdev[LP8755_BUCK_MAX];
50*4882a593Smuzhiyun };
51*4882a593Smuzhiyun 
lp8755_buck_enable_time(struct regulator_dev * rdev)52*4882a593Smuzhiyun static int lp8755_buck_enable_time(struct regulator_dev *rdev)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun 	int ret;
55*4882a593Smuzhiyun 	unsigned int regval;
56*4882a593Smuzhiyun 	enum lp8755_bucks id = rdev_get_id(rdev);
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun 	ret = regmap_read(rdev->regmap, 0x12 + id, &regval);
59*4882a593Smuzhiyun 	if (ret < 0) {
60*4882a593Smuzhiyun 		dev_err(&rdev->dev, "i2c access error %s\n", __func__);
61*4882a593Smuzhiyun 		return ret;
62*4882a593Smuzhiyun 	}
63*4882a593Smuzhiyun 	return (regval & 0xff) * 100;
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun 
lp8755_buck_set_mode(struct regulator_dev * rdev,unsigned int mode)66*4882a593Smuzhiyun static int lp8755_buck_set_mode(struct regulator_dev *rdev, unsigned int mode)
67*4882a593Smuzhiyun {
68*4882a593Smuzhiyun 	int ret;
69*4882a593Smuzhiyun 	unsigned int regbval = 0x0;
70*4882a593Smuzhiyun 	enum lp8755_bucks id = rdev_get_id(rdev);
71*4882a593Smuzhiyun 	struct lp8755_chip *pchip = rdev_get_drvdata(rdev);
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	switch (mode) {
74*4882a593Smuzhiyun 	case REGULATOR_MODE_FAST:
75*4882a593Smuzhiyun 		/* forced pwm mode */
76*4882a593Smuzhiyun 		regbval = (0x01 << id);
77*4882a593Smuzhiyun 		break;
78*4882a593Smuzhiyun 	case REGULATOR_MODE_NORMAL:
79*4882a593Smuzhiyun 		/* enable automatic pwm/pfm mode */
80*4882a593Smuzhiyun 		ret = regmap_update_bits(rdev->regmap, 0x08 + id, 0x20, 0x00);
81*4882a593Smuzhiyun 		if (ret < 0)
82*4882a593Smuzhiyun 			goto err_i2c;
83*4882a593Smuzhiyun 		break;
84*4882a593Smuzhiyun 	case REGULATOR_MODE_IDLE:
85*4882a593Smuzhiyun 		/* enable automatic pwm/pfm/lppfm mode */
86*4882a593Smuzhiyun 		ret = regmap_update_bits(rdev->regmap, 0x08 + id, 0x20, 0x20);
87*4882a593Smuzhiyun 		if (ret < 0)
88*4882a593Smuzhiyun 			goto err_i2c;
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun 		ret = regmap_update_bits(rdev->regmap, 0x10, 0x01, 0x01);
91*4882a593Smuzhiyun 		if (ret < 0)
92*4882a593Smuzhiyun 			goto err_i2c;
93*4882a593Smuzhiyun 		break;
94*4882a593Smuzhiyun 	default:
95*4882a593Smuzhiyun 		dev_err(pchip->dev, "Not supported buck mode %s\n", __func__);
96*4882a593Smuzhiyun 		/* forced pwm mode */
97*4882a593Smuzhiyun 		regbval = (0x01 << id);
98*4882a593Smuzhiyun 	}
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	ret = regmap_update_bits(rdev->regmap, 0x06, 0x01 << id, regbval);
101*4882a593Smuzhiyun 	if (ret < 0)
102*4882a593Smuzhiyun 		goto err_i2c;
103*4882a593Smuzhiyun 	return ret;
104*4882a593Smuzhiyun err_i2c:
105*4882a593Smuzhiyun 	dev_err(&rdev->dev, "i2c access error %s\n", __func__);
106*4882a593Smuzhiyun 	return ret;
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun 
lp8755_buck_get_mode(struct regulator_dev * rdev)109*4882a593Smuzhiyun static unsigned int lp8755_buck_get_mode(struct regulator_dev *rdev)
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun 	int ret;
112*4882a593Smuzhiyun 	unsigned int regval;
113*4882a593Smuzhiyun 	enum lp8755_bucks id = rdev_get_id(rdev);
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	ret = regmap_read(rdev->regmap, 0x06, &regval);
116*4882a593Smuzhiyun 	if (ret < 0)
117*4882a593Smuzhiyun 		goto err_i2c;
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun 	/* mode fast means forced pwm mode */
120*4882a593Smuzhiyun 	if (regval & (0x01 << id))
121*4882a593Smuzhiyun 		return REGULATOR_MODE_FAST;
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	ret = regmap_read(rdev->regmap, 0x08 + id, &regval);
124*4882a593Smuzhiyun 	if (ret < 0)
125*4882a593Smuzhiyun 		goto err_i2c;
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 	/* mode idle means automatic pwm/pfm/lppfm mode */
128*4882a593Smuzhiyun 	if (regval & 0x20)
129*4882a593Smuzhiyun 		return REGULATOR_MODE_IDLE;
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	/* mode normal means automatic pwm/pfm mode */
132*4882a593Smuzhiyun 	return REGULATOR_MODE_NORMAL;
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun err_i2c:
135*4882a593Smuzhiyun 	dev_err(&rdev->dev, "i2c access error %s\n", __func__);
136*4882a593Smuzhiyun 	return 0;
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun 
lp8755_buck_set_ramp(struct regulator_dev * rdev,int ramp)139*4882a593Smuzhiyun static int lp8755_buck_set_ramp(struct regulator_dev *rdev, int ramp)
140*4882a593Smuzhiyun {
141*4882a593Smuzhiyun 	int ret;
142*4882a593Smuzhiyun 	unsigned int regval = 0x00;
143*4882a593Smuzhiyun 	enum lp8755_bucks id = rdev_get_id(rdev);
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun 	/* uV/us */
146*4882a593Smuzhiyun 	switch (ramp) {
147*4882a593Smuzhiyun 	case 0 ... 230:
148*4882a593Smuzhiyun 		regval = 0x07;
149*4882a593Smuzhiyun 		break;
150*4882a593Smuzhiyun 	case 231 ... 470:
151*4882a593Smuzhiyun 		regval = 0x06;
152*4882a593Smuzhiyun 		break;
153*4882a593Smuzhiyun 	case 471 ... 940:
154*4882a593Smuzhiyun 		regval = 0x05;
155*4882a593Smuzhiyun 		break;
156*4882a593Smuzhiyun 	case 941 ... 1900:
157*4882a593Smuzhiyun 		regval = 0x04;
158*4882a593Smuzhiyun 		break;
159*4882a593Smuzhiyun 	case 1901 ... 3800:
160*4882a593Smuzhiyun 		regval = 0x03;
161*4882a593Smuzhiyun 		break;
162*4882a593Smuzhiyun 	case 3801 ... 7500:
163*4882a593Smuzhiyun 		regval = 0x02;
164*4882a593Smuzhiyun 		break;
165*4882a593Smuzhiyun 	case 7501 ... 15000:
166*4882a593Smuzhiyun 		regval = 0x01;
167*4882a593Smuzhiyun 		break;
168*4882a593Smuzhiyun 	case 15001 ... 30000:
169*4882a593Smuzhiyun 		regval = 0x00;
170*4882a593Smuzhiyun 		break;
171*4882a593Smuzhiyun 	default:
172*4882a593Smuzhiyun 		dev_err(&rdev->dev,
173*4882a593Smuzhiyun 			"Not supported ramp value %d %s\n", ramp, __func__);
174*4882a593Smuzhiyun 		return -EINVAL;
175*4882a593Smuzhiyun 	}
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun 	ret = regmap_update_bits(rdev->regmap, 0x07 + id, 0x07, regval);
178*4882a593Smuzhiyun 	if (ret < 0)
179*4882a593Smuzhiyun 		goto err_i2c;
180*4882a593Smuzhiyun 	return ret;
181*4882a593Smuzhiyun err_i2c:
182*4882a593Smuzhiyun 	dev_err(&rdev->dev, "i2c access error %s\n", __func__);
183*4882a593Smuzhiyun 	return ret;
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun static const struct regulator_ops lp8755_buck_ops = {
187*4882a593Smuzhiyun 	.map_voltage = regulator_map_voltage_linear,
188*4882a593Smuzhiyun 	.list_voltage = regulator_list_voltage_linear,
189*4882a593Smuzhiyun 	.set_voltage_sel = regulator_set_voltage_sel_regmap,
190*4882a593Smuzhiyun 	.get_voltage_sel = regulator_get_voltage_sel_regmap,
191*4882a593Smuzhiyun 	.enable = regulator_enable_regmap,
192*4882a593Smuzhiyun 	.disable = regulator_disable_regmap,
193*4882a593Smuzhiyun 	.is_enabled = regulator_is_enabled_regmap,
194*4882a593Smuzhiyun 	.enable_time = lp8755_buck_enable_time,
195*4882a593Smuzhiyun 	.set_mode = lp8755_buck_set_mode,
196*4882a593Smuzhiyun 	.get_mode = lp8755_buck_get_mode,
197*4882a593Smuzhiyun 	.set_ramp_delay = lp8755_buck_set_ramp,
198*4882a593Smuzhiyun };
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun #define lp8755_rail(_id) "lp8755_buck"#_id
201*4882a593Smuzhiyun #define lp8755_buck_init(_id)\
202*4882a593Smuzhiyun {\
203*4882a593Smuzhiyun 	.constraints = {\
204*4882a593Smuzhiyun 		.name = lp8755_rail(_id),\
205*4882a593Smuzhiyun 		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,\
206*4882a593Smuzhiyun 		.min_uV = 500000,\
207*4882a593Smuzhiyun 		.max_uV = 1675000,\
208*4882a593Smuzhiyun 	},\
209*4882a593Smuzhiyun }
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun static struct regulator_init_data lp8755_reg_default[LP8755_BUCK_MAX] = {
212*4882a593Smuzhiyun 	[LP8755_BUCK0] = lp8755_buck_init(0),
213*4882a593Smuzhiyun 	[LP8755_BUCK1] = lp8755_buck_init(1),
214*4882a593Smuzhiyun 	[LP8755_BUCK2] = lp8755_buck_init(2),
215*4882a593Smuzhiyun 	[LP8755_BUCK3] = lp8755_buck_init(3),
216*4882a593Smuzhiyun 	[LP8755_BUCK4] = lp8755_buck_init(4),
217*4882a593Smuzhiyun 	[LP8755_BUCK5] = lp8755_buck_init(5),
218*4882a593Smuzhiyun };
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun static const struct lp8755_mphase mphase_buck[MPHASE_CONF_MAX] = {
221*4882a593Smuzhiyun 	{ 3, { LP8755_BUCK0, LP8755_BUCK3, LP8755_BUCK5 } },
222*4882a593Smuzhiyun 	{ 6, { LP8755_BUCK0, LP8755_BUCK1, LP8755_BUCK2, LP8755_BUCK3,
223*4882a593Smuzhiyun 	       LP8755_BUCK4, LP8755_BUCK5 } },
224*4882a593Smuzhiyun 	{ 5, { LP8755_BUCK0, LP8755_BUCK2, LP8755_BUCK3, LP8755_BUCK4,
225*4882a593Smuzhiyun 	       LP8755_BUCK5} },
226*4882a593Smuzhiyun 	{ 4, { LP8755_BUCK0, LP8755_BUCK3, LP8755_BUCK4, LP8755_BUCK5} },
227*4882a593Smuzhiyun 	{ 3, { LP8755_BUCK0, LP8755_BUCK4, LP8755_BUCK5} },
228*4882a593Smuzhiyun 	{ 2, { LP8755_BUCK0, LP8755_BUCK5} },
229*4882a593Smuzhiyun 	{ 1, { LP8755_BUCK0} },
230*4882a593Smuzhiyun 	{ 2, { LP8755_BUCK0, LP8755_BUCK3} },
231*4882a593Smuzhiyun 	{ 4, { LP8755_BUCK0, LP8755_BUCK2, LP8755_BUCK3, LP8755_BUCK5} },
232*4882a593Smuzhiyun };
233*4882a593Smuzhiyun 
lp8755_init_data(struct lp8755_chip * pchip)234*4882a593Smuzhiyun static int lp8755_init_data(struct lp8755_chip *pchip)
235*4882a593Smuzhiyun {
236*4882a593Smuzhiyun 	unsigned int regval;
237*4882a593Smuzhiyun 	int ret, icnt, buck_num;
238*4882a593Smuzhiyun 	struct lp8755_platform_data *pdata = pchip->pdata;
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun 	/* read back  muti-phase configuration */
241*4882a593Smuzhiyun 	ret = regmap_read(pchip->regmap, 0x3D, &regval);
242*4882a593Smuzhiyun 	if (ret < 0)
243*4882a593Smuzhiyun 		goto out_i2c_error;
244*4882a593Smuzhiyun 	pchip->mphase = regval & 0x0F;
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	/* set default data based on multi-phase config */
247*4882a593Smuzhiyun 	for (icnt = 0; icnt < mphase_buck[pchip->mphase].nreg; icnt++) {
248*4882a593Smuzhiyun 		buck_num = mphase_buck[pchip->mphase].buck_num[icnt];
249*4882a593Smuzhiyun 		pdata->buck_data[buck_num] = &lp8755_reg_default[buck_num];
250*4882a593Smuzhiyun 	}
251*4882a593Smuzhiyun 	return ret;
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun out_i2c_error:
254*4882a593Smuzhiyun 	dev_err(pchip->dev, "i2c access error %s\n", __func__);
255*4882a593Smuzhiyun 	return ret;
256*4882a593Smuzhiyun }
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun #define lp8755_buck_desc(_id)\
259*4882a593Smuzhiyun {\
260*4882a593Smuzhiyun 	.name = lp8755_rail(_id),\
261*4882a593Smuzhiyun 	.id   = LP8755_BUCK##_id,\
262*4882a593Smuzhiyun 	.ops  = &lp8755_buck_ops,\
263*4882a593Smuzhiyun 	.n_voltages = LP8755_BUCK_LINEAR_OUT_MAX+1,\
264*4882a593Smuzhiyun 	.uV_step = 10000,\
265*4882a593Smuzhiyun 	.min_uV = 500000,\
266*4882a593Smuzhiyun 	.type = REGULATOR_VOLTAGE,\
267*4882a593Smuzhiyun 	.owner = THIS_MODULE,\
268*4882a593Smuzhiyun 	.enable_reg = LP8755_REG_BUCK##_id,\
269*4882a593Smuzhiyun 	.enable_mask = LP8755_BUCK_EN_M,\
270*4882a593Smuzhiyun 	.vsel_reg = LP8755_REG_BUCK##_id,\
271*4882a593Smuzhiyun 	.vsel_mask = LP8755_BUCK_VOUT_M,\
272*4882a593Smuzhiyun }
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun static const struct regulator_desc lp8755_regulators[] = {
275*4882a593Smuzhiyun 	lp8755_buck_desc(0),
276*4882a593Smuzhiyun 	lp8755_buck_desc(1),
277*4882a593Smuzhiyun 	lp8755_buck_desc(2),
278*4882a593Smuzhiyun 	lp8755_buck_desc(3),
279*4882a593Smuzhiyun 	lp8755_buck_desc(4),
280*4882a593Smuzhiyun 	lp8755_buck_desc(5),
281*4882a593Smuzhiyun };
282*4882a593Smuzhiyun 
lp8755_regulator_init(struct lp8755_chip * pchip)283*4882a593Smuzhiyun static int lp8755_regulator_init(struct lp8755_chip *pchip)
284*4882a593Smuzhiyun {
285*4882a593Smuzhiyun 	int ret, icnt, buck_num;
286*4882a593Smuzhiyun 	struct lp8755_platform_data *pdata = pchip->pdata;
287*4882a593Smuzhiyun 	struct regulator_config rconfig = { };
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun 	rconfig.regmap = pchip->regmap;
290*4882a593Smuzhiyun 	rconfig.dev = pchip->dev;
291*4882a593Smuzhiyun 	rconfig.driver_data = pchip;
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun 	for (icnt = 0; icnt < mphase_buck[pchip->mphase].nreg; icnt++) {
294*4882a593Smuzhiyun 		buck_num = mphase_buck[pchip->mphase].buck_num[icnt];
295*4882a593Smuzhiyun 		rconfig.init_data = pdata->buck_data[buck_num];
296*4882a593Smuzhiyun 		rconfig.of_node = pchip->dev->of_node;
297*4882a593Smuzhiyun 		pchip->rdev[buck_num] =
298*4882a593Smuzhiyun 		    devm_regulator_register(pchip->dev,
299*4882a593Smuzhiyun 				    &lp8755_regulators[buck_num], &rconfig);
300*4882a593Smuzhiyun 		if (IS_ERR(pchip->rdev[buck_num])) {
301*4882a593Smuzhiyun 			ret = PTR_ERR(pchip->rdev[buck_num]);
302*4882a593Smuzhiyun 			pchip->rdev[buck_num] = NULL;
303*4882a593Smuzhiyun 			dev_err(pchip->dev, "regulator init failed: buck %d\n",
304*4882a593Smuzhiyun 				buck_num);
305*4882a593Smuzhiyun 			return ret;
306*4882a593Smuzhiyun 		}
307*4882a593Smuzhiyun 	}
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun 	return 0;
310*4882a593Smuzhiyun }
311*4882a593Smuzhiyun 
lp8755_irq_handler(int irq,void * data)312*4882a593Smuzhiyun static irqreturn_t lp8755_irq_handler(int irq, void *data)
313*4882a593Smuzhiyun {
314*4882a593Smuzhiyun 	int ret, icnt;
315*4882a593Smuzhiyun 	unsigned int flag0, flag1;
316*4882a593Smuzhiyun 	struct lp8755_chip *pchip = data;
317*4882a593Smuzhiyun 
318*4882a593Smuzhiyun 	/* read flag0 register */
319*4882a593Smuzhiyun 	ret = regmap_read(pchip->regmap, 0x0D, &flag0);
320*4882a593Smuzhiyun 	if (ret < 0)
321*4882a593Smuzhiyun 		goto err_i2c;
322*4882a593Smuzhiyun 	/* clear flag register to pull up int. pin */
323*4882a593Smuzhiyun 	ret = regmap_write(pchip->regmap, 0x0D, 0x00);
324*4882a593Smuzhiyun 	if (ret < 0)
325*4882a593Smuzhiyun 		goto err_i2c;
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun 	/* sent power fault detection event to specific regulator */
328*4882a593Smuzhiyun 	for (icnt = 0; icnt < LP8755_BUCK_MAX; icnt++)
329*4882a593Smuzhiyun 		if ((flag0 & (0x4 << icnt))
330*4882a593Smuzhiyun 		    && (pchip->irqmask & (0x04 << icnt))
331*4882a593Smuzhiyun 		    && (pchip->rdev[icnt] != NULL)) {
332*4882a593Smuzhiyun 			regulator_notifier_call_chain(pchip->rdev[icnt],
333*4882a593Smuzhiyun 						      LP8755_EVENT_PWR_FAULT,
334*4882a593Smuzhiyun 						      NULL);
335*4882a593Smuzhiyun 		}
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun 	/* read flag1 register */
338*4882a593Smuzhiyun 	ret = regmap_read(pchip->regmap, 0x0E, &flag1);
339*4882a593Smuzhiyun 	if (ret < 0)
340*4882a593Smuzhiyun 		goto err_i2c;
341*4882a593Smuzhiyun 	/* clear flag register to pull up int. pin */
342*4882a593Smuzhiyun 	ret = regmap_write(pchip->regmap, 0x0E, 0x00);
343*4882a593Smuzhiyun 	if (ret < 0)
344*4882a593Smuzhiyun 		goto err_i2c;
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun 	/* send OCP event to all regulator devices */
347*4882a593Smuzhiyun 	if ((flag1 & 0x01) && (pchip->irqmask & 0x01))
348*4882a593Smuzhiyun 		for (icnt = 0; icnt < LP8755_BUCK_MAX; icnt++)
349*4882a593Smuzhiyun 			if (pchip->rdev[icnt] != NULL) {
350*4882a593Smuzhiyun 				regulator_notifier_call_chain(pchip->rdev[icnt],
351*4882a593Smuzhiyun 							      LP8755_EVENT_OCP,
352*4882a593Smuzhiyun 							      NULL);
353*4882a593Smuzhiyun 			}
354*4882a593Smuzhiyun 
355*4882a593Smuzhiyun 	/* send OVP event to all regulator devices */
356*4882a593Smuzhiyun 	if ((flag1 & 0x02) && (pchip->irqmask & 0x02))
357*4882a593Smuzhiyun 		for (icnt = 0; icnt < LP8755_BUCK_MAX; icnt++)
358*4882a593Smuzhiyun 			if (pchip->rdev[icnt] != NULL) {
359*4882a593Smuzhiyun 				regulator_notifier_call_chain(pchip->rdev[icnt],
360*4882a593Smuzhiyun 							      LP8755_EVENT_OVP,
361*4882a593Smuzhiyun 							      NULL);
362*4882a593Smuzhiyun 			}
363*4882a593Smuzhiyun 	return IRQ_HANDLED;
364*4882a593Smuzhiyun 
365*4882a593Smuzhiyun err_i2c:
366*4882a593Smuzhiyun 	dev_err(pchip->dev, "i2c access error %s\n", __func__);
367*4882a593Smuzhiyun 	return IRQ_NONE;
368*4882a593Smuzhiyun }
369*4882a593Smuzhiyun 
lp8755_int_config(struct lp8755_chip * pchip)370*4882a593Smuzhiyun static int lp8755_int_config(struct lp8755_chip *pchip)
371*4882a593Smuzhiyun {
372*4882a593Smuzhiyun 	int ret;
373*4882a593Smuzhiyun 	unsigned int regval;
374*4882a593Smuzhiyun 
375*4882a593Smuzhiyun 	if (pchip->irq == 0) {
376*4882a593Smuzhiyun 		dev_warn(pchip->dev, "not use interrupt : %s\n", __func__);
377*4882a593Smuzhiyun 		return 0;
378*4882a593Smuzhiyun 	}
379*4882a593Smuzhiyun 
380*4882a593Smuzhiyun 	ret = regmap_read(pchip->regmap, 0x0F, &regval);
381*4882a593Smuzhiyun 	if (ret < 0) {
382*4882a593Smuzhiyun 		dev_err(pchip->dev, "i2c access error %s\n", __func__);
383*4882a593Smuzhiyun 		return ret;
384*4882a593Smuzhiyun 	}
385*4882a593Smuzhiyun 
386*4882a593Smuzhiyun 	pchip->irqmask = regval;
387*4882a593Smuzhiyun 	return devm_request_threaded_irq(pchip->dev, pchip->irq, NULL,
388*4882a593Smuzhiyun 					 lp8755_irq_handler,
389*4882a593Smuzhiyun 					 IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
390*4882a593Smuzhiyun 					 "lp8755-irq", pchip);
391*4882a593Smuzhiyun }
392*4882a593Smuzhiyun 
393*4882a593Smuzhiyun static const struct regmap_config lp8755_regmap = {
394*4882a593Smuzhiyun 	.reg_bits = 8,
395*4882a593Smuzhiyun 	.val_bits = 8,
396*4882a593Smuzhiyun 	.max_register = LP8755_REG_MAX,
397*4882a593Smuzhiyun };
398*4882a593Smuzhiyun 
lp8755_probe(struct i2c_client * client,const struct i2c_device_id * id)399*4882a593Smuzhiyun static int lp8755_probe(struct i2c_client *client,
400*4882a593Smuzhiyun 			const struct i2c_device_id *id)
401*4882a593Smuzhiyun {
402*4882a593Smuzhiyun 	int ret, icnt;
403*4882a593Smuzhiyun 	struct lp8755_chip *pchip;
404*4882a593Smuzhiyun 	struct lp8755_platform_data *pdata = dev_get_platdata(&client->dev);
405*4882a593Smuzhiyun 
406*4882a593Smuzhiyun 	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
407*4882a593Smuzhiyun 		dev_err(&client->dev, "i2c functionality check fail.\n");
408*4882a593Smuzhiyun 		return -EOPNOTSUPP;
409*4882a593Smuzhiyun 	}
410*4882a593Smuzhiyun 
411*4882a593Smuzhiyun 	pchip = devm_kzalloc(&client->dev,
412*4882a593Smuzhiyun 			     sizeof(struct lp8755_chip), GFP_KERNEL);
413*4882a593Smuzhiyun 	if (!pchip)
414*4882a593Smuzhiyun 		return -ENOMEM;
415*4882a593Smuzhiyun 
416*4882a593Smuzhiyun 	pchip->dev = &client->dev;
417*4882a593Smuzhiyun 	pchip->regmap = devm_regmap_init_i2c(client, &lp8755_regmap);
418*4882a593Smuzhiyun 	if (IS_ERR(pchip->regmap)) {
419*4882a593Smuzhiyun 		ret = PTR_ERR(pchip->regmap);
420*4882a593Smuzhiyun 		dev_err(&client->dev, "fail to allocate regmap %d\n", ret);
421*4882a593Smuzhiyun 		return ret;
422*4882a593Smuzhiyun 	}
423*4882a593Smuzhiyun 	i2c_set_clientdata(client, pchip);
424*4882a593Smuzhiyun 
425*4882a593Smuzhiyun 	if (pdata != NULL) {
426*4882a593Smuzhiyun 		pchip->pdata = pdata;
427*4882a593Smuzhiyun 		pchip->mphase = pdata->mphase;
428*4882a593Smuzhiyun 	} else {
429*4882a593Smuzhiyun 		pchip->pdata = devm_kzalloc(pchip->dev,
430*4882a593Smuzhiyun 					    sizeof(struct lp8755_platform_data),
431*4882a593Smuzhiyun 					    GFP_KERNEL);
432*4882a593Smuzhiyun 		if (!pchip->pdata)
433*4882a593Smuzhiyun 			return -ENOMEM;
434*4882a593Smuzhiyun 		ret = lp8755_init_data(pchip);
435*4882a593Smuzhiyun 		if (ret < 0) {
436*4882a593Smuzhiyun 			dev_err(&client->dev, "fail to initialize chip\n");
437*4882a593Smuzhiyun 			return ret;
438*4882a593Smuzhiyun 		}
439*4882a593Smuzhiyun 	}
440*4882a593Smuzhiyun 
441*4882a593Smuzhiyun 	ret = lp8755_regulator_init(pchip);
442*4882a593Smuzhiyun 	if (ret < 0) {
443*4882a593Smuzhiyun 		dev_err(&client->dev, "fail to initialize regulators\n");
444*4882a593Smuzhiyun 		goto err;
445*4882a593Smuzhiyun 	}
446*4882a593Smuzhiyun 
447*4882a593Smuzhiyun 	pchip->irq = client->irq;
448*4882a593Smuzhiyun 	ret = lp8755_int_config(pchip);
449*4882a593Smuzhiyun 	if (ret < 0) {
450*4882a593Smuzhiyun 		dev_err(&client->dev, "fail to irq config\n");
451*4882a593Smuzhiyun 		goto err;
452*4882a593Smuzhiyun 	}
453*4882a593Smuzhiyun 
454*4882a593Smuzhiyun 	return ret;
455*4882a593Smuzhiyun 
456*4882a593Smuzhiyun err:
457*4882a593Smuzhiyun 	/* output disable */
458*4882a593Smuzhiyun 	for (icnt = 0; icnt < LP8755_BUCK_MAX; icnt++)
459*4882a593Smuzhiyun 		regmap_write(pchip->regmap, icnt, 0x00);
460*4882a593Smuzhiyun 
461*4882a593Smuzhiyun 	return ret;
462*4882a593Smuzhiyun }
463*4882a593Smuzhiyun 
lp8755_remove(struct i2c_client * client)464*4882a593Smuzhiyun static int lp8755_remove(struct i2c_client *client)
465*4882a593Smuzhiyun {
466*4882a593Smuzhiyun 	int icnt;
467*4882a593Smuzhiyun 	struct lp8755_chip *pchip = i2c_get_clientdata(client);
468*4882a593Smuzhiyun 
469*4882a593Smuzhiyun 	for (icnt = 0; icnt < LP8755_BUCK_MAX; icnt++)
470*4882a593Smuzhiyun 		regmap_write(pchip->regmap, icnt, 0x00);
471*4882a593Smuzhiyun 
472*4882a593Smuzhiyun 	return 0;
473*4882a593Smuzhiyun }
474*4882a593Smuzhiyun 
475*4882a593Smuzhiyun static const struct i2c_device_id lp8755_id[] = {
476*4882a593Smuzhiyun 	{LP8755_NAME, 0},
477*4882a593Smuzhiyun 	{}
478*4882a593Smuzhiyun };
479*4882a593Smuzhiyun 
480*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, lp8755_id);
481*4882a593Smuzhiyun 
482*4882a593Smuzhiyun static struct i2c_driver lp8755_i2c_driver = {
483*4882a593Smuzhiyun 	.driver = {
484*4882a593Smuzhiyun 		   .name = LP8755_NAME,
485*4882a593Smuzhiyun 		   },
486*4882a593Smuzhiyun 	.probe = lp8755_probe,
487*4882a593Smuzhiyun 	.remove = lp8755_remove,
488*4882a593Smuzhiyun 	.id_table = lp8755_id,
489*4882a593Smuzhiyun };
490*4882a593Smuzhiyun 
lp8755_init(void)491*4882a593Smuzhiyun static int __init lp8755_init(void)
492*4882a593Smuzhiyun {
493*4882a593Smuzhiyun 	return i2c_add_driver(&lp8755_i2c_driver);
494*4882a593Smuzhiyun }
495*4882a593Smuzhiyun 
496*4882a593Smuzhiyun subsys_initcall(lp8755_init);
497*4882a593Smuzhiyun 
lp8755_exit(void)498*4882a593Smuzhiyun static void __exit lp8755_exit(void)
499*4882a593Smuzhiyun {
500*4882a593Smuzhiyun 	i2c_del_driver(&lp8755_i2c_driver);
501*4882a593Smuzhiyun }
502*4882a593Smuzhiyun 
503*4882a593Smuzhiyun module_exit(lp8755_exit);
504*4882a593Smuzhiyun 
505*4882a593Smuzhiyun MODULE_DESCRIPTION("Texas Instruments lp8755 driver");
506*4882a593Smuzhiyun MODULE_AUTHOR("Daniel Jeong <daniel.jeong@ti.com>");
507*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
508