1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * LP8752 High Performance Power Management Unit : System Interface Driver
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Author: zhangqing <zhangqing@rock-chips.com>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify
7*4882a593Smuzhiyun * it under the terms of the GNU General Public License version 2 as
8*4882a593Smuzhiyun * published by the Free Software Foundation.
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/slab.h>
14*4882a593Smuzhiyun #include <linux/i2c.h>
15*4882a593Smuzhiyun #include <linux/err.h>
16*4882a593Smuzhiyun #include <linux/irq.h>
17*4882a593Smuzhiyun #include <linux/interrupt.h>
18*4882a593Smuzhiyun #include <linux/gpio.h>
19*4882a593Smuzhiyun #include <linux/regmap.h>
20*4882a593Smuzhiyun #include <linux/uaccess.h>
21*4882a593Smuzhiyun #include <linux/regulator/driver.h>
22*4882a593Smuzhiyun #include <linux/regulator/of_regulator.h>
23*4882a593Smuzhiyun #include <linux/regulator/machine.h>
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #define LP8752_CTRL_BUCK0 0x02
26*4882a593Smuzhiyun #define LP8752_CTRL_BUCK1 0x04
27*4882a593Smuzhiyun #define LP8752_CTRL_BUCK2 0x06
28*4882a593Smuzhiyun #define LP8752_CTRL_BUCK3 0x08
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #define LP8752_VOUT_BUCK0 0x0a
31*4882a593Smuzhiyun #define LP8752_VOUT_BUCK1 0x0c
32*4882a593Smuzhiyun #define LP8752_VOUT_BUCK2 0x0e
33*4882a593Smuzhiyun #define LP8752_VOUT_BUCK3 0x10
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #define LP8752_BUCK_VSEL_MASK 0xff
36*4882a593Smuzhiyun #define LP8752_REG_MAX 0x2f
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun enum lp8752_bucks {
39*4882a593Smuzhiyun LP8752_BUCK0 = 0,
40*4882a593Smuzhiyun LP8752_BUCK1,
41*4882a593Smuzhiyun LP8752_BUCK2,
42*4882a593Smuzhiyun LP8752_BUCK3,
43*4882a593Smuzhiyun LP8752_BUCK_MAX,
44*4882a593Smuzhiyun };
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun static const struct linear_range lp8752_buck_voltage_ranges[] = {
47*4882a593Smuzhiyun REGULATOR_LINEAR_RANGE(500000, 0, 23, 10000),
48*4882a593Smuzhiyun REGULATOR_LINEAR_RANGE(735000, 24, 157, 5000),
49*4882a593Smuzhiyun REGULATOR_LINEAR_RANGE(1420000, 158, 255, 20000),
50*4882a593Smuzhiyun };
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun struct lp8752_platform_data {
53*4882a593Smuzhiyun int nphase;
54*4882a593Smuzhiyun struct device_node *of_node[LP8752_BUCK_MAX];
55*4882a593Smuzhiyun struct regulator_desc desc;
56*4882a593Smuzhiyun struct regulator_init_data *buck_data[LP8752_BUCK_MAX];
57*4882a593Smuzhiyun };
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun struct lp8752_mphase {
60*4882a593Smuzhiyun int nreg;
61*4882a593Smuzhiyun int buck_id[LP8752_BUCK_MAX];
62*4882a593Smuzhiyun };
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun struct lp8752_chip {
65*4882a593Smuzhiyun int nphase;
66*4882a593Smuzhiyun struct device *dev;
67*4882a593Smuzhiyun struct regmap *regmap;
68*4882a593Smuzhiyun struct lp8752_platform_data *pdata;
69*4882a593Smuzhiyun struct regulator_dev *rdev[LP8752_BUCK_MAX];
70*4882a593Smuzhiyun };
71*4882a593Smuzhiyun
lp8752_buck_set_mode(struct regulator_dev * rdev,unsigned int mode)72*4882a593Smuzhiyun static int lp8752_buck_set_mode(struct regulator_dev *rdev, unsigned int mode)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun struct lp8752_chip *pchip = rdev_get_drvdata(rdev);
75*4882a593Smuzhiyun u8 msk = BIT(1);
76*4882a593Smuzhiyun int ret;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun switch (mode) {
79*4882a593Smuzhiyun case REGULATOR_MODE_FAST:
80*4882a593Smuzhiyun /* forced pwm mode */
81*4882a593Smuzhiyun ret = regmap_update_bits(pchip->regmap,
82*4882a593Smuzhiyun rdev->desc->enable_reg,
83*4882a593Smuzhiyun msk, 0x1);
84*4882a593Smuzhiyun break;
85*4882a593Smuzhiyun case REGULATOR_MODE_NORMAL:
86*4882a593Smuzhiyun /* automatic pwm/pfm mode */
87*4882a593Smuzhiyun ret = regmap_update_bits(pchip->regmap,
88*4882a593Smuzhiyun rdev->desc->enable_reg,
89*4882a593Smuzhiyun msk, 0x0);
90*4882a593Smuzhiyun break;
91*4882a593Smuzhiyun default:
92*4882a593Smuzhiyun dev_err(pchip->dev, "error:lp8752 only support auto and pwm mode\n");
93*4882a593Smuzhiyun ret = -EINVAL;
94*4882a593Smuzhiyun break;
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun return ret;
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun
lp8752_buck_get_mode(struct regulator_dev * rdev)100*4882a593Smuzhiyun static unsigned int lp8752_buck_get_mode(struct regulator_dev *rdev)
101*4882a593Smuzhiyun {
102*4882a593Smuzhiyun struct lp8752_chip *pchip = rdev_get_drvdata(rdev);
103*4882a593Smuzhiyun int ret;
104*4882a593Smuzhiyun unsigned int reg;
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun ret = regmap_read(pchip->regmap, rdev->desc->enable_reg, ®);
107*4882a593Smuzhiyun if (ret < 0) {
108*4882a593Smuzhiyun dev_err(pchip->dev, "i2c acceess error %s\n", __func__);
109*4882a593Smuzhiyun return ret;
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun return (reg & BIT(1)) ? REGULATOR_MODE_FAST : REGULATOR_MODE_NORMAL;
113*4882a593Smuzhiyun }
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun static struct regulator_ops lp8752_buck_ops = {
116*4882a593Smuzhiyun .map_voltage = regulator_map_voltage_linear_range,
117*4882a593Smuzhiyun .list_voltage = regulator_list_voltage_linear_range,
118*4882a593Smuzhiyun .set_voltage_sel = regulator_set_voltage_sel_regmap,
119*4882a593Smuzhiyun .get_voltage_sel = regulator_get_voltage_sel_regmap,
120*4882a593Smuzhiyun .set_voltage_time_sel = regulator_set_voltage_time_sel,
121*4882a593Smuzhiyun .enable = regulator_enable_regmap,
122*4882a593Smuzhiyun .disable = regulator_disable_regmap,
123*4882a593Smuzhiyun .is_enabled = regulator_is_enabled_regmap,
124*4882a593Smuzhiyun .set_mode = lp8752_buck_set_mode,
125*4882a593Smuzhiyun .get_mode = lp8752_buck_get_mode,
126*4882a593Smuzhiyun };
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun #define lp8752_rail(_id) "lp8752_buck"#_id
129*4882a593Smuzhiyun #define vin(_id) "vin"#_id
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun static const struct lp8752_mphase mphase_buck[] = {
132*4882a593Smuzhiyun { 1, { LP8752_BUCK0} },
133*4882a593Smuzhiyun { 2, { LP8752_BUCK0, LP8752_BUCK3 } },
134*4882a593Smuzhiyun { 3, { LP8752_BUCK0, LP8752_BUCK2, LP8752_BUCK3 } },
135*4882a593Smuzhiyun { 4, { LP8752_BUCK0, LP8752_BUCK1, LP8752_BUCK2, LP8752_BUCK3 } },
136*4882a593Smuzhiyun };
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun static struct of_regulator_match lp8752_reg_matches[] = {
139*4882a593Smuzhiyun { .name = "lp8752_buck0", .driver_data = (void *)0 },
140*4882a593Smuzhiyun { .name = "lp8752_buck1", .driver_data = (void *)1 },
141*4882a593Smuzhiyun { .name = "lp8752_buck2", .driver_data = (void *)2 },
142*4882a593Smuzhiyun { .name = "lp8752_buck3", .driver_data = (void *)3 },
143*4882a593Smuzhiyun };
144*4882a593Smuzhiyun
lp8752_init_data(struct lp8752_chip * pchip)145*4882a593Smuzhiyun static int lp8752_init_data(struct lp8752_chip *pchip)
146*4882a593Smuzhiyun {
147*4882a593Smuzhiyun int icnt, buck_id, count;
148*4882a593Smuzhiyun struct lp8752_platform_data *pdata = pchip->pdata;
149*4882a593Smuzhiyun struct device_node *regs, *lp8752_np;
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun lp8752_np = of_node_get(pchip->dev->of_node);
152*4882a593Smuzhiyun if (!lp8752_np) {
153*4882a593Smuzhiyun dev_err(pchip->dev, "Failed to find device node\n");
154*4882a593Smuzhiyun return -ENODEV;
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun regs = of_find_node_by_name(lp8752_np, "regulators");
158*4882a593Smuzhiyun if (!regs)
159*4882a593Smuzhiyun return -ENODEV;
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun count = of_regulator_match(pchip->dev, regs, lp8752_reg_matches,
162*4882a593Smuzhiyun LP8752_BUCK_MAX);
163*4882a593Smuzhiyun of_node_put(regs);
164*4882a593Smuzhiyun if ((count <= 0) || (count > LP8752_BUCK_MAX))
165*4882a593Smuzhiyun return -ENODEV;
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun pchip->nphase = (count - 1) & 0xf;
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun /* set default data based on multi-phase config */
170*4882a593Smuzhiyun for (icnt = 0; icnt < mphase_buck[pchip->nphase].nreg; icnt++) {
171*4882a593Smuzhiyun buck_id = mphase_buck[pchip->nphase].buck_id[icnt];
172*4882a593Smuzhiyun pdata->buck_data[buck_id] =
173*4882a593Smuzhiyun lp8752_reg_matches[buck_id].init_data;
174*4882a593Smuzhiyun pdata->of_node[buck_id] = lp8752_reg_matches[buck_id].of_node;
175*4882a593Smuzhiyun }
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun return 0;
178*4882a593Smuzhiyun }
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun #define lp8752_buck_desc(_id)\
181*4882a593Smuzhiyun {\
182*4882a593Smuzhiyun .name = lp8752_rail(_id),\
183*4882a593Smuzhiyun .id = LP8752_BUCK##_id,\
184*4882a593Smuzhiyun .supply_name = vin(_id),\
185*4882a593Smuzhiyun .ops = &lp8752_buck_ops,\
186*4882a593Smuzhiyun .n_voltages = LP8752_BUCK_VSEL_MASK + 1,\
187*4882a593Smuzhiyun .linear_ranges = lp8752_buck_voltage_ranges,\
188*4882a593Smuzhiyun .n_linear_ranges = ARRAY_SIZE(lp8752_buck_voltage_ranges),\
189*4882a593Smuzhiyun .type = REGULATOR_VOLTAGE,\
190*4882a593Smuzhiyun .enable_reg = LP8752_CTRL_BUCK##_id,\
191*4882a593Smuzhiyun .enable_mask = BIT(7),\
192*4882a593Smuzhiyun .vsel_reg = LP8752_VOUT_BUCK##_id,\
193*4882a593Smuzhiyun .vsel_mask = LP8752_BUCK_VSEL_MASK,\
194*4882a593Smuzhiyun .enable_time = 400,\
195*4882a593Smuzhiyun .owner = THIS_MODULE,\
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun static struct regulator_desc lp8752_reg_desc[] = {
199*4882a593Smuzhiyun lp8752_buck_desc(0),
200*4882a593Smuzhiyun lp8752_buck_desc(1),
201*4882a593Smuzhiyun lp8752_buck_desc(2),
202*4882a593Smuzhiyun lp8752_buck_desc(3),
203*4882a593Smuzhiyun };
204*4882a593Smuzhiyun
lp8752_regulator_init(struct lp8752_chip * pchip)205*4882a593Smuzhiyun static int lp8752_regulator_init(struct lp8752_chip *pchip)
206*4882a593Smuzhiyun {
207*4882a593Smuzhiyun int ret, icnt, buck_id;
208*4882a593Smuzhiyun struct lp8752_platform_data *pdata = pchip->pdata;
209*4882a593Smuzhiyun struct regulator_config rconfig = { };
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun rconfig.regmap = pchip->regmap;
212*4882a593Smuzhiyun rconfig.dev = pchip->dev;
213*4882a593Smuzhiyun rconfig.driver_data = pchip;
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun for (icnt = 0; icnt < mphase_buck[pchip->nphase].nreg; icnt++) {
216*4882a593Smuzhiyun buck_id = mphase_buck[pchip->nphase].buck_id[icnt];
217*4882a593Smuzhiyun rconfig.init_data = pdata->buck_data[buck_id];
218*4882a593Smuzhiyun rconfig.of_node = pdata->of_node[buck_id];
219*4882a593Smuzhiyun pchip->rdev[buck_id] =
220*4882a593Smuzhiyun devm_regulator_register(pchip->dev,
221*4882a593Smuzhiyun &lp8752_reg_desc[buck_id],
222*4882a593Smuzhiyun &rconfig);
223*4882a593Smuzhiyun if (IS_ERR(pchip->rdev[buck_id])) {
224*4882a593Smuzhiyun ret = PTR_ERR(pchip->rdev[buck_id]);
225*4882a593Smuzhiyun pchip->rdev[buck_id] = NULL;
226*4882a593Smuzhiyun dev_err(pchip->dev, "regulator init failed: buck %d\n",
227*4882a593Smuzhiyun buck_id);
228*4882a593Smuzhiyun return ret;
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun }
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun return 0;
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun static const struct regmap_config lp8752_regmap = {
236*4882a593Smuzhiyun .reg_bits = 8,
237*4882a593Smuzhiyun .val_bits = 8,
238*4882a593Smuzhiyun .max_register = LP8752_REG_MAX,
239*4882a593Smuzhiyun };
240*4882a593Smuzhiyun
lp8752_probe(struct i2c_client * client,const struct i2c_device_id * id)241*4882a593Smuzhiyun static int lp8752_probe(struct i2c_client *client,
242*4882a593Smuzhiyun const struct i2c_device_id *id)
243*4882a593Smuzhiyun {
244*4882a593Smuzhiyun int ret;
245*4882a593Smuzhiyun struct lp8752_chip *pchip;
246*4882a593Smuzhiyun struct lp8752_platform_data *pdata = dev_get_platdata(&client->dev);
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun pchip = devm_kzalloc(&client->dev,
249*4882a593Smuzhiyun sizeof(struct lp8752_chip), GFP_KERNEL);
250*4882a593Smuzhiyun if (!pchip)
251*4882a593Smuzhiyun return -ENOMEM;
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun pchip->dev = &client->dev;
254*4882a593Smuzhiyun pchip->regmap = devm_regmap_init_i2c(client, &lp8752_regmap);
255*4882a593Smuzhiyun if (IS_ERR(pchip->regmap)) {
256*4882a593Smuzhiyun ret = PTR_ERR(pchip->regmap);
257*4882a593Smuzhiyun dev_err(&client->dev, "fail to allocate regmap %d\n", ret);
258*4882a593Smuzhiyun return ret;
259*4882a593Smuzhiyun }
260*4882a593Smuzhiyun i2c_set_clientdata(client, pchip);
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun ret = regmap_update_bits(pchip->regmap,
263*4882a593Smuzhiyun LP8752_CTRL_BUCK0,
264*4882a593Smuzhiyun (1 << 0), 0);
265*4882a593Smuzhiyun ret = regmap_update_bits(pchip->regmap,
266*4882a593Smuzhiyun LP8752_CTRL_BUCK2,
267*4882a593Smuzhiyun (1 << 0), 0);
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun if (!pdata) {
270*4882a593Smuzhiyun pchip->pdata = devm_kzalloc(pchip->dev,
271*4882a593Smuzhiyun sizeof(struct lp8752_platform_data),
272*4882a593Smuzhiyun GFP_KERNEL);
273*4882a593Smuzhiyun if (!pchip->pdata)
274*4882a593Smuzhiyun return -ENOMEM;
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun ret = lp8752_init_data(pchip);
277*4882a593Smuzhiyun if (ret < 0) {
278*4882a593Smuzhiyun dev_err(&client->dev, "fail to initialize chip\n");
279*4882a593Smuzhiyun return ret;
280*4882a593Smuzhiyun }
281*4882a593Smuzhiyun } else {
282*4882a593Smuzhiyun pchip->pdata = pdata;
283*4882a593Smuzhiyun pchip->nphase = pdata->nphase;
284*4882a593Smuzhiyun }
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun lp8752_regulator_init(pchip);
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun return 0;
289*4882a593Smuzhiyun }
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun static const struct of_device_id lp8752_of_match[] = {
292*4882a593Smuzhiyun { .compatible = "ti,lp8752", },
293*4882a593Smuzhiyun {},
294*4882a593Smuzhiyun };
295*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, lp8752_of_match);
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun static const struct i2c_device_id lp8752_id[] = {
298*4882a593Smuzhiyun {"lp8752", 0},
299*4882a593Smuzhiyun {}
300*4882a593Smuzhiyun };
301*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, lp8752_id);
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun static struct i2c_driver lp8752_i2c_driver = {
304*4882a593Smuzhiyun .probe = lp8752_probe,
305*4882a593Smuzhiyun .id_table = lp8752_id,
306*4882a593Smuzhiyun .driver = {
307*4882a593Smuzhiyun .name = "lp8752",
308*4882a593Smuzhiyun .of_match_table = of_match_ptr(lp8752_of_match),
309*4882a593Smuzhiyun },
310*4882a593Smuzhiyun };
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun module_i2c_driver(lp8752_i2c_driver);
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun MODULE_DESCRIPTION("Texas Instruments lp8752 driver");
315*4882a593Smuzhiyun MODULE_AUTHOR("Zhang Qing <zhangqing@rock-chips.com>");
316*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
317