1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // Regulators driver for Dialog Semiconductor DA903x
4*4882a593Smuzhiyun //
5*4882a593Smuzhiyun // Copyright (C) 2006-2008 Marvell International Ltd.
6*4882a593Smuzhiyun // Copyright (C) 2008 Compulab Ltd.
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/kernel.h>
9*4882a593Smuzhiyun #include <linux/init.h>
10*4882a593Smuzhiyun #include <linux/err.h>
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/platform_device.h>
13*4882a593Smuzhiyun #include <linux/regulator/driver.h>
14*4882a593Smuzhiyun #include <linux/regulator/machine.h>
15*4882a593Smuzhiyun #include <linux/mfd/da903x.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun /* DA9030 Registers */
18*4882a593Smuzhiyun #define DA9030_INVAL (-1)
19*4882a593Smuzhiyun #define DA9030_LDO1011 (0x10)
20*4882a593Smuzhiyun #define DA9030_LDO15 (0x11)
21*4882a593Smuzhiyun #define DA9030_LDO1416 (0x12)
22*4882a593Smuzhiyun #define DA9030_LDO1819 (0x13)
23*4882a593Smuzhiyun #define DA9030_LDO17 (0x14)
24*4882a593Smuzhiyun #define DA9030_BUCK2DVM1 (0x15)
25*4882a593Smuzhiyun #define DA9030_BUCK2DVM2 (0x16)
26*4882a593Smuzhiyun #define DA9030_RCTL11 (0x17)
27*4882a593Smuzhiyun #define DA9030_RCTL21 (0x18)
28*4882a593Smuzhiyun #define DA9030_LDO1 (0x90)
29*4882a593Smuzhiyun #define DA9030_LDO23 (0x91)
30*4882a593Smuzhiyun #define DA9030_LDO45 (0x92)
31*4882a593Smuzhiyun #define DA9030_LDO6 (0x93)
32*4882a593Smuzhiyun #define DA9030_LDO78 (0x94)
33*4882a593Smuzhiyun #define DA9030_LDO912 (0x95)
34*4882a593Smuzhiyun #define DA9030_BUCK (0x96)
35*4882a593Smuzhiyun #define DA9030_RCTL12 (0x97)
36*4882a593Smuzhiyun #define DA9030_RCTL22 (0x98)
37*4882a593Smuzhiyun #define DA9030_LDO_UNLOCK (0xa0)
38*4882a593Smuzhiyun #define DA9030_LDO_UNLOCK_MASK (0xe0)
39*4882a593Smuzhiyun #define DA9034_OVER1 (0x10)
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun /* DA9034 Registers */
42*4882a593Smuzhiyun #define DA9034_INVAL (-1)
43*4882a593Smuzhiyun #define DA9034_OVER2 (0x11)
44*4882a593Smuzhiyun #define DA9034_OVER3 (0x12)
45*4882a593Smuzhiyun #define DA9034_LDO643 (0x13)
46*4882a593Smuzhiyun #define DA9034_LDO987 (0x14)
47*4882a593Smuzhiyun #define DA9034_LDO1110 (0x15)
48*4882a593Smuzhiyun #define DA9034_LDO1312 (0x16)
49*4882a593Smuzhiyun #define DA9034_LDO1514 (0x17)
50*4882a593Smuzhiyun #define DA9034_VCC1 (0x20)
51*4882a593Smuzhiyun #define DA9034_ADTV1 (0x23)
52*4882a593Smuzhiyun #define DA9034_ADTV2 (0x24)
53*4882a593Smuzhiyun #define DA9034_AVRC (0x25)
54*4882a593Smuzhiyun #define DA9034_CDTV1 (0x26)
55*4882a593Smuzhiyun #define DA9034_CDTV2 (0x27)
56*4882a593Smuzhiyun #define DA9034_CVRC (0x28)
57*4882a593Smuzhiyun #define DA9034_SDTV1 (0x29)
58*4882a593Smuzhiyun #define DA9034_SDTV2 (0x2a)
59*4882a593Smuzhiyun #define DA9034_SVRC (0x2b)
60*4882a593Smuzhiyun #define DA9034_MDTV1 (0x32)
61*4882a593Smuzhiyun #define DA9034_MDTV2 (0x33)
62*4882a593Smuzhiyun #define DA9034_MVRC (0x34)
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun /* DA9035 Registers. DA9034 Registers are comptabile to DA9035. */
65*4882a593Smuzhiyun #define DA9035_OVER3 (0x12)
66*4882a593Smuzhiyun #define DA9035_VCC2 (0x1f)
67*4882a593Smuzhiyun #define DA9035_3DTV1 (0x2c)
68*4882a593Smuzhiyun #define DA9035_3DTV2 (0x2d)
69*4882a593Smuzhiyun #define DA9035_3VRC (0x2e)
70*4882a593Smuzhiyun #define DA9035_AUTOSKIP (0x2f)
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun struct da903x_regulator_info {
73*4882a593Smuzhiyun struct regulator_desc desc;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun int max_uV;
76*4882a593Smuzhiyun int vol_reg;
77*4882a593Smuzhiyun int vol_shift;
78*4882a593Smuzhiyun int vol_nbits;
79*4882a593Smuzhiyun int update_reg;
80*4882a593Smuzhiyun int update_bit;
81*4882a593Smuzhiyun int enable_reg;
82*4882a593Smuzhiyun int enable_bit;
83*4882a593Smuzhiyun };
84*4882a593Smuzhiyun
to_da903x_dev(struct regulator_dev * rdev)85*4882a593Smuzhiyun static inline struct device *to_da903x_dev(struct regulator_dev *rdev)
86*4882a593Smuzhiyun {
87*4882a593Smuzhiyun return rdev_get_dev(rdev)->parent->parent;
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun
check_range(struct da903x_regulator_info * info,int min_uV,int max_uV)90*4882a593Smuzhiyun static inline int check_range(struct da903x_regulator_info *info,
91*4882a593Smuzhiyun int min_uV, int max_uV)
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun if (min_uV < info->desc.min_uV || min_uV > info->max_uV)
94*4882a593Smuzhiyun return -EINVAL;
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun return 0;
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun /* DA9030/DA9034 common operations */
da903x_set_voltage_sel(struct regulator_dev * rdev,unsigned selector)100*4882a593Smuzhiyun static int da903x_set_voltage_sel(struct regulator_dev *rdev, unsigned selector)
101*4882a593Smuzhiyun {
102*4882a593Smuzhiyun struct da903x_regulator_info *info = rdev_get_drvdata(rdev);
103*4882a593Smuzhiyun struct device *da9034_dev = to_da903x_dev(rdev);
104*4882a593Smuzhiyun uint8_t val, mask;
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun if (rdev->desc->n_voltages == 1)
107*4882a593Smuzhiyun return -EINVAL;
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun val = selector << info->vol_shift;
110*4882a593Smuzhiyun mask = ((1 << info->vol_nbits) - 1) << info->vol_shift;
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun return da903x_update(da9034_dev, info->vol_reg, val, mask);
113*4882a593Smuzhiyun }
114*4882a593Smuzhiyun
da903x_get_voltage_sel(struct regulator_dev * rdev)115*4882a593Smuzhiyun static int da903x_get_voltage_sel(struct regulator_dev *rdev)
116*4882a593Smuzhiyun {
117*4882a593Smuzhiyun struct da903x_regulator_info *info = rdev_get_drvdata(rdev);
118*4882a593Smuzhiyun struct device *da9034_dev = to_da903x_dev(rdev);
119*4882a593Smuzhiyun uint8_t val, mask;
120*4882a593Smuzhiyun int ret;
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun if (rdev->desc->n_voltages == 1)
123*4882a593Smuzhiyun return 0;
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun ret = da903x_read(da9034_dev, info->vol_reg, &val);
126*4882a593Smuzhiyun if (ret)
127*4882a593Smuzhiyun return ret;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun mask = ((1 << info->vol_nbits) - 1) << info->vol_shift;
130*4882a593Smuzhiyun val = (val & mask) >> info->vol_shift;
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun return val;
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun
da903x_enable(struct regulator_dev * rdev)135*4882a593Smuzhiyun static int da903x_enable(struct regulator_dev *rdev)
136*4882a593Smuzhiyun {
137*4882a593Smuzhiyun struct da903x_regulator_info *info = rdev_get_drvdata(rdev);
138*4882a593Smuzhiyun struct device *da9034_dev = to_da903x_dev(rdev);
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun return da903x_set_bits(da9034_dev, info->enable_reg,
141*4882a593Smuzhiyun 1 << info->enable_bit);
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun
da903x_disable(struct regulator_dev * rdev)144*4882a593Smuzhiyun static int da903x_disable(struct regulator_dev *rdev)
145*4882a593Smuzhiyun {
146*4882a593Smuzhiyun struct da903x_regulator_info *info = rdev_get_drvdata(rdev);
147*4882a593Smuzhiyun struct device *da9034_dev = to_da903x_dev(rdev);
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun return da903x_clr_bits(da9034_dev, info->enable_reg,
150*4882a593Smuzhiyun 1 << info->enable_bit);
151*4882a593Smuzhiyun }
152*4882a593Smuzhiyun
da903x_is_enabled(struct regulator_dev * rdev)153*4882a593Smuzhiyun static int da903x_is_enabled(struct regulator_dev *rdev)
154*4882a593Smuzhiyun {
155*4882a593Smuzhiyun struct da903x_regulator_info *info = rdev_get_drvdata(rdev);
156*4882a593Smuzhiyun struct device *da9034_dev = to_da903x_dev(rdev);
157*4882a593Smuzhiyun uint8_t reg_val;
158*4882a593Smuzhiyun int ret;
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun ret = da903x_read(da9034_dev, info->enable_reg, ®_val);
161*4882a593Smuzhiyun if (ret)
162*4882a593Smuzhiyun return ret;
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun return !!(reg_val & (1 << info->enable_bit));
165*4882a593Smuzhiyun }
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun /* DA9030 specific operations */
da9030_set_ldo1_15_voltage_sel(struct regulator_dev * rdev,unsigned selector)168*4882a593Smuzhiyun static int da9030_set_ldo1_15_voltage_sel(struct regulator_dev *rdev,
169*4882a593Smuzhiyun unsigned selector)
170*4882a593Smuzhiyun {
171*4882a593Smuzhiyun struct da903x_regulator_info *info = rdev_get_drvdata(rdev);
172*4882a593Smuzhiyun struct device *da903x_dev = to_da903x_dev(rdev);
173*4882a593Smuzhiyun uint8_t val, mask;
174*4882a593Smuzhiyun int ret;
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun val = selector << info->vol_shift;
177*4882a593Smuzhiyun mask = ((1 << info->vol_nbits) - 1) << info->vol_shift;
178*4882a593Smuzhiyun val |= DA9030_LDO_UNLOCK; /* have to set UNLOCK bits */
179*4882a593Smuzhiyun mask |= DA9030_LDO_UNLOCK_MASK;
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun /* write twice */
182*4882a593Smuzhiyun ret = da903x_update(da903x_dev, info->vol_reg, val, mask);
183*4882a593Smuzhiyun if (ret)
184*4882a593Smuzhiyun return ret;
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun return da903x_update(da903x_dev, info->vol_reg, val, mask);
187*4882a593Smuzhiyun }
188*4882a593Smuzhiyun
da9030_map_ldo14_voltage(struct regulator_dev * rdev,int min_uV,int max_uV)189*4882a593Smuzhiyun static int da9030_map_ldo14_voltage(struct regulator_dev *rdev,
190*4882a593Smuzhiyun int min_uV, int max_uV)
191*4882a593Smuzhiyun {
192*4882a593Smuzhiyun struct da903x_regulator_info *info = rdev_get_drvdata(rdev);
193*4882a593Smuzhiyun int thresh, sel;
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun if (check_range(info, min_uV, max_uV)) {
196*4882a593Smuzhiyun pr_err("invalid voltage range (%d, %d) uV\n", min_uV, max_uV);
197*4882a593Smuzhiyun return -EINVAL;
198*4882a593Smuzhiyun }
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun thresh = (info->max_uV + info->desc.min_uV) / 2;
201*4882a593Smuzhiyun if (min_uV < thresh) {
202*4882a593Smuzhiyun sel = DIV_ROUND_UP(thresh - min_uV, info->desc.uV_step);
203*4882a593Smuzhiyun sel |= 0x4;
204*4882a593Smuzhiyun } else {
205*4882a593Smuzhiyun sel = DIV_ROUND_UP(min_uV - thresh, info->desc.uV_step);
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun return sel;
209*4882a593Smuzhiyun }
210*4882a593Smuzhiyun
da9030_list_ldo14_voltage(struct regulator_dev * rdev,unsigned selector)211*4882a593Smuzhiyun static int da9030_list_ldo14_voltage(struct regulator_dev *rdev,
212*4882a593Smuzhiyun unsigned selector)
213*4882a593Smuzhiyun {
214*4882a593Smuzhiyun struct da903x_regulator_info *info = rdev_get_drvdata(rdev);
215*4882a593Smuzhiyun int volt;
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun if (selector & 0x4)
218*4882a593Smuzhiyun volt = rdev->desc->min_uV +
219*4882a593Smuzhiyun rdev->desc->uV_step * (3 - (selector & ~0x4));
220*4882a593Smuzhiyun else
221*4882a593Smuzhiyun volt = (info->max_uV + rdev->desc->min_uV) / 2 +
222*4882a593Smuzhiyun rdev->desc->uV_step * (selector & ~0x4);
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun if (volt > info->max_uV)
225*4882a593Smuzhiyun return -EINVAL;
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun return volt;
228*4882a593Smuzhiyun }
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun /* DA9034 specific operations */
da9034_set_dvc_voltage_sel(struct regulator_dev * rdev,unsigned selector)231*4882a593Smuzhiyun static int da9034_set_dvc_voltage_sel(struct regulator_dev *rdev,
232*4882a593Smuzhiyun unsigned selector)
233*4882a593Smuzhiyun {
234*4882a593Smuzhiyun struct da903x_regulator_info *info = rdev_get_drvdata(rdev);
235*4882a593Smuzhiyun struct device *da9034_dev = to_da903x_dev(rdev);
236*4882a593Smuzhiyun uint8_t val, mask;
237*4882a593Smuzhiyun int ret;
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun val = selector << info->vol_shift;
240*4882a593Smuzhiyun mask = ((1 << info->vol_nbits) - 1) << info->vol_shift;
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun ret = da903x_update(da9034_dev, info->vol_reg, val, mask);
243*4882a593Smuzhiyun if (ret)
244*4882a593Smuzhiyun return ret;
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun ret = da903x_set_bits(da9034_dev, info->update_reg,
247*4882a593Smuzhiyun 1 << info->update_bit);
248*4882a593Smuzhiyun return ret;
249*4882a593Smuzhiyun }
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun static const struct linear_range da9034_ldo12_ranges[] = {
252*4882a593Smuzhiyun REGULATOR_LINEAR_RANGE(1700000, 0, 7, 50000),
253*4882a593Smuzhiyun REGULATOR_LINEAR_RANGE(2700000, 8, 15, 50000),
254*4882a593Smuzhiyun };
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun static const struct regulator_ops da903x_regulator_ldo_ops = {
257*4882a593Smuzhiyun .set_voltage_sel = da903x_set_voltage_sel,
258*4882a593Smuzhiyun .get_voltage_sel = da903x_get_voltage_sel,
259*4882a593Smuzhiyun .list_voltage = regulator_list_voltage_linear,
260*4882a593Smuzhiyun .map_voltage = regulator_map_voltage_linear,
261*4882a593Smuzhiyun .enable = da903x_enable,
262*4882a593Smuzhiyun .disable = da903x_disable,
263*4882a593Smuzhiyun .is_enabled = da903x_is_enabled,
264*4882a593Smuzhiyun };
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun /* NOTE: this is dedicated for the insane DA9030 LDO14 */
267*4882a593Smuzhiyun static const struct regulator_ops da9030_regulator_ldo14_ops = {
268*4882a593Smuzhiyun .set_voltage_sel = da903x_set_voltage_sel,
269*4882a593Smuzhiyun .get_voltage_sel = da903x_get_voltage_sel,
270*4882a593Smuzhiyun .list_voltage = da9030_list_ldo14_voltage,
271*4882a593Smuzhiyun .map_voltage = da9030_map_ldo14_voltage,
272*4882a593Smuzhiyun .enable = da903x_enable,
273*4882a593Smuzhiyun .disable = da903x_disable,
274*4882a593Smuzhiyun .is_enabled = da903x_is_enabled,
275*4882a593Smuzhiyun };
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun /* NOTE: this is dedicated for the DA9030 LDO1 and LDO15 that have locks */
278*4882a593Smuzhiyun static const struct regulator_ops da9030_regulator_ldo1_15_ops = {
279*4882a593Smuzhiyun .set_voltage_sel = da9030_set_ldo1_15_voltage_sel,
280*4882a593Smuzhiyun .get_voltage_sel = da903x_get_voltage_sel,
281*4882a593Smuzhiyun .list_voltage = regulator_list_voltage_linear,
282*4882a593Smuzhiyun .map_voltage = regulator_map_voltage_linear,
283*4882a593Smuzhiyun .enable = da903x_enable,
284*4882a593Smuzhiyun .disable = da903x_disable,
285*4882a593Smuzhiyun .is_enabled = da903x_is_enabled,
286*4882a593Smuzhiyun };
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun static const struct regulator_ops da9034_regulator_dvc_ops = {
289*4882a593Smuzhiyun .set_voltage_sel = da9034_set_dvc_voltage_sel,
290*4882a593Smuzhiyun .get_voltage_sel = da903x_get_voltage_sel,
291*4882a593Smuzhiyun .list_voltage = regulator_list_voltage_linear,
292*4882a593Smuzhiyun .map_voltage = regulator_map_voltage_linear,
293*4882a593Smuzhiyun .enable = da903x_enable,
294*4882a593Smuzhiyun .disable = da903x_disable,
295*4882a593Smuzhiyun .is_enabled = da903x_is_enabled,
296*4882a593Smuzhiyun };
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun /* NOTE: this is dedicated for the insane LDO12 */
299*4882a593Smuzhiyun static const struct regulator_ops da9034_regulator_ldo12_ops = {
300*4882a593Smuzhiyun .set_voltage_sel = da903x_set_voltage_sel,
301*4882a593Smuzhiyun .get_voltage_sel = da903x_get_voltage_sel,
302*4882a593Smuzhiyun .list_voltage = regulator_list_voltage_linear_range,
303*4882a593Smuzhiyun .map_voltage = regulator_map_voltage_linear_range,
304*4882a593Smuzhiyun .enable = da903x_enable,
305*4882a593Smuzhiyun .disable = da903x_disable,
306*4882a593Smuzhiyun .is_enabled = da903x_is_enabled,
307*4882a593Smuzhiyun };
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun #define DA903x_LDO(_pmic, _id, min, max, step, vreg, shift, nbits, ereg, ebit) \
310*4882a593Smuzhiyun { \
311*4882a593Smuzhiyun .desc = { \
312*4882a593Smuzhiyun .name = "LDO" #_id, \
313*4882a593Smuzhiyun .ops = &da903x_regulator_ldo_ops, \
314*4882a593Smuzhiyun .type = REGULATOR_VOLTAGE, \
315*4882a593Smuzhiyun .id = _pmic##_ID_LDO##_id, \
316*4882a593Smuzhiyun .n_voltages = (step) ? ((max - min) / step + 1) : 1, \
317*4882a593Smuzhiyun .owner = THIS_MODULE, \
318*4882a593Smuzhiyun .min_uV = (min) * 1000, \
319*4882a593Smuzhiyun .uV_step = (step) * 1000, \
320*4882a593Smuzhiyun }, \
321*4882a593Smuzhiyun .max_uV = (max) * 1000, \
322*4882a593Smuzhiyun .vol_reg = _pmic##_##vreg, \
323*4882a593Smuzhiyun .vol_shift = (shift), \
324*4882a593Smuzhiyun .vol_nbits = (nbits), \
325*4882a593Smuzhiyun .enable_reg = _pmic##_##ereg, \
326*4882a593Smuzhiyun .enable_bit = (ebit), \
327*4882a593Smuzhiyun }
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun #define DA903x_DVC(_pmic, _id, min, max, step, vreg, nbits, ureg, ubit, ereg, ebit) \
330*4882a593Smuzhiyun { \
331*4882a593Smuzhiyun .desc = { \
332*4882a593Smuzhiyun .name = #_id, \
333*4882a593Smuzhiyun .ops = &da9034_regulator_dvc_ops, \
334*4882a593Smuzhiyun .type = REGULATOR_VOLTAGE, \
335*4882a593Smuzhiyun .id = _pmic##_ID_##_id, \
336*4882a593Smuzhiyun .n_voltages = (step) ? ((max - min) / step + 1) : 1, \
337*4882a593Smuzhiyun .owner = THIS_MODULE, \
338*4882a593Smuzhiyun .min_uV = (min) * 1000, \
339*4882a593Smuzhiyun .uV_step = (step) * 1000, \
340*4882a593Smuzhiyun }, \
341*4882a593Smuzhiyun .max_uV = (max) * 1000, \
342*4882a593Smuzhiyun .vol_reg = _pmic##_##vreg, \
343*4882a593Smuzhiyun .vol_shift = (0), \
344*4882a593Smuzhiyun .vol_nbits = (nbits), \
345*4882a593Smuzhiyun .update_reg = _pmic##_##ureg, \
346*4882a593Smuzhiyun .update_bit = (ubit), \
347*4882a593Smuzhiyun .enable_reg = _pmic##_##ereg, \
348*4882a593Smuzhiyun .enable_bit = (ebit), \
349*4882a593Smuzhiyun }
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun #define DA9034_LDO(_id, min, max, step, vreg, shift, nbits, ereg, ebit) \
352*4882a593Smuzhiyun DA903x_LDO(DA9034, _id, min, max, step, vreg, shift, nbits, ereg, ebit)
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun #define DA9030_LDO(_id, min, max, step, vreg, shift, nbits, ereg, ebit) \
355*4882a593Smuzhiyun DA903x_LDO(DA9030, _id, min, max, step, vreg, shift, nbits, ereg, ebit)
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun #define DA9030_DVC(_id, min, max, step, vreg, nbits, ureg, ubit, ereg, ebit) \
358*4882a593Smuzhiyun DA903x_DVC(DA9030, _id, min, max, step, vreg, nbits, ureg, ubit, \
359*4882a593Smuzhiyun ereg, ebit)
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun #define DA9034_DVC(_id, min, max, step, vreg, nbits, ureg, ubit, ereg, ebit) \
362*4882a593Smuzhiyun DA903x_DVC(DA9034, _id, min, max, step, vreg, nbits, ureg, ubit, \
363*4882a593Smuzhiyun ereg, ebit)
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun #define DA9035_DVC(_id, min, max, step, vreg, nbits, ureg, ubit, ereg, ebit) \
366*4882a593Smuzhiyun DA903x_DVC(DA9035, _id, min, max, step, vreg, nbits, ureg, ubit, \
367*4882a593Smuzhiyun ereg, ebit)
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun static struct da903x_regulator_info da903x_regulator_info[] = {
370*4882a593Smuzhiyun /* DA9030 */
371*4882a593Smuzhiyun DA9030_DVC(BUCK2, 850, 1625, 25, BUCK2DVM1, 5, BUCK2DVM1, 7, RCTL11, 0),
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun DA9030_LDO( 1, 1200, 3200, 100, LDO1, 0, 5, RCTL12, 1),
374*4882a593Smuzhiyun DA9030_LDO( 2, 1800, 3200, 100, LDO23, 0, 4, RCTL12, 2),
375*4882a593Smuzhiyun DA9030_LDO( 3, 1800, 3200, 100, LDO23, 4, 4, RCTL12, 3),
376*4882a593Smuzhiyun DA9030_LDO( 4, 1800, 3200, 100, LDO45, 0, 4, RCTL12, 4),
377*4882a593Smuzhiyun DA9030_LDO( 5, 1800, 3200, 100, LDO45, 4, 4, RCTL12, 5),
378*4882a593Smuzhiyun DA9030_LDO( 6, 1800, 3200, 100, LDO6, 0, 4, RCTL12, 6),
379*4882a593Smuzhiyun DA9030_LDO( 7, 1800, 3200, 100, LDO78, 0, 4, RCTL12, 7),
380*4882a593Smuzhiyun DA9030_LDO( 8, 1800, 3200, 100, LDO78, 4, 4, RCTL22, 0),
381*4882a593Smuzhiyun DA9030_LDO( 9, 1800, 3200, 100, LDO912, 0, 4, RCTL22, 1),
382*4882a593Smuzhiyun DA9030_LDO(10, 1800, 3200, 100, LDO1011, 0, 4, RCTL22, 2),
383*4882a593Smuzhiyun DA9030_LDO(11, 1800, 3200, 100, LDO1011, 4, 4, RCTL22, 3),
384*4882a593Smuzhiyun DA9030_LDO(12, 1800, 3200, 100, LDO912, 4, 4, RCTL22, 4),
385*4882a593Smuzhiyun DA9030_LDO(14, 2760, 2940, 30, LDO1416, 0, 3, RCTL11, 4),
386*4882a593Smuzhiyun DA9030_LDO(15, 1100, 2650, 50, LDO15, 0, 5, RCTL11, 5),
387*4882a593Smuzhiyun DA9030_LDO(16, 1100, 2650, 50, LDO1416, 3, 5, RCTL11, 6),
388*4882a593Smuzhiyun DA9030_LDO(17, 1800, 3200, 100, LDO17, 0, 4, RCTL11, 7),
389*4882a593Smuzhiyun DA9030_LDO(18, 1800, 3200, 100, LDO1819, 0, 4, RCTL21, 2),
390*4882a593Smuzhiyun DA9030_LDO(19, 1800, 3200, 100, LDO1819, 4, 4, RCTL21, 1),
391*4882a593Smuzhiyun DA9030_LDO(13, 2100, 2100, 0, INVAL, 0, 0, RCTL11, 3), /* fixed @2.1V */
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun /* DA9034 */
394*4882a593Smuzhiyun DA9034_DVC(BUCK1, 725, 1500, 25, ADTV2, 5, VCC1, 0, OVER1, 0),
395*4882a593Smuzhiyun DA9034_DVC(BUCK2, 725, 1500, 25, CDTV2, 5, VCC1, 2, OVER1, 1),
396*4882a593Smuzhiyun DA9034_DVC(LDO2, 725, 1500, 25, SDTV2, 5, VCC1, 4, OVER1, 2),
397*4882a593Smuzhiyun DA9034_DVC(LDO1, 1700, 2075, 25, MDTV1, 4, VCC1, 6, OVER3, 4),
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun DA9034_LDO( 3, 1800, 3300, 100, LDO643, 0, 4, OVER3, 5),
400*4882a593Smuzhiyun DA9034_LDO( 4, 1800, 2900,1100, LDO643, 4, 1, OVER3, 6),
401*4882a593Smuzhiyun DA9034_LDO( 6, 2500, 2850, 50, LDO643, 5, 3, OVER2, 0),
402*4882a593Smuzhiyun DA9034_LDO( 7, 2700, 3050, 50, LDO987, 0, 3, OVER2, 1),
403*4882a593Smuzhiyun DA9034_LDO( 8, 2700, 2850, 50, LDO987, 3, 2, OVER2, 2),
404*4882a593Smuzhiyun DA9034_LDO( 9, 2700, 3050, 50, LDO987, 5, 3, OVER2, 3),
405*4882a593Smuzhiyun DA9034_LDO(10, 2700, 3050, 50, LDO1110, 0, 3, OVER2, 4),
406*4882a593Smuzhiyun DA9034_LDO(11, 1800, 3300, 100, LDO1110, 4, 4, OVER2, 5),
407*4882a593Smuzhiyun DA9034_LDO(12, 1700, 3050, 50, LDO1312, 0, 4, OVER3, 6),
408*4882a593Smuzhiyun DA9034_LDO(13, 1800, 3300, 100, LDO1312, 4, 4, OVER2, 7),
409*4882a593Smuzhiyun DA9034_LDO(14, 1800, 3300, 100, LDO1514, 0, 4, OVER3, 0),
410*4882a593Smuzhiyun DA9034_LDO(15, 1800, 3300, 100, LDO1514, 4, 4, OVER3, 1),
411*4882a593Smuzhiyun DA9034_LDO(5, 3100, 3100, 0, INVAL, 0, 0, OVER3, 7), /* fixed @3.1V */
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun /* DA9035 */
414*4882a593Smuzhiyun DA9035_DVC(BUCK3, 1800, 2200, 100, 3DTV1, 3, VCC2, 0, OVER3, 3),
415*4882a593Smuzhiyun };
416*4882a593Smuzhiyun
find_regulator_info(int id)417*4882a593Smuzhiyun static inline struct da903x_regulator_info *find_regulator_info(int id)
418*4882a593Smuzhiyun {
419*4882a593Smuzhiyun struct da903x_regulator_info *ri;
420*4882a593Smuzhiyun int i;
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(da903x_regulator_info); i++) {
423*4882a593Smuzhiyun ri = &da903x_regulator_info[i];
424*4882a593Smuzhiyun if (ri->desc.id == id)
425*4882a593Smuzhiyun return ri;
426*4882a593Smuzhiyun }
427*4882a593Smuzhiyun return NULL;
428*4882a593Smuzhiyun }
429*4882a593Smuzhiyun
da903x_regulator_probe(struct platform_device * pdev)430*4882a593Smuzhiyun static int da903x_regulator_probe(struct platform_device *pdev)
431*4882a593Smuzhiyun {
432*4882a593Smuzhiyun struct da903x_regulator_info *ri = NULL;
433*4882a593Smuzhiyun struct regulator_dev *rdev;
434*4882a593Smuzhiyun struct regulator_config config = { };
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun ri = find_regulator_info(pdev->id);
437*4882a593Smuzhiyun if (ri == NULL) {
438*4882a593Smuzhiyun dev_err(&pdev->dev, "invalid regulator ID specified\n");
439*4882a593Smuzhiyun return -EINVAL;
440*4882a593Smuzhiyun }
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun /* Workaround for the weird LDO12 voltage setting */
443*4882a593Smuzhiyun if (ri->desc.id == DA9034_ID_LDO12) {
444*4882a593Smuzhiyun ri->desc.ops = &da9034_regulator_ldo12_ops;
445*4882a593Smuzhiyun ri->desc.n_voltages = 16;
446*4882a593Smuzhiyun ri->desc.linear_ranges = da9034_ldo12_ranges;
447*4882a593Smuzhiyun ri->desc.n_linear_ranges = ARRAY_SIZE(da9034_ldo12_ranges);
448*4882a593Smuzhiyun }
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun if (ri->desc.id == DA9030_ID_LDO14)
451*4882a593Smuzhiyun ri->desc.ops = &da9030_regulator_ldo14_ops;
452*4882a593Smuzhiyun
453*4882a593Smuzhiyun if (ri->desc.id == DA9030_ID_LDO1 || ri->desc.id == DA9030_ID_LDO15)
454*4882a593Smuzhiyun ri->desc.ops = &da9030_regulator_ldo1_15_ops;
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun config.dev = &pdev->dev;
457*4882a593Smuzhiyun config.init_data = dev_get_platdata(&pdev->dev);
458*4882a593Smuzhiyun config.driver_data = ri;
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun rdev = devm_regulator_register(&pdev->dev, &ri->desc, &config);
461*4882a593Smuzhiyun if (IS_ERR(rdev)) {
462*4882a593Smuzhiyun dev_err(&pdev->dev, "failed to register regulator %s\n",
463*4882a593Smuzhiyun ri->desc.name);
464*4882a593Smuzhiyun return PTR_ERR(rdev);
465*4882a593Smuzhiyun }
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun platform_set_drvdata(pdev, rdev);
468*4882a593Smuzhiyun return 0;
469*4882a593Smuzhiyun }
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun static struct platform_driver da903x_regulator_driver = {
472*4882a593Smuzhiyun .driver = {
473*4882a593Smuzhiyun .name = "da903x-regulator",
474*4882a593Smuzhiyun },
475*4882a593Smuzhiyun .probe = da903x_regulator_probe,
476*4882a593Smuzhiyun };
477*4882a593Smuzhiyun
da903x_regulator_init(void)478*4882a593Smuzhiyun static int __init da903x_regulator_init(void)
479*4882a593Smuzhiyun {
480*4882a593Smuzhiyun return platform_driver_register(&da903x_regulator_driver);
481*4882a593Smuzhiyun }
482*4882a593Smuzhiyun subsys_initcall(da903x_regulator_init);
483*4882a593Smuzhiyun
da903x_regulator_exit(void)484*4882a593Smuzhiyun static void __exit da903x_regulator_exit(void)
485*4882a593Smuzhiyun {
486*4882a593Smuzhiyun platform_driver_unregister(&da903x_regulator_driver);
487*4882a593Smuzhiyun }
488*4882a593Smuzhiyun module_exit(da903x_regulator_exit);
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun MODULE_LICENSE("GPL");
491*4882a593Smuzhiyun MODULE_AUTHOR("Eric Miao <eric.miao@marvell.com>"
492*4882a593Smuzhiyun "Mike Rapoport <mike@compulab.co.il>");
493*4882a593Smuzhiyun MODULE_DESCRIPTION("Regulator Driver for Dialog Semiconductor DA903X PMIC");
494*4882a593Smuzhiyun MODULE_ALIAS("platform:da903x-regulator");
495