1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * ROHM BD9571MWV-M regulator driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2017 Marek Vasut <marek.vasut+renesas@gmail.com>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Based on the TPS65086 driver
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * NOTE: VD09 is missing
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/of.h>
14*4882a593Smuzhiyun #include <linux/platform_device.h>
15*4882a593Smuzhiyun #include <linux/regulator/driver.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #include <linux/mfd/bd9571mwv.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun struct bd9571mwv_reg {
20*4882a593Smuzhiyun struct bd9571mwv *bd;
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun /* DDR Backup Power */
23*4882a593Smuzhiyun u8 bkup_mode_cnt_keepon; /* from "rohm,ddr-backup-power" */
24*4882a593Smuzhiyun u8 bkup_mode_cnt_saved;
25*4882a593Smuzhiyun bool bkup_mode_enabled;
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun /* Power switch type */
28*4882a593Smuzhiyun bool rstbmode_level;
29*4882a593Smuzhiyun bool rstbmode_pulse;
30*4882a593Smuzhiyun };
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun enum bd9571mwv_regulators { VD09, VD18, VD25, VD33, DVFS };
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun #define BD9571MWV_REG(_name, _of, _id, _ops, _vr, _vm, _nv, _min, _step, _lmin)\
35*4882a593Smuzhiyun { \
36*4882a593Smuzhiyun .name = _name, \
37*4882a593Smuzhiyun .of_match = of_match_ptr(_of), \
38*4882a593Smuzhiyun .regulators_node = "regulators", \
39*4882a593Smuzhiyun .id = _id, \
40*4882a593Smuzhiyun .ops = &_ops, \
41*4882a593Smuzhiyun .n_voltages = _nv, \
42*4882a593Smuzhiyun .type = REGULATOR_VOLTAGE, \
43*4882a593Smuzhiyun .owner = THIS_MODULE, \
44*4882a593Smuzhiyun .vsel_reg = _vr, \
45*4882a593Smuzhiyun .vsel_mask = _vm, \
46*4882a593Smuzhiyun .min_uV = _min, \
47*4882a593Smuzhiyun .uV_step = _step, \
48*4882a593Smuzhiyun .linear_min_sel = _lmin, \
49*4882a593Smuzhiyun }
50*4882a593Smuzhiyun
bd9571mwv_avs_get_moni_state(struct regulator_dev * rdev)51*4882a593Smuzhiyun static int bd9571mwv_avs_get_moni_state(struct regulator_dev *rdev)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun unsigned int val;
54*4882a593Smuzhiyun int ret;
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun ret = regmap_read(rdev->regmap, BD9571MWV_AVS_SET_MONI, &val);
57*4882a593Smuzhiyun if (ret != 0)
58*4882a593Smuzhiyun return ret;
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun return val & BD9571MWV_AVS_SET_MONI_MASK;
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun
bd9571mwv_avs_set_voltage_sel_regmap(struct regulator_dev * rdev,unsigned int sel)63*4882a593Smuzhiyun static int bd9571mwv_avs_set_voltage_sel_regmap(struct regulator_dev *rdev,
64*4882a593Smuzhiyun unsigned int sel)
65*4882a593Smuzhiyun {
66*4882a593Smuzhiyun int ret;
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun ret = bd9571mwv_avs_get_moni_state(rdev);
69*4882a593Smuzhiyun if (ret < 0)
70*4882a593Smuzhiyun return ret;
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun return regmap_write_bits(rdev->regmap, BD9571MWV_AVS_VD09_VID(ret),
73*4882a593Smuzhiyun rdev->desc->vsel_mask, sel);
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun
bd9571mwv_avs_get_voltage_sel_regmap(struct regulator_dev * rdev)76*4882a593Smuzhiyun static int bd9571mwv_avs_get_voltage_sel_regmap(struct regulator_dev *rdev)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun unsigned int val;
79*4882a593Smuzhiyun int ret;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun ret = bd9571mwv_avs_get_moni_state(rdev);
82*4882a593Smuzhiyun if (ret < 0)
83*4882a593Smuzhiyun return ret;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun ret = regmap_read(rdev->regmap, BD9571MWV_AVS_VD09_VID(ret), &val);
86*4882a593Smuzhiyun if (ret != 0)
87*4882a593Smuzhiyun return ret;
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun val &= rdev->desc->vsel_mask;
90*4882a593Smuzhiyun val >>= ffs(rdev->desc->vsel_mask) - 1;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun return val;
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun
bd9571mwv_reg_set_voltage_sel_regmap(struct regulator_dev * rdev,unsigned int sel)95*4882a593Smuzhiyun static int bd9571mwv_reg_set_voltage_sel_regmap(struct regulator_dev *rdev,
96*4882a593Smuzhiyun unsigned int sel)
97*4882a593Smuzhiyun {
98*4882a593Smuzhiyun return regmap_write_bits(rdev->regmap, BD9571MWV_DVFS_SETVID,
99*4882a593Smuzhiyun rdev->desc->vsel_mask, sel);
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun /* Operations permitted on AVS voltage regulator */
103*4882a593Smuzhiyun static const struct regulator_ops avs_ops = {
104*4882a593Smuzhiyun .set_voltage_sel = bd9571mwv_avs_set_voltage_sel_regmap,
105*4882a593Smuzhiyun .map_voltage = regulator_map_voltage_linear,
106*4882a593Smuzhiyun .get_voltage_sel = bd9571mwv_avs_get_voltage_sel_regmap,
107*4882a593Smuzhiyun .list_voltage = regulator_list_voltage_linear,
108*4882a593Smuzhiyun };
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun /* Operations permitted on voltage regulators */
111*4882a593Smuzhiyun static const struct regulator_ops reg_ops = {
112*4882a593Smuzhiyun .set_voltage_sel = bd9571mwv_reg_set_voltage_sel_regmap,
113*4882a593Smuzhiyun .map_voltage = regulator_map_voltage_linear,
114*4882a593Smuzhiyun .get_voltage_sel = regulator_get_voltage_sel_regmap,
115*4882a593Smuzhiyun .list_voltage = regulator_list_voltage_linear,
116*4882a593Smuzhiyun };
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun /* Operations permitted on voltage monitors */
119*4882a593Smuzhiyun static const struct regulator_ops vid_ops = {
120*4882a593Smuzhiyun .map_voltage = regulator_map_voltage_linear,
121*4882a593Smuzhiyun .get_voltage_sel = regulator_get_voltage_sel_regmap,
122*4882a593Smuzhiyun .list_voltage = regulator_list_voltage_linear,
123*4882a593Smuzhiyun };
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun static const struct regulator_desc regulators[] = {
126*4882a593Smuzhiyun BD9571MWV_REG("VD09", "vd09", VD09, avs_ops, 0, 0x7f,
127*4882a593Smuzhiyun 0x6f, 600000, 10000, 0x3c),
128*4882a593Smuzhiyun BD9571MWV_REG("VD18", "vd18", VD18, vid_ops, BD9571MWV_VD18_VID, 0xf,
129*4882a593Smuzhiyun 16, 1625000, 25000, 0),
130*4882a593Smuzhiyun BD9571MWV_REG("VD25", "vd25", VD25, vid_ops, BD9571MWV_VD25_VID, 0xf,
131*4882a593Smuzhiyun 16, 2150000, 50000, 0),
132*4882a593Smuzhiyun BD9571MWV_REG("VD33", "vd33", VD33, vid_ops, BD9571MWV_VD33_VID, 0xf,
133*4882a593Smuzhiyun 11, 2800000, 100000, 0),
134*4882a593Smuzhiyun BD9571MWV_REG("DVFS", "dvfs", DVFS, reg_ops,
135*4882a593Smuzhiyun BD9571MWV_DVFS_MONIVDAC, 0x7f,
136*4882a593Smuzhiyun 0x6f, 600000, 10000, 0x3c),
137*4882a593Smuzhiyun };
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
bd9571mwv_bkup_mode_read(struct bd9571mwv * bd,unsigned int * mode)140*4882a593Smuzhiyun static int bd9571mwv_bkup_mode_read(struct bd9571mwv *bd, unsigned int *mode)
141*4882a593Smuzhiyun {
142*4882a593Smuzhiyun int ret;
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun ret = regmap_read(bd->regmap, BD9571MWV_BKUP_MODE_CNT, mode);
145*4882a593Smuzhiyun if (ret) {
146*4882a593Smuzhiyun dev_err(bd->dev, "failed to read backup mode (%d)\n", ret);
147*4882a593Smuzhiyun return ret;
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun return 0;
151*4882a593Smuzhiyun }
152*4882a593Smuzhiyun
bd9571mwv_bkup_mode_write(struct bd9571mwv * bd,unsigned int mode)153*4882a593Smuzhiyun static int bd9571mwv_bkup_mode_write(struct bd9571mwv *bd, unsigned int mode)
154*4882a593Smuzhiyun {
155*4882a593Smuzhiyun int ret;
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun ret = regmap_write(bd->regmap, BD9571MWV_BKUP_MODE_CNT, mode);
158*4882a593Smuzhiyun if (ret) {
159*4882a593Smuzhiyun dev_err(bd->dev, "failed to configure backup mode 0x%x (%d)\n",
160*4882a593Smuzhiyun mode, ret);
161*4882a593Smuzhiyun return ret;
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun return 0;
165*4882a593Smuzhiyun }
166*4882a593Smuzhiyun
backup_mode_show(struct device * dev,struct device_attribute * attr,char * buf)167*4882a593Smuzhiyun static ssize_t backup_mode_show(struct device *dev,
168*4882a593Smuzhiyun struct device_attribute *attr, char *buf)
169*4882a593Smuzhiyun {
170*4882a593Smuzhiyun struct bd9571mwv_reg *bdreg = dev_get_drvdata(dev);
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun return sprintf(buf, "%s\n", bdreg->bkup_mode_enabled ? "on" : "off");
173*4882a593Smuzhiyun }
174*4882a593Smuzhiyun
backup_mode_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)175*4882a593Smuzhiyun static ssize_t backup_mode_store(struct device *dev,
176*4882a593Smuzhiyun struct device_attribute *attr,
177*4882a593Smuzhiyun const char *buf, size_t count)
178*4882a593Smuzhiyun {
179*4882a593Smuzhiyun struct bd9571mwv_reg *bdreg = dev_get_drvdata(dev);
180*4882a593Smuzhiyun unsigned int mode;
181*4882a593Smuzhiyun int ret;
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun if (!count)
184*4882a593Smuzhiyun return 0;
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun ret = kstrtobool(buf, &bdreg->bkup_mode_enabled);
187*4882a593Smuzhiyun if (ret)
188*4882a593Smuzhiyun return ret;
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun if (!bdreg->rstbmode_level)
191*4882a593Smuzhiyun return count;
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun /*
194*4882a593Smuzhiyun * Configure DDR Backup Mode, to change the role of the accessory power
195*4882a593Smuzhiyun * switch from a power switch to a wake-up switch, or vice versa
196*4882a593Smuzhiyun */
197*4882a593Smuzhiyun ret = bd9571mwv_bkup_mode_read(bdreg->bd, &mode);
198*4882a593Smuzhiyun if (ret)
199*4882a593Smuzhiyun return ret;
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun mode &= ~BD9571MWV_BKUP_MODE_CNT_KEEPON_MASK;
202*4882a593Smuzhiyun if (bdreg->bkup_mode_enabled)
203*4882a593Smuzhiyun mode |= bdreg->bkup_mode_cnt_keepon;
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun ret = bd9571mwv_bkup_mode_write(bdreg->bd, mode);
206*4882a593Smuzhiyun if (ret)
207*4882a593Smuzhiyun return ret;
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun return count;
210*4882a593Smuzhiyun }
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun static DEVICE_ATTR_RW(backup_mode);
213*4882a593Smuzhiyun
bd9571mwv_suspend(struct device * dev)214*4882a593Smuzhiyun static int bd9571mwv_suspend(struct device *dev)
215*4882a593Smuzhiyun {
216*4882a593Smuzhiyun struct bd9571mwv_reg *bdreg = dev_get_drvdata(dev);
217*4882a593Smuzhiyun unsigned int mode;
218*4882a593Smuzhiyun int ret;
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun if (!bdreg->bkup_mode_enabled)
221*4882a593Smuzhiyun return 0;
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun /* Save DDR Backup Mode */
224*4882a593Smuzhiyun ret = bd9571mwv_bkup_mode_read(bdreg->bd, &mode);
225*4882a593Smuzhiyun if (ret)
226*4882a593Smuzhiyun return ret;
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun bdreg->bkup_mode_cnt_saved = mode;
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun if (!bdreg->rstbmode_pulse)
231*4882a593Smuzhiyun return 0;
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun /* Enable DDR Backup Mode */
234*4882a593Smuzhiyun mode &= ~BD9571MWV_BKUP_MODE_CNT_KEEPON_MASK;
235*4882a593Smuzhiyun mode |= bdreg->bkup_mode_cnt_keepon;
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun if (mode != bdreg->bkup_mode_cnt_saved)
238*4882a593Smuzhiyun return bd9571mwv_bkup_mode_write(bdreg->bd, mode);
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun return 0;
241*4882a593Smuzhiyun }
242*4882a593Smuzhiyun
bd9571mwv_resume(struct device * dev)243*4882a593Smuzhiyun static int bd9571mwv_resume(struct device *dev)
244*4882a593Smuzhiyun {
245*4882a593Smuzhiyun struct bd9571mwv_reg *bdreg = dev_get_drvdata(dev);
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun if (!bdreg->bkup_mode_enabled)
248*4882a593Smuzhiyun return 0;
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun /* Restore DDR Backup Mode */
251*4882a593Smuzhiyun return bd9571mwv_bkup_mode_write(bdreg->bd, bdreg->bkup_mode_cnt_saved);
252*4882a593Smuzhiyun }
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun static const struct dev_pm_ops bd9571mwv_pm = {
255*4882a593Smuzhiyun SET_SYSTEM_SLEEP_PM_OPS(bd9571mwv_suspend, bd9571mwv_resume)
256*4882a593Smuzhiyun };
257*4882a593Smuzhiyun
bd9571mwv_regulator_remove(struct platform_device * pdev)258*4882a593Smuzhiyun static int bd9571mwv_regulator_remove(struct platform_device *pdev)
259*4882a593Smuzhiyun {
260*4882a593Smuzhiyun device_remove_file(&pdev->dev, &dev_attr_backup_mode);
261*4882a593Smuzhiyun return 0;
262*4882a593Smuzhiyun }
263*4882a593Smuzhiyun #define DEV_PM_OPS &bd9571mwv_pm
264*4882a593Smuzhiyun #else
265*4882a593Smuzhiyun #define DEV_PM_OPS NULL
266*4882a593Smuzhiyun #define bd9571mwv_regulator_remove NULL
267*4882a593Smuzhiyun #endif /* CONFIG_PM_SLEEP */
268*4882a593Smuzhiyun
bd9571mwv_regulator_probe(struct platform_device * pdev)269*4882a593Smuzhiyun static int bd9571mwv_regulator_probe(struct platform_device *pdev)
270*4882a593Smuzhiyun {
271*4882a593Smuzhiyun struct bd9571mwv *bd = dev_get_drvdata(pdev->dev.parent);
272*4882a593Smuzhiyun struct regulator_config config = { };
273*4882a593Smuzhiyun struct bd9571mwv_reg *bdreg;
274*4882a593Smuzhiyun struct regulator_dev *rdev;
275*4882a593Smuzhiyun unsigned int val;
276*4882a593Smuzhiyun int i;
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun bdreg = devm_kzalloc(&pdev->dev, sizeof(*bdreg), GFP_KERNEL);
279*4882a593Smuzhiyun if (!bdreg)
280*4882a593Smuzhiyun return -ENOMEM;
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun bdreg->bd = bd;
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun platform_set_drvdata(pdev, bdreg);
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun config.dev = &pdev->dev;
287*4882a593Smuzhiyun config.dev->of_node = bd->dev->of_node;
288*4882a593Smuzhiyun config.driver_data = bd;
289*4882a593Smuzhiyun config.regmap = bd->regmap;
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(regulators); i++) {
292*4882a593Smuzhiyun rdev = devm_regulator_register(&pdev->dev, ®ulators[i],
293*4882a593Smuzhiyun &config);
294*4882a593Smuzhiyun if (IS_ERR(rdev)) {
295*4882a593Smuzhiyun dev_err(bd->dev, "failed to register %s regulator\n",
296*4882a593Smuzhiyun pdev->name);
297*4882a593Smuzhiyun return PTR_ERR(rdev);
298*4882a593Smuzhiyun }
299*4882a593Smuzhiyun }
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun val = 0;
302*4882a593Smuzhiyun of_property_read_u32(bd->dev->of_node, "rohm,ddr-backup-power", &val);
303*4882a593Smuzhiyun if (val & ~BD9571MWV_BKUP_MODE_CNT_KEEPON_MASK) {
304*4882a593Smuzhiyun dev_err(bd->dev, "invalid %s mode %u\n",
305*4882a593Smuzhiyun "rohm,ddr-backup-power", val);
306*4882a593Smuzhiyun return -EINVAL;
307*4882a593Smuzhiyun }
308*4882a593Smuzhiyun bdreg->bkup_mode_cnt_keepon = val;
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun bdreg->rstbmode_level = of_property_read_bool(bd->dev->of_node,
311*4882a593Smuzhiyun "rohm,rstbmode-level");
312*4882a593Smuzhiyun bdreg->rstbmode_pulse = of_property_read_bool(bd->dev->of_node,
313*4882a593Smuzhiyun "rohm,rstbmode-pulse");
314*4882a593Smuzhiyun if (bdreg->rstbmode_level && bdreg->rstbmode_pulse) {
315*4882a593Smuzhiyun dev_err(bd->dev, "only one rohm,rstbmode-* may be specified");
316*4882a593Smuzhiyun return -EINVAL;
317*4882a593Smuzhiyun }
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
320*4882a593Smuzhiyun if (bdreg->bkup_mode_cnt_keepon) {
321*4882a593Smuzhiyun int ret;
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun /*
324*4882a593Smuzhiyun * Backup mode is enabled by default in pulse mode, but needs
325*4882a593Smuzhiyun * explicit user setup in level mode.
326*4882a593Smuzhiyun */
327*4882a593Smuzhiyun bdreg->bkup_mode_enabled = bdreg->rstbmode_pulse;
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun ret = device_create_file(&pdev->dev, &dev_attr_backup_mode);
330*4882a593Smuzhiyun if (ret)
331*4882a593Smuzhiyun return ret;
332*4882a593Smuzhiyun }
333*4882a593Smuzhiyun #endif /* CONFIG_PM_SLEEP */
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun return 0;
336*4882a593Smuzhiyun }
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun static const struct platform_device_id bd9571mwv_regulator_id_table[] = {
339*4882a593Smuzhiyun { "bd9571mwv-regulator", },
340*4882a593Smuzhiyun { /* sentinel */ }
341*4882a593Smuzhiyun };
342*4882a593Smuzhiyun MODULE_DEVICE_TABLE(platform, bd9571mwv_regulator_id_table);
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun static struct platform_driver bd9571mwv_regulator_driver = {
345*4882a593Smuzhiyun .driver = {
346*4882a593Smuzhiyun .name = "bd9571mwv-regulator",
347*4882a593Smuzhiyun .pm = DEV_PM_OPS,
348*4882a593Smuzhiyun },
349*4882a593Smuzhiyun .probe = bd9571mwv_regulator_probe,
350*4882a593Smuzhiyun .remove = bd9571mwv_regulator_remove,
351*4882a593Smuzhiyun .id_table = bd9571mwv_regulator_id_table,
352*4882a593Smuzhiyun };
353*4882a593Smuzhiyun module_platform_driver(bd9571mwv_regulator_driver);
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun MODULE_AUTHOR("Marek Vasut <marek.vasut+renesas@gmail.com>");
356*4882a593Smuzhiyun MODULE_DESCRIPTION("BD9571MWV Regulator driver");
357*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
358