1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) ST-Ericsson SA 2010
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Authors: Bengt Jonsson <bengt.g.jonsson@stericsson.com>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * This file is based on drivers/regulator/ab8500.c
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * AB8500 external regulators
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * ab8500-ext supports the following regulators:
12*4882a593Smuzhiyun * - VextSupply3
13*4882a593Smuzhiyun */
14*4882a593Smuzhiyun #include <linux/init.h>
15*4882a593Smuzhiyun #include <linux/kernel.h>
16*4882a593Smuzhiyun #include <linux/err.h>
17*4882a593Smuzhiyun #include <linux/module.h>
18*4882a593Smuzhiyun #include <linux/of.h>
19*4882a593Smuzhiyun #include <linux/platform_device.h>
20*4882a593Smuzhiyun #include <linux/regulator/driver.h>
21*4882a593Smuzhiyun #include <linux/regulator/machine.h>
22*4882a593Smuzhiyun #include <linux/regulator/of_regulator.h>
23*4882a593Smuzhiyun #include <linux/mfd/abx500.h>
24*4882a593Smuzhiyun #include <linux/mfd/abx500/ab8500.h>
25*4882a593Smuzhiyun #include <linux/regulator/ab8500.h>
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun static struct regulator_consumer_supply ab8500_vaux1_consumers[] = {
28*4882a593Smuzhiyun /* Main display, u8500 R3 uib */
29*4882a593Smuzhiyun REGULATOR_SUPPLY("vddi", "mcde_disp_sony_acx424akp.0"),
30*4882a593Smuzhiyun /* Main display, u8500 uib and ST uib */
31*4882a593Smuzhiyun REGULATOR_SUPPLY("vdd1", "samsung_s6d16d0.0"),
32*4882a593Smuzhiyun /* Secondary display, ST uib */
33*4882a593Smuzhiyun REGULATOR_SUPPLY("vdd1", "samsung_s6d16d0.1"),
34*4882a593Smuzhiyun /* SFH7741 proximity sensor */
35*4882a593Smuzhiyun REGULATOR_SUPPLY("vcc", "gpio-keys.0"),
36*4882a593Smuzhiyun /* BH1780GLS ambient light sensor */
37*4882a593Smuzhiyun REGULATOR_SUPPLY("vcc", "2-0029"),
38*4882a593Smuzhiyun /* lsm303dlh accelerometer */
39*4882a593Smuzhiyun REGULATOR_SUPPLY("vdd", "2-0018"),
40*4882a593Smuzhiyun /* lsm303dlhc accelerometer */
41*4882a593Smuzhiyun REGULATOR_SUPPLY("vdd", "2-0019"),
42*4882a593Smuzhiyun /* lsm303dlh magnetometer */
43*4882a593Smuzhiyun REGULATOR_SUPPLY("vdd", "2-001e"),
44*4882a593Smuzhiyun /* Rohm BU21013 Touchscreen devices */
45*4882a593Smuzhiyun REGULATOR_SUPPLY("avdd", "3-005c"),
46*4882a593Smuzhiyun REGULATOR_SUPPLY("avdd", "3-005d"),
47*4882a593Smuzhiyun /* Synaptics RMI4 Touchscreen device */
48*4882a593Smuzhiyun REGULATOR_SUPPLY("vdd", "3-004b"),
49*4882a593Smuzhiyun /* L3G4200D Gyroscope device */
50*4882a593Smuzhiyun REGULATOR_SUPPLY("vdd", "2-0068"),
51*4882a593Smuzhiyun /* Ambient light sensor device */
52*4882a593Smuzhiyun REGULATOR_SUPPLY("vdd", "3-0029"),
53*4882a593Smuzhiyun /* Pressure sensor device */
54*4882a593Smuzhiyun REGULATOR_SUPPLY("vdd", "2-005c"),
55*4882a593Smuzhiyun /* Cypress TrueTouch Touchscreen device */
56*4882a593Smuzhiyun REGULATOR_SUPPLY("vcpin", "spi8.0"),
57*4882a593Smuzhiyun /* Camera device */
58*4882a593Smuzhiyun REGULATOR_SUPPLY("vaux12v5", "mmio_camera"),
59*4882a593Smuzhiyun };
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun static struct regulator_consumer_supply ab8500_vaux2_consumers[] = {
62*4882a593Smuzhiyun /* On-board eMMC power */
63*4882a593Smuzhiyun REGULATOR_SUPPLY("vmmc", "sdi4"),
64*4882a593Smuzhiyun /* AB8500 audio codec */
65*4882a593Smuzhiyun REGULATOR_SUPPLY("vcc-N2158", "ab8500-codec.0"),
66*4882a593Smuzhiyun /* AB8500 accessory detect 1 */
67*4882a593Smuzhiyun REGULATOR_SUPPLY("vcc-N2158", "ab8500-acc-det.0"),
68*4882a593Smuzhiyun /* AB8500 Tv-out device */
69*4882a593Smuzhiyun REGULATOR_SUPPLY("vcc-N2158", "mcde_tv_ab8500.4"),
70*4882a593Smuzhiyun /* AV8100 HDMI device */
71*4882a593Smuzhiyun REGULATOR_SUPPLY("vcc-N2158", "av8100_hdmi.3"),
72*4882a593Smuzhiyun };
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun static struct regulator_consumer_supply ab8500_vaux3_consumers[] = {
75*4882a593Smuzhiyun REGULATOR_SUPPLY("v-SD-STM", "stm"),
76*4882a593Smuzhiyun /* External MMC slot power */
77*4882a593Smuzhiyun REGULATOR_SUPPLY("vmmc", "sdi0"),
78*4882a593Smuzhiyun };
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun static struct regulator_consumer_supply ab8500_vtvout_consumers[] = {
81*4882a593Smuzhiyun /* TV-out DENC supply */
82*4882a593Smuzhiyun REGULATOR_SUPPLY("vtvout", "ab8500-denc.0"),
83*4882a593Smuzhiyun /* Internal general-purpose ADC */
84*4882a593Smuzhiyun REGULATOR_SUPPLY("vddadc", "ab8500-gpadc.0"),
85*4882a593Smuzhiyun /* ADC for charger */
86*4882a593Smuzhiyun REGULATOR_SUPPLY("vddadc", "ab8500-charger.0"),
87*4882a593Smuzhiyun /* AB8500 Tv-out device */
88*4882a593Smuzhiyun REGULATOR_SUPPLY("vtvout", "mcde_tv_ab8500.4"),
89*4882a593Smuzhiyun };
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun static struct regulator_consumer_supply ab8500_vaud_consumers[] = {
92*4882a593Smuzhiyun /* AB8500 audio-codec main supply */
93*4882a593Smuzhiyun REGULATOR_SUPPLY("vaud", "ab8500-codec.0"),
94*4882a593Smuzhiyun };
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun static struct regulator_consumer_supply ab8500_vamic1_consumers[] = {
97*4882a593Smuzhiyun /* AB8500 audio-codec Mic1 supply */
98*4882a593Smuzhiyun REGULATOR_SUPPLY("vamic1", "ab8500-codec.0"),
99*4882a593Smuzhiyun };
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun static struct regulator_consumer_supply ab8500_vamic2_consumers[] = {
102*4882a593Smuzhiyun /* AB8500 audio-codec Mic2 supply */
103*4882a593Smuzhiyun REGULATOR_SUPPLY("vamic2", "ab8500-codec.0"),
104*4882a593Smuzhiyun };
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun static struct regulator_consumer_supply ab8500_vdmic_consumers[] = {
107*4882a593Smuzhiyun /* AB8500 audio-codec DMic supply */
108*4882a593Smuzhiyun REGULATOR_SUPPLY("vdmic", "ab8500-codec.0"),
109*4882a593Smuzhiyun };
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun static struct regulator_consumer_supply ab8500_vintcore_consumers[] = {
112*4882a593Smuzhiyun /* SoC core supply, no device */
113*4882a593Smuzhiyun REGULATOR_SUPPLY("v-intcore", NULL),
114*4882a593Smuzhiyun /* USB Transceiver */
115*4882a593Smuzhiyun REGULATOR_SUPPLY("vddulpivio18", "ab8500-usb.0"),
116*4882a593Smuzhiyun /* Handled by abx500 clk driver */
117*4882a593Smuzhiyun REGULATOR_SUPPLY("v-intcore", "abx500-clk.0"),
118*4882a593Smuzhiyun };
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun static struct regulator_consumer_supply ab8500_vana_consumers[] = {
121*4882a593Smuzhiyun /* DB8500 DSI */
122*4882a593Smuzhiyun REGULATOR_SUPPLY("vdddsi1v2", "mcde"),
123*4882a593Smuzhiyun REGULATOR_SUPPLY("vdddsi1v2", "b2r2_core"),
124*4882a593Smuzhiyun REGULATOR_SUPPLY("vdddsi1v2", "b2r2_1_core"),
125*4882a593Smuzhiyun REGULATOR_SUPPLY("vdddsi1v2", "dsilink.0"),
126*4882a593Smuzhiyun REGULATOR_SUPPLY("vdddsi1v2", "dsilink.1"),
127*4882a593Smuzhiyun REGULATOR_SUPPLY("vdddsi1v2", "dsilink.2"),
128*4882a593Smuzhiyun /* DB8500 CSI */
129*4882a593Smuzhiyun REGULATOR_SUPPLY("vddcsi1v2", "mmio_camera"),
130*4882a593Smuzhiyun };
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun /* ab8500 regulator register initialization */
133*4882a593Smuzhiyun static struct ab8500_regulator_reg_init ab8500_reg_init[] = {
134*4882a593Smuzhiyun /*
135*4882a593Smuzhiyun * VanaRequestCtrl = HP/LP depending on VxRequest
136*4882a593Smuzhiyun * VextSupply1RequestCtrl = HP/LP depending on VxRequest
137*4882a593Smuzhiyun */
138*4882a593Smuzhiyun INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL2, 0xf0, 0x00),
139*4882a593Smuzhiyun /*
140*4882a593Smuzhiyun * VextSupply2RequestCtrl = HP/LP depending on VxRequest
141*4882a593Smuzhiyun * VextSupply3RequestCtrl = HP/LP depending on VxRequest
142*4882a593Smuzhiyun * Vaux1RequestCtrl = HP/LP depending on VxRequest
143*4882a593Smuzhiyun * Vaux2RequestCtrl = HP/LP depending on VxRequest
144*4882a593Smuzhiyun */
145*4882a593Smuzhiyun INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL3, 0xff, 0x00),
146*4882a593Smuzhiyun /*
147*4882a593Smuzhiyun * Vaux3RequestCtrl = HP/LP depending on VxRequest
148*4882a593Smuzhiyun * SwHPReq = Control through SWValid disabled
149*4882a593Smuzhiyun */
150*4882a593Smuzhiyun INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL4, 0x07, 0x00),
151*4882a593Smuzhiyun /*
152*4882a593Smuzhiyun * VanaSysClkReq1HPValid = disabled
153*4882a593Smuzhiyun * Vaux1SysClkReq1HPValid = disabled
154*4882a593Smuzhiyun * Vaux2SysClkReq1HPValid = disabled
155*4882a593Smuzhiyun * Vaux3SysClkReq1HPValid = disabled
156*4882a593Smuzhiyun */
157*4882a593Smuzhiyun INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID1, 0xe8, 0x00),
158*4882a593Smuzhiyun /*
159*4882a593Smuzhiyun * VextSupply1SysClkReq1HPValid = disabled
160*4882a593Smuzhiyun * VextSupply2SysClkReq1HPValid = disabled
161*4882a593Smuzhiyun * VextSupply3SysClkReq1HPValid = SysClkReq1 controlled
162*4882a593Smuzhiyun */
163*4882a593Smuzhiyun INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID2, 0x70, 0x40),
164*4882a593Smuzhiyun /*
165*4882a593Smuzhiyun * VanaHwHPReq1Valid = disabled
166*4882a593Smuzhiyun * Vaux1HwHPreq1Valid = disabled
167*4882a593Smuzhiyun * Vaux2HwHPReq1Valid = disabled
168*4882a593Smuzhiyun * Vaux3HwHPReqValid = disabled
169*4882a593Smuzhiyun */
170*4882a593Smuzhiyun INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID1, 0xe8, 0x00),
171*4882a593Smuzhiyun /*
172*4882a593Smuzhiyun * VextSupply1HwHPReq1Valid = disabled
173*4882a593Smuzhiyun * VextSupply2HwHPReq1Valid = disabled
174*4882a593Smuzhiyun * VextSupply3HwHPReq1Valid = disabled
175*4882a593Smuzhiyun */
176*4882a593Smuzhiyun INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID2, 0x07, 0x00),
177*4882a593Smuzhiyun /*
178*4882a593Smuzhiyun * VanaHwHPReq2Valid = disabled
179*4882a593Smuzhiyun * Vaux1HwHPReq2Valid = disabled
180*4882a593Smuzhiyun * Vaux2HwHPReq2Valid = disabled
181*4882a593Smuzhiyun * Vaux3HwHPReq2Valid = disabled
182*4882a593Smuzhiyun */
183*4882a593Smuzhiyun INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID1, 0xe8, 0x00),
184*4882a593Smuzhiyun /*
185*4882a593Smuzhiyun * VextSupply1HwHPReq2Valid = disabled
186*4882a593Smuzhiyun * VextSupply2HwHPReq2Valid = disabled
187*4882a593Smuzhiyun * VextSupply3HwHPReq2Valid = HWReq2 controlled
188*4882a593Smuzhiyun */
189*4882a593Smuzhiyun INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID2, 0x07, 0x04),
190*4882a593Smuzhiyun /*
191*4882a593Smuzhiyun * VanaSwHPReqValid = disabled
192*4882a593Smuzhiyun * Vaux1SwHPReqValid = disabled
193*4882a593Smuzhiyun */
194*4882a593Smuzhiyun INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID1, 0xa0, 0x00),
195*4882a593Smuzhiyun /*
196*4882a593Smuzhiyun * Vaux2SwHPReqValid = disabled
197*4882a593Smuzhiyun * Vaux3SwHPReqValid = disabled
198*4882a593Smuzhiyun * VextSupply1SwHPReqValid = disabled
199*4882a593Smuzhiyun * VextSupply2SwHPReqValid = disabled
200*4882a593Smuzhiyun * VextSupply3SwHPReqValid = disabled
201*4882a593Smuzhiyun */
202*4882a593Smuzhiyun INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID2, 0x1f, 0x00),
203*4882a593Smuzhiyun /*
204*4882a593Smuzhiyun * SysClkReq2Valid1 = SysClkReq2 controlled
205*4882a593Smuzhiyun * SysClkReq3Valid1 = disabled
206*4882a593Smuzhiyun * SysClkReq4Valid1 = SysClkReq4 controlled
207*4882a593Smuzhiyun * SysClkReq5Valid1 = disabled
208*4882a593Smuzhiyun * SysClkReq6Valid1 = SysClkReq6 controlled
209*4882a593Smuzhiyun * SysClkReq7Valid1 = disabled
210*4882a593Smuzhiyun * SysClkReq8Valid1 = disabled
211*4882a593Smuzhiyun */
212*4882a593Smuzhiyun INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID1, 0xfe, 0x2a),
213*4882a593Smuzhiyun /*
214*4882a593Smuzhiyun * SysClkReq2Valid2 = disabled
215*4882a593Smuzhiyun * SysClkReq3Valid2 = disabled
216*4882a593Smuzhiyun * SysClkReq4Valid2 = disabled
217*4882a593Smuzhiyun * SysClkReq5Valid2 = disabled
218*4882a593Smuzhiyun * SysClkReq6Valid2 = SysClkReq6 controlled
219*4882a593Smuzhiyun * SysClkReq7Valid2 = disabled
220*4882a593Smuzhiyun * SysClkReq8Valid2 = disabled
221*4882a593Smuzhiyun */
222*4882a593Smuzhiyun INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID2, 0xfe, 0x20),
223*4882a593Smuzhiyun /*
224*4882a593Smuzhiyun * VTVoutEna = disabled
225*4882a593Smuzhiyun * Vintcore12Ena = disabled
226*4882a593Smuzhiyun * Vintcore12Sel = 1.25 V
227*4882a593Smuzhiyun * Vintcore12LP = inactive (HP)
228*4882a593Smuzhiyun * VTVoutLP = inactive (HP)
229*4882a593Smuzhiyun */
230*4882a593Smuzhiyun INIT_REGULATOR_REGISTER(AB8500_REGUMISC1, 0xfe, 0x10),
231*4882a593Smuzhiyun /*
232*4882a593Smuzhiyun * VaudioEna = disabled
233*4882a593Smuzhiyun * VdmicEna = disabled
234*4882a593Smuzhiyun * Vamic1Ena = disabled
235*4882a593Smuzhiyun * Vamic2Ena = disabled
236*4882a593Smuzhiyun */
237*4882a593Smuzhiyun INIT_REGULATOR_REGISTER(AB8500_VAUDIOSUPPLY, 0x1e, 0x00),
238*4882a593Smuzhiyun /*
239*4882a593Smuzhiyun * Vamic1_dzout = high-Z when Vamic1 is disabled
240*4882a593Smuzhiyun * Vamic2_dzout = high-Z when Vamic2 is disabled
241*4882a593Smuzhiyun */
242*4882a593Smuzhiyun INIT_REGULATOR_REGISTER(AB8500_REGUCTRL1VAMIC, 0x03, 0x00),
243*4882a593Smuzhiyun /*
244*4882a593Smuzhiyun * VPll = Hw controlled (NOTE! PRCMU bits)
245*4882a593Smuzhiyun * VanaRegu = force off
246*4882a593Smuzhiyun */
247*4882a593Smuzhiyun INIT_REGULATOR_REGISTER(AB8500_VPLLVANAREGU, 0x0f, 0x02),
248*4882a593Smuzhiyun /*
249*4882a593Smuzhiyun * VrefDDREna = disabled
250*4882a593Smuzhiyun * VrefDDRSleepMode = inactive (no pulldown)
251*4882a593Smuzhiyun */
252*4882a593Smuzhiyun INIT_REGULATOR_REGISTER(AB8500_VREFDDR, 0x03, 0x00),
253*4882a593Smuzhiyun /*
254*4882a593Smuzhiyun * VextSupply1Regu = force LP
255*4882a593Smuzhiyun * VextSupply2Regu = force OFF
256*4882a593Smuzhiyun * VextSupply3Regu = force HP (-> STBB2=LP and TPS=LP)
257*4882a593Smuzhiyun * ExtSupply2Bypass = ExtSupply12LPn ball is 0 when Ena is 0
258*4882a593Smuzhiyun * ExtSupply3Bypass = ExtSupply3LPn ball is 0 when Ena is 0
259*4882a593Smuzhiyun */
260*4882a593Smuzhiyun INIT_REGULATOR_REGISTER(AB8500_EXTSUPPLYREGU, 0xff, 0x13),
261*4882a593Smuzhiyun /*
262*4882a593Smuzhiyun * Vaux1Regu = force HP
263*4882a593Smuzhiyun * Vaux2Regu = force off
264*4882a593Smuzhiyun */
265*4882a593Smuzhiyun INIT_REGULATOR_REGISTER(AB8500_VAUX12REGU, 0x0f, 0x01),
266*4882a593Smuzhiyun /*
267*4882a593Smuzhiyun * Vaux3Regu = force off
268*4882a593Smuzhiyun */
269*4882a593Smuzhiyun INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3REGU, 0x03, 0x00),
270*4882a593Smuzhiyun /*
271*4882a593Smuzhiyun * Vaux1Sel = 2.8 V
272*4882a593Smuzhiyun */
273*4882a593Smuzhiyun INIT_REGULATOR_REGISTER(AB8500_VAUX1SEL, 0x0f, 0x0C),
274*4882a593Smuzhiyun /*
275*4882a593Smuzhiyun * Vaux2Sel = 2.9 V
276*4882a593Smuzhiyun */
277*4882a593Smuzhiyun INIT_REGULATOR_REGISTER(AB8500_VAUX2SEL, 0x0f, 0x0d),
278*4882a593Smuzhiyun /*
279*4882a593Smuzhiyun * Vaux3Sel = 2.91 V
280*4882a593Smuzhiyun */
281*4882a593Smuzhiyun INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3SEL, 0x07, 0x07),
282*4882a593Smuzhiyun /*
283*4882a593Smuzhiyun * VextSupply12LP = disabled (no LP)
284*4882a593Smuzhiyun */
285*4882a593Smuzhiyun INIT_REGULATOR_REGISTER(AB8500_REGUCTRL2SPARE, 0x01, 0x00),
286*4882a593Smuzhiyun /*
287*4882a593Smuzhiyun * Vaux1Disch = short discharge time
288*4882a593Smuzhiyun * Vaux2Disch = short discharge time
289*4882a593Smuzhiyun * Vaux3Disch = short discharge time
290*4882a593Smuzhiyun * Vintcore12Disch = short discharge time
291*4882a593Smuzhiyun * VTVoutDisch = short discharge time
292*4882a593Smuzhiyun * VaudioDisch = short discharge time
293*4882a593Smuzhiyun */
294*4882a593Smuzhiyun INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH, 0xfc, 0x00),
295*4882a593Smuzhiyun /*
296*4882a593Smuzhiyun * VanaDisch = short discharge time
297*4882a593Smuzhiyun * VdmicPullDownEna = pulldown disabled when Vdmic is disabled
298*4882a593Smuzhiyun * VdmicDisch = short discharge time
299*4882a593Smuzhiyun */
300*4882a593Smuzhiyun INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH2, 0x16, 0x00),
301*4882a593Smuzhiyun };
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun /* AB8500 regulators */
304*4882a593Smuzhiyun static struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
305*4882a593Smuzhiyun /* supplies to the display/camera */
306*4882a593Smuzhiyun [AB8500_LDO_AUX1] = {
307*4882a593Smuzhiyun .supply_regulator = "ab8500-ext-supply3",
308*4882a593Smuzhiyun .constraints = {
309*4882a593Smuzhiyun .name = "V-DISPLAY",
310*4882a593Smuzhiyun .min_uV = 2800000,
311*4882a593Smuzhiyun .max_uV = 3300000,
312*4882a593Smuzhiyun .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
313*4882a593Smuzhiyun REGULATOR_CHANGE_STATUS,
314*4882a593Smuzhiyun .boot_on = 1, /* display is on at boot */
315*4882a593Smuzhiyun },
316*4882a593Smuzhiyun .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux1_consumers),
317*4882a593Smuzhiyun .consumer_supplies = ab8500_vaux1_consumers,
318*4882a593Smuzhiyun },
319*4882a593Smuzhiyun /* supplies to the on-board eMMC */
320*4882a593Smuzhiyun [AB8500_LDO_AUX2] = {
321*4882a593Smuzhiyun .supply_regulator = "ab8500-ext-supply3",
322*4882a593Smuzhiyun .constraints = {
323*4882a593Smuzhiyun .name = "V-eMMC1",
324*4882a593Smuzhiyun .min_uV = 1100000,
325*4882a593Smuzhiyun .max_uV = 3300000,
326*4882a593Smuzhiyun .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
327*4882a593Smuzhiyun REGULATOR_CHANGE_STATUS |
328*4882a593Smuzhiyun REGULATOR_CHANGE_MODE,
329*4882a593Smuzhiyun .valid_modes_mask = REGULATOR_MODE_NORMAL |
330*4882a593Smuzhiyun REGULATOR_MODE_IDLE,
331*4882a593Smuzhiyun },
332*4882a593Smuzhiyun .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux2_consumers),
333*4882a593Smuzhiyun .consumer_supplies = ab8500_vaux2_consumers,
334*4882a593Smuzhiyun },
335*4882a593Smuzhiyun /* supply for VAUX3, supplies to SDcard slots */
336*4882a593Smuzhiyun [AB8500_LDO_AUX3] = {
337*4882a593Smuzhiyun .supply_regulator = "ab8500-ext-supply3",
338*4882a593Smuzhiyun .constraints = {
339*4882a593Smuzhiyun .name = "V-MMC-SD",
340*4882a593Smuzhiyun .min_uV = 1100000,
341*4882a593Smuzhiyun .max_uV = 3300000,
342*4882a593Smuzhiyun .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
343*4882a593Smuzhiyun REGULATOR_CHANGE_STATUS |
344*4882a593Smuzhiyun REGULATOR_CHANGE_MODE,
345*4882a593Smuzhiyun .valid_modes_mask = REGULATOR_MODE_NORMAL |
346*4882a593Smuzhiyun REGULATOR_MODE_IDLE,
347*4882a593Smuzhiyun },
348*4882a593Smuzhiyun .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux3_consumers),
349*4882a593Smuzhiyun .consumer_supplies = ab8500_vaux3_consumers,
350*4882a593Smuzhiyun },
351*4882a593Smuzhiyun /* supply for tvout, gpadc, TVOUT LDO */
352*4882a593Smuzhiyun [AB8500_LDO_TVOUT] = {
353*4882a593Smuzhiyun .constraints = {
354*4882a593Smuzhiyun .name = "V-TVOUT",
355*4882a593Smuzhiyun .valid_ops_mask = REGULATOR_CHANGE_STATUS,
356*4882a593Smuzhiyun },
357*4882a593Smuzhiyun .num_consumer_supplies = ARRAY_SIZE(ab8500_vtvout_consumers),
358*4882a593Smuzhiyun .consumer_supplies = ab8500_vtvout_consumers,
359*4882a593Smuzhiyun },
360*4882a593Smuzhiyun /* supply for ab8500-vaudio, VAUDIO LDO */
361*4882a593Smuzhiyun [AB8500_LDO_AUDIO] = {
362*4882a593Smuzhiyun .constraints = {
363*4882a593Smuzhiyun .name = "V-AUD",
364*4882a593Smuzhiyun .valid_ops_mask = REGULATOR_CHANGE_STATUS,
365*4882a593Smuzhiyun },
366*4882a593Smuzhiyun .num_consumer_supplies = ARRAY_SIZE(ab8500_vaud_consumers),
367*4882a593Smuzhiyun .consumer_supplies = ab8500_vaud_consumers,
368*4882a593Smuzhiyun },
369*4882a593Smuzhiyun /* supply for v-anamic1 VAMic1-LDO */
370*4882a593Smuzhiyun [AB8500_LDO_ANAMIC1] = {
371*4882a593Smuzhiyun .constraints = {
372*4882a593Smuzhiyun .name = "V-AMIC1",
373*4882a593Smuzhiyun .valid_ops_mask = REGULATOR_CHANGE_STATUS,
374*4882a593Smuzhiyun },
375*4882a593Smuzhiyun .num_consumer_supplies = ARRAY_SIZE(ab8500_vamic1_consumers),
376*4882a593Smuzhiyun .consumer_supplies = ab8500_vamic1_consumers,
377*4882a593Smuzhiyun },
378*4882a593Smuzhiyun /* supply for v-amic2, VAMIC2 LDO, reuse constants for AMIC1 */
379*4882a593Smuzhiyun [AB8500_LDO_ANAMIC2] = {
380*4882a593Smuzhiyun .constraints = {
381*4882a593Smuzhiyun .name = "V-AMIC2",
382*4882a593Smuzhiyun .valid_ops_mask = REGULATOR_CHANGE_STATUS,
383*4882a593Smuzhiyun },
384*4882a593Smuzhiyun .num_consumer_supplies = ARRAY_SIZE(ab8500_vamic2_consumers),
385*4882a593Smuzhiyun .consumer_supplies = ab8500_vamic2_consumers,
386*4882a593Smuzhiyun },
387*4882a593Smuzhiyun /* supply for v-dmic, VDMIC LDO */
388*4882a593Smuzhiyun [AB8500_LDO_DMIC] = {
389*4882a593Smuzhiyun .constraints = {
390*4882a593Smuzhiyun .name = "V-DMIC",
391*4882a593Smuzhiyun .valid_ops_mask = REGULATOR_CHANGE_STATUS,
392*4882a593Smuzhiyun },
393*4882a593Smuzhiyun .num_consumer_supplies = ARRAY_SIZE(ab8500_vdmic_consumers),
394*4882a593Smuzhiyun .consumer_supplies = ab8500_vdmic_consumers,
395*4882a593Smuzhiyun },
396*4882a593Smuzhiyun /* supply for v-intcore12, VINTCORE12 LDO */
397*4882a593Smuzhiyun [AB8500_LDO_INTCORE] = {
398*4882a593Smuzhiyun .constraints = {
399*4882a593Smuzhiyun .name = "V-INTCORE",
400*4882a593Smuzhiyun .min_uV = 1250000,
401*4882a593Smuzhiyun .max_uV = 1350000,
402*4882a593Smuzhiyun .input_uV = 1800000,
403*4882a593Smuzhiyun .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
404*4882a593Smuzhiyun REGULATOR_CHANGE_STATUS |
405*4882a593Smuzhiyun REGULATOR_CHANGE_MODE |
406*4882a593Smuzhiyun REGULATOR_CHANGE_DRMS,
407*4882a593Smuzhiyun .valid_modes_mask = REGULATOR_MODE_NORMAL |
408*4882a593Smuzhiyun REGULATOR_MODE_IDLE,
409*4882a593Smuzhiyun },
410*4882a593Smuzhiyun .num_consumer_supplies = ARRAY_SIZE(ab8500_vintcore_consumers),
411*4882a593Smuzhiyun .consumer_supplies = ab8500_vintcore_consumers,
412*4882a593Smuzhiyun },
413*4882a593Smuzhiyun /* supply for U8500 CSI-DSI, VANA LDO */
414*4882a593Smuzhiyun [AB8500_LDO_ANA] = {
415*4882a593Smuzhiyun .constraints = {
416*4882a593Smuzhiyun .name = "V-CSI-DSI",
417*4882a593Smuzhiyun .valid_ops_mask = REGULATOR_CHANGE_STATUS,
418*4882a593Smuzhiyun },
419*4882a593Smuzhiyun .num_consumer_supplies = ARRAY_SIZE(ab8500_vana_consumers),
420*4882a593Smuzhiyun .consumer_supplies = ab8500_vana_consumers,
421*4882a593Smuzhiyun },
422*4882a593Smuzhiyun };
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun /* supply for VextSupply3 */
425*4882a593Smuzhiyun static struct regulator_consumer_supply ab8500_ext_supply3_consumers[] = {
426*4882a593Smuzhiyun /* SIM supply for 3 V SIM cards */
427*4882a593Smuzhiyun REGULATOR_SUPPLY("vinvsim", "sim-detect.0"),
428*4882a593Smuzhiyun };
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun /*
431*4882a593Smuzhiyun * AB8500 external regulators
432*4882a593Smuzhiyun */
433*4882a593Smuzhiyun static struct regulator_init_data ab8500_ext_regulators[] = {
434*4882a593Smuzhiyun /* fixed Vbat supplies VSMPS1_EXT_1V8 */
435*4882a593Smuzhiyun [AB8500_EXT_SUPPLY1] = {
436*4882a593Smuzhiyun .constraints = {
437*4882a593Smuzhiyun .name = "ab8500-ext-supply1",
438*4882a593Smuzhiyun .min_uV = 1800000,
439*4882a593Smuzhiyun .max_uV = 1800000,
440*4882a593Smuzhiyun .initial_mode = REGULATOR_MODE_IDLE,
441*4882a593Smuzhiyun .boot_on = 1,
442*4882a593Smuzhiyun .always_on = 1,
443*4882a593Smuzhiyun },
444*4882a593Smuzhiyun },
445*4882a593Smuzhiyun /* fixed Vbat supplies VSMPS2_EXT_1V36 and VSMPS5_EXT_1V15 */
446*4882a593Smuzhiyun [AB8500_EXT_SUPPLY2] = {
447*4882a593Smuzhiyun .constraints = {
448*4882a593Smuzhiyun .name = "ab8500-ext-supply2",
449*4882a593Smuzhiyun .min_uV = 1360000,
450*4882a593Smuzhiyun .max_uV = 1360000,
451*4882a593Smuzhiyun },
452*4882a593Smuzhiyun },
453*4882a593Smuzhiyun /* fixed Vbat supplies VSMPS3_EXT_3V4 and VSMPS4_EXT_3V4 */
454*4882a593Smuzhiyun [AB8500_EXT_SUPPLY3] = {
455*4882a593Smuzhiyun .constraints = {
456*4882a593Smuzhiyun .name = "ab8500-ext-supply3",
457*4882a593Smuzhiyun .min_uV = 3400000,
458*4882a593Smuzhiyun .max_uV = 3400000,
459*4882a593Smuzhiyun .valid_ops_mask = REGULATOR_CHANGE_STATUS,
460*4882a593Smuzhiyun .boot_on = 1,
461*4882a593Smuzhiyun },
462*4882a593Smuzhiyun .num_consumer_supplies =
463*4882a593Smuzhiyun ARRAY_SIZE(ab8500_ext_supply3_consumers),
464*4882a593Smuzhiyun .consumer_supplies = ab8500_ext_supply3_consumers,
465*4882a593Smuzhiyun },
466*4882a593Smuzhiyun };
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun static struct ab8500_regulator_platform_data ab8500_regulator_plat_data = {
469*4882a593Smuzhiyun .reg_init = ab8500_reg_init,
470*4882a593Smuzhiyun .num_reg_init = ARRAY_SIZE(ab8500_reg_init),
471*4882a593Smuzhiyun .regulator = ab8500_regulators,
472*4882a593Smuzhiyun .num_regulator = ARRAY_SIZE(ab8500_regulators),
473*4882a593Smuzhiyun .ext_regulator = ab8500_ext_regulators,
474*4882a593Smuzhiyun .num_ext_regulator = ARRAY_SIZE(ab8500_ext_regulators),
475*4882a593Smuzhiyun };
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun /**
478*4882a593Smuzhiyun * struct ab8500_ext_regulator_info - ab8500 regulator information
479*4882a593Smuzhiyun * @dev: device pointer
480*4882a593Smuzhiyun * @desc: regulator description
481*4882a593Smuzhiyun * @cfg: regulator configuration (extension of regulator FW configuration)
482*4882a593Smuzhiyun * @update_bank: bank to control on/off
483*4882a593Smuzhiyun * @update_reg: register to control on/off
484*4882a593Smuzhiyun * @update_mask: mask to enable/disable and set mode of regulator
485*4882a593Smuzhiyun * @update_val: bits holding the regulator current mode
486*4882a593Smuzhiyun * @update_val_hp: bits to set EN pin active (LPn pin deactive)
487*4882a593Smuzhiyun * normally this means high power mode
488*4882a593Smuzhiyun * @update_val_lp: bits to set EN pin active and LPn pin active
489*4882a593Smuzhiyun * normally this means low power mode
490*4882a593Smuzhiyun * @update_val_hw: bits to set regulator pins in HW control
491*4882a593Smuzhiyun * SysClkReq pins and logic will choose mode
492*4882a593Smuzhiyun */
493*4882a593Smuzhiyun struct ab8500_ext_regulator_info {
494*4882a593Smuzhiyun struct device *dev;
495*4882a593Smuzhiyun struct regulator_desc desc;
496*4882a593Smuzhiyun struct ab8500_ext_regulator_cfg *cfg;
497*4882a593Smuzhiyun u8 update_bank;
498*4882a593Smuzhiyun u8 update_reg;
499*4882a593Smuzhiyun u8 update_mask;
500*4882a593Smuzhiyun u8 update_val;
501*4882a593Smuzhiyun u8 update_val_hp;
502*4882a593Smuzhiyun u8 update_val_lp;
503*4882a593Smuzhiyun u8 update_val_hw;
504*4882a593Smuzhiyun };
505*4882a593Smuzhiyun
ab8500_ext_regulator_enable(struct regulator_dev * rdev)506*4882a593Smuzhiyun static int ab8500_ext_regulator_enable(struct regulator_dev *rdev)
507*4882a593Smuzhiyun {
508*4882a593Smuzhiyun int ret;
509*4882a593Smuzhiyun struct ab8500_ext_regulator_info *info = rdev_get_drvdata(rdev);
510*4882a593Smuzhiyun u8 regval;
511*4882a593Smuzhiyun
512*4882a593Smuzhiyun if (info == NULL) {
513*4882a593Smuzhiyun dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
514*4882a593Smuzhiyun return -EINVAL;
515*4882a593Smuzhiyun }
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun /*
518*4882a593Smuzhiyun * To satisfy both HW high power request and SW request, the regulator
519*4882a593Smuzhiyun * must be on in high power.
520*4882a593Smuzhiyun */
521*4882a593Smuzhiyun if (info->cfg && info->cfg->hwreq)
522*4882a593Smuzhiyun regval = info->update_val_hp;
523*4882a593Smuzhiyun else
524*4882a593Smuzhiyun regval = info->update_val;
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun ret = abx500_mask_and_set_register_interruptible(info->dev,
527*4882a593Smuzhiyun info->update_bank, info->update_reg,
528*4882a593Smuzhiyun info->update_mask, regval);
529*4882a593Smuzhiyun if (ret < 0) {
530*4882a593Smuzhiyun dev_err(rdev_get_dev(rdev),
531*4882a593Smuzhiyun "couldn't set enable bits for regulator\n");
532*4882a593Smuzhiyun return ret;
533*4882a593Smuzhiyun }
534*4882a593Smuzhiyun
535*4882a593Smuzhiyun dev_dbg(rdev_get_dev(rdev),
536*4882a593Smuzhiyun "%s-enable (bank, reg, mask, value): 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
537*4882a593Smuzhiyun info->desc.name, info->update_bank, info->update_reg,
538*4882a593Smuzhiyun info->update_mask, regval);
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun return 0;
541*4882a593Smuzhiyun }
542*4882a593Smuzhiyun
ab8500_ext_regulator_disable(struct regulator_dev * rdev)543*4882a593Smuzhiyun static int ab8500_ext_regulator_disable(struct regulator_dev *rdev)
544*4882a593Smuzhiyun {
545*4882a593Smuzhiyun int ret;
546*4882a593Smuzhiyun struct ab8500_ext_regulator_info *info = rdev_get_drvdata(rdev);
547*4882a593Smuzhiyun u8 regval;
548*4882a593Smuzhiyun
549*4882a593Smuzhiyun if (info == NULL) {
550*4882a593Smuzhiyun dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
551*4882a593Smuzhiyun return -EINVAL;
552*4882a593Smuzhiyun }
553*4882a593Smuzhiyun
554*4882a593Smuzhiyun /*
555*4882a593Smuzhiyun * Set the regulator in HW request mode if configured
556*4882a593Smuzhiyun */
557*4882a593Smuzhiyun if (info->cfg && info->cfg->hwreq)
558*4882a593Smuzhiyun regval = info->update_val_hw;
559*4882a593Smuzhiyun else
560*4882a593Smuzhiyun regval = 0;
561*4882a593Smuzhiyun
562*4882a593Smuzhiyun ret = abx500_mask_and_set_register_interruptible(info->dev,
563*4882a593Smuzhiyun info->update_bank, info->update_reg,
564*4882a593Smuzhiyun info->update_mask, regval);
565*4882a593Smuzhiyun if (ret < 0) {
566*4882a593Smuzhiyun dev_err(rdev_get_dev(rdev),
567*4882a593Smuzhiyun "couldn't set disable bits for regulator\n");
568*4882a593Smuzhiyun return ret;
569*4882a593Smuzhiyun }
570*4882a593Smuzhiyun
571*4882a593Smuzhiyun dev_dbg(rdev_get_dev(rdev), "%s-disable (bank, reg, mask, value):"
572*4882a593Smuzhiyun " 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
573*4882a593Smuzhiyun info->desc.name, info->update_bank, info->update_reg,
574*4882a593Smuzhiyun info->update_mask, regval);
575*4882a593Smuzhiyun
576*4882a593Smuzhiyun return 0;
577*4882a593Smuzhiyun }
578*4882a593Smuzhiyun
ab8500_ext_regulator_is_enabled(struct regulator_dev * rdev)579*4882a593Smuzhiyun static int ab8500_ext_regulator_is_enabled(struct regulator_dev *rdev)
580*4882a593Smuzhiyun {
581*4882a593Smuzhiyun int ret;
582*4882a593Smuzhiyun struct ab8500_ext_regulator_info *info = rdev_get_drvdata(rdev);
583*4882a593Smuzhiyun u8 regval;
584*4882a593Smuzhiyun
585*4882a593Smuzhiyun if (info == NULL) {
586*4882a593Smuzhiyun dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
587*4882a593Smuzhiyun return -EINVAL;
588*4882a593Smuzhiyun }
589*4882a593Smuzhiyun
590*4882a593Smuzhiyun ret = abx500_get_register_interruptible(info->dev,
591*4882a593Smuzhiyun info->update_bank, info->update_reg, ®val);
592*4882a593Smuzhiyun if (ret < 0) {
593*4882a593Smuzhiyun dev_err(rdev_get_dev(rdev),
594*4882a593Smuzhiyun "couldn't read 0x%x register\n", info->update_reg);
595*4882a593Smuzhiyun return ret;
596*4882a593Smuzhiyun }
597*4882a593Smuzhiyun
598*4882a593Smuzhiyun dev_dbg(rdev_get_dev(rdev), "%s-is_enabled (bank, reg, mask, value):"
599*4882a593Smuzhiyun " 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
600*4882a593Smuzhiyun info->desc.name, info->update_bank, info->update_reg,
601*4882a593Smuzhiyun info->update_mask, regval);
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun if (((regval & info->update_mask) == info->update_val_lp) ||
604*4882a593Smuzhiyun ((regval & info->update_mask) == info->update_val_hp))
605*4882a593Smuzhiyun return 1;
606*4882a593Smuzhiyun else
607*4882a593Smuzhiyun return 0;
608*4882a593Smuzhiyun }
609*4882a593Smuzhiyun
ab8500_ext_regulator_set_mode(struct regulator_dev * rdev,unsigned int mode)610*4882a593Smuzhiyun static int ab8500_ext_regulator_set_mode(struct regulator_dev *rdev,
611*4882a593Smuzhiyun unsigned int mode)
612*4882a593Smuzhiyun {
613*4882a593Smuzhiyun int ret = 0;
614*4882a593Smuzhiyun struct ab8500_ext_regulator_info *info = rdev_get_drvdata(rdev);
615*4882a593Smuzhiyun u8 regval;
616*4882a593Smuzhiyun
617*4882a593Smuzhiyun if (info == NULL) {
618*4882a593Smuzhiyun dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
619*4882a593Smuzhiyun return -EINVAL;
620*4882a593Smuzhiyun }
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun switch (mode) {
623*4882a593Smuzhiyun case REGULATOR_MODE_NORMAL:
624*4882a593Smuzhiyun regval = info->update_val_hp;
625*4882a593Smuzhiyun break;
626*4882a593Smuzhiyun case REGULATOR_MODE_IDLE:
627*4882a593Smuzhiyun regval = info->update_val_lp;
628*4882a593Smuzhiyun break;
629*4882a593Smuzhiyun
630*4882a593Smuzhiyun default:
631*4882a593Smuzhiyun return -EINVAL;
632*4882a593Smuzhiyun }
633*4882a593Smuzhiyun
634*4882a593Smuzhiyun /* If regulator is enabled and info->cfg->hwreq is set, the regulator
635*4882a593Smuzhiyun must be on in high power, so we don't need to write the register with
636*4882a593Smuzhiyun the same value.
637*4882a593Smuzhiyun */
638*4882a593Smuzhiyun if (ab8500_ext_regulator_is_enabled(rdev) &&
639*4882a593Smuzhiyun !(info->cfg && info->cfg->hwreq)) {
640*4882a593Smuzhiyun ret = abx500_mask_and_set_register_interruptible(info->dev,
641*4882a593Smuzhiyun info->update_bank, info->update_reg,
642*4882a593Smuzhiyun info->update_mask, regval);
643*4882a593Smuzhiyun if (ret < 0) {
644*4882a593Smuzhiyun dev_err(rdev_get_dev(rdev),
645*4882a593Smuzhiyun "Could not set regulator mode.\n");
646*4882a593Smuzhiyun return ret;
647*4882a593Smuzhiyun }
648*4882a593Smuzhiyun
649*4882a593Smuzhiyun dev_dbg(rdev_get_dev(rdev),
650*4882a593Smuzhiyun "%s-set_mode (bank, reg, mask, value): "
651*4882a593Smuzhiyun "0x%x, 0x%x, 0x%x, 0x%x\n",
652*4882a593Smuzhiyun info->desc.name, info->update_bank, info->update_reg,
653*4882a593Smuzhiyun info->update_mask, regval);
654*4882a593Smuzhiyun }
655*4882a593Smuzhiyun
656*4882a593Smuzhiyun info->update_val = regval;
657*4882a593Smuzhiyun
658*4882a593Smuzhiyun return 0;
659*4882a593Smuzhiyun }
660*4882a593Smuzhiyun
ab8500_ext_regulator_get_mode(struct regulator_dev * rdev)661*4882a593Smuzhiyun static unsigned int ab8500_ext_regulator_get_mode(struct regulator_dev *rdev)
662*4882a593Smuzhiyun {
663*4882a593Smuzhiyun struct ab8500_ext_regulator_info *info = rdev_get_drvdata(rdev);
664*4882a593Smuzhiyun int ret;
665*4882a593Smuzhiyun
666*4882a593Smuzhiyun if (info == NULL) {
667*4882a593Smuzhiyun dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
668*4882a593Smuzhiyun return -EINVAL;
669*4882a593Smuzhiyun }
670*4882a593Smuzhiyun
671*4882a593Smuzhiyun if (info->update_val == info->update_val_hp)
672*4882a593Smuzhiyun ret = REGULATOR_MODE_NORMAL;
673*4882a593Smuzhiyun else if (info->update_val == info->update_val_lp)
674*4882a593Smuzhiyun ret = REGULATOR_MODE_IDLE;
675*4882a593Smuzhiyun else
676*4882a593Smuzhiyun ret = -EINVAL;
677*4882a593Smuzhiyun
678*4882a593Smuzhiyun return ret;
679*4882a593Smuzhiyun }
680*4882a593Smuzhiyun
ab8500_ext_set_voltage(struct regulator_dev * rdev,int min_uV,int max_uV,unsigned * selector)681*4882a593Smuzhiyun static int ab8500_ext_set_voltage(struct regulator_dev *rdev, int min_uV,
682*4882a593Smuzhiyun int max_uV, unsigned *selector)
683*4882a593Smuzhiyun {
684*4882a593Smuzhiyun struct regulation_constraints *regu_constraints = rdev->constraints;
685*4882a593Smuzhiyun
686*4882a593Smuzhiyun if (!regu_constraints) {
687*4882a593Smuzhiyun dev_err(rdev_get_dev(rdev), "No regulator constraints\n");
688*4882a593Smuzhiyun return -EINVAL;
689*4882a593Smuzhiyun }
690*4882a593Smuzhiyun
691*4882a593Smuzhiyun if (regu_constraints->min_uV == min_uV &&
692*4882a593Smuzhiyun regu_constraints->max_uV == max_uV)
693*4882a593Smuzhiyun return 0;
694*4882a593Smuzhiyun
695*4882a593Smuzhiyun dev_err(rdev_get_dev(rdev),
696*4882a593Smuzhiyun "Requested min %duV max %duV != constrained min %duV max %duV\n",
697*4882a593Smuzhiyun min_uV, max_uV,
698*4882a593Smuzhiyun regu_constraints->min_uV, regu_constraints->max_uV);
699*4882a593Smuzhiyun
700*4882a593Smuzhiyun return -EINVAL;
701*4882a593Smuzhiyun }
702*4882a593Smuzhiyun
ab8500_ext_list_voltage(struct regulator_dev * rdev,unsigned selector)703*4882a593Smuzhiyun static int ab8500_ext_list_voltage(struct regulator_dev *rdev,
704*4882a593Smuzhiyun unsigned selector)
705*4882a593Smuzhiyun {
706*4882a593Smuzhiyun struct regulation_constraints *regu_constraints = rdev->constraints;
707*4882a593Smuzhiyun
708*4882a593Smuzhiyun if (regu_constraints == NULL) {
709*4882a593Smuzhiyun dev_err(rdev_get_dev(rdev), "regulator constraints null pointer\n");
710*4882a593Smuzhiyun return -EINVAL;
711*4882a593Smuzhiyun }
712*4882a593Smuzhiyun /* return the uV for the fixed regulators */
713*4882a593Smuzhiyun if (regu_constraints->min_uV && regu_constraints->max_uV) {
714*4882a593Smuzhiyun if (regu_constraints->min_uV == regu_constraints->max_uV)
715*4882a593Smuzhiyun return regu_constraints->min_uV;
716*4882a593Smuzhiyun }
717*4882a593Smuzhiyun return -EINVAL;
718*4882a593Smuzhiyun }
719*4882a593Smuzhiyun
720*4882a593Smuzhiyun static const struct regulator_ops ab8500_ext_regulator_ops = {
721*4882a593Smuzhiyun .enable = ab8500_ext_regulator_enable,
722*4882a593Smuzhiyun .disable = ab8500_ext_regulator_disable,
723*4882a593Smuzhiyun .is_enabled = ab8500_ext_regulator_is_enabled,
724*4882a593Smuzhiyun .set_mode = ab8500_ext_regulator_set_mode,
725*4882a593Smuzhiyun .get_mode = ab8500_ext_regulator_get_mode,
726*4882a593Smuzhiyun .set_voltage = ab8500_ext_set_voltage,
727*4882a593Smuzhiyun .list_voltage = ab8500_ext_list_voltage,
728*4882a593Smuzhiyun };
729*4882a593Smuzhiyun
730*4882a593Smuzhiyun static struct ab8500_ext_regulator_info
731*4882a593Smuzhiyun ab8500_ext_regulator_info[AB8500_NUM_EXT_REGULATORS] = {
732*4882a593Smuzhiyun [AB8500_EXT_SUPPLY1] = {
733*4882a593Smuzhiyun .desc = {
734*4882a593Smuzhiyun .name = "VEXTSUPPLY1",
735*4882a593Smuzhiyun .of_match = of_match_ptr("ab8500_ext1"),
736*4882a593Smuzhiyun .ops = &ab8500_ext_regulator_ops,
737*4882a593Smuzhiyun .type = REGULATOR_VOLTAGE,
738*4882a593Smuzhiyun .id = AB8500_EXT_SUPPLY1,
739*4882a593Smuzhiyun .owner = THIS_MODULE,
740*4882a593Smuzhiyun .n_voltages = 1,
741*4882a593Smuzhiyun },
742*4882a593Smuzhiyun .update_bank = 0x04,
743*4882a593Smuzhiyun .update_reg = 0x08,
744*4882a593Smuzhiyun .update_mask = 0x03,
745*4882a593Smuzhiyun .update_val = 0x01,
746*4882a593Smuzhiyun .update_val_hp = 0x01,
747*4882a593Smuzhiyun .update_val_lp = 0x03,
748*4882a593Smuzhiyun .update_val_hw = 0x02,
749*4882a593Smuzhiyun },
750*4882a593Smuzhiyun [AB8500_EXT_SUPPLY2] = {
751*4882a593Smuzhiyun .desc = {
752*4882a593Smuzhiyun .name = "VEXTSUPPLY2",
753*4882a593Smuzhiyun .of_match = of_match_ptr("ab8500_ext2"),
754*4882a593Smuzhiyun .ops = &ab8500_ext_regulator_ops,
755*4882a593Smuzhiyun .type = REGULATOR_VOLTAGE,
756*4882a593Smuzhiyun .id = AB8500_EXT_SUPPLY2,
757*4882a593Smuzhiyun .owner = THIS_MODULE,
758*4882a593Smuzhiyun .n_voltages = 1,
759*4882a593Smuzhiyun },
760*4882a593Smuzhiyun .update_bank = 0x04,
761*4882a593Smuzhiyun .update_reg = 0x08,
762*4882a593Smuzhiyun .update_mask = 0x0c,
763*4882a593Smuzhiyun .update_val = 0x04,
764*4882a593Smuzhiyun .update_val_hp = 0x04,
765*4882a593Smuzhiyun .update_val_lp = 0x0c,
766*4882a593Smuzhiyun .update_val_hw = 0x08,
767*4882a593Smuzhiyun },
768*4882a593Smuzhiyun [AB8500_EXT_SUPPLY3] = {
769*4882a593Smuzhiyun .desc = {
770*4882a593Smuzhiyun .name = "VEXTSUPPLY3",
771*4882a593Smuzhiyun .of_match = of_match_ptr("ab8500_ext3"),
772*4882a593Smuzhiyun .ops = &ab8500_ext_regulator_ops,
773*4882a593Smuzhiyun .type = REGULATOR_VOLTAGE,
774*4882a593Smuzhiyun .id = AB8500_EXT_SUPPLY3,
775*4882a593Smuzhiyun .owner = THIS_MODULE,
776*4882a593Smuzhiyun .n_voltages = 1,
777*4882a593Smuzhiyun },
778*4882a593Smuzhiyun .update_bank = 0x04,
779*4882a593Smuzhiyun .update_reg = 0x08,
780*4882a593Smuzhiyun .update_mask = 0x30,
781*4882a593Smuzhiyun .update_val = 0x10,
782*4882a593Smuzhiyun .update_val_hp = 0x10,
783*4882a593Smuzhiyun .update_val_lp = 0x30,
784*4882a593Smuzhiyun .update_val_hw = 0x20,
785*4882a593Smuzhiyun },
786*4882a593Smuzhiyun };
787*4882a593Smuzhiyun
ab8500_ext_regulator_probe(struct platform_device * pdev)788*4882a593Smuzhiyun static int ab8500_ext_regulator_probe(struct platform_device *pdev)
789*4882a593Smuzhiyun {
790*4882a593Smuzhiyun struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
791*4882a593Smuzhiyun struct ab8500_regulator_platform_data *pdata = &ab8500_regulator_plat_data;
792*4882a593Smuzhiyun struct regulator_config config = { };
793*4882a593Smuzhiyun struct regulator_dev *rdev;
794*4882a593Smuzhiyun int i;
795*4882a593Smuzhiyun
796*4882a593Smuzhiyun if (!ab8500) {
797*4882a593Smuzhiyun dev_err(&pdev->dev, "null mfd parent\n");
798*4882a593Smuzhiyun return -EINVAL;
799*4882a593Smuzhiyun }
800*4882a593Smuzhiyun
801*4882a593Smuzhiyun /* make sure the platform data has the correct size */
802*4882a593Smuzhiyun if (pdata->num_ext_regulator != ARRAY_SIZE(ab8500_ext_regulator_info)) {
803*4882a593Smuzhiyun dev_err(&pdev->dev, "Configuration error: size mismatch.\n");
804*4882a593Smuzhiyun return -EINVAL;
805*4882a593Smuzhiyun }
806*4882a593Smuzhiyun
807*4882a593Smuzhiyun /* check for AB8500 2.x */
808*4882a593Smuzhiyun if (is_ab8500_2p0_or_earlier(ab8500)) {
809*4882a593Smuzhiyun struct ab8500_ext_regulator_info *info;
810*4882a593Smuzhiyun
811*4882a593Smuzhiyun /* VextSupply3LPn is inverted on AB8500 2.x */
812*4882a593Smuzhiyun info = &ab8500_ext_regulator_info[AB8500_EXT_SUPPLY3];
813*4882a593Smuzhiyun info->update_val = 0x30;
814*4882a593Smuzhiyun info->update_val_hp = 0x30;
815*4882a593Smuzhiyun info->update_val_lp = 0x10;
816*4882a593Smuzhiyun }
817*4882a593Smuzhiyun
818*4882a593Smuzhiyun /* register all regulators */
819*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(ab8500_ext_regulator_info); i++) {
820*4882a593Smuzhiyun struct ab8500_ext_regulator_info *info = NULL;
821*4882a593Smuzhiyun
822*4882a593Smuzhiyun /* assign per-regulator data */
823*4882a593Smuzhiyun info = &ab8500_ext_regulator_info[i];
824*4882a593Smuzhiyun info->dev = &pdev->dev;
825*4882a593Smuzhiyun info->cfg = (struct ab8500_ext_regulator_cfg *)
826*4882a593Smuzhiyun pdata->ext_regulator[i].driver_data;
827*4882a593Smuzhiyun
828*4882a593Smuzhiyun config.dev = &pdev->dev;
829*4882a593Smuzhiyun config.driver_data = info;
830*4882a593Smuzhiyun config.init_data = &pdata->ext_regulator[i];
831*4882a593Smuzhiyun
832*4882a593Smuzhiyun /* register regulator with framework */
833*4882a593Smuzhiyun rdev = devm_regulator_register(&pdev->dev, &info->desc,
834*4882a593Smuzhiyun &config);
835*4882a593Smuzhiyun if (IS_ERR(rdev)) {
836*4882a593Smuzhiyun dev_err(&pdev->dev, "failed to register regulator %s\n",
837*4882a593Smuzhiyun info->desc.name);
838*4882a593Smuzhiyun return PTR_ERR(rdev);
839*4882a593Smuzhiyun }
840*4882a593Smuzhiyun
841*4882a593Smuzhiyun dev_dbg(&pdev->dev, "%s-probed\n", info->desc.name);
842*4882a593Smuzhiyun }
843*4882a593Smuzhiyun
844*4882a593Smuzhiyun return 0;
845*4882a593Smuzhiyun }
846*4882a593Smuzhiyun
847*4882a593Smuzhiyun static struct platform_driver ab8500_ext_regulator_driver = {
848*4882a593Smuzhiyun .probe = ab8500_ext_regulator_probe,
849*4882a593Smuzhiyun .driver = {
850*4882a593Smuzhiyun .name = "ab8500-ext-regulator",
851*4882a593Smuzhiyun },
852*4882a593Smuzhiyun };
853*4882a593Smuzhiyun
ab8500_ext_regulator_init(void)854*4882a593Smuzhiyun static int __init ab8500_ext_regulator_init(void)
855*4882a593Smuzhiyun {
856*4882a593Smuzhiyun int ret;
857*4882a593Smuzhiyun
858*4882a593Smuzhiyun ret = platform_driver_register(&ab8500_ext_regulator_driver);
859*4882a593Smuzhiyun if (ret)
860*4882a593Smuzhiyun pr_err("Failed to register ab8500 ext regulator: %d\n", ret);
861*4882a593Smuzhiyun
862*4882a593Smuzhiyun return ret;
863*4882a593Smuzhiyun }
864*4882a593Smuzhiyun subsys_initcall(ab8500_ext_regulator_init);
865*4882a593Smuzhiyun
ab8500_ext_regulator_exit(void)866*4882a593Smuzhiyun static void __exit ab8500_ext_regulator_exit(void)
867*4882a593Smuzhiyun {
868*4882a593Smuzhiyun platform_driver_unregister(&ab8500_ext_regulator_driver);
869*4882a593Smuzhiyun }
870*4882a593Smuzhiyun module_exit(ab8500_ext_regulator_exit);
871*4882a593Smuzhiyun
872*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
873*4882a593Smuzhiyun MODULE_AUTHOR("Bengt Jonsson <bengt.g.jonsson@stericsson.com>");
874*4882a593Smuzhiyun MODULE_DESCRIPTION("AB8500 external regulator driver");
875*4882a593Smuzhiyun MODULE_ALIAS("platform:ab8500-ext-regulator");
876