xref: /OK3568_Linux_fs/kernel/drivers/regulator/88pm8607.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Regulators driver for Marvell 88PM8607
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2009 Marvell International Ltd.
6*4882a593Smuzhiyun  *	Haojian Zhuang <haojian.zhuang@marvell.com>
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun #include <linux/kernel.h>
9*4882a593Smuzhiyun #include <linux/init.h>
10*4882a593Smuzhiyun #include <linux/err.h>
11*4882a593Smuzhiyun #include <linux/of.h>
12*4882a593Smuzhiyun #include <linux/regulator/of_regulator.h>
13*4882a593Smuzhiyun #include <linux/platform_device.h>
14*4882a593Smuzhiyun #include <linux/regulator/driver.h>
15*4882a593Smuzhiyun #include <linux/regulator/machine.h>
16*4882a593Smuzhiyun #include <linux/mfd/88pm860x.h>
17*4882a593Smuzhiyun #include <linux/module.h>
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun struct pm8607_regulator_info {
20*4882a593Smuzhiyun 	struct regulator_desc	desc;
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun 	unsigned int	*vol_suspend;
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun 	int	slope_double;
25*4882a593Smuzhiyun };
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun static const unsigned int BUCK1_table[] = {
28*4882a593Smuzhiyun 	 725000,  750000,  775000,  800000,  825000,  850000,  875000,  900000,
29*4882a593Smuzhiyun 	 925000,  950000,  975000, 1000000, 1025000, 1050000, 1075000, 1100000,
30*4882a593Smuzhiyun 	1125000, 1150000, 1175000, 1200000, 1225000, 1250000, 1275000, 1300000,
31*4882a593Smuzhiyun 	1325000, 1350000, 1375000, 1400000, 1425000, 1450000, 1475000, 1500000,
32*4882a593Smuzhiyun 	      0,   25000,   50000,   75000,  100000,  125000,  150000,  175000,
33*4882a593Smuzhiyun 	 200000,  225000,  250000,  275000,  300000,  325000,  350000,  375000,
34*4882a593Smuzhiyun 	 400000,  425000,  450000,  475000,  500000,  525000,  550000,  575000,
35*4882a593Smuzhiyun 	 600000,  625000,  650000,  675000,  700000,  725000,  750000,  775000,
36*4882a593Smuzhiyun };
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun static const unsigned int BUCK1_suspend_table[] = {
39*4882a593Smuzhiyun 	      0,   25000,   50000,   75000,  100000,  125000,  150000,  175000,
40*4882a593Smuzhiyun 	 200000,  225000,  250000,  275000,  300000,  325000,  350000,  375000,
41*4882a593Smuzhiyun 	 400000,  425000,  450000,  475000,  500000,  525000,  550000,  575000,
42*4882a593Smuzhiyun 	 600000,  625000,  650000,  675000,  700000,  725000,  750000,  775000,
43*4882a593Smuzhiyun 	 800000,  825000,  850000,  875000,  900000,  925000,  950000,  975000,
44*4882a593Smuzhiyun 	1000000, 1025000, 1050000, 1075000, 1100000, 1125000, 1150000, 1175000,
45*4882a593Smuzhiyun 	1200000, 1225000, 1250000, 1275000, 1300000, 1325000, 1350000, 1375000,
46*4882a593Smuzhiyun 	1400000, 1425000, 1450000, 1475000, 1500000, 1500000, 1500000, 1500000,
47*4882a593Smuzhiyun };
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun static const unsigned int BUCK2_table[] = {
50*4882a593Smuzhiyun 	      0,   50000,  100000,  150000,  200000,  250000,  300000,  350000,
51*4882a593Smuzhiyun 	 400000,  450000,  500000,  550000,  600000,  650000,  700000,  750000,
52*4882a593Smuzhiyun 	 800000,  850000,  900000,  950000, 1000000, 1050000, 1100000, 1150000,
53*4882a593Smuzhiyun 	1200000, 1250000, 1300000, 1350000, 1400000, 1450000, 1500000, 1550000,
54*4882a593Smuzhiyun 	1600000, 1650000, 1700000, 1750000, 1800000, 1850000, 1900000, 1950000,
55*4882a593Smuzhiyun 	2000000, 2050000, 2100000, 2150000, 2200000, 2250000, 2300000, 2350000,
56*4882a593Smuzhiyun 	2400000, 2450000, 2500000, 2550000, 2600000, 2650000, 2700000, 2750000,
57*4882a593Smuzhiyun 	2800000, 2850000, 2900000, 2950000, 3000000, 3000000, 3000000, 3000000,
58*4882a593Smuzhiyun };
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun static const unsigned int BUCK2_suspend_table[] = {
61*4882a593Smuzhiyun 	      0,   50000,  100000,  150000,  200000,  250000,  300000,  350000,
62*4882a593Smuzhiyun 	 400000,  450000,  500000,  550000,  600000,  650000,  700000,  750000,
63*4882a593Smuzhiyun 	 800000,  850000,  900000,  950000, 1000000, 1050000, 1100000, 1150000,
64*4882a593Smuzhiyun 	1200000, 1250000, 1300000, 1350000, 1400000, 1450000, 1500000, 1550000,
65*4882a593Smuzhiyun 	1600000, 1650000, 1700000, 1750000, 1800000, 1850000, 1900000, 1950000,
66*4882a593Smuzhiyun 	2000000, 2050000, 2100000, 2150000, 2200000, 2250000, 2300000, 2350000,
67*4882a593Smuzhiyun 	2400000, 2450000, 2500000, 2550000, 2600000, 2650000, 2700000, 2750000,
68*4882a593Smuzhiyun 	2800000, 2850000, 2900000, 2950000, 3000000, 3000000, 3000000, 3000000,
69*4882a593Smuzhiyun };
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun static const unsigned int BUCK3_table[] = {
72*4882a593Smuzhiyun 	      0,   25000,   50000,   75000,  100000,  125000,  150000,  175000,
73*4882a593Smuzhiyun 	 200000,  225000,  250000,  275000,  300000,  325000,  350000,  375000,
74*4882a593Smuzhiyun 	 400000,  425000,  450000,  475000,  500000,  525000,  550000,  575000,
75*4882a593Smuzhiyun 	 600000,  625000,  650000,  675000,  700000,  725000,  750000,  775000,
76*4882a593Smuzhiyun 	 800000,  825000,  850000,  875000,  900000,  925000,  950000,  975000,
77*4882a593Smuzhiyun 	1000000, 1025000, 1050000, 1075000, 1100000, 1125000, 1150000, 1175000,
78*4882a593Smuzhiyun 	1200000, 1225000, 1250000, 1275000, 1300000, 1325000, 1350000, 1375000,
79*4882a593Smuzhiyun 	1400000, 1425000, 1450000, 1475000, 1500000, 1500000, 1500000, 1500000,
80*4882a593Smuzhiyun };
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun static const unsigned int BUCK3_suspend_table[] = {
83*4882a593Smuzhiyun 	      0,   25000,   50000,   75000,  100000,  125000,  150000,  175000,
84*4882a593Smuzhiyun 	 200000,  225000,  250000,  275000,  300000,  325000,  350000,  375000,
85*4882a593Smuzhiyun 	 400000,  425000,  450000,  475000,  500000,  525000,  550000,  575000,
86*4882a593Smuzhiyun 	 600000,  625000,  650000,  675000,  700000,  725000,  750000,  775000,
87*4882a593Smuzhiyun 	 800000,  825000,  850000,  875000,  900000,  925000,  950000,  975000,
88*4882a593Smuzhiyun 	1000000, 1025000, 1050000, 1075000, 1100000, 1125000, 1150000, 1175000,
89*4882a593Smuzhiyun 	1200000, 1225000, 1250000, 1275000, 1300000, 1325000, 1350000, 1375000,
90*4882a593Smuzhiyun 	1400000, 1425000, 1450000, 1475000, 1500000, 1500000, 1500000, 1500000,
91*4882a593Smuzhiyun };
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun static const unsigned int LDO1_table[] = {
94*4882a593Smuzhiyun 	1800000, 1200000, 2800000, 0,
95*4882a593Smuzhiyun };
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun static const unsigned int LDO1_suspend_table[] = {
98*4882a593Smuzhiyun 	1800000, 1200000, 0, 0,
99*4882a593Smuzhiyun };
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun static const unsigned int LDO2_table[] = {
102*4882a593Smuzhiyun 	1800000, 1850000, 1900000, 2700000, 2750000, 2800000, 2850000, 3300000,
103*4882a593Smuzhiyun };
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun static const unsigned int LDO2_suspend_table[] = {
106*4882a593Smuzhiyun 	1800000, 1850000, 1900000, 2700000, 2750000, 2800000, 2850000, 2900000,
107*4882a593Smuzhiyun };
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun static const unsigned int LDO3_table[] = {
110*4882a593Smuzhiyun 	1800000, 1850000, 1900000, 2700000, 2750000, 2800000, 2850000, 3300000,
111*4882a593Smuzhiyun };
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun static const unsigned int LDO3_suspend_table[] = {
114*4882a593Smuzhiyun 	1800000, 1850000, 1900000, 2700000, 2750000, 2800000, 2850000, 2900000,
115*4882a593Smuzhiyun };
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun static const unsigned int LDO4_table[] = {
118*4882a593Smuzhiyun 	1800000, 1850000, 1900000, 2700000, 2750000, 2800000, 2900000, 3300000,
119*4882a593Smuzhiyun };
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun static const unsigned int LDO4_suspend_table[] = {
122*4882a593Smuzhiyun 	1800000, 1850000, 1900000, 2700000, 2750000, 2800000, 2900000, 2900000,
123*4882a593Smuzhiyun };
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun static const unsigned int LDO5_table[] = {
126*4882a593Smuzhiyun 	2900000, 3000000, 3100000, 3300000,
127*4882a593Smuzhiyun };
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun static const unsigned int LDO5_suspend_table[] = {
130*4882a593Smuzhiyun 	2900000, 0, 0, 0,
131*4882a593Smuzhiyun };
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun static const unsigned int LDO6_table[] = {
134*4882a593Smuzhiyun 	1800000, 1850000, 2600000, 2650000, 2700000, 2750000, 2800000, 3300000,
135*4882a593Smuzhiyun };
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun static const unsigned int LDO6_suspend_table[] = {
138*4882a593Smuzhiyun 	1800000, 1850000, 2600000, 2650000, 2700000, 2750000, 2800000, 2900000,
139*4882a593Smuzhiyun };
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun static const unsigned int LDO7_table[] = {
142*4882a593Smuzhiyun 	1800000, 1850000, 1900000, 2700000, 2750000, 2800000, 2850000, 2900000,
143*4882a593Smuzhiyun };
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun static const unsigned int LDO7_suspend_table[] = {
146*4882a593Smuzhiyun 	1800000, 1850000, 1900000, 2700000, 2750000, 2800000, 2850000, 2900000,
147*4882a593Smuzhiyun };
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun static const unsigned int LDO8_table[] = {
150*4882a593Smuzhiyun 	1800000, 1850000, 1900000, 2700000, 2750000, 2800000, 2850000, 2900000,
151*4882a593Smuzhiyun };
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun static const unsigned int LDO8_suspend_table[] = {
154*4882a593Smuzhiyun 	1800000, 1850000, 1900000, 2700000, 2750000, 2800000, 2850000, 2900000,
155*4882a593Smuzhiyun };
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun static const unsigned int LDO9_table[] = {
158*4882a593Smuzhiyun 	1800000, 1850000, 1900000, 2700000, 2750000, 2800000, 2850000, 3300000,
159*4882a593Smuzhiyun };
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun static const unsigned int LDO9_suspend_table[] = {
162*4882a593Smuzhiyun 	1800000, 1850000, 1900000, 2700000, 2750000, 2800000, 2850000, 2900000,
163*4882a593Smuzhiyun };
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun static const unsigned int LDO10_table[] = {
166*4882a593Smuzhiyun 	1800000, 1850000, 1900000, 2700000, 2750000, 2800000, 2850000, 3300000,
167*4882a593Smuzhiyun 	1200000, 1200000, 1200000, 1200000, 1200000, 1200000, 1200000, 1200000,
168*4882a593Smuzhiyun };
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun static const unsigned int LDO10_suspend_table[] = {
171*4882a593Smuzhiyun 	1800000, 1850000, 1900000, 2700000, 2750000, 2800000, 2850000, 2900000,
172*4882a593Smuzhiyun 	1200000, 1200000, 1200000, 1200000, 1200000, 1200000, 1200000, 1200000,
173*4882a593Smuzhiyun };
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun static const unsigned int LDO12_table[] = {
176*4882a593Smuzhiyun 	1800000, 1900000, 2700000, 2800000, 2900000, 3000000, 3100000, 3300000,
177*4882a593Smuzhiyun 	1200000, 1200000, 1200000, 1200000, 1200000, 1200000, 1200000, 1200000,
178*4882a593Smuzhiyun };
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun static const unsigned int LDO12_suspend_table[] = {
181*4882a593Smuzhiyun 	1800000, 1900000, 2700000, 2800000, 2900000, 2900000, 2900000, 2900000,
182*4882a593Smuzhiyun 	1200000, 1200000, 1200000, 1200000, 1200000, 1200000, 1200000, 1200000,
183*4882a593Smuzhiyun };
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun static const unsigned int LDO13_table[] = {
186*4882a593Smuzhiyun 	1200000, 1300000, 1800000, 2000000, 2500000, 2800000, 3000000, 0,
187*4882a593Smuzhiyun };
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun static const unsigned int LDO13_suspend_table[] = {
190*4882a593Smuzhiyun 	0,
191*4882a593Smuzhiyun };
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun static const unsigned int LDO14_table[] = {
194*4882a593Smuzhiyun 	1800000, 1850000, 2700000, 2750000, 2800000, 2850000, 2900000, 3300000,
195*4882a593Smuzhiyun };
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun static const unsigned int LDO14_suspend_table[] = {
198*4882a593Smuzhiyun 	1800000, 1850000, 2700000, 2750000, 2800000, 2850000, 2900000, 2900000,
199*4882a593Smuzhiyun };
200*4882a593Smuzhiyun 
pm8607_list_voltage(struct regulator_dev * rdev,unsigned index)201*4882a593Smuzhiyun static int pm8607_list_voltage(struct regulator_dev *rdev, unsigned index)
202*4882a593Smuzhiyun {
203*4882a593Smuzhiyun 	struct pm8607_regulator_info *info = rdev_get_drvdata(rdev);
204*4882a593Smuzhiyun 	int ret;
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun 	ret = regulator_list_voltage_table(rdev, index);
207*4882a593Smuzhiyun 	if (ret < 0)
208*4882a593Smuzhiyun 		return ret;
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun 	if (info->slope_double)
211*4882a593Smuzhiyun 		ret <<= 1;
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun 	return ret;
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun static const struct regulator_ops pm8607_regulator_ops = {
217*4882a593Smuzhiyun 	.list_voltage	= pm8607_list_voltage,
218*4882a593Smuzhiyun 	.set_voltage_sel = regulator_set_voltage_sel_regmap,
219*4882a593Smuzhiyun 	.get_voltage_sel = regulator_get_voltage_sel_regmap,
220*4882a593Smuzhiyun 	.enable = regulator_enable_regmap,
221*4882a593Smuzhiyun 	.disable = regulator_disable_regmap,
222*4882a593Smuzhiyun 	.is_enabled = regulator_is_enabled_regmap,
223*4882a593Smuzhiyun };
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun static const struct regulator_ops pm8606_preg_ops = {
226*4882a593Smuzhiyun 	.enable		= regulator_enable_regmap,
227*4882a593Smuzhiyun 	.disable	= regulator_disable_regmap,
228*4882a593Smuzhiyun 	.is_enabled	= regulator_is_enabled_regmap,
229*4882a593Smuzhiyun };
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun #define PM8606_PREG(ereg, ebit)						\
232*4882a593Smuzhiyun {									\
233*4882a593Smuzhiyun 	.desc	= {							\
234*4882a593Smuzhiyun 		.name	= "PREG",					\
235*4882a593Smuzhiyun 		.of_match = of_match_ptr("PREG"),			\
236*4882a593Smuzhiyun 		.regulators_node = of_match_ptr("regulators"),		\
237*4882a593Smuzhiyun 		.ops	= &pm8606_preg_ops,				\
238*4882a593Smuzhiyun 		.type	= REGULATOR_CURRENT,				\
239*4882a593Smuzhiyun 		.id	= PM8606_ID_PREG,				\
240*4882a593Smuzhiyun 		.owner	= THIS_MODULE,					\
241*4882a593Smuzhiyun 		.enable_reg = PM8606_##ereg,				\
242*4882a593Smuzhiyun 		.enable_mask = (ebit),					\
243*4882a593Smuzhiyun 		.enable_is_inverted = true,				\
244*4882a593Smuzhiyun 	},								\
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun #define PM8607_DVC(vreg, ureg, ubit, ereg, ebit)			\
248*4882a593Smuzhiyun {									\
249*4882a593Smuzhiyun 	.desc	= {							\
250*4882a593Smuzhiyun 		.name	= #vreg,					\
251*4882a593Smuzhiyun 		.of_match = of_match_ptr(#vreg),			\
252*4882a593Smuzhiyun 		.regulators_node = of_match_ptr("regulators"),		\
253*4882a593Smuzhiyun 		.ops	= &pm8607_regulator_ops,			\
254*4882a593Smuzhiyun 		.type	= REGULATOR_VOLTAGE,				\
255*4882a593Smuzhiyun 		.id	= PM8607_ID_##vreg,				\
256*4882a593Smuzhiyun 		.owner	= THIS_MODULE,					\
257*4882a593Smuzhiyun 		.volt_table = vreg##_table,				\
258*4882a593Smuzhiyun 		.n_voltages = ARRAY_SIZE(vreg##_table),			\
259*4882a593Smuzhiyun 		.vsel_reg = PM8607_##vreg,				\
260*4882a593Smuzhiyun 		.vsel_mask = ARRAY_SIZE(vreg##_table) - 1,		\
261*4882a593Smuzhiyun 		.apply_reg = PM8607_##ureg,				\
262*4882a593Smuzhiyun 		.apply_bit = (ubit),					\
263*4882a593Smuzhiyun 		.enable_reg = PM8607_##ereg,				\
264*4882a593Smuzhiyun 		.enable_mask = 1 << (ebit),				\
265*4882a593Smuzhiyun 	},								\
266*4882a593Smuzhiyun 	.slope_double	= (0),						\
267*4882a593Smuzhiyun 	.vol_suspend	= (unsigned int *)&vreg##_suspend_table,	\
268*4882a593Smuzhiyun }
269*4882a593Smuzhiyun 
270*4882a593Smuzhiyun #define PM8607_LDO(_id, vreg, shift, ereg, ebit)			\
271*4882a593Smuzhiyun {									\
272*4882a593Smuzhiyun 	.desc	= {							\
273*4882a593Smuzhiyun 		.name	= "LDO" #_id,					\
274*4882a593Smuzhiyun 		.of_match = of_match_ptr("LDO" #_id),			\
275*4882a593Smuzhiyun 		.regulators_node = of_match_ptr("regulators"),		\
276*4882a593Smuzhiyun 		.ops	= &pm8607_regulator_ops,			\
277*4882a593Smuzhiyun 		.type	= REGULATOR_VOLTAGE,				\
278*4882a593Smuzhiyun 		.id	= PM8607_ID_LDO##_id,				\
279*4882a593Smuzhiyun 		.owner	= THIS_MODULE,					\
280*4882a593Smuzhiyun 		.volt_table = LDO##_id##_table,				\
281*4882a593Smuzhiyun 		.n_voltages = ARRAY_SIZE(LDO##_id##_table),		\
282*4882a593Smuzhiyun 		.vsel_reg = PM8607_##vreg,				\
283*4882a593Smuzhiyun 		.vsel_mask = (ARRAY_SIZE(LDO##_id##_table) - 1) << (shift), \
284*4882a593Smuzhiyun 		.enable_reg = PM8607_##ereg,				\
285*4882a593Smuzhiyun 		.enable_mask = 1 << (ebit),				\
286*4882a593Smuzhiyun 	},								\
287*4882a593Smuzhiyun 	.slope_double	= (0),						\
288*4882a593Smuzhiyun 	.vol_suspend	= (unsigned int *)&LDO##_id##_suspend_table,	\
289*4882a593Smuzhiyun }
290*4882a593Smuzhiyun 
291*4882a593Smuzhiyun static struct pm8607_regulator_info pm8607_regulator_info[] = {
292*4882a593Smuzhiyun 	PM8607_DVC(BUCK1, GO, BIT(0), SUPPLIES_EN11, 0),
293*4882a593Smuzhiyun 	PM8607_DVC(BUCK2, GO, BIT(1), SUPPLIES_EN11, 1),
294*4882a593Smuzhiyun 	PM8607_DVC(BUCK3, GO, BIT(2), SUPPLIES_EN11, 2),
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun 	PM8607_LDO(1,         LDO1, 0, SUPPLIES_EN11, 3),
297*4882a593Smuzhiyun 	PM8607_LDO(2,         LDO2, 0, SUPPLIES_EN11, 4),
298*4882a593Smuzhiyun 	PM8607_LDO(3,         LDO3, 0, SUPPLIES_EN11, 5),
299*4882a593Smuzhiyun 	PM8607_LDO(4,         LDO4, 0, SUPPLIES_EN11, 6),
300*4882a593Smuzhiyun 	PM8607_LDO(5,         LDO5, 0, SUPPLIES_EN11, 7),
301*4882a593Smuzhiyun 	PM8607_LDO(6,         LDO6, 0, SUPPLIES_EN12, 0),
302*4882a593Smuzhiyun 	PM8607_LDO(7,         LDO7, 0, SUPPLIES_EN12, 1),
303*4882a593Smuzhiyun 	PM8607_LDO(8,         LDO8, 0, SUPPLIES_EN12, 2),
304*4882a593Smuzhiyun 	PM8607_LDO(9,         LDO9, 0, SUPPLIES_EN12, 3),
305*4882a593Smuzhiyun 	PM8607_LDO(10,        LDO10, 0, SUPPLIES_EN12, 4),
306*4882a593Smuzhiyun 	PM8607_LDO(12,        LDO12, 0, SUPPLIES_EN12, 5),
307*4882a593Smuzhiyun 	PM8607_LDO(13, VIBRATOR_SET, 1, VIBRATOR_SET, 0),
308*4882a593Smuzhiyun 	PM8607_LDO(14,        LDO14, 0, SUPPLIES_EN12, 6),
309*4882a593Smuzhiyun };
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun static struct pm8607_regulator_info pm8606_regulator_info[] = {
312*4882a593Smuzhiyun 	PM8606_PREG(PREREGULATORB, 5),
313*4882a593Smuzhiyun };
314*4882a593Smuzhiyun 
pm8607_regulator_probe(struct platform_device * pdev)315*4882a593Smuzhiyun static int pm8607_regulator_probe(struct platform_device *pdev)
316*4882a593Smuzhiyun {
317*4882a593Smuzhiyun 	struct pm860x_chip *chip = dev_get_drvdata(pdev->dev.parent);
318*4882a593Smuzhiyun 	struct pm8607_regulator_info *info = NULL;
319*4882a593Smuzhiyun 	struct regulator_init_data *pdata = dev_get_platdata(&pdev->dev);
320*4882a593Smuzhiyun 	struct regulator_config config = { };
321*4882a593Smuzhiyun 	struct regulator_dev *rdev;
322*4882a593Smuzhiyun 	struct resource *res;
323*4882a593Smuzhiyun 	int i;
324*4882a593Smuzhiyun 
325*4882a593Smuzhiyun 	res = platform_get_resource(pdev, IORESOURCE_REG, 0);
326*4882a593Smuzhiyun 	if (res) {
327*4882a593Smuzhiyun 		/* There're resources in 88PM8607 regulator driver */
328*4882a593Smuzhiyun 		for (i = 0; i < ARRAY_SIZE(pm8607_regulator_info); i++) {
329*4882a593Smuzhiyun 			info = &pm8607_regulator_info[i];
330*4882a593Smuzhiyun 			if (info->desc.vsel_reg == res->start)
331*4882a593Smuzhiyun 				break;
332*4882a593Smuzhiyun 		}
333*4882a593Smuzhiyun 		if (i == ARRAY_SIZE(pm8607_regulator_info)) {
334*4882a593Smuzhiyun 			dev_err(&pdev->dev, "Failed to find regulator %llu\n",
335*4882a593Smuzhiyun 				(unsigned long long)res->start);
336*4882a593Smuzhiyun 			return -EINVAL;
337*4882a593Smuzhiyun 		}
338*4882a593Smuzhiyun 	} else {
339*4882a593Smuzhiyun 		/* There's no resource in 88PM8606 PREG regulator driver */
340*4882a593Smuzhiyun 		info = &pm8606_regulator_info[0];
341*4882a593Smuzhiyun 		/* i is used to check regulator ID */
342*4882a593Smuzhiyun 		i = -1;
343*4882a593Smuzhiyun 	}
344*4882a593Smuzhiyun 
345*4882a593Smuzhiyun 	/* check DVC ramp slope double */
346*4882a593Smuzhiyun 	if ((i == PM8607_ID_BUCK3) && chip->buck3_double)
347*4882a593Smuzhiyun 		info->slope_double = 1;
348*4882a593Smuzhiyun 
349*4882a593Smuzhiyun 	config.dev = chip->dev;
350*4882a593Smuzhiyun 	config.driver_data = info;
351*4882a593Smuzhiyun 
352*4882a593Smuzhiyun 	if (pdata)
353*4882a593Smuzhiyun 		config.init_data = pdata;
354*4882a593Smuzhiyun 
355*4882a593Smuzhiyun 	if (chip->id == CHIP_PM8607)
356*4882a593Smuzhiyun 		config.regmap = chip->regmap;
357*4882a593Smuzhiyun 	else
358*4882a593Smuzhiyun 		config.regmap = chip->regmap_companion;
359*4882a593Smuzhiyun 
360*4882a593Smuzhiyun 	rdev = devm_regulator_register(&pdev->dev, &info->desc, &config);
361*4882a593Smuzhiyun 	if (IS_ERR(rdev)) {
362*4882a593Smuzhiyun 		dev_err(&pdev->dev, "failed to register regulator %s\n",
363*4882a593Smuzhiyun 			info->desc.name);
364*4882a593Smuzhiyun 		return PTR_ERR(rdev);
365*4882a593Smuzhiyun 	}
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun 	platform_set_drvdata(pdev, info);
368*4882a593Smuzhiyun 	return 0;
369*4882a593Smuzhiyun }
370*4882a593Smuzhiyun 
371*4882a593Smuzhiyun static const struct platform_device_id pm8607_regulator_driver_ids[] = {
372*4882a593Smuzhiyun 	{
373*4882a593Smuzhiyun 		.name	= "88pm860x-regulator",
374*4882a593Smuzhiyun 		.driver_data	= 0,
375*4882a593Smuzhiyun 	}, {
376*4882a593Smuzhiyun 		.name	= "88pm860x-preg",
377*4882a593Smuzhiyun 		.driver_data	= 0,
378*4882a593Smuzhiyun 	},
379*4882a593Smuzhiyun 	{ },
380*4882a593Smuzhiyun };
381*4882a593Smuzhiyun MODULE_DEVICE_TABLE(platform, pm8607_regulator_driver_ids);
382*4882a593Smuzhiyun 
383*4882a593Smuzhiyun static struct platform_driver pm8607_regulator_driver = {
384*4882a593Smuzhiyun 	.driver		= {
385*4882a593Smuzhiyun 		.name	= "88pm860x-regulator",
386*4882a593Smuzhiyun 	},
387*4882a593Smuzhiyun 	.probe		= pm8607_regulator_probe,
388*4882a593Smuzhiyun 	.id_table	= pm8607_regulator_driver_ids,
389*4882a593Smuzhiyun };
390*4882a593Smuzhiyun 
pm8607_regulator_init(void)391*4882a593Smuzhiyun static int __init pm8607_regulator_init(void)
392*4882a593Smuzhiyun {
393*4882a593Smuzhiyun 	return platform_driver_register(&pm8607_regulator_driver);
394*4882a593Smuzhiyun }
395*4882a593Smuzhiyun subsys_initcall(pm8607_regulator_init);
396*4882a593Smuzhiyun 
pm8607_regulator_exit(void)397*4882a593Smuzhiyun static void __exit pm8607_regulator_exit(void)
398*4882a593Smuzhiyun {
399*4882a593Smuzhiyun 	platform_driver_unregister(&pm8607_regulator_driver);
400*4882a593Smuzhiyun }
401*4882a593Smuzhiyun module_exit(pm8607_regulator_exit);
402*4882a593Smuzhiyun 
403*4882a593Smuzhiyun MODULE_LICENSE("GPL");
404*4882a593Smuzhiyun MODULE_AUTHOR("Haojian Zhuang <haojian.zhuang@marvell.com>");
405*4882a593Smuzhiyun MODULE_DESCRIPTION("Regulator Driver for Marvell 88PM8607 PMIC");
406*4882a593Smuzhiyun MODULE_ALIAS("platform:88pm8607-regulator");
407