1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Regulators driver for Marvell 88PM800
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2012 Marvell International Ltd.
6*4882a593Smuzhiyun * Joseph(Yossi) Hanin <yhanin@marvell.com>
7*4882a593Smuzhiyun * Yi Zhang <yizhang@marvell.com>
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/moduleparam.h>
11*4882a593Smuzhiyun #include <linux/init.h>
12*4882a593Smuzhiyun #include <linux/err.h>
13*4882a593Smuzhiyun #include <linux/regmap.h>
14*4882a593Smuzhiyun #include <linux/regulator/driver.h>
15*4882a593Smuzhiyun #include <linux/regulator/machine.h>
16*4882a593Smuzhiyun #include <linux/mfd/88pm80x.h>
17*4882a593Smuzhiyun #include <linux/delay.h>
18*4882a593Smuzhiyun #include <linux/io.h>
19*4882a593Smuzhiyun #include <linux/of.h>
20*4882a593Smuzhiyun #include <linux/regulator/of_regulator.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun /* LDO1 with DVC[0..3] */
23*4882a593Smuzhiyun #define PM800_LDO1_VOUT (0x08) /* VOUT1 */
24*4882a593Smuzhiyun #define PM800_LDO1_VOUT_2 (0x09)
25*4882a593Smuzhiyun #define PM800_LDO1_VOUT_3 (0x0A)
26*4882a593Smuzhiyun #define PM800_LDO2_VOUT (0x0B)
27*4882a593Smuzhiyun #define PM800_LDO3_VOUT (0x0C)
28*4882a593Smuzhiyun #define PM800_LDO4_VOUT (0x0D)
29*4882a593Smuzhiyun #define PM800_LDO5_VOUT (0x0E)
30*4882a593Smuzhiyun #define PM800_LDO6_VOUT (0x0F)
31*4882a593Smuzhiyun #define PM800_LDO7_VOUT (0x10)
32*4882a593Smuzhiyun #define PM800_LDO8_VOUT (0x11)
33*4882a593Smuzhiyun #define PM800_LDO9_VOUT (0x12)
34*4882a593Smuzhiyun #define PM800_LDO10_VOUT (0x13)
35*4882a593Smuzhiyun #define PM800_LDO11_VOUT (0x14)
36*4882a593Smuzhiyun #define PM800_LDO12_VOUT (0x15)
37*4882a593Smuzhiyun #define PM800_LDO13_VOUT (0x16)
38*4882a593Smuzhiyun #define PM800_LDO14_VOUT (0x17)
39*4882a593Smuzhiyun #define PM800_LDO15_VOUT (0x18)
40*4882a593Smuzhiyun #define PM800_LDO16_VOUT (0x19)
41*4882a593Smuzhiyun #define PM800_LDO17_VOUT (0x1A)
42*4882a593Smuzhiyun #define PM800_LDO18_VOUT (0x1B)
43*4882a593Smuzhiyun #define PM800_LDO19_VOUT (0x1C)
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun /* BUCK1 with DVC[0..3] */
46*4882a593Smuzhiyun #define PM800_BUCK1 (0x3C)
47*4882a593Smuzhiyun #define PM800_BUCK1_1 (0x3D)
48*4882a593Smuzhiyun #define PM800_BUCK1_2 (0x3E)
49*4882a593Smuzhiyun #define PM800_BUCK1_3 (0x3F)
50*4882a593Smuzhiyun #define PM800_BUCK2 (0x40)
51*4882a593Smuzhiyun #define PM800_BUCK3 (0x41)
52*4882a593Smuzhiyun #define PM800_BUCK4 (0x42)
53*4882a593Smuzhiyun #define PM800_BUCK4_1 (0x43)
54*4882a593Smuzhiyun #define PM800_BUCK4_2 (0x44)
55*4882a593Smuzhiyun #define PM800_BUCK4_3 (0x45)
56*4882a593Smuzhiyun #define PM800_BUCK5 (0x46)
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun #define PM800_BUCK_ENA (0x50)
59*4882a593Smuzhiyun #define PM800_LDO_ENA1_1 (0x51)
60*4882a593Smuzhiyun #define PM800_LDO_ENA1_2 (0x52)
61*4882a593Smuzhiyun #define PM800_LDO_ENA1_3 (0x53)
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun #define PM800_LDO_ENA2_1 (0x56)
64*4882a593Smuzhiyun #define PM800_LDO_ENA2_2 (0x57)
65*4882a593Smuzhiyun #define PM800_LDO_ENA2_3 (0x58)
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun #define PM800_BUCK1_MISC1 (0x78)
68*4882a593Smuzhiyun #define PM800_BUCK3_MISC1 (0x7E)
69*4882a593Smuzhiyun #define PM800_BUCK4_MISC1 (0x81)
70*4882a593Smuzhiyun #define PM800_BUCK5_MISC1 (0x84)
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun struct pm800_regulator_info {
73*4882a593Smuzhiyun struct regulator_desc desc;
74*4882a593Smuzhiyun int max_ua;
75*4882a593Smuzhiyun };
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun /*
78*4882a593Smuzhiyun * vreg - the buck regs string.
79*4882a593Smuzhiyun * ereg - the string for the enable register.
80*4882a593Smuzhiyun * ebit - the bit number in the enable register.
81*4882a593Smuzhiyun * amax - the current
82*4882a593Smuzhiyun * Buck has 2 kinds of voltage steps. It is easy to find voltage by ranges,
83*4882a593Smuzhiyun * not the constant voltage table.
84*4882a593Smuzhiyun * n_volt - Number of available selectors
85*4882a593Smuzhiyun */
86*4882a593Smuzhiyun #define PM800_BUCK(match, vreg, ereg, ebit, amax, volt_ranges, n_volt) \
87*4882a593Smuzhiyun { \
88*4882a593Smuzhiyun .desc = { \
89*4882a593Smuzhiyun .name = #vreg, \
90*4882a593Smuzhiyun .of_match = of_match_ptr(#match), \
91*4882a593Smuzhiyun .regulators_node = of_match_ptr("regulators"), \
92*4882a593Smuzhiyun .ops = &pm800_volt_range_ops, \
93*4882a593Smuzhiyun .type = REGULATOR_VOLTAGE, \
94*4882a593Smuzhiyun .id = PM800_ID_##vreg, \
95*4882a593Smuzhiyun .owner = THIS_MODULE, \
96*4882a593Smuzhiyun .n_voltages = n_volt, \
97*4882a593Smuzhiyun .linear_ranges = volt_ranges, \
98*4882a593Smuzhiyun .n_linear_ranges = ARRAY_SIZE(volt_ranges), \
99*4882a593Smuzhiyun .vsel_reg = PM800_##vreg, \
100*4882a593Smuzhiyun .vsel_mask = 0x7f, \
101*4882a593Smuzhiyun .enable_reg = PM800_##ereg, \
102*4882a593Smuzhiyun .enable_mask = 1 << (ebit), \
103*4882a593Smuzhiyun }, \
104*4882a593Smuzhiyun .max_ua = (amax), \
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun /*
108*4882a593Smuzhiyun * vreg - the LDO regs string
109*4882a593Smuzhiyun * ereg - the string for the enable register.
110*4882a593Smuzhiyun * ebit - the bit number in the enable register.
111*4882a593Smuzhiyun * amax - the current
112*4882a593Smuzhiyun * volt_table - the LDO voltage table
113*4882a593Smuzhiyun * For all the LDOes, there are too many ranges. Using volt_table will be
114*4882a593Smuzhiyun * simpler and faster.
115*4882a593Smuzhiyun */
116*4882a593Smuzhiyun #define PM800_LDO(match, vreg, ereg, ebit, amax, ldo_volt_table) \
117*4882a593Smuzhiyun { \
118*4882a593Smuzhiyun .desc = { \
119*4882a593Smuzhiyun .name = #vreg, \
120*4882a593Smuzhiyun .of_match = of_match_ptr(#match), \
121*4882a593Smuzhiyun .regulators_node = of_match_ptr("regulators"), \
122*4882a593Smuzhiyun .ops = &pm800_volt_table_ops, \
123*4882a593Smuzhiyun .type = REGULATOR_VOLTAGE, \
124*4882a593Smuzhiyun .id = PM800_ID_##vreg, \
125*4882a593Smuzhiyun .owner = THIS_MODULE, \
126*4882a593Smuzhiyun .n_voltages = ARRAY_SIZE(ldo_volt_table), \
127*4882a593Smuzhiyun .vsel_reg = PM800_##vreg##_VOUT, \
128*4882a593Smuzhiyun .vsel_mask = 0xf, \
129*4882a593Smuzhiyun .enable_reg = PM800_##ereg, \
130*4882a593Smuzhiyun .enable_mask = 1 << (ebit), \
131*4882a593Smuzhiyun .volt_table = ldo_volt_table, \
132*4882a593Smuzhiyun }, \
133*4882a593Smuzhiyun .max_ua = (amax), \
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun /* Ranges are sorted in ascending order. */
137*4882a593Smuzhiyun static const struct linear_range buck1_volt_range[] = {
138*4882a593Smuzhiyun REGULATOR_LINEAR_RANGE(600000, 0, 0x4f, 12500),
139*4882a593Smuzhiyun REGULATOR_LINEAR_RANGE(1600000, 0x50, 0x54, 50000),
140*4882a593Smuzhiyun };
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun /* BUCK 2~5 have same ranges. */
143*4882a593Smuzhiyun static const struct linear_range buck2_5_volt_range[] = {
144*4882a593Smuzhiyun REGULATOR_LINEAR_RANGE(600000, 0, 0x4f, 12500),
145*4882a593Smuzhiyun REGULATOR_LINEAR_RANGE(1600000, 0x50, 0x72, 50000),
146*4882a593Smuzhiyun };
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun static const unsigned int ldo1_volt_table[] = {
149*4882a593Smuzhiyun 600000, 650000, 700000, 750000, 800000, 850000, 900000, 950000,
150*4882a593Smuzhiyun 1000000, 1050000, 1100000, 1150000, 1200000, 1300000, 1400000, 1500000,
151*4882a593Smuzhiyun };
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun static const unsigned int ldo2_volt_table[] = {
154*4882a593Smuzhiyun 1700000, 1800000, 1900000, 2000000, 2100000, 2500000, 2700000, 2800000,
155*4882a593Smuzhiyun };
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun /* LDO 3~17 have same voltage table. */
158*4882a593Smuzhiyun static const unsigned int ldo3_17_volt_table[] = {
159*4882a593Smuzhiyun 1200000, 1250000, 1700000, 1800000, 1850000, 1900000, 2500000, 2600000,
160*4882a593Smuzhiyun 2700000, 2750000, 2800000, 2850000, 2900000, 3000000, 3100000, 3300000,
161*4882a593Smuzhiyun };
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun /* LDO 18~19 have same voltage table. */
164*4882a593Smuzhiyun static const unsigned int ldo18_19_volt_table[] = {
165*4882a593Smuzhiyun 1700000, 1800000, 1900000, 2500000, 2800000, 2900000, 3100000, 3300000,
166*4882a593Smuzhiyun };
167*4882a593Smuzhiyun
pm800_get_current_limit(struct regulator_dev * rdev)168*4882a593Smuzhiyun static int pm800_get_current_limit(struct regulator_dev *rdev)
169*4882a593Smuzhiyun {
170*4882a593Smuzhiyun struct pm800_regulator_info *info = rdev_get_drvdata(rdev);
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun return info->max_ua;
173*4882a593Smuzhiyun }
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun static const struct regulator_ops pm800_volt_range_ops = {
176*4882a593Smuzhiyun .list_voltage = regulator_list_voltage_linear_range,
177*4882a593Smuzhiyun .map_voltage = regulator_map_voltage_linear_range,
178*4882a593Smuzhiyun .set_voltage_sel = regulator_set_voltage_sel_regmap,
179*4882a593Smuzhiyun .get_voltage_sel = regulator_get_voltage_sel_regmap,
180*4882a593Smuzhiyun .enable = regulator_enable_regmap,
181*4882a593Smuzhiyun .disable = regulator_disable_regmap,
182*4882a593Smuzhiyun .is_enabled = regulator_is_enabled_regmap,
183*4882a593Smuzhiyun .get_current_limit = pm800_get_current_limit,
184*4882a593Smuzhiyun };
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun static const struct regulator_ops pm800_volt_table_ops = {
187*4882a593Smuzhiyun .list_voltage = regulator_list_voltage_table,
188*4882a593Smuzhiyun .map_voltage = regulator_map_voltage_iterate,
189*4882a593Smuzhiyun .set_voltage_sel = regulator_set_voltage_sel_regmap,
190*4882a593Smuzhiyun .get_voltage_sel = regulator_get_voltage_sel_regmap,
191*4882a593Smuzhiyun .enable = regulator_enable_regmap,
192*4882a593Smuzhiyun .disable = regulator_disable_regmap,
193*4882a593Smuzhiyun .is_enabled = regulator_is_enabled_regmap,
194*4882a593Smuzhiyun .get_current_limit = pm800_get_current_limit,
195*4882a593Smuzhiyun };
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun /* The array is indexed by id(PM800_ID_XXX) */
198*4882a593Smuzhiyun static struct pm800_regulator_info pm800_regulator_info[] = {
199*4882a593Smuzhiyun PM800_BUCK(buck1, BUCK1, BUCK_ENA, 0, 3000000, buck1_volt_range, 0x55),
200*4882a593Smuzhiyun PM800_BUCK(buck2, BUCK2, BUCK_ENA, 1, 1200000, buck2_5_volt_range, 0x73),
201*4882a593Smuzhiyun PM800_BUCK(buck3, BUCK3, BUCK_ENA, 2, 1200000, buck2_5_volt_range, 0x73),
202*4882a593Smuzhiyun PM800_BUCK(buck4, BUCK4, BUCK_ENA, 3, 1200000, buck2_5_volt_range, 0x73),
203*4882a593Smuzhiyun PM800_BUCK(buck5, BUCK5, BUCK_ENA, 4, 1200000, buck2_5_volt_range, 0x73),
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun PM800_LDO(ldo1, LDO1, LDO_ENA1_1, 0, 200000, ldo1_volt_table),
206*4882a593Smuzhiyun PM800_LDO(ldo2, LDO2, LDO_ENA1_1, 1, 10000, ldo2_volt_table),
207*4882a593Smuzhiyun PM800_LDO(ldo3, LDO3, LDO_ENA1_1, 2, 300000, ldo3_17_volt_table),
208*4882a593Smuzhiyun PM800_LDO(ldo4, LDO4, LDO_ENA1_1, 3, 300000, ldo3_17_volt_table),
209*4882a593Smuzhiyun PM800_LDO(ldo5, LDO5, LDO_ENA1_1, 4, 300000, ldo3_17_volt_table),
210*4882a593Smuzhiyun PM800_LDO(ldo6, LDO6, LDO_ENA1_1, 5, 300000, ldo3_17_volt_table),
211*4882a593Smuzhiyun PM800_LDO(ldo7, LDO7, LDO_ENA1_1, 6, 300000, ldo3_17_volt_table),
212*4882a593Smuzhiyun PM800_LDO(ldo8, LDO8, LDO_ENA1_1, 7, 300000, ldo3_17_volt_table),
213*4882a593Smuzhiyun PM800_LDO(ldo9, LDO9, LDO_ENA1_2, 0, 300000, ldo3_17_volt_table),
214*4882a593Smuzhiyun PM800_LDO(ldo10, LDO10, LDO_ENA1_2, 1, 300000, ldo3_17_volt_table),
215*4882a593Smuzhiyun PM800_LDO(ldo11, LDO11, LDO_ENA1_2, 2, 300000, ldo3_17_volt_table),
216*4882a593Smuzhiyun PM800_LDO(ldo12, LDO12, LDO_ENA1_2, 3, 300000, ldo3_17_volt_table),
217*4882a593Smuzhiyun PM800_LDO(ldo13, LDO13, LDO_ENA1_2, 4, 300000, ldo3_17_volt_table),
218*4882a593Smuzhiyun PM800_LDO(ldo14, LDO14, LDO_ENA1_2, 5, 300000, ldo3_17_volt_table),
219*4882a593Smuzhiyun PM800_LDO(ldo15, LDO15, LDO_ENA1_2, 6, 300000, ldo3_17_volt_table),
220*4882a593Smuzhiyun PM800_LDO(ldo16, LDO16, LDO_ENA1_2, 7, 300000, ldo3_17_volt_table),
221*4882a593Smuzhiyun PM800_LDO(ldo17, LDO17, LDO_ENA1_3, 0, 300000, ldo3_17_volt_table),
222*4882a593Smuzhiyun PM800_LDO(ldo18, LDO18, LDO_ENA1_3, 1, 200000, ldo18_19_volt_table),
223*4882a593Smuzhiyun PM800_LDO(ldo19, LDO19, LDO_ENA1_3, 2, 200000, ldo18_19_volt_table),
224*4882a593Smuzhiyun };
225*4882a593Smuzhiyun
pm800_regulator_probe(struct platform_device * pdev)226*4882a593Smuzhiyun static int pm800_regulator_probe(struct platform_device *pdev)
227*4882a593Smuzhiyun {
228*4882a593Smuzhiyun struct pm80x_chip *chip = dev_get_drvdata(pdev->dev.parent);
229*4882a593Smuzhiyun struct pm80x_platform_data *pdata = dev_get_platdata(pdev->dev.parent);
230*4882a593Smuzhiyun struct regulator_config config = { };
231*4882a593Smuzhiyun struct regulator_init_data *init_data;
232*4882a593Smuzhiyun int i, ret;
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun if (pdata && pdata->num_regulators) {
235*4882a593Smuzhiyun unsigned int count = 0;
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun /* Check whether num_regulator is valid. */
238*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(pdata->regulators); i++) {
239*4882a593Smuzhiyun if (pdata->regulators[i])
240*4882a593Smuzhiyun count++;
241*4882a593Smuzhiyun }
242*4882a593Smuzhiyun if (count != pdata->num_regulators)
243*4882a593Smuzhiyun return -EINVAL;
244*4882a593Smuzhiyun }
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun config.dev = chip->dev;
247*4882a593Smuzhiyun config.regmap = chip->subchip->regmap_power;
248*4882a593Smuzhiyun for (i = 0; i < PM800_ID_RG_MAX; i++) {
249*4882a593Smuzhiyun struct regulator_dev *regulator;
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun if (pdata && pdata->num_regulators) {
252*4882a593Smuzhiyun init_data = pdata->regulators[i];
253*4882a593Smuzhiyun if (!init_data)
254*4882a593Smuzhiyun continue;
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun config.init_data = init_data;
257*4882a593Smuzhiyun }
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun config.driver_data = &pm800_regulator_info[i];
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun regulator = devm_regulator_register(&pdev->dev,
262*4882a593Smuzhiyun &pm800_regulator_info[i].desc, &config);
263*4882a593Smuzhiyun if (IS_ERR(regulator)) {
264*4882a593Smuzhiyun ret = PTR_ERR(regulator);
265*4882a593Smuzhiyun dev_err(&pdev->dev, "Failed to register %s\n",
266*4882a593Smuzhiyun pm800_regulator_info[i].desc.name);
267*4882a593Smuzhiyun return ret;
268*4882a593Smuzhiyun }
269*4882a593Smuzhiyun }
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun return 0;
272*4882a593Smuzhiyun }
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun static struct platform_driver pm800_regulator_driver = {
275*4882a593Smuzhiyun .driver = {
276*4882a593Smuzhiyun .name = "88pm80x-regulator",
277*4882a593Smuzhiyun },
278*4882a593Smuzhiyun .probe = pm800_regulator_probe,
279*4882a593Smuzhiyun };
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun module_platform_driver(pm800_regulator_driver);
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun MODULE_LICENSE("GPL");
284*4882a593Smuzhiyun MODULE_AUTHOR("Joseph(Yossi) Hanin <yhanin@marvell.com>");
285*4882a593Smuzhiyun MODULE_DESCRIPTION("Regulator Driver for Marvell 88PM800 PMIC");
286*4882a593Smuzhiyun MODULE_ALIAS("platform:88pm800-regulator");
287