xref: /OK3568_Linux_fs/kernel/drivers/rapidio/switches/idtcps.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * IDT CPS RapidIO switches support
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright 2009-2010 Integrated Device Technology, Inc.
6*4882a593Smuzhiyun  * Alexandre Bounine <alexandre.bounine@idt.com>
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include <linux/rio.h>
10*4882a593Smuzhiyun #include <linux/rio_drv.h>
11*4882a593Smuzhiyun #include <linux/rio_ids.h>
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include "../rio.h"
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #define CPS_DEFAULT_ROUTE	0xde
16*4882a593Smuzhiyun #define CPS_NO_ROUTE		0xdf
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #define IDTCPS_RIO_DOMAIN 0xf20020
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun static int
idtcps_route_add_entry(struct rio_mport * mport,u16 destid,u8 hopcount,u16 table,u16 route_destid,u8 route_port)21*4882a593Smuzhiyun idtcps_route_add_entry(struct rio_mport *mport, u16 destid, u8 hopcount,
22*4882a593Smuzhiyun 		       u16 table, u16 route_destid, u8 route_port)
23*4882a593Smuzhiyun {
24*4882a593Smuzhiyun 	u32 result;
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun 	if (route_port == RIO_INVALID_ROUTE)
27*4882a593Smuzhiyun 		route_port = CPS_DEFAULT_ROUTE;
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun 	if (table == RIO_GLOBAL_TABLE) {
30*4882a593Smuzhiyun 		rio_mport_write_config_32(mport, destid, hopcount,
31*4882a593Smuzhiyun 				RIO_STD_RTE_CONF_DESTID_SEL_CSR, route_destid);
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun 		rio_mport_read_config_32(mport, destid, hopcount,
34*4882a593Smuzhiyun 				RIO_STD_RTE_CONF_PORT_SEL_CSR, &result);
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun 		result = (0xffffff00 & result) | (u32)route_port;
37*4882a593Smuzhiyun 		rio_mport_write_config_32(mport, destid, hopcount,
38*4882a593Smuzhiyun 				RIO_STD_RTE_CONF_PORT_SEL_CSR, result);
39*4882a593Smuzhiyun 	}
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun 	return 0;
42*4882a593Smuzhiyun }
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun static int
idtcps_route_get_entry(struct rio_mport * mport,u16 destid,u8 hopcount,u16 table,u16 route_destid,u8 * route_port)45*4882a593Smuzhiyun idtcps_route_get_entry(struct rio_mport *mport, u16 destid, u8 hopcount,
46*4882a593Smuzhiyun 		       u16 table, u16 route_destid, u8 *route_port)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun 	u32 result;
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun 	if (table == RIO_GLOBAL_TABLE) {
51*4882a593Smuzhiyun 		rio_mport_write_config_32(mport, destid, hopcount,
52*4882a593Smuzhiyun 				RIO_STD_RTE_CONF_DESTID_SEL_CSR, route_destid);
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 		rio_mport_read_config_32(mport, destid, hopcount,
55*4882a593Smuzhiyun 				RIO_STD_RTE_CONF_PORT_SEL_CSR, &result);
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 		if (CPS_DEFAULT_ROUTE == (u8)result ||
58*4882a593Smuzhiyun 		    CPS_NO_ROUTE == (u8)result)
59*4882a593Smuzhiyun 			*route_port = RIO_INVALID_ROUTE;
60*4882a593Smuzhiyun 		else
61*4882a593Smuzhiyun 			*route_port = (u8)result;
62*4882a593Smuzhiyun 	}
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun 	return 0;
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun static int
idtcps_route_clr_table(struct rio_mport * mport,u16 destid,u8 hopcount,u16 table)68*4882a593Smuzhiyun idtcps_route_clr_table(struct rio_mport *mport, u16 destid, u8 hopcount,
69*4882a593Smuzhiyun 		       u16 table)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun 	u32 i;
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	if (table == RIO_GLOBAL_TABLE) {
74*4882a593Smuzhiyun 		for (i = 0x80000000; i <= 0x800000ff;) {
75*4882a593Smuzhiyun 			rio_mport_write_config_32(mport, destid, hopcount,
76*4882a593Smuzhiyun 				RIO_STD_RTE_CONF_DESTID_SEL_CSR, i);
77*4882a593Smuzhiyun 			rio_mport_write_config_32(mport, destid, hopcount,
78*4882a593Smuzhiyun 				RIO_STD_RTE_CONF_PORT_SEL_CSR,
79*4882a593Smuzhiyun 				(CPS_DEFAULT_ROUTE << 24) |
80*4882a593Smuzhiyun 				(CPS_DEFAULT_ROUTE << 16) |
81*4882a593Smuzhiyun 				(CPS_DEFAULT_ROUTE << 8) | CPS_DEFAULT_ROUTE);
82*4882a593Smuzhiyun 			i += 4;
83*4882a593Smuzhiyun 		}
84*4882a593Smuzhiyun 	}
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	return 0;
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun static int
idtcps_set_domain(struct rio_mport * mport,u16 destid,u8 hopcount,u8 sw_domain)90*4882a593Smuzhiyun idtcps_set_domain(struct rio_mport *mport, u16 destid, u8 hopcount,
91*4882a593Smuzhiyun 		       u8 sw_domain)
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun 	/*
94*4882a593Smuzhiyun 	 * Switch domain configuration operates only at global level
95*4882a593Smuzhiyun 	 */
96*4882a593Smuzhiyun 	rio_mport_write_config_32(mport, destid, hopcount,
97*4882a593Smuzhiyun 				  IDTCPS_RIO_DOMAIN, (u32)sw_domain);
98*4882a593Smuzhiyun 	return 0;
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun static int
idtcps_get_domain(struct rio_mport * mport,u16 destid,u8 hopcount,u8 * sw_domain)102*4882a593Smuzhiyun idtcps_get_domain(struct rio_mport *mport, u16 destid, u8 hopcount,
103*4882a593Smuzhiyun 		       u8 *sw_domain)
104*4882a593Smuzhiyun {
105*4882a593Smuzhiyun 	u32 regval;
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun 	/*
108*4882a593Smuzhiyun 	 * Switch domain configuration operates only at global level
109*4882a593Smuzhiyun 	 */
110*4882a593Smuzhiyun 	rio_mport_read_config_32(mport, destid, hopcount,
111*4882a593Smuzhiyun 				IDTCPS_RIO_DOMAIN, &regval);
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 	*sw_domain = (u8)(regval & 0xff);
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	return 0;
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun static struct rio_switch_ops idtcps_switch_ops = {
119*4882a593Smuzhiyun 	.owner = THIS_MODULE,
120*4882a593Smuzhiyun 	.add_entry = idtcps_route_add_entry,
121*4882a593Smuzhiyun 	.get_entry = idtcps_route_get_entry,
122*4882a593Smuzhiyun 	.clr_table = idtcps_route_clr_table,
123*4882a593Smuzhiyun 	.set_domain = idtcps_set_domain,
124*4882a593Smuzhiyun 	.get_domain = idtcps_get_domain,
125*4882a593Smuzhiyun 	.em_init = NULL,
126*4882a593Smuzhiyun 	.em_handle = NULL,
127*4882a593Smuzhiyun };
128*4882a593Smuzhiyun 
idtcps_probe(struct rio_dev * rdev,const struct rio_device_id * id)129*4882a593Smuzhiyun static int idtcps_probe(struct rio_dev *rdev, const struct rio_device_id *id)
130*4882a593Smuzhiyun {
131*4882a593Smuzhiyun 	pr_debug("RIO: %s for %s\n", __func__, rio_name(rdev));
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 	spin_lock(&rdev->rswitch->lock);
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	if (rdev->rswitch->ops) {
136*4882a593Smuzhiyun 		spin_unlock(&rdev->rswitch->lock);
137*4882a593Smuzhiyun 		return -EINVAL;
138*4882a593Smuzhiyun 	}
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	rdev->rswitch->ops = &idtcps_switch_ops;
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 	if (rdev->do_enum) {
143*4882a593Smuzhiyun 		/* set TVAL = ~50us */
144*4882a593Smuzhiyun 		rio_write_config_32(rdev,
145*4882a593Smuzhiyun 			rdev->phys_efptr + RIO_PORT_LINKTO_CTL_CSR, 0x8e << 8);
146*4882a593Smuzhiyun 		/* Ensure that default routing is disabled on startup */
147*4882a593Smuzhiyun 		rio_write_config_32(rdev,
148*4882a593Smuzhiyun 				    RIO_STD_RTE_DEFAULT_PORT, CPS_NO_ROUTE);
149*4882a593Smuzhiyun 	}
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 	spin_unlock(&rdev->rswitch->lock);
152*4882a593Smuzhiyun 	return 0;
153*4882a593Smuzhiyun }
154*4882a593Smuzhiyun 
idtcps_remove(struct rio_dev * rdev)155*4882a593Smuzhiyun static void idtcps_remove(struct rio_dev *rdev)
156*4882a593Smuzhiyun {
157*4882a593Smuzhiyun 	pr_debug("RIO: %s for %s\n", __func__, rio_name(rdev));
158*4882a593Smuzhiyun 	spin_lock(&rdev->rswitch->lock);
159*4882a593Smuzhiyun 	if (rdev->rswitch->ops != &idtcps_switch_ops) {
160*4882a593Smuzhiyun 		spin_unlock(&rdev->rswitch->lock);
161*4882a593Smuzhiyun 		return;
162*4882a593Smuzhiyun 	}
163*4882a593Smuzhiyun 	rdev->rswitch->ops = NULL;
164*4882a593Smuzhiyun 	spin_unlock(&rdev->rswitch->lock);
165*4882a593Smuzhiyun }
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun static const struct rio_device_id idtcps_id_table[] = {
168*4882a593Smuzhiyun 	{RIO_DEVICE(RIO_DID_IDTCPS6Q, RIO_VID_IDT)},
169*4882a593Smuzhiyun 	{RIO_DEVICE(RIO_DID_IDTCPS8, RIO_VID_IDT)},
170*4882a593Smuzhiyun 	{RIO_DEVICE(RIO_DID_IDTCPS10Q, RIO_VID_IDT)},
171*4882a593Smuzhiyun 	{RIO_DEVICE(RIO_DID_IDTCPS12, RIO_VID_IDT)},
172*4882a593Smuzhiyun 	{RIO_DEVICE(RIO_DID_IDTCPS16, RIO_VID_IDT)},
173*4882a593Smuzhiyun 	{RIO_DEVICE(RIO_DID_IDT70K200, RIO_VID_IDT)},
174*4882a593Smuzhiyun 	{ 0, }	/* terminate list */
175*4882a593Smuzhiyun };
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun static struct rio_driver idtcps_driver = {
178*4882a593Smuzhiyun 	.name = "idtcps",
179*4882a593Smuzhiyun 	.id_table = idtcps_id_table,
180*4882a593Smuzhiyun 	.probe = idtcps_probe,
181*4882a593Smuzhiyun 	.remove = idtcps_remove,
182*4882a593Smuzhiyun };
183*4882a593Smuzhiyun 
idtcps_init(void)184*4882a593Smuzhiyun static int __init idtcps_init(void)
185*4882a593Smuzhiyun {
186*4882a593Smuzhiyun 	return rio_register_driver(&idtcps_driver);
187*4882a593Smuzhiyun }
188*4882a593Smuzhiyun 
idtcps_exit(void)189*4882a593Smuzhiyun static void __exit idtcps_exit(void)
190*4882a593Smuzhiyun {
191*4882a593Smuzhiyun 	rio_unregister_driver(&idtcps_driver);
192*4882a593Smuzhiyun }
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun device_initcall(idtcps_init);
195*4882a593Smuzhiyun module_exit(idtcps_exit);
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun MODULE_DESCRIPTION("IDT CPS Gen.1 Serial RapidIO switch family driver");
198*4882a593Smuzhiyun MODULE_AUTHOR("Integrated Device Technology, Inc.");
199*4882a593Smuzhiyun MODULE_LICENSE("GPL");
200