1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * drivers/pwm/pwm-pxa.c
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * simple driver for PWM (Pulse Width Modulator) controller
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * 2008-02-13 initial version
8*4882a593Smuzhiyun * eric miao <eric.miao@marvell.com>
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/kernel.h>
13*4882a593Smuzhiyun #include <linux/platform_device.h>
14*4882a593Smuzhiyun #include <linux/slab.h>
15*4882a593Smuzhiyun #include <linux/err.h>
16*4882a593Smuzhiyun #include <linux/clk.h>
17*4882a593Smuzhiyun #include <linux/io.h>
18*4882a593Smuzhiyun #include <linux/pwm.h>
19*4882a593Smuzhiyun #include <linux/of_device.h>
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #include <asm/div64.h>
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #define HAS_SECONDARY_PWM 0x10
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun static const struct platform_device_id pwm_id_table[] = {
26*4882a593Smuzhiyun /* PWM has_secondary_pwm? */
27*4882a593Smuzhiyun { "pxa25x-pwm", 0 },
28*4882a593Smuzhiyun { "pxa27x-pwm", HAS_SECONDARY_PWM },
29*4882a593Smuzhiyun { "pxa168-pwm", 0 },
30*4882a593Smuzhiyun { "pxa910-pwm", 0 },
31*4882a593Smuzhiyun { },
32*4882a593Smuzhiyun };
33*4882a593Smuzhiyun MODULE_DEVICE_TABLE(platform, pwm_id_table);
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun /* PWM registers and bits definitions */
36*4882a593Smuzhiyun #define PWMCR (0x00)
37*4882a593Smuzhiyun #define PWMDCR (0x04)
38*4882a593Smuzhiyun #define PWMPCR (0x08)
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun #define PWMCR_SD (1 << 6)
41*4882a593Smuzhiyun #define PWMDCR_FD (1 << 10)
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun struct pxa_pwm_chip {
44*4882a593Smuzhiyun struct pwm_chip chip;
45*4882a593Smuzhiyun struct device *dev;
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun struct clk *clk;
48*4882a593Smuzhiyun void __iomem *mmio_base;
49*4882a593Smuzhiyun };
50*4882a593Smuzhiyun
to_pxa_pwm_chip(struct pwm_chip * chip)51*4882a593Smuzhiyun static inline struct pxa_pwm_chip *to_pxa_pwm_chip(struct pwm_chip *chip)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun return container_of(chip, struct pxa_pwm_chip, chip);
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun /*
57*4882a593Smuzhiyun * period_ns = 10^9 * (PRESCALE + 1) * (PV + 1) / PWM_CLK_RATE
58*4882a593Smuzhiyun * duty_ns = 10^9 * (PRESCALE + 1) * DC / PWM_CLK_RATE
59*4882a593Smuzhiyun */
pxa_pwm_config(struct pwm_chip * chip,struct pwm_device * pwm,int duty_ns,int period_ns)60*4882a593Smuzhiyun static int pxa_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
61*4882a593Smuzhiyun int duty_ns, int period_ns)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
64*4882a593Smuzhiyun unsigned long long c;
65*4882a593Smuzhiyun unsigned long period_cycles, prescale, pv, dc;
66*4882a593Smuzhiyun unsigned long offset;
67*4882a593Smuzhiyun int rc;
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun offset = pwm->hwpwm ? 0x10 : 0;
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun c = clk_get_rate(pc->clk);
72*4882a593Smuzhiyun c = c * period_ns;
73*4882a593Smuzhiyun do_div(c, 1000000000);
74*4882a593Smuzhiyun period_cycles = c;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun if (period_cycles < 1)
77*4882a593Smuzhiyun period_cycles = 1;
78*4882a593Smuzhiyun prescale = (period_cycles - 1) / 1024;
79*4882a593Smuzhiyun pv = period_cycles / (prescale + 1) - 1;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun if (prescale > 63)
82*4882a593Smuzhiyun return -EINVAL;
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun if (duty_ns == period_ns)
85*4882a593Smuzhiyun dc = PWMDCR_FD;
86*4882a593Smuzhiyun else
87*4882a593Smuzhiyun dc = (pv + 1) * duty_ns / period_ns;
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun /* NOTE: the clock to PWM has to be enabled first
90*4882a593Smuzhiyun * before writing to the registers
91*4882a593Smuzhiyun */
92*4882a593Smuzhiyun rc = clk_prepare_enable(pc->clk);
93*4882a593Smuzhiyun if (rc < 0)
94*4882a593Smuzhiyun return rc;
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun writel(prescale, pc->mmio_base + offset + PWMCR);
97*4882a593Smuzhiyun writel(dc, pc->mmio_base + offset + PWMDCR);
98*4882a593Smuzhiyun writel(pv, pc->mmio_base + offset + PWMPCR);
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun clk_disable_unprepare(pc->clk);
101*4882a593Smuzhiyun return 0;
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun
pxa_pwm_enable(struct pwm_chip * chip,struct pwm_device * pwm)104*4882a593Smuzhiyun static int pxa_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun return clk_prepare_enable(pc->clk);
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun
pxa_pwm_disable(struct pwm_chip * chip,struct pwm_device * pwm)111*4882a593Smuzhiyun static void pxa_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
112*4882a593Smuzhiyun {
113*4882a593Smuzhiyun struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun clk_disable_unprepare(pc->clk);
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun static const struct pwm_ops pxa_pwm_ops = {
119*4882a593Smuzhiyun .config = pxa_pwm_config,
120*4882a593Smuzhiyun .enable = pxa_pwm_enable,
121*4882a593Smuzhiyun .disable = pxa_pwm_disable,
122*4882a593Smuzhiyun .owner = THIS_MODULE,
123*4882a593Smuzhiyun };
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun #ifdef CONFIG_OF
126*4882a593Smuzhiyun /*
127*4882a593Smuzhiyun * Device tree users must create one device instance for each PWM channel.
128*4882a593Smuzhiyun * Hence we dispense with the HAS_SECONDARY_PWM and "tell" the original driver
129*4882a593Smuzhiyun * code that this is a single channel pxa25x-pwm. Currently all devices are
130*4882a593Smuzhiyun * supported identically.
131*4882a593Smuzhiyun */
132*4882a593Smuzhiyun static const struct of_device_id pwm_of_match[] = {
133*4882a593Smuzhiyun { .compatible = "marvell,pxa250-pwm", .data = &pwm_id_table[0]},
134*4882a593Smuzhiyun { .compatible = "marvell,pxa270-pwm", .data = &pwm_id_table[0]},
135*4882a593Smuzhiyun { .compatible = "marvell,pxa168-pwm", .data = &pwm_id_table[0]},
136*4882a593Smuzhiyun { .compatible = "marvell,pxa910-pwm", .data = &pwm_id_table[0]},
137*4882a593Smuzhiyun { }
138*4882a593Smuzhiyun };
139*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, pwm_of_match);
140*4882a593Smuzhiyun #else
141*4882a593Smuzhiyun #define pwm_of_match NULL
142*4882a593Smuzhiyun #endif
143*4882a593Smuzhiyun
pxa_pwm_get_id_dt(struct device * dev)144*4882a593Smuzhiyun static const struct platform_device_id *pxa_pwm_get_id_dt(struct device *dev)
145*4882a593Smuzhiyun {
146*4882a593Smuzhiyun const struct of_device_id *id = of_match_device(pwm_of_match, dev);
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun return id ? id->data : NULL;
149*4882a593Smuzhiyun }
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun static struct pwm_device *
pxa_pwm_of_xlate(struct pwm_chip * pc,const struct of_phandle_args * args)152*4882a593Smuzhiyun pxa_pwm_of_xlate(struct pwm_chip *pc, const struct of_phandle_args *args)
153*4882a593Smuzhiyun {
154*4882a593Smuzhiyun struct pwm_device *pwm;
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun pwm = pwm_request_from_chip(pc, 0, NULL);
157*4882a593Smuzhiyun if (IS_ERR(pwm))
158*4882a593Smuzhiyun return pwm;
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun pwm->args.period = args->args[0];
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun return pwm;
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun
pwm_probe(struct platform_device * pdev)165*4882a593Smuzhiyun static int pwm_probe(struct platform_device *pdev)
166*4882a593Smuzhiyun {
167*4882a593Smuzhiyun const struct platform_device_id *id = platform_get_device_id(pdev);
168*4882a593Smuzhiyun struct pxa_pwm_chip *pwm;
169*4882a593Smuzhiyun struct resource *r;
170*4882a593Smuzhiyun int ret = 0;
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun if (IS_ENABLED(CONFIG_OF) && id == NULL)
173*4882a593Smuzhiyun id = pxa_pwm_get_id_dt(&pdev->dev);
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun if (id == NULL)
176*4882a593Smuzhiyun return -EINVAL;
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun pwm = devm_kzalloc(&pdev->dev, sizeof(*pwm), GFP_KERNEL);
179*4882a593Smuzhiyun if (pwm == NULL)
180*4882a593Smuzhiyun return -ENOMEM;
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun pwm->clk = devm_clk_get(&pdev->dev, NULL);
183*4882a593Smuzhiyun if (IS_ERR(pwm->clk))
184*4882a593Smuzhiyun return PTR_ERR(pwm->clk);
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun pwm->chip.dev = &pdev->dev;
187*4882a593Smuzhiyun pwm->chip.ops = &pxa_pwm_ops;
188*4882a593Smuzhiyun pwm->chip.base = -1;
189*4882a593Smuzhiyun pwm->chip.npwm = (id->driver_data & HAS_SECONDARY_PWM) ? 2 : 1;
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun if (IS_ENABLED(CONFIG_OF)) {
192*4882a593Smuzhiyun pwm->chip.of_xlate = pxa_pwm_of_xlate;
193*4882a593Smuzhiyun pwm->chip.of_pwm_n_cells = 1;
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
197*4882a593Smuzhiyun pwm->mmio_base = devm_ioremap_resource(&pdev->dev, r);
198*4882a593Smuzhiyun if (IS_ERR(pwm->mmio_base))
199*4882a593Smuzhiyun return PTR_ERR(pwm->mmio_base);
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun ret = pwmchip_add(&pwm->chip);
202*4882a593Smuzhiyun if (ret < 0) {
203*4882a593Smuzhiyun dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);
204*4882a593Smuzhiyun return ret;
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun platform_set_drvdata(pdev, pwm);
208*4882a593Smuzhiyun return 0;
209*4882a593Smuzhiyun }
210*4882a593Smuzhiyun
pwm_remove(struct platform_device * pdev)211*4882a593Smuzhiyun static int pwm_remove(struct platform_device *pdev)
212*4882a593Smuzhiyun {
213*4882a593Smuzhiyun struct pxa_pwm_chip *chip;
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun chip = platform_get_drvdata(pdev);
216*4882a593Smuzhiyun if (chip == NULL)
217*4882a593Smuzhiyun return -ENODEV;
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun return pwmchip_remove(&chip->chip);
220*4882a593Smuzhiyun }
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun static struct platform_driver pwm_driver = {
223*4882a593Smuzhiyun .driver = {
224*4882a593Smuzhiyun .name = "pxa25x-pwm",
225*4882a593Smuzhiyun .of_match_table = pwm_of_match,
226*4882a593Smuzhiyun },
227*4882a593Smuzhiyun .probe = pwm_probe,
228*4882a593Smuzhiyun .remove = pwm_remove,
229*4882a593Smuzhiyun .id_table = pwm_id_table,
230*4882a593Smuzhiyun };
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun module_platform_driver(pwm_driver);
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
235