1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Driver for PCA9685 16-channel 12-bit PWM LED controller
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2013 Steffen Trumtrar <s.trumtrar@pengutronix.de>
6*4882a593Smuzhiyun * Copyright (C) 2015 Clemens Gruber <clemens.gruber@pqgruber.com>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * based on the pwm-twl-led.c driver
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/acpi.h>
12*4882a593Smuzhiyun #include <linux/gpio/driver.h>
13*4882a593Smuzhiyun #include <linux/i2c.h>
14*4882a593Smuzhiyun #include <linux/module.h>
15*4882a593Smuzhiyun #include <linux/mutex.h>
16*4882a593Smuzhiyun #include <linux/platform_device.h>
17*4882a593Smuzhiyun #include <linux/property.h>
18*4882a593Smuzhiyun #include <linux/pwm.h>
19*4882a593Smuzhiyun #include <linux/regmap.h>
20*4882a593Smuzhiyun #include <linux/slab.h>
21*4882a593Smuzhiyun #include <linux/delay.h>
22*4882a593Smuzhiyun #include <linux/pm_runtime.h>
23*4882a593Smuzhiyun #include <linux/bitmap.h>
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun /*
26*4882a593Smuzhiyun * Because the PCA9685 has only one prescaler per chip, changing the period of
27*4882a593Smuzhiyun * one channel affects the period of all 16 PWM outputs!
28*4882a593Smuzhiyun * However, the ratio between each configured duty cycle and the chip-wide
29*4882a593Smuzhiyun * period remains constant, because the OFF time is set in proportion to the
30*4882a593Smuzhiyun * counter range.
31*4882a593Smuzhiyun */
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun #define PCA9685_MODE1 0x00
34*4882a593Smuzhiyun #define PCA9685_MODE2 0x01
35*4882a593Smuzhiyun #define PCA9685_SUBADDR1 0x02
36*4882a593Smuzhiyun #define PCA9685_SUBADDR2 0x03
37*4882a593Smuzhiyun #define PCA9685_SUBADDR3 0x04
38*4882a593Smuzhiyun #define PCA9685_ALLCALLADDR 0x05
39*4882a593Smuzhiyun #define PCA9685_LEDX_ON_L 0x06
40*4882a593Smuzhiyun #define PCA9685_LEDX_ON_H 0x07
41*4882a593Smuzhiyun #define PCA9685_LEDX_OFF_L 0x08
42*4882a593Smuzhiyun #define PCA9685_LEDX_OFF_H 0x09
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun #define PCA9685_ALL_LED_ON_L 0xFA
45*4882a593Smuzhiyun #define PCA9685_ALL_LED_ON_H 0xFB
46*4882a593Smuzhiyun #define PCA9685_ALL_LED_OFF_L 0xFC
47*4882a593Smuzhiyun #define PCA9685_ALL_LED_OFF_H 0xFD
48*4882a593Smuzhiyun #define PCA9685_PRESCALE 0xFE
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun #define PCA9685_PRESCALE_MIN 0x03 /* => max. frequency of 1526 Hz */
51*4882a593Smuzhiyun #define PCA9685_PRESCALE_MAX 0xFF /* => min. frequency of 24 Hz */
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun #define PCA9685_COUNTER_RANGE 4096
54*4882a593Smuzhiyun #define PCA9685_DEFAULT_PERIOD 5000000 /* Default period_ns = 1/200 Hz */
55*4882a593Smuzhiyun #define PCA9685_OSC_CLOCK_MHZ 25 /* Internal oscillator with 25 MHz */
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun #define PCA9685_NUMREGS 0xFF
58*4882a593Smuzhiyun #define PCA9685_MAXCHAN 0x10
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun #define LED_FULL BIT(4)
61*4882a593Smuzhiyun #define MODE1_ALLCALL BIT(0)
62*4882a593Smuzhiyun #define MODE1_SUB3 BIT(1)
63*4882a593Smuzhiyun #define MODE1_SUB2 BIT(2)
64*4882a593Smuzhiyun #define MODE1_SUB1 BIT(3)
65*4882a593Smuzhiyun #define MODE1_SLEEP BIT(4)
66*4882a593Smuzhiyun #define MODE2_INVRT BIT(4)
67*4882a593Smuzhiyun #define MODE2_OUTDRV BIT(2)
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun #define LED_N_ON_H(N) (PCA9685_LEDX_ON_H + (4 * (N)))
70*4882a593Smuzhiyun #define LED_N_ON_L(N) (PCA9685_LEDX_ON_L + (4 * (N)))
71*4882a593Smuzhiyun #define LED_N_OFF_H(N) (PCA9685_LEDX_OFF_H + (4 * (N)))
72*4882a593Smuzhiyun #define LED_N_OFF_L(N) (PCA9685_LEDX_OFF_L + (4 * (N)))
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun struct pca9685 {
75*4882a593Smuzhiyun struct pwm_chip chip;
76*4882a593Smuzhiyun struct regmap *regmap;
77*4882a593Smuzhiyun int period_ns;
78*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_GPIOLIB)
79*4882a593Smuzhiyun struct mutex lock;
80*4882a593Smuzhiyun struct gpio_chip gpio;
81*4882a593Smuzhiyun DECLARE_BITMAP(pwms_inuse, PCA9685_MAXCHAN + 1);
82*4882a593Smuzhiyun #endif
83*4882a593Smuzhiyun };
84*4882a593Smuzhiyun
to_pca(struct pwm_chip * chip)85*4882a593Smuzhiyun static inline struct pca9685 *to_pca(struct pwm_chip *chip)
86*4882a593Smuzhiyun {
87*4882a593Smuzhiyun return container_of(chip, struct pca9685, chip);
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_GPIOLIB)
pca9685_pwm_test_and_set_inuse(struct pca9685 * pca,int pwm_idx)91*4882a593Smuzhiyun static bool pca9685_pwm_test_and_set_inuse(struct pca9685 *pca, int pwm_idx)
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun bool is_inuse;
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun mutex_lock(&pca->lock);
96*4882a593Smuzhiyun if (pwm_idx >= PCA9685_MAXCHAN) {
97*4882a593Smuzhiyun /*
98*4882a593Smuzhiyun * "All LEDs" channel:
99*4882a593Smuzhiyun * pretend already in use if any of the PWMs are requested
100*4882a593Smuzhiyun */
101*4882a593Smuzhiyun if (!bitmap_empty(pca->pwms_inuse, PCA9685_MAXCHAN)) {
102*4882a593Smuzhiyun is_inuse = true;
103*4882a593Smuzhiyun goto out;
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun } else {
106*4882a593Smuzhiyun /*
107*4882a593Smuzhiyun * Regular channel:
108*4882a593Smuzhiyun * pretend already in use if the "all LEDs" channel is requested
109*4882a593Smuzhiyun */
110*4882a593Smuzhiyun if (test_bit(PCA9685_MAXCHAN, pca->pwms_inuse)) {
111*4882a593Smuzhiyun is_inuse = true;
112*4882a593Smuzhiyun goto out;
113*4882a593Smuzhiyun }
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun is_inuse = test_and_set_bit(pwm_idx, pca->pwms_inuse);
116*4882a593Smuzhiyun out:
117*4882a593Smuzhiyun mutex_unlock(&pca->lock);
118*4882a593Smuzhiyun return is_inuse;
119*4882a593Smuzhiyun }
120*4882a593Smuzhiyun
pca9685_pwm_clear_inuse(struct pca9685 * pca,int pwm_idx)121*4882a593Smuzhiyun static void pca9685_pwm_clear_inuse(struct pca9685 *pca, int pwm_idx)
122*4882a593Smuzhiyun {
123*4882a593Smuzhiyun mutex_lock(&pca->lock);
124*4882a593Smuzhiyun clear_bit(pwm_idx, pca->pwms_inuse);
125*4882a593Smuzhiyun mutex_unlock(&pca->lock);
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun
pca9685_pwm_gpio_request(struct gpio_chip * gpio,unsigned int offset)128*4882a593Smuzhiyun static int pca9685_pwm_gpio_request(struct gpio_chip *gpio, unsigned int offset)
129*4882a593Smuzhiyun {
130*4882a593Smuzhiyun struct pca9685 *pca = gpiochip_get_data(gpio);
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun if (pca9685_pwm_test_and_set_inuse(pca, offset))
133*4882a593Smuzhiyun return -EBUSY;
134*4882a593Smuzhiyun pm_runtime_get_sync(pca->chip.dev);
135*4882a593Smuzhiyun return 0;
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun
pca9685_pwm_gpio_get(struct gpio_chip * gpio,unsigned int offset)138*4882a593Smuzhiyun static int pca9685_pwm_gpio_get(struct gpio_chip *gpio, unsigned int offset)
139*4882a593Smuzhiyun {
140*4882a593Smuzhiyun struct pca9685 *pca = gpiochip_get_data(gpio);
141*4882a593Smuzhiyun struct pwm_device *pwm = &pca->chip.pwms[offset];
142*4882a593Smuzhiyun unsigned int value;
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun regmap_read(pca->regmap, LED_N_ON_H(pwm->hwpwm), &value);
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun return value & LED_FULL;
147*4882a593Smuzhiyun }
148*4882a593Smuzhiyun
pca9685_pwm_gpio_set(struct gpio_chip * gpio,unsigned int offset,int value)149*4882a593Smuzhiyun static void pca9685_pwm_gpio_set(struct gpio_chip *gpio, unsigned int offset,
150*4882a593Smuzhiyun int value)
151*4882a593Smuzhiyun {
152*4882a593Smuzhiyun struct pca9685 *pca = gpiochip_get_data(gpio);
153*4882a593Smuzhiyun struct pwm_device *pwm = &pca->chip.pwms[offset];
154*4882a593Smuzhiyun unsigned int on = value ? LED_FULL : 0;
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun /* Clear both OFF registers */
157*4882a593Smuzhiyun regmap_write(pca->regmap, LED_N_OFF_L(pwm->hwpwm), 0);
158*4882a593Smuzhiyun regmap_write(pca->regmap, LED_N_OFF_H(pwm->hwpwm), 0);
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun /* Set the full ON bit */
161*4882a593Smuzhiyun regmap_write(pca->regmap, LED_N_ON_H(pwm->hwpwm), on);
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun
pca9685_pwm_gpio_free(struct gpio_chip * gpio,unsigned int offset)164*4882a593Smuzhiyun static void pca9685_pwm_gpio_free(struct gpio_chip *gpio, unsigned int offset)
165*4882a593Smuzhiyun {
166*4882a593Smuzhiyun struct pca9685 *pca = gpiochip_get_data(gpio);
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun pca9685_pwm_gpio_set(gpio, offset, 0);
169*4882a593Smuzhiyun pm_runtime_put(pca->chip.dev);
170*4882a593Smuzhiyun pca9685_pwm_clear_inuse(pca, offset);
171*4882a593Smuzhiyun }
172*4882a593Smuzhiyun
pca9685_pwm_gpio_get_direction(struct gpio_chip * chip,unsigned int offset)173*4882a593Smuzhiyun static int pca9685_pwm_gpio_get_direction(struct gpio_chip *chip,
174*4882a593Smuzhiyun unsigned int offset)
175*4882a593Smuzhiyun {
176*4882a593Smuzhiyun /* Always out */
177*4882a593Smuzhiyun return GPIO_LINE_DIRECTION_OUT;
178*4882a593Smuzhiyun }
179*4882a593Smuzhiyun
pca9685_pwm_gpio_direction_input(struct gpio_chip * gpio,unsigned int offset)180*4882a593Smuzhiyun static int pca9685_pwm_gpio_direction_input(struct gpio_chip *gpio,
181*4882a593Smuzhiyun unsigned int offset)
182*4882a593Smuzhiyun {
183*4882a593Smuzhiyun return -EINVAL;
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun
pca9685_pwm_gpio_direction_output(struct gpio_chip * gpio,unsigned int offset,int value)186*4882a593Smuzhiyun static int pca9685_pwm_gpio_direction_output(struct gpio_chip *gpio,
187*4882a593Smuzhiyun unsigned int offset, int value)
188*4882a593Smuzhiyun {
189*4882a593Smuzhiyun pca9685_pwm_gpio_set(gpio, offset, value);
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun return 0;
192*4882a593Smuzhiyun }
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun /*
195*4882a593Smuzhiyun * The PCA9685 has a bit for turning the PWM output full off or on. Some
196*4882a593Smuzhiyun * boards like Intel Galileo actually uses these as normal GPIOs so we
197*4882a593Smuzhiyun * expose a GPIO chip here which can exclusively take over the underlying
198*4882a593Smuzhiyun * PWM channel.
199*4882a593Smuzhiyun */
pca9685_pwm_gpio_probe(struct pca9685 * pca)200*4882a593Smuzhiyun static int pca9685_pwm_gpio_probe(struct pca9685 *pca)
201*4882a593Smuzhiyun {
202*4882a593Smuzhiyun struct device *dev = pca->chip.dev;
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun mutex_init(&pca->lock);
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun pca->gpio.label = dev_name(dev);
207*4882a593Smuzhiyun pca->gpio.parent = dev;
208*4882a593Smuzhiyun pca->gpio.request = pca9685_pwm_gpio_request;
209*4882a593Smuzhiyun pca->gpio.free = pca9685_pwm_gpio_free;
210*4882a593Smuzhiyun pca->gpio.get_direction = pca9685_pwm_gpio_get_direction;
211*4882a593Smuzhiyun pca->gpio.direction_input = pca9685_pwm_gpio_direction_input;
212*4882a593Smuzhiyun pca->gpio.direction_output = pca9685_pwm_gpio_direction_output;
213*4882a593Smuzhiyun pca->gpio.get = pca9685_pwm_gpio_get;
214*4882a593Smuzhiyun pca->gpio.set = pca9685_pwm_gpio_set;
215*4882a593Smuzhiyun pca->gpio.base = -1;
216*4882a593Smuzhiyun pca->gpio.ngpio = PCA9685_MAXCHAN;
217*4882a593Smuzhiyun pca->gpio.can_sleep = true;
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun return devm_gpiochip_add_data(dev, &pca->gpio, pca);
220*4882a593Smuzhiyun }
221*4882a593Smuzhiyun #else
pca9685_pwm_test_and_set_inuse(struct pca9685 * pca,int pwm_idx)222*4882a593Smuzhiyun static inline bool pca9685_pwm_test_and_set_inuse(struct pca9685 *pca,
223*4882a593Smuzhiyun int pwm_idx)
224*4882a593Smuzhiyun {
225*4882a593Smuzhiyun return false;
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun static inline void
pca9685_pwm_clear_inuse(struct pca9685 * pca,int pwm_idx)229*4882a593Smuzhiyun pca9685_pwm_clear_inuse(struct pca9685 *pca, int pwm_idx)
230*4882a593Smuzhiyun {
231*4882a593Smuzhiyun }
232*4882a593Smuzhiyun
pca9685_pwm_gpio_probe(struct pca9685 * pca)233*4882a593Smuzhiyun static inline int pca9685_pwm_gpio_probe(struct pca9685 *pca)
234*4882a593Smuzhiyun {
235*4882a593Smuzhiyun return 0;
236*4882a593Smuzhiyun }
237*4882a593Smuzhiyun #endif
238*4882a593Smuzhiyun
pca9685_set_sleep_mode(struct pca9685 * pca,bool enable)239*4882a593Smuzhiyun static void pca9685_set_sleep_mode(struct pca9685 *pca, bool enable)
240*4882a593Smuzhiyun {
241*4882a593Smuzhiyun regmap_update_bits(pca->regmap, PCA9685_MODE1,
242*4882a593Smuzhiyun MODE1_SLEEP, enable ? MODE1_SLEEP : 0);
243*4882a593Smuzhiyun if (!enable) {
244*4882a593Smuzhiyun /* Wait 500us for the oscillator to be back up */
245*4882a593Smuzhiyun udelay(500);
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun
pca9685_pwm_config(struct pwm_chip * chip,struct pwm_device * pwm,int duty_ns,int period_ns)249*4882a593Smuzhiyun static int pca9685_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
250*4882a593Smuzhiyun int duty_ns, int period_ns)
251*4882a593Smuzhiyun {
252*4882a593Smuzhiyun struct pca9685 *pca = to_pca(chip);
253*4882a593Smuzhiyun unsigned long long duty;
254*4882a593Smuzhiyun unsigned int reg;
255*4882a593Smuzhiyun int prescale;
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun if (period_ns != pca->period_ns) {
258*4882a593Smuzhiyun prescale = DIV_ROUND_CLOSEST(PCA9685_OSC_CLOCK_MHZ * period_ns,
259*4882a593Smuzhiyun PCA9685_COUNTER_RANGE * 1000) - 1;
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun if (prescale >= PCA9685_PRESCALE_MIN &&
262*4882a593Smuzhiyun prescale <= PCA9685_PRESCALE_MAX) {
263*4882a593Smuzhiyun /*
264*4882a593Smuzhiyun * Putting the chip briefly into SLEEP mode
265*4882a593Smuzhiyun * at this point won't interfere with the
266*4882a593Smuzhiyun * pm_runtime framework, because the pm_runtime
267*4882a593Smuzhiyun * state is guaranteed active here.
268*4882a593Smuzhiyun */
269*4882a593Smuzhiyun /* Put chip into sleep mode */
270*4882a593Smuzhiyun pca9685_set_sleep_mode(pca, true);
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun /* Change the chip-wide output frequency */
273*4882a593Smuzhiyun regmap_write(pca->regmap, PCA9685_PRESCALE, prescale);
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun /* Wake the chip up */
276*4882a593Smuzhiyun pca9685_set_sleep_mode(pca, false);
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun pca->period_ns = period_ns;
279*4882a593Smuzhiyun } else {
280*4882a593Smuzhiyun dev_err(chip->dev,
281*4882a593Smuzhiyun "prescaler not set: period out of bounds!\n");
282*4882a593Smuzhiyun return -EINVAL;
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun }
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun if (duty_ns < 1) {
287*4882a593Smuzhiyun if (pwm->hwpwm >= PCA9685_MAXCHAN)
288*4882a593Smuzhiyun reg = PCA9685_ALL_LED_OFF_H;
289*4882a593Smuzhiyun else
290*4882a593Smuzhiyun reg = LED_N_OFF_H(pwm->hwpwm);
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun regmap_write(pca->regmap, reg, LED_FULL);
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun return 0;
295*4882a593Smuzhiyun }
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun if (duty_ns == period_ns) {
298*4882a593Smuzhiyun /* Clear both OFF registers */
299*4882a593Smuzhiyun if (pwm->hwpwm >= PCA9685_MAXCHAN)
300*4882a593Smuzhiyun reg = PCA9685_ALL_LED_OFF_L;
301*4882a593Smuzhiyun else
302*4882a593Smuzhiyun reg = LED_N_OFF_L(pwm->hwpwm);
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun regmap_write(pca->regmap, reg, 0x0);
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun if (pwm->hwpwm >= PCA9685_MAXCHAN)
307*4882a593Smuzhiyun reg = PCA9685_ALL_LED_OFF_H;
308*4882a593Smuzhiyun else
309*4882a593Smuzhiyun reg = LED_N_OFF_H(pwm->hwpwm);
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun regmap_write(pca->regmap, reg, 0x0);
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun /* Set the full ON bit */
314*4882a593Smuzhiyun if (pwm->hwpwm >= PCA9685_MAXCHAN)
315*4882a593Smuzhiyun reg = PCA9685_ALL_LED_ON_H;
316*4882a593Smuzhiyun else
317*4882a593Smuzhiyun reg = LED_N_ON_H(pwm->hwpwm);
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun regmap_write(pca->regmap, reg, LED_FULL);
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun return 0;
322*4882a593Smuzhiyun }
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun duty = PCA9685_COUNTER_RANGE * (unsigned long long)duty_ns;
325*4882a593Smuzhiyun duty = DIV_ROUND_UP_ULL(duty, period_ns);
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun if (pwm->hwpwm >= PCA9685_MAXCHAN)
328*4882a593Smuzhiyun reg = PCA9685_ALL_LED_OFF_L;
329*4882a593Smuzhiyun else
330*4882a593Smuzhiyun reg = LED_N_OFF_L(pwm->hwpwm);
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun regmap_write(pca->regmap, reg, (int)duty & 0xff);
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun if (pwm->hwpwm >= PCA9685_MAXCHAN)
335*4882a593Smuzhiyun reg = PCA9685_ALL_LED_OFF_H;
336*4882a593Smuzhiyun else
337*4882a593Smuzhiyun reg = LED_N_OFF_H(pwm->hwpwm);
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun regmap_write(pca->regmap, reg, ((int)duty >> 8) & 0xf);
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun /* Clear the full ON bit, otherwise the set OFF time has no effect */
342*4882a593Smuzhiyun if (pwm->hwpwm >= PCA9685_MAXCHAN)
343*4882a593Smuzhiyun reg = PCA9685_ALL_LED_ON_H;
344*4882a593Smuzhiyun else
345*4882a593Smuzhiyun reg = LED_N_ON_H(pwm->hwpwm);
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun regmap_write(pca->regmap, reg, 0);
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun return 0;
350*4882a593Smuzhiyun }
351*4882a593Smuzhiyun
pca9685_pwm_enable(struct pwm_chip * chip,struct pwm_device * pwm)352*4882a593Smuzhiyun static int pca9685_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
353*4882a593Smuzhiyun {
354*4882a593Smuzhiyun struct pca9685 *pca = to_pca(chip);
355*4882a593Smuzhiyun unsigned int reg;
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun /*
358*4882a593Smuzhiyun * The PWM subsystem does not support a pre-delay.
359*4882a593Smuzhiyun * So, set the ON-timeout to 0
360*4882a593Smuzhiyun */
361*4882a593Smuzhiyun if (pwm->hwpwm >= PCA9685_MAXCHAN)
362*4882a593Smuzhiyun reg = PCA9685_ALL_LED_ON_L;
363*4882a593Smuzhiyun else
364*4882a593Smuzhiyun reg = LED_N_ON_L(pwm->hwpwm);
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun regmap_write(pca->regmap, reg, 0);
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun if (pwm->hwpwm >= PCA9685_MAXCHAN)
369*4882a593Smuzhiyun reg = PCA9685_ALL_LED_ON_H;
370*4882a593Smuzhiyun else
371*4882a593Smuzhiyun reg = LED_N_ON_H(pwm->hwpwm);
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun regmap_write(pca->regmap, reg, 0);
374*4882a593Smuzhiyun
375*4882a593Smuzhiyun /*
376*4882a593Smuzhiyun * Clear the full-off bit.
377*4882a593Smuzhiyun * It has precedence over the others and must be off.
378*4882a593Smuzhiyun */
379*4882a593Smuzhiyun if (pwm->hwpwm >= PCA9685_MAXCHAN)
380*4882a593Smuzhiyun reg = PCA9685_ALL_LED_OFF_H;
381*4882a593Smuzhiyun else
382*4882a593Smuzhiyun reg = LED_N_OFF_H(pwm->hwpwm);
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun regmap_update_bits(pca->regmap, reg, LED_FULL, 0x0);
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun return 0;
387*4882a593Smuzhiyun }
388*4882a593Smuzhiyun
pca9685_pwm_disable(struct pwm_chip * chip,struct pwm_device * pwm)389*4882a593Smuzhiyun static void pca9685_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
390*4882a593Smuzhiyun {
391*4882a593Smuzhiyun struct pca9685 *pca = to_pca(chip);
392*4882a593Smuzhiyun unsigned int reg;
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun if (pwm->hwpwm >= PCA9685_MAXCHAN)
395*4882a593Smuzhiyun reg = PCA9685_ALL_LED_OFF_H;
396*4882a593Smuzhiyun else
397*4882a593Smuzhiyun reg = LED_N_OFF_H(pwm->hwpwm);
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun regmap_write(pca->regmap, reg, LED_FULL);
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun /* Clear the LED_OFF counter. */
402*4882a593Smuzhiyun if (pwm->hwpwm >= PCA9685_MAXCHAN)
403*4882a593Smuzhiyun reg = PCA9685_ALL_LED_OFF_L;
404*4882a593Smuzhiyun else
405*4882a593Smuzhiyun reg = LED_N_OFF_L(pwm->hwpwm);
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun regmap_write(pca->regmap, reg, 0x0);
408*4882a593Smuzhiyun }
409*4882a593Smuzhiyun
pca9685_pwm_request(struct pwm_chip * chip,struct pwm_device * pwm)410*4882a593Smuzhiyun static int pca9685_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
411*4882a593Smuzhiyun {
412*4882a593Smuzhiyun struct pca9685 *pca = to_pca(chip);
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun if (pca9685_pwm_test_and_set_inuse(pca, pwm->hwpwm))
415*4882a593Smuzhiyun return -EBUSY;
416*4882a593Smuzhiyun pm_runtime_get_sync(chip->dev);
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun return 0;
419*4882a593Smuzhiyun }
420*4882a593Smuzhiyun
pca9685_pwm_free(struct pwm_chip * chip,struct pwm_device * pwm)421*4882a593Smuzhiyun static void pca9685_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
422*4882a593Smuzhiyun {
423*4882a593Smuzhiyun struct pca9685 *pca = to_pca(chip);
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun pca9685_pwm_disable(chip, pwm);
426*4882a593Smuzhiyun pm_runtime_put(chip->dev);
427*4882a593Smuzhiyun pca9685_pwm_clear_inuse(pca, pwm->hwpwm);
428*4882a593Smuzhiyun }
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun static const struct pwm_ops pca9685_pwm_ops = {
431*4882a593Smuzhiyun .enable = pca9685_pwm_enable,
432*4882a593Smuzhiyun .disable = pca9685_pwm_disable,
433*4882a593Smuzhiyun .config = pca9685_pwm_config,
434*4882a593Smuzhiyun .request = pca9685_pwm_request,
435*4882a593Smuzhiyun .free = pca9685_pwm_free,
436*4882a593Smuzhiyun .owner = THIS_MODULE,
437*4882a593Smuzhiyun };
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun static const struct regmap_config pca9685_regmap_i2c_config = {
440*4882a593Smuzhiyun .reg_bits = 8,
441*4882a593Smuzhiyun .val_bits = 8,
442*4882a593Smuzhiyun .max_register = PCA9685_NUMREGS,
443*4882a593Smuzhiyun .cache_type = REGCACHE_NONE,
444*4882a593Smuzhiyun };
445*4882a593Smuzhiyun
pca9685_pwm_probe(struct i2c_client * client,const struct i2c_device_id * id)446*4882a593Smuzhiyun static int pca9685_pwm_probe(struct i2c_client *client,
447*4882a593Smuzhiyun const struct i2c_device_id *id)
448*4882a593Smuzhiyun {
449*4882a593Smuzhiyun struct pca9685 *pca;
450*4882a593Smuzhiyun unsigned int reg;
451*4882a593Smuzhiyun int ret;
452*4882a593Smuzhiyun
453*4882a593Smuzhiyun pca = devm_kzalloc(&client->dev, sizeof(*pca), GFP_KERNEL);
454*4882a593Smuzhiyun if (!pca)
455*4882a593Smuzhiyun return -ENOMEM;
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun pca->regmap = devm_regmap_init_i2c(client, &pca9685_regmap_i2c_config);
458*4882a593Smuzhiyun if (IS_ERR(pca->regmap)) {
459*4882a593Smuzhiyun ret = PTR_ERR(pca->regmap);
460*4882a593Smuzhiyun dev_err(&client->dev, "Failed to initialize register map: %d\n",
461*4882a593Smuzhiyun ret);
462*4882a593Smuzhiyun return ret;
463*4882a593Smuzhiyun }
464*4882a593Smuzhiyun pca->period_ns = PCA9685_DEFAULT_PERIOD;
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun i2c_set_clientdata(client, pca);
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun regmap_read(pca->regmap, PCA9685_MODE2, ®);
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun if (device_property_read_bool(&client->dev, "invert"))
471*4882a593Smuzhiyun reg |= MODE2_INVRT;
472*4882a593Smuzhiyun else
473*4882a593Smuzhiyun reg &= ~MODE2_INVRT;
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun if (device_property_read_bool(&client->dev, "open-drain"))
476*4882a593Smuzhiyun reg &= ~MODE2_OUTDRV;
477*4882a593Smuzhiyun else
478*4882a593Smuzhiyun reg |= MODE2_OUTDRV;
479*4882a593Smuzhiyun
480*4882a593Smuzhiyun regmap_write(pca->regmap, PCA9685_MODE2, reg);
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun /* Disable all LED ALLCALL and SUBx addresses to avoid bus collisions */
483*4882a593Smuzhiyun regmap_read(pca->regmap, PCA9685_MODE1, ®);
484*4882a593Smuzhiyun reg &= ~(MODE1_ALLCALL | MODE1_SUB1 | MODE1_SUB2 | MODE1_SUB3);
485*4882a593Smuzhiyun regmap_write(pca->regmap, PCA9685_MODE1, reg);
486*4882a593Smuzhiyun
487*4882a593Smuzhiyun /* Clear all "full off" bits */
488*4882a593Smuzhiyun regmap_write(pca->regmap, PCA9685_ALL_LED_OFF_L, 0);
489*4882a593Smuzhiyun regmap_write(pca->regmap, PCA9685_ALL_LED_OFF_H, 0);
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun pca->chip.ops = &pca9685_pwm_ops;
492*4882a593Smuzhiyun /* Add an extra channel for ALL_LED */
493*4882a593Smuzhiyun pca->chip.npwm = PCA9685_MAXCHAN + 1;
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun pca->chip.dev = &client->dev;
496*4882a593Smuzhiyun pca->chip.base = -1;
497*4882a593Smuzhiyun
498*4882a593Smuzhiyun ret = pwmchip_add(&pca->chip);
499*4882a593Smuzhiyun if (ret < 0)
500*4882a593Smuzhiyun return ret;
501*4882a593Smuzhiyun
502*4882a593Smuzhiyun ret = pca9685_pwm_gpio_probe(pca);
503*4882a593Smuzhiyun if (ret < 0) {
504*4882a593Smuzhiyun pwmchip_remove(&pca->chip);
505*4882a593Smuzhiyun return ret;
506*4882a593Smuzhiyun }
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun /* The chip comes out of power-up in the active state */
509*4882a593Smuzhiyun pm_runtime_set_active(&client->dev);
510*4882a593Smuzhiyun /*
511*4882a593Smuzhiyun * Enable will put the chip into suspend, which is what we
512*4882a593Smuzhiyun * want as all outputs are disabled at this point
513*4882a593Smuzhiyun */
514*4882a593Smuzhiyun pm_runtime_enable(&client->dev);
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun return 0;
517*4882a593Smuzhiyun }
518*4882a593Smuzhiyun
pca9685_pwm_remove(struct i2c_client * client)519*4882a593Smuzhiyun static int pca9685_pwm_remove(struct i2c_client *client)
520*4882a593Smuzhiyun {
521*4882a593Smuzhiyun struct pca9685 *pca = i2c_get_clientdata(client);
522*4882a593Smuzhiyun int ret;
523*4882a593Smuzhiyun
524*4882a593Smuzhiyun ret = pwmchip_remove(&pca->chip);
525*4882a593Smuzhiyun if (ret)
526*4882a593Smuzhiyun return ret;
527*4882a593Smuzhiyun pm_runtime_disable(&client->dev);
528*4882a593Smuzhiyun return 0;
529*4882a593Smuzhiyun }
530*4882a593Smuzhiyun
pca9685_pwm_runtime_suspend(struct device * dev)531*4882a593Smuzhiyun static int __maybe_unused pca9685_pwm_runtime_suspend(struct device *dev)
532*4882a593Smuzhiyun {
533*4882a593Smuzhiyun struct i2c_client *client = to_i2c_client(dev);
534*4882a593Smuzhiyun struct pca9685 *pca = i2c_get_clientdata(client);
535*4882a593Smuzhiyun
536*4882a593Smuzhiyun pca9685_set_sleep_mode(pca, true);
537*4882a593Smuzhiyun return 0;
538*4882a593Smuzhiyun }
539*4882a593Smuzhiyun
pca9685_pwm_runtime_resume(struct device * dev)540*4882a593Smuzhiyun static int __maybe_unused pca9685_pwm_runtime_resume(struct device *dev)
541*4882a593Smuzhiyun {
542*4882a593Smuzhiyun struct i2c_client *client = to_i2c_client(dev);
543*4882a593Smuzhiyun struct pca9685 *pca = i2c_get_clientdata(client);
544*4882a593Smuzhiyun
545*4882a593Smuzhiyun pca9685_set_sleep_mode(pca, false);
546*4882a593Smuzhiyun return 0;
547*4882a593Smuzhiyun }
548*4882a593Smuzhiyun
549*4882a593Smuzhiyun static const struct i2c_device_id pca9685_id[] = {
550*4882a593Smuzhiyun { "pca9685", 0 },
551*4882a593Smuzhiyun { /* sentinel */ },
552*4882a593Smuzhiyun };
553*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, pca9685_id);
554*4882a593Smuzhiyun
555*4882a593Smuzhiyun #ifdef CONFIG_ACPI
556*4882a593Smuzhiyun static const struct acpi_device_id pca9685_acpi_ids[] = {
557*4882a593Smuzhiyun { "INT3492", 0 },
558*4882a593Smuzhiyun { /* sentinel */ },
559*4882a593Smuzhiyun };
560*4882a593Smuzhiyun MODULE_DEVICE_TABLE(acpi, pca9685_acpi_ids);
561*4882a593Smuzhiyun #endif
562*4882a593Smuzhiyun
563*4882a593Smuzhiyun #ifdef CONFIG_OF
564*4882a593Smuzhiyun static const struct of_device_id pca9685_dt_ids[] = {
565*4882a593Smuzhiyun { .compatible = "nxp,pca9685-pwm", },
566*4882a593Smuzhiyun { /* sentinel */ }
567*4882a593Smuzhiyun };
568*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, pca9685_dt_ids);
569*4882a593Smuzhiyun #endif
570*4882a593Smuzhiyun
571*4882a593Smuzhiyun static const struct dev_pm_ops pca9685_pwm_pm = {
572*4882a593Smuzhiyun SET_RUNTIME_PM_OPS(pca9685_pwm_runtime_suspend,
573*4882a593Smuzhiyun pca9685_pwm_runtime_resume, NULL)
574*4882a593Smuzhiyun };
575*4882a593Smuzhiyun
576*4882a593Smuzhiyun static struct i2c_driver pca9685_i2c_driver = {
577*4882a593Smuzhiyun .driver = {
578*4882a593Smuzhiyun .name = "pca9685-pwm",
579*4882a593Smuzhiyun .acpi_match_table = ACPI_PTR(pca9685_acpi_ids),
580*4882a593Smuzhiyun .of_match_table = of_match_ptr(pca9685_dt_ids),
581*4882a593Smuzhiyun .pm = &pca9685_pwm_pm,
582*4882a593Smuzhiyun },
583*4882a593Smuzhiyun .probe = pca9685_pwm_probe,
584*4882a593Smuzhiyun .remove = pca9685_pwm_remove,
585*4882a593Smuzhiyun .id_table = pca9685_id,
586*4882a593Smuzhiyun };
587*4882a593Smuzhiyun
588*4882a593Smuzhiyun module_i2c_driver(pca9685_i2c_driver);
589*4882a593Smuzhiyun
590*4882a593Smuzhiyun MODULE_AUTHOR("Steffen Trumtrar <s.trumtrar@pengutronix.de>");
591*4882a593Smuzhiyun MODULE_DESCRIPTION("PWM driver for PCA9685");
592*4882a593Smuzhiyun MODULE_LICENSE("GPL");
593