xref: /OK3568_Linux_fs/kernel/drivers/pwm/pwm-lp3943.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * TI/National Semiconductor LP3943 PWM driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright 2013 Texas Instruments
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Author: Milo Kim <milo.kim@ti.com>
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/err.h>
11*4882a593Smuzhiyun #include <linux/i2c.h>
12*4882a593Smuzhiyun #include <linux/mfd/lp3943.h>
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun #include <linux/platform_device.h>
15*4882a593Smuzhiyun #include <linux/pwm.h>
16*4882a593Smuzhiyun #include <linux/slab.h>
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #define LP3943_MAX_DUTY			255
19*4882a593Smuzhiyun #define LP3943_MIN_PERIOD		6250
20*4882a593Smuzhiyun #define LP3943_MAX_PERIOD		1600000
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun struct lp3943_pwm {
23*4882a593Smuzhiyun 	struct pwm_chip chip;
24*4882a593Smuzhiyun 	struct lp3943 *lp3943;
25*4882a593Smuzhiyun 	struct lp3943_platform_data *pdata;
26*4882a593Smuzhiyun };
27*4882a593Smuzhiyun 
to_lp3943_pwm(struct pwm_chip * _chip)28*4882a593Smuzhiyun static inline struct lp3943_pwm *to_lp3943_pwm(struct pwm_chip *_chip)
29*4882a593Smuzhiyun {
30*4882a593Smuzhiyun 	return container_of(_chip, struct lp3943_pwm, chip);
31*4882a593Smuzhiyun }
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun static struct lp3943_pwm_map *
lp3943_pwm_request_map(struct lp3943_pwm * lp3943_pwm,int hwpwm)34*4882a593Smuzhiyun lp3943_pwm_request_map(struct lp3943_pwm *lp3943_pwm, int hwpwm)
35*4882a593Smuzhiyun {
36*4882a593Smuzhiyun 	struct lp3943_platform_data *pdata = lp3943_pwm->pdata;
37*4882a593Smuzhiyun 	struct lp3943 *lp3943 = lp3943_pwm->lp3943;
38*4882a593Smuzhiyun 	struct lp3943_pwm_map *pwm_map;
39*4882a593Smuzhiyun 	int i, offset;
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun 	pwm_map = kzalloc(sizeof(*pwm_map), GFP_KERNEL);
42*4882a593Smuzhiyun 	if (!pwm_map)
43*4882a593Smuzhiyun 		return ERR_PTR(-ENOMEM);
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun 	pwm_map->output = pdata->pwms[hwpwm]->output;
46*4882a593Smuzhiyun 	pwm_map->num_outputs = pdata->pwms[hwpwm]->num_outputs;
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun 	for (i = 0; i < pwm_map->num_outputs; i++) {
49*4882a593Smuzhiyun 		offset = pwm_map->output[i];
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun 		/* Return an error if the pin is already assigned */
52*4882a593Smuzhiyun 		if (test_and_set_bit(offset, &lp3943->pin_used)) {
53*4882a593Smuzhiyun 			kfree(pwm_map);
54*4882a593Smuzhiyun 			return ERR_PTR(-EBUSY);
55*4882a593Smuzhiyun 		}
56*4882a593Smuzhiyun 	}
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun 	return pwm_map;
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun 
lp3943_pwm_request(struct pwm_chip * chip,struct pwm_device * pwm)61*4882a593Smuzhiyun static int lp3943_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun 	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
64*4882a593Smuzhiyun 	struct lp3943_pwm_map *pwm_map;
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun 	pwm_map = lp3943_pwm_request_map(lp3943_pwm, pwm->hwpwm);
67*4882a593Smuzhiyun 	if (IS_ERR(pwm_map))
68*4882a593Smuzhiyun 		return PTR_ERR(pwm_map);
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun 	return pwm_set_chip_data(pwm, pwm_map);
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun 
lp3943_pwm_free_map(struct lp3943_pwm * lp3943_pwm,struct lp3943_pwm_map * pwm_map)73*4882a593Smuzhiyun static void lp3943_pwm_free_map(struct lp3943_pwm *lp3943_pwm,
74*4882a593Smuzhiyun 				struct lp3943_pwm_map *pwm_map)
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun 	struct lp3943 *lp3943 = lp3943_pwm->lp3943;
77*4882a593Smuzhiyun 	int i, offset;
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 	for (i = 0; i < pwm_map->num_outputs; i++) {
80*4882a593Smuzhiyun 		offset = pwm_map->output[i];
81*4882a593Smuzhiyun 		clear_bit(offset, &lp3943->pin_used);
82*4882a593Smuzhiyun 	}
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun 	kfree(pwm_map);
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun 
lp3943_pwm_free(struct pwm_chip * chip,struct pwm_device * pwm)87*4882a593Smuzhiyun static void lp3943_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun 	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
90*4882a593Smuzhiyun 	struct lp3943_pwm_map *pwm_map = pwm_get_chip_data(pwm);
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	lp3943_pwm_free_map(lp3943_pwm, pwm_map);
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun 
lp3943_pwm_config(struct pwm_chip * chip,struct pwm_device * pwm,int duty_ns,int period_ns)95*4882a593Smuzhiyun static int lp3943_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
96*4882a593Smuzhiyun 			     int duty_ns, int period_ns)
97*4882a593Smuzhiyun {
98*4882a593Smuzhiyun 	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
99*4882a593Smuzhiyun 	struct lp3943 *lp3943 = lp3943_pwm->lp3943;
100*4882a593Smuzhiyun 	u8 val, reg_duty, reg_prescale;
101*4882a593Smuzhiyun 	int err;
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun 	/*
104*4882a593Smuzhiyun 	 * How to configure the LP3943 PWMs
105*4882a593Smuzhiyun 	 *
106*4882a593Smuzhiyun 	 * 1) Period = 6250 ~ 1600000
107*4882a593Smuzhiyun 	 * 2) Prescale = period / 6250 -1
108*4882a593Smuzhiyun 	 * 3) Duty = input duty
109*4882a593Smuzhiyun 	 *
110*4882a593Smuzhiyun 	 * Prescale and duty are register values
111*4882a593Smuzhiyun 	 */
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 	if (pwm->hwpwm == 0) {
114*4882a593Smuzhiyun 		reg_prescale = LP3943_REG_PRESCALE0;
115*4882a593Smuzhiyun 		reg_duty     = LP3943_REG_PWM0;
116*4882a593Smuzhiyun 	} else {
117*4882a593Smuzhiyun 		reg_prescale = LP3943_REG_PRESCALE1;
118*4882a593Smuzhiyun 		reg_duty     = LP3943_REG_PWM1;
119*4882a593Smuzhiyun 	}
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	period_ns = clamp(period_ns, LP3943_MIN_PERIOD, LP3943_MAX_PERIOD);
122*4882a593Smuzhiyun 	val       = (u8)(period_ns / LP3943_MIN_PERIOD - 1);
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	err = lp3943_write_byte(lp3943, reg_prescale, val);
125*4882a593Smuzhiyun 	if (err)
126*4882a593Smuzhiyun 		return err;
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	duty_ns = min(duty_ns, period_ns);
129*4882a593Smuzhiyun 	val = (u8)(duty_ns * LP3943_MAX_DUTY / period_ns);
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	return lp3943_write_byte(lp3943, reg_duty, val);
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun 
lp3943_pwm_set_mode(struct lp3943_pwm * lp3943_pwm,struct lp3943_pwm_map * pwm_map,u8 val)134*4882a593Smuzhiyun static int lp3943_pwm_set_mode(struct lp3943_pwm *lp3943_pwm,
135*4882a593Smuzhiyun 			       struct lp3943_pwm_map *pwm_map,
136*4882a593Smuzhiyun 			       u8 val)
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun 	struct lp3943 *lp3943 = lp3943_pwm->lp3943;
139*4882a593Smuzhiyun 	const struct lp3943_reg_cfg *mux = lp3943->mux_cfg;
140*4882a593Smuzhiyun 	int i, index, err;
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 	for (i = 0; i < pwm_map->num_outputs; i++) {
143*4882a593Smuzhiyun 		index = pwm_map->output[i];
144*4882a593Smuzhiyun 		err = lp3943_update_bits(lp3943, mux[index].reg,
145*4882a593Smuzhiyun 					 mux[index].mask,
146*4882a593Smuzhiyun 					 val << mux[index].shift);
147*4882a593Smuzhiyun 		if (err)
148*4882a593Smuzhiyun 			return err;
149*4882a593Smuzhiyun 	}
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 	return 0;
152*4882a593Smuzhiyun }
153*4882a593Smuzhiyun 
lp3943_pwm_enable(struct pwm_chip * chip,struct pwm_device * pwm)154*4882a593Smuzhiyun static int lp3943_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
155*4882a593Smuzhiyun {
156*4882a593Smuzhiyun 	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
157*4882a593Smuzhiyun 	struct lp3943_pwm_map *pwm_map = pwm_get_chip_data(pwm);
158*4882a593Smuzhiyun 	u8 val;
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun 	if (pwm->hwpwm == 0)
161*4882a593Smuzhiyun 		val = LP3943_DIM_PWM0;
162*4882a593Smuzhiyun 	else
163*4882a593Smuzhiyun 		val = LP3943_DIM_PWM1;
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 	/*
166*4882a593Smuzhiyun 	 * Each PWM generator is set to control any of outputs of LP3943.
167*4882a593Smuzhiyun 	 * To enable/disable the PWM, these output pins should be configured.
168*4882a593Smuzhiyun 	 */
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun 	return lp3943_pwm_set_mode(lp3943_pwm, pwm_map, val);
171*4882a593Smuzhiyun }
172*4882a593Smuzhiyun 
lp3943_pwm_disable(struct pwm_chip * chip,struct pwm_device * pwm)173*4882a593Smuzhiyun static void lp3943_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
174*4882a593Smuzhiyun {
175*4882a593Smuzhiyun 	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
176*4882a593Smuzhiyun 	struct lp3943_pwm_map *pwm_map = pwm_get_chip_data(pwm);
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun 	/*
179*4882a593Smuzhiyun 	 * LP3943 outputs are open-drain, so the pin should be configured
180*4882a593Smuzhiyun 	 * when the PWM is disabled.
181*4882a593Smuzhiyun 	 */
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun 	lp3943_pwm_set_mode(lp3943_pwm, pwm_map, LP3943_GPIO_OUT_HIGH);
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun static const struct pwm_ops lp3943_pwm_ops = {
187*4882a593Smuzhiyun 	.request	= lp3943_pwm_request,
188*4882a593Smuzhiyun 	.free		= lp3943_pwm_free,
189*4882a593Smuzhiyun 	.config		= lp3943_pwm_config,
190*4882a593Smuzhiyun 	.enable		= lp3943_pwm_enable,
191*4882a593Smuzhiyun 	.disable	= lp3943_pwm_disable,
192*4882a593Smuzhiyun 	.owner		= THIS_MODULE,
193*4882a593Smuzhiyun };
194*4882a593Smuzhiyun 
lp3943_pwm_parse_dt(struct device * dev,struct lp3943_pwm * lp3943_pwm)195*4882a593Smuzhiyun static int lp3943_pwm_parse_dt(struct device *dev,
196*4882a593Smuzhiyun 			       struct lp3943_pwm *lp3943_pwm)
197*4882a593Smuzhiyun {
198*4882a593Smuzhiyun 	static const char * const name[] = { "ti,pwm0", "ti,pwm1", };
199*4882a593Smuzhiyun 	struct device_node *node = dev->of_node;
200*4882a593Smuzhiyun 	struct lp3943_platform_data *pdata;
201*4882a593Smuzhiyun 	struct lp3943_pwm_map *pwm_map;
202*4882a593Smuzhiyun 	enum lp3943_pwm_output *output;
203*4882a593Smuzhiyun 	int i, err, proplen, count = 0;
204*4882a593Smuzhiyun 	u32 num_outputs;
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun 	if (!node)
207*4882a593Smuzhiyun 		return -EINVAL;
208*4882a593Smuzhiyun 
209*4882a593Smuzhiyun 	pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
210*4882a593Smuzhiyun 	if (!pdata)
211*4882a593Smuzhiyun 		return -ENOMEM;
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun 	/*
214*4882a593Smuzhiyun 	 * Read the output map configuration from the device tree.
215*4882a593Smuzhiyun 	 * Each of the two PWM generators can drive zero or more outputs.
216*4882a593Smuzhiyun 	 */
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun 	for (i = 0; i < LP3943_NUM_PWMS; i++) {
219*4882a593Smuzhiyun 		if (!of_get_property(node, name[i], &proplen))
220*4882a593Smuzhiyun 			continue;
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun 		num_outputs = proplen / sizeof(u32);
223*4882a593Smuzhiyun 		if (num_outputs == 0)
224*4882a593Smuzhiyun 			continue;
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun 		output = devm_kcalloc(dev, num_outputs, sizeof(*output),
227*4882a593Smuzhiyun 				      GFP_KERNEL);
228*4882a593Smuzhiyun 		if (!output)
229*4882a593Smuzhiyun 			return -ENOMEM;
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun 		err = of_property_read_u32_array(node, name[i], output,
232*4882a593Smuzhiyun 						 num_outputs);
233*4882a593Smuzhiyun 		if (err)
234*4882a593Smuzhiyun 			return err;
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun 		pwm_map = devm_kzalloc(dev, sizeof(*pwm_map), GFP_KERNEL);
237*4882a593Smuzhiyun 		if (!pwm_map)
238*4882a593Smuzhiyun 			return -ENOMEM;
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun 		pwm_map->output = output;
241*4882a593Smuzhiyun 		pwm_map->num_outputs = num_outputs;
242*4882a593Smuzhiyun 		pdata->pwms[i] = pwm_map;
243*4882a593Smuzhiyun 
244*4882a593Smuzhiyun 		count++;
245*4882a593Smuzhiyun 	}
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 	if (count == 0)
248*4882a593Smuzhiyun 		return -ENODATA;
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun 	lp3943_pwm->pdata = pdata;
251*4882a593Smuzhiyun 	return 0;
252*4882a593Smuzhiyun }
253*4882a593Smuzhiyun 
lp3943_pwm_probe(struct platform_device * pdev)254*4882a593Smuzhiyun static int lp3943_pwm_probe(struct platform_device *pdev)
255*4882a593Smuzhiyun {
256*4882a593Smuzhiyun 	struct lp3943 *lp3943 = dev_get_drvdata(pdev->dev.parent);
257*4882a593Smuzhiyun 	struct lp3943_pwm *lp3943_pwm;
258*4882a593Smuzhiyun 	int ret;
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 	lp3943_pwm = devm_kzalloc(&pdev->dev, sizeof(*lp3943_pwm), GFP_KERNEL);
261*4882a593Smuzhiyun 	if (!lp3943_pwm)
262*4882a593Smuzhiyun 		return -ENOMEM;
263*4882a593Smuzhiyun 
264*4882a593Smuzhiyun 	lp3943_pwm->pdata = lp3943->pdata;
265*4882a593Smuzhiyun 	if (!lp3943_pwm->pdata) {
266*4882a593Smuzhiyun 		if (IS_ENABLED(CONFIG_OF))
267*4882a593Smuzhiyun 			ret = lp3943_pwm_parse_dt(&pdev->dev, lp3943_pwm);
268*4882a593Smuzhiyun 		else
269*4882a593Smuzhiyun 			ret = -ENODEV;
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun 		if (ret)
272*4882a593Smuzhiyun 			return ret;
273*4882a593Smuzhiyun 	}
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun 	lp3943_pwm->lp3943 = lp3943;
276*4882a593Smuzhiyun 	lp3943_pwm->chip.dev = &pdev->dev;
277*4882a593Smuzhiyun 	lp3943_pwm->chip.ops = &lp3943_pwm_ops;
278*4882a593Smuzhiyun 	lp3943_pwm->chip.npwm = LP3943_NUM_PWMS;
279*4882a593Smuzhiyun 	lp3943_pwm->chip.base = -1;
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun 	platform_set_drvdata(pdev, lp3943_pwm);
282*4882a593Smuzhiyun 
283*4882a593Smuzhiyun 	return pwmchip_add(&lp3943_pwm->chip);
284*4882a593Smuzhiyun }
285*4882a593Smuzhiyun 
lp3943_pwm_remove(struct platform_device * pdev)286*4882a593Smuzhiyun static int lp3943_pwm_remove(struct platform_device *pdev)
287*4882a593Smuzhiyun {
288*4882a593Smuzhiyun 	struct lp3943_pwm *lp3943_pwm = platform_get_drvdata(pdev);
289*4882a593Smuzhiyun 
290*4882a593Smuzhiyun 	return pwmchip_remove(&lp3943_pwm->chip);
291*4882a593Smuzhiyun }
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun #ifdef CONFIG_OF
294*4882a593Smuzhiyun static const struct of_device_id lp3943_pwm_of_match[] = {
295*4882a593Smuzhiyun 	{ .compatible = "ti,lp3943-pwm", },
296*4882a593Smuzhiyun 	{ }
297*4882a593Smuzhiyun };
298*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, lp3943_pwm_of_match);
299*4882a593Smuzhiyun #endif
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun static struct platform_driver lp3943_pwm_driver = {
302*4882a593Smuzhiyun 	.probe = lp3943_pwm_probe,
303*4882a593Smuzhiyun 	.remove = lp3943_pwm_remove,
304*4882a593Smuzhiyun 	.driver = {
305*4882a593Smuzhiyun 		.name = "lp3943-pwm",
306*4882a593Smuzhiyun 		.of_match_table = of_match_ptr(lp3943_pwm_of_match),
307*4882a593Smuzhiyun 	},
308*4882a593Smuzhiyun };
309*4882a593Smuzhiyun module_platform_driver(lp3943_pwm_driver);
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun MODULE_DESCRIPTION("LP3943 PWM driver");
312*4882a593Smuzhiyun MODULE_ALIAS("platform:lp3943-pwm");
313*4882a593Smuzhiyun MODULE_AUTHOR("Milo Kim");
314*4882a593Smuzhiyun MODULE_LICENSE("GPL");
315