xref: /OK3568_Linux_fs/kernel/drivers/pwm/pwm-iqs620a.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Azoteq IQS620A PWM Generator
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2019 Jeff LaBundy <jeff@labundy.com>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Limitations:
8*4882a593Smuzhiyun  * - The period is fixed to 1 ms and is generated continuously despite changes
9*4882a593Smuzhiyun  *   to the duty cycle or enable/disable state.
10*4882a593Smuzhiyun  * - Changes to the duty cycle or enable/disable state take effect immediately
11*4882a593Smuzhiyun  *   and may result in a glitch during the period in which the change is made.
12*4882a593Smuzhiyun  * - The device cannot generate a 0% duty cycle. For duty cycles below 1 / 256
13*4882a593Smuzhiyun  *   ms, the output is disabled and relies upon an external pull-down resistor
14*4882a593Smuzhiyun  *   to hold the GPIO3/LTX pin low.
15*4882a593Smuzhiyun  */
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #include <linux/device.h>
18*4882a593Smuzhiyun #include <linux/kernel.h>
19*4882a593Smuzhiyun #include <linux/mfd/iqs62x.h>
20*4882a593Smuzhiyun #include <linux/module.h>
21*4882a593Smuzhiyun #include <linux/mutex.h>
22*4882a593Smuzhiyun #include <linux/notifier.h>
23*4882a593Smuzhiyun #include <linux/platform_device.h>
24*4882a593Smuzhiyun #include <linux/pwm.h>
25*4882a593Smuzhiyun #include <linux/regmap.h>
26*4882a593Smuzhiyun #include <linux/slab.h>
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun #define IQS620_PWR_SETTINGS			0xd2
29*4882a593Smuzhiyun #define IQS620_PWR_SETTINGS_PWM_OUT		BIT(7)
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun #define IQS620_PWM_DUTY_CYCLE			0xd8
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun #define IQS620_PWM_PERIOD_NS			1000000
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun struct iqs620_pwm_private {
36*4882a593Smuzhiyun 	struct iqs62x_core *iqs62x;
37*4882a593Smuzhiyun 	struct pwm_chip chip;
38*4882a593Smuzhiyun 	struct notifier_block notifier;
39*4882a593Smuzhiyun 	struct mutex lock;
40*4882a593Smuzhiyun 	bool out_en;
41*4882a593Smuzhiyun 	u8 duty_val;
42*4882a593Smuzhiyun };
43*4882a593Smuzhiyun 
iqs620_pwm_apply(struct pwm_chip * chip,struct pwm_device * pwm,const struct pwm_state * state)44*4882a593Smuzhiyun static int iqs620_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
45*4882a593Smuzhiyun 			    const struct pwm_state *state)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun 	struct iqs620_pwm_private *iqs620_pwm;
48*4882a593Smuzhiyun 	struct iqs62x_core *iqs62x;
49*4882a593Smuzhiyun 	unsigned int duty_cycle;
50*4882a593Smuzhiyun 	unsigned int duty_scale;
51*4882a593Smuzhiyun 	int ret;
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun 	if (state->polarity != PWM_POLARITY_NORMAL)
54*4882a593Smuzhiyun 		return -ENOTSUPP;
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun 	if (state->period < IQS620_PWM_PERIOD_NS)
57*4882a593Smuzhiyun 		return -EINVAL;
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun 	iqs620_pwm = container_of(chip, struct iqs620_pwm_private, chip);
60*4882a593Smuzhiyun 	iqs62x = iqs620_pwm->iqs62x;
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun 	/*
63*4882a593Smuzhiyun 	 * The duty cycle generated by the device is calculated as follows:
64*4882a593Smuzhiyun 	 *
65*4882a593Smuzhiyun 	 * duty_cycle = (IQS620_PWM_DUTY_CYCLE + 1) / 256 * 1 ms
66*4882a593Smuzhiyun 	 *
67*4882a593Smuzhiyun 	 * ...where IQS620_PWM_DUTY_CYCLE is a register value between 0 and 255
68*4882a593Smuzhiyun 	 * (inclusive). Therefore the lowest duty cycle the device can generate
69*4882a593Smuzhiyun 	 * while the output is enabled is 1 / 256 ms.
70*4882a593Smuzhiyun 	 *
71*4882a593Smuzhiyun 	 * For lower duty cycles (e.g. 0), the PWM output is simply disabled to
72*4882a593Smuzhiyun 	 * allow an external pull-down resistor to hold the GPIO3/LTX pin low.
73*4882a593Smuzhiyun 	 */
74*4882a593Smuzhiyun 	duty_cycle = min_t(u64, state->duty_cycle, IQS620_PWM_PERIOD_NS);
75*4882a593Smuzhiyun 	duty_scale = duty_cycle * 256 / IQS620_PWM_PERIOD_NS;
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun 	mutex_lock(&iqs620_pwm->lock);
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 	if (!state->enabled || !duty_scale) {
80*4882a593Smuzhiyun 		ret = regmap_update_bits(iqs62x->regmap, IQS620_PWR_SETTINGS,
81*4882a593Smuzhiyun 					 IQS620_PWR_SETTINGS_PWM_OUT, 0);
82*4882a593Smuzhiyun 		if (ret)
83*4882a593Smuzhiyun 			goto err_mutex;
84*4882a593Smuzhiyun 	}
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	if (duty_scale) {
87*4882a593Smuzhiyun 		u8 duty_val = duty_scale - 1;
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun 		ret = regmap_write(iqs62x->regmap, IQS620_PWM_DUTY_CYCLE,
90*4882a593Smuzhiyun 				   duty_val);
91*4882a593Smuzhiyun 		if (ret)
92*4882a593Smuzhiyun 			goto err_mutex;
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun 		iqs620_pwm->duty_val = duty_val;
95*4882a593Smuzhiyun 	}
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	if (state->enabled && duty_scale) {
98*4882a593Smuzhiyun 		ret = regmap_update_bits(iqs62x->regmap, IQS620_PWR_SETTINGS,
99*4882a593Smuzhiyun 					 IQS620_PWR_SETTINGS_PWM_OUT, 0xff);
100*4882a593Smuzhiyun 		if (ret)
101*4882a593Smuzhiyun 			goto err_mutex;
102*4882a593Smuzhiyun 	}
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 	iqs620_pwm->out_en = state->enabled;
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun err_mutex:
107*4882a593Smuzhiyun 	mutex_unlock(&iqs620_pwm->lock);
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun 	return ret;
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun 
iqs620_pwm_get_state(struct pwm_chip * chip,struct pwm_device * pwm,struct pwm_state * state)112*4882a593Smuzhiyun static void iqs620_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
113*4882a593Smuzhiyun 				 struct pwm_state *state)
114*4882a593Smuzhiyun {
115*4882a593Smuzhiyun 	struct iqs620_pwm_private *iqs620_pwm;
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun 	iqs620_pwm = container_of(chip, struct iqs620_pwm_private, chip);
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun 	mutex_lock(&iqs620_pwm->lock);
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	/*
122*4882a593Smuzhiyun 	 * Since the device cannot generate a 0% duty cycle, requests to do so
123*4882a593Smuzhiyun 	 * cause subsequent calls to iqs620_pwm_get_state to report the output
124*4882a593Smuzhiyun 	 * as disabled with duty cycle equal to that which was in use prior to
125*4882a593Smuzhiyun 	 * the request. This is not ideal, but is the best compromise based on
126*4882a593Smuzhiyun 	 * the capabilities of the device.
127*4882a593Smuzhiyun 	 */
128*4882a593Smuzhiyun 	state->enabled = iqs620_pwm->out_en;
129*4882a593Smuzhiyun 	state->duty_cycle = DIV_ROUND_UP((iqs620_pwm->duty_val + 1) *
130*4882a593Smuzhiyun 					 IQS620_PWM_PERIOD_NS, 256);
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun 	mutex_unlock(&iqs620_pwm->lock);
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun 	state->period = IQS620_PWM_PERIOD_NS;
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun 
iqs620_pwm_notifier(struct notifier_block * notifier,unsigned long event_flags,void * context)137*4882a593Smuzhiyun static int iqs620_pwm_notifier(struct notifier_block *notifier,
138*4882a593Smuzhiyun 			       unsigned long event_flags, void *context)
139*4882a593Smuzhiyun {
140*4882a593Smuzhiyun 	struct iqs620_pwm_private *iqs620_pwm;
141*4882a593Smuzhiyun 	struct iqs62x_core *iqs62x;
142*4882a593Smuzhiyun 	int ret;
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	if (!(event_flags & BIT(IQS62X_EVENT_SYS_RESET)))
145*4882a593Smuzhiyun 		return NOTIFY_DONE;
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	iqs620_pwm = container_of(notifier, struct iqs620_pwm_private,
148*4882a593Smuzhiyun 				  notifier);
149*4882a593Smuzhiyun 	iqs62x = iqs620_pwm->iqs62x;
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 	mutex_lock(&iqs620_pwm->lock);
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun 	/*
154*4882a593Smuzhiyun 	 * The parent MFD driver already prints an error message in the event
155*4882a593Smuzhiyun 	 * of a device reset, so nothing else is printed here unless there is
156*4882a593Smuzhiyun 	 * an additional failure.
157*4882a593Smuzhiyun 	 */
158*4882a593Smuzhiyun 	ret = regmap_write(iqs62x->regmap, IQS620_PWM_DUTY_CYCLE,
159*4882a593Smuzhiyun 			   iqs620_pwm->duty_val);
160*4882a593Smuzhiyun 	if (ret)
161*4882a593Smuzhiyun 		goto err_mutex;
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 	ret = regmap_update_bits(iqs62x->regmap, IQS620_PWR_SETTINGS,
164*4882a593Smuzhiyun 				 IQS620_PWR_SETTINGS_PWM_OUT,
165*4882a593Smuzhiyun 				 iqs620_pwm->out_en ? 0xff : 0);
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun err_mutex:
168*4882a593Smuzhiyun 	mutex_unlock(&iqs620_pwm->lock);
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun 	if (ret) {
171*4882a593Smuzhiyun 		dev_err(iqs620_pwm->chip.dev,
172*4882a593Smuzhiyun 			"Failed to re-initialize device: %d\n", ret);
173*4882a593Smuzhiyun 		return NOTIFY_BAD;
174*4882a593Smuzhiyun 	}
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun 	return NOTIFY_OK;
177*4882a593Smuzhiyun }
178*4882a593Smuzhiyun 
179*4882a593Smuzhiyun static const struct pwm_ops iqs620_pwm_ops = {
180*4882a593Smuzhiyun 	.apply = iqs620_pwm_apply,
181*4882a593Smuzhiyun 	.get_state = iqs620_pwm_get_state,
182*4882a593Smuzhiyun 	.owner = THIS_MODULE,
183*4882a593Smuzhiyun };
184*4882a593Smuzhiyun 
iqs620_pwm_notifier_unregister(void * context)185*4882a593Smuzhiyun static void iqs620_pwm_notifier_unregister(void *context)
186*4882a593Smuzhiyun {
187*4882a593Smuzhiyun 	struct iqs620_pwm_private *iqs620_pwm = context;
188*4882a593Smuzhiyun 	int ret;
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun 	ret = blocking_notifier_chain_unregister(&iqs620_pwm->iqs62x->nh,
191*4882a593Smuzhiyun 						 &iqs620_pwm->notifier);
192*4882a593Smuzhiyun 	if (ret)
193*4882a593Smuzhiyun 		dev_err(iqs620_pwm->chip.dev,
194*4882a593Smuzhiyun 			"Failed to unregister notifier: %d\n", ret);
195*4882a593Smuzhiyun }
196*4882a593Smuzhiyun 
iqs620_pwm_probe(struct platform_device * pdev)197*4882a593Smuzhiyun static int iqs620_pwm_probe(struct platform_device *pdev)
198*4882a593Smuzhiyun {
199*4882a593Smuzhiyun 	struct iqs62x_core *iqs62x = dev_get_drvdata(pdev->dev.parent);
200*4882a593Smuzhiyun 	struct iqs620_pwm_private *iqs620_pwm;
201*4882a593Smuzhiyun 	unsigned int val;
202*4882a593Smuzhiyun 	int ret;
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun 	iqs620_pwm = devm_kzalloc(&pdev->dev, sizeof(*iqs620_pwm), GFP_KERNEL);
205*4882a593Smuzhiyun 	if (!iqs620_pwm)
206*4882a593Smuzhiyun 		return -ENOMEM;
207*4882a593Smuzhiyun 
208*4882a593Smuzhiyun 	platform_set_drvdata(pdev, iqs620_pwm);
209*4882a593Smuzhiyun 	iqs620_pwm->iqs62x = iqs62x;
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun 	ret = regmap_read(iqs62x->regmap, IQS620_PWR_SETTINGS, &val);
212*4882a593Smuzhiyun 	if (ret)
213*4882a593Smuzhiyun 		return ret;
214*4882a593Smuzhiyun 	iqs620_pwm->out_en = val & IQS620_PWR_SETTINGS_PWM_OUT;
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun 	ret = regmap_read(iqs62x->regmap, IQS620_PWM_DUTY_CYCLE, &val);
217*4882a593Smuzhiyun 	if (ret)
218*4882a593Smuzhiyun 		return ret;
219*4882a593Smuzhiyun 	iqs620_pwm->duty_val = val;
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun 	iqs620_pwm->chip.dev = &pdev->dev;
222*4882a593Smuzhiyun 	iqs620_pwm->chip.ops = &iqs620_pwm_ops;
223*4882a593Smuzhiyun 	iqs620_pwm->chip.base = -1;
224*4882a593Smuzhiyun 	iqs620_pwm->chip.npwm = 1;
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun 	mutex_init(&iqs620_pwm->lock);
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun 	iqs620_pwm->notifier.notifier_call = iqs620_pwm_notifier;
229*4882a593Smuzhiyun 	ret = blocking_notifier_chain_register(&iqs620_pwm->iqs62x->nh,
230*4882a593Smuzhiyun 					       &iqs620_pwm->notifier);
231*4882a593Smuzhiyun 	if (ret) {
232*4882a593Smuzhiyun 		dev_err(&pdev->dev, "Failed to register notifier: %d\n", ret);
233*4882a593Smuzhiyun 		return ret;
234*4882a593Smuzhiyun 	}
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun 	ret = devm_add_action_or_reset(&pdev->dev,
237*4882a593Smuzhiyun 				       iqs620_pwm_notifier_unregister,
238*4882a593Smuzhiyun 				       iqs620_pwm);
239*4882a593Smuzhiyun 	if (ret)
240*4882a593Smuzhiyun 		return ret;
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun 	ret = pwmchip_add(&iqs620_pwm->chip);
243*4882a593Smuzhiyun 	if (ret)
244*4882a593Smuzhiyun 		dev_err(&pdev->dev, "Failed to add device: %d\n", ret);
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	return ret;
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun 
iqs620_pwm_remove(struct platform_device * pdev)249*4882a593Smuzhiyun static int iqs620_pwm_remove(struct platform_device *pdev)
250*4882a593Smuzhiyun {
251*4882a593Smuzhiyun 	struct iqs620_pwm_private *iqs620_pwm = platform_get_drvdata(pdev);
252*4882a593Smuzhiyun 	int ret;
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun 	ret = pwmchip_remove(&iqs620_pwm->chip);
255*4882a593Smuzhiyun 	if (ret)
256*4882a593Smuzhiyun 		dev_err(&pdev->dev, "Failed to remove device: %d\n", ret);
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun 	return ret;
259*4882a593Smuzhiyun }
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun static struct platform_driver iqs620_pwm_platform_driver = {
262*4882a593Smuzhiyun 	.driver = {
263*4882a593Smuzhiyun 		.name = "iqs620a-pwm",
264*4882a593Smuzhiyun 	},
265*4882a593Smuzhiyun 	.probe = iqs620_pwm_probe,
266*4882a593Smuzhiyun 	.remove = iqs620_pwm_remove,
267*4882a593Smuzhiyun };
268*4882a593Smuzhiyun module_platform_driver(iqs620_pwm_platform_driver);
269*4882a593Smuzhiyun 
270*4882a593Smuzhiyun MODULE_AUTHOR("Jeff LaBundy <jeff@labundy.com>");
271*4882a593Smuzhiyun MODULE_DESCRIPTION("Azoteq IQS620A PWM Generator");
272*4882a593Smuzhiyun MODULE_LICENSE("GPL");
273*4882a593Smuzhiyun MODULE_ALIAS("platform:iqs620a-pwm");
274