1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Chrager driver for Sc89890
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Author: Xu Shengfei <xsf@rock-chips.com>
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
10*4882a593Smuzhiyun #include <linux/i2c.h>
11*4882a593Smuzhiyun #include <linux/interrupt.h>
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/of.h>
14*4882a593Smuzhiyun #include <linux/power_supply.h>
15*4882a593Smuzhiyun #include <linux/regmap.h>
16*4882a593Smuzhiyun #include <linux/regulator/driver.h>
17*4882a593Smuzhiyun #include <linux/types.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun /* Module parameters. */
20*4882a593Smuzhiyun static int debug;
21*4882a593Smuzhiyun module_param_named(debug, debug, int, 0644);
22*4882a593Smuzhiyun MODULE_PARM_DESC(debug, "Set to one to enable debugging messages.");
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #define DBG(args...) \
25*4882a593Smuzhiyun do { \
26*4882a593Smuzhiyun if (debug) { \
27*4882a593Smuzhiyun pr_info(args); \
28*4882a593Smuzhiyun } \
29*4882a593Smuzhiyun } while (0)
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun #define SC89890_MANUFACTURER "SOUTHCHIP"
32*4882a593Smuzhiyun #define SC89890_IRQ "sc89890_irq"
33*4882a593Smuzhiyun #define SC89890_ID 4
34*4882a593Smuzhiyun #define SC89890_DEBUG_BUF_LEN 30
35*4882a593Smuzhiyun enum sc89890_fields {
36*4882a593Smuzhiyun F_EN_HIZ, F_EN_ILIM, F_IILIM, /* Reg00 */
37*4882a593Smuzhiyun F_BHOT, F_BCOLD, F_VINDPM_OFS, /* Reg01 */
38*4882a593Smuzhiyun F_CONV_START, F_CONV_RATE, F_BOOSTF, F_ICO_EN,
39*4882a593Smuzhiyun F_HVDCP_EN, F_MAXC_EN, F_FORCE_DPM, F_AUTO_DPDM_EN, /* Reg02 */
40*4882a593Smuzhiyun F_BAT_LOAD_EN, F_WD_RST, F_OTG_CFG, F_CHG_CFG, F_SYSVMIN,
41*4882a593Smuzhiyun F_MIN_VBAT_SEL, /* Reg03 */
42*4882a593Smuzhiyun F_PUMPX_EN, F_ICHG, /* Reg04 */
43*4882a593Smuzhiyun F_IPRECHG, F_ITERM, /* Reg05 */
44*4882a593Smuzhiyun F_VREG, F_BATLOWV, F_VRECHG, /* Reg06 */
45*4882a593Smuzhiyun F_TERM_EN, F_STAT_DIS, F_WD, F_TMR_EN, F_CHG_TMR,
46*4882a593Smuzhiyun F_JEITA_ISET, /* Reg07 */
47*4882a593Smuzhiyun F_BATCMP, F_VCLAMP, F_TREG, /* Reg08 */
48*4882a593Smuzhiyun F_FORCE_ICO, F_TMR2X_EN, F_BATFET_DIS, F_JEITA_VSET,
49*4882a593Smuzhiyun F_BATFET_DLY, F_BATFET_RST_EN, F_PUMPX_UP, F_PUMPX_DN, /* Reg09 */
50*4882a593Smuzhiyun F_BOOSTV, F_PFM_OTG_DIS, F_BOOSTI, /* Reg0A */
51*4882a593Smuzhiyun F_VBUS_STAT, F_CHG_STAT, F_PG_STAT, F_SDP_STAT, F_0B_RSVD,
52*4882a593Smuzhiyun F_VSYS_STAT, /* Reg0B */
53*4882a593Smuzhiyun F_WD_FAULT, F_BOOST_FAULT, F_CHG_FAULT, F_BAT_FAULT,
54*4882a593Smuzhiyun F_NTC_FAULT, /* Reg0C */
55*4882a593Smuzhiyun F_FORCE_VINDPM, F_VINDPM, /* Reg0D */
56*4882a593Smuzhiyun F_THERM_STAT, F_BATV, /* Reg0E */
57*4882a593Smuzhiyun F_SYSV, /* Reg0F */
58*4882a593Smuzhiyun F_TSPCT, /* Reg10 */
59*4882a593Smuzhiyun F_VBUS_GD, F_VBUSV, /* Reg11 */
60*4882a593Smuzhiyun F_ICHGR, /* Reg12 */
61*4882a593Smuzhiyun F_VDPM_STAT, F_IDPM_STAT, F_IDPM_LIM, /* Reg13 */
62*4882a593Smuzhiyun F_REG_RST, F_ICO_OPTIMIZED, F_PN, F_TS_PROFILE, F_DEV_REV, /* Reg14 */
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun F_MAX_FIELDS
65*4882a593Smuzhiyun };
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun /* initial field values, converted to register values */
68*4882a593Smuzhiyun struct sc89890_init_data {
69*4882a593Smuzhiyun u8 ichg; /* charge current */
70*4882a593Smuzhiyun u8 vreg; /* regulation voltage */
71*4882a593Smuzhiyun u8 iterm; /* termination current */
72*4882a593Smuzhiyun u8 iprechg; /* precharge current */
73*4882a593Smuzhiyun u8 sysvmin; /* minimum system voltage limit */
74*4882a593Smuzhiyun u8 boostv; /* boost regulation voltage */
75*4882a593Smuzhiyun u8 boosti; /* boost current limit */
76*4882a593Smuzhiyun u8 boostf; /* boost frequency */
77*4882a593Smuzhiyun u8 ilim_en; /* enable ILIM pin */
78*4882a593Smuzhiyun u8 treg; /* thermal regulation threshold */
79*4882a593Smuzhiyun u8 rbatcomp; /* IBAT sense resistor value */
80*4882a593Smuzhiyun u8 vclamp; /* IBAT compensation voltage limit */
81*4882a593Smuzhiyun };
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun struct sc89890_state {
84*4882a593Smuzhiyun u8 online;
85*4882a593Smuzhiyun u8 chrg_status;
86*4882a593Smuzhiyun u8 chrg_fault;
87*4882a593Smuzhiyun u8 vsys_status;
88*4882a593Smuzhiyun u8 boost_fault;
89*4882a593Smuzhiyun u8 bat_fault;
90*4882a593Smuzhiyun };
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun struct sc89890_device {
93*4882a593Smuzhiyun struct i2c_client *client;
94*4882a593Smuzhiyun struct device *dev;
95*4882a593Smuzhiyun struct power_supply *charger;
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun struct regulator_dev *otg_vbus_reg;
98*4882a593Smuzhiyun unsigned long usb_event;
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun struct regmap *rmap;
101*4882a593Smuzhiyun struct regmap_field *rmap_fields[F_MAX_FIELDS];
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun struct sc89890_init_data init_data;
104*4882a593Smuzhiyun struct sc89890_state state;
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun struct mutex lock; /* protect state data */
107*4882a593Smuzhiyun };
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun static const struct regmap_range sc89890_readonly_reg_ranges[] = {
110*4882a593Smuzhiyun regmap_reg_range(0x0b, 0x0c),
111*4882a593Smuzhiyun regmap_reg_range(0x0e, 0x13),
112*4882a593Smuzhiyun };
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun static const struct regmap_access_table sc89890_writeable_regs = {
115*4882a593Smuzhiyun .no_ranges = sc89890_readonly_reg_ranges,
116*4882a593Smuzhiyun .n_no_ranges = ARRAY_SIZE(sc89890_readonly_reg_ranges),
117*4882a593Smuzhiyun };
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun static const struct regmap_range sc89890_volatile_reg_ranges[] = {
120*4882a593Smuzhiyun regmap_reg_range(0x00, 0x00),
121*4882a593Smuzhiyun regmap_reg_range(0x02, 0x02),
122*4882a593Smuzhiyun regmap_reg_range(0x09, 0x09),
123*4882a593Smuzhiyun regmap_reg_range(0x0b, 0x0b),
124*4882a593Smuzhiyun regmap_reg_range(0x0c, 0x0c),
125*4882a593Smuzhiyun regmap_reg_range(0x0d, 0x14),
126*4882a593Smuzhiyun };
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun static const struct regmap_access_table sc89890_volatile_regs = {
129*4882a593Smuzhiyun .yes_ranges = sc89890_volatile_reg_ranges,
130*4882a593Smuzhiyun .n_yes_ranges = ARRAY_SIZE(sc89890_volatile_reg_ranges),
131*4882a593Smuzhiyun };
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun static const struct regmap_config sc89890_regmap_config = {
134*4882a593Smuzhiyun .reg_bits = 8,
135*4882a593Smuzhiyun .val_bits = 8,
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun .max_register = 0x14,
138*4882a593Smuzhiyun .cache_type = REGCACHE_RBTREE,
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun .wr_table = &sc89890_writeable_regs,
141*4882a593Smuzhiyun .volatile_table = &sc89890_volatile_regs,
142*4882a593Smuzhiyun };
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun static const struct reg_field sc89890_reg_fields[] = {
145*4882a593Smuzhiyun /* REG00 */
146*4882a593Smuzhiyun [F_EN_HIZ] = REG_FIELD(0x00, 7, 7),
147*4882a593Smuzhiyun [F_EN_ILIM] = REG_FIELD(0x00, 6, 6),
148*4882a593Smuzhiyun [F_IILIM] = REG_FIELD(0x00, 0, 5),
149*4882a593Smuzhiyun /* REG01 */
150*4882a593Smuzhiyun [F_BHOT] = REG_FIELD(0x01, 6, 7),
151*4882a593Smuzhiyun [F_BCOLD] = REG_FIELD(0x01, 5, 5),
152*4882a593Smuzhiyun [F_VINDPM_OFS] = REG_FIELD(0x01, 0, 4),
153*4882a593Smuzhiyun /* REG02 */
154*4882a593Smuzhiyun [F_CONV_START] = REG_FIELD(0x02, 7, 7),
155*4882a593Smuzhiyun [F_CONV_RATE] = REG_FIELD(0x02, 6, 6),
156*4882a593Smuzhiyun [F_BOOSTF] = REG_FIELD(0x02, 5, 5),
157*4882a593Smuzhiyun [F_ICO_EN] = REG_FIELD(0x02, 4, 4),
158*4882a593Smuzhiyun [F_HVDCP_EN] = REG_FIELD(0x02, 3, 3),
159*4882a593Smuzhiyun [F_MAXC_EN] = REG_FIELD(0x02, 2, 2),
160*4882a593Smuzhiyun [F_FORCE_DPM] = REG_FIELD(0x02, 1, 1),
161*4882a593Smuzhiyun [F_AUTO_DPDM_EN] = REG_FIELD(0x02, 0, 0),
162*4882a593Smuzhiyun /* REG03 */
163*4882a593Smuzhiyun [F_BAT_LOAD_EN] = REG_FIELD(0x03, 7, 7),
164*4882a593Smuzhiyun [F_WD_RST] = REG_FIELD(0x03, 6, 6),
165*4882a593Smuzhiyun [F_OTG_CFG] = REG_FIELD(0x03, 5, 5),
166*4882a593Smuzhiyun [F_CHG_CFG] = REG_FIELD(0x03, 4, 4),
167*4882a593Smuzhiyun [F_SYSVMIN] = REG_FIELD(0x03, 1, 3),
168*4882a593Smuzhiyun [F_MIN_VBAT_SEL] = REG_FIELD(0x03, 0, 0),
169*4882a593Smuzhiyun /* REG04 */
170*4882a593Smuzhiyun [F_PUMPX_EN] = REG_FIELD(0x04, 7, 7),
171*4882a593Smuzhiyun [F_ICHG] = REG_FIELD(0x04, 0, 6),
172*4882a593Smuzhiyun /* REG05 */
173*4882a593Smuzhiyun [F_IPRECHG] = REG_FIELD(0x05, 4, 7),
174*4882a593Smuzhiyun [F_ITERM] = REG_FIELD(0x05, 0, 3),
175*4882a593Smuzhiyun /* REG06 */
176*4882a593Smuzhiyun [F_VREG] = REG_FIELD(0x06, 2, 7),
177*4882a593Smuzhiyun [F_BATLOWV] = REG_FIELD(0x06, 1, 1),
178*4882a593Smuzhiyun [F_VRECHG] = REG_FIELD(0x06, 0, 0),
179*4882a593Smuzhiyun /* REG07 */
180*4882a593Smuzhiyun [F_TERM_EN] = REG_FIELD(0x07, 7, 7),
181*4882a593Smuzhiyun [F_STAT_DIS] = REG_FIELD(0x07, 6, 6),
182*4882a593Smuzhiyun [F_WD] = REG_FIELD(0x07, 4, 5),
183*4882a593Smuzhiyun [F_TMR_EN] = REG_FIELD(0x07, 3, 3),
184*4882a593Smuzhiyun [F_CHG_TMR] = REG_FIELD(0x07, 1, 2),
185*4882a593Smuzhiyun [F_JEITA_ISET] = REG_FIELD(0x07, 0, 0),
186*4882a593Smuzhiyun /* REG08 */
187*4882a593Smuzhiyun [F_BATCMP] = REG_FIELD(0x08, 5, 7),
188*4882a593Smuzhiyun [F_VCLAMP] = REG_FIELD(0x08, 2, 4),
189*4882a593Smuzhiyun [F_TREG] = REG_FIELD(0x08, 0, 1),
190*4882a593Smuzhiyun /* REG09 */
191*4882a593Smuzhiyun [F_FORCE_ICO] = REG_FIELD(0x09, 7, 7),
192*4882a593Smuzhiyun [F_TMR2X_EN] = REG_FIELD(0x09, 6, 6),
193*4882a593Smuzhiyun [F_BATFET_DIS] = REG_FIELD(0x09, 5, 5),
194*4882a593Smuzhiyun [F_JEITA_VSET] = REG_FIELD(0x09, 4, 4),
195*4882a593Smuzhiyun [F_BATFET_DLY] = REG_FIELD(0x09, 3, 3),
196*4882a593Smuzhiyun [F_BATFET_RST_EN] = REG_FIELD(0x09, 2, 2),
197*4882a593Smuzhiyun [F_PUMPX_UP] = REG_FIELD(0x09, 1, 1),
198*4882a593Smuzhiyun [F_PUMPX_DN] = REG_FIELD(0x09, 0, 0),
199*4882a593Smuzhiyun /* REG0A */
200*4882a593Smuzhiyun [F_BOOSTV] = REG_FIELD(0x0A, 4, 7),
201*4882a593Smuzhiyun [F_BOOSTI] = REG_FIELD(0x0A, 0, 2),
202*4882a593Smuzhiyun [F_PFM_OTG_DIS] = REG_FIELD(0x0A, 3, 3),
203*4882a593Smuzhiyun /* REG0B */
204*4882a593Smuzhiyun [F_VBUS_STAT] = REG_FIELD(0x0B, 5, 7),
205*4882a593Smuzhiyun [F_CHG_STAT] = REG_FIELD(0x0B, 3, 4),
206*4882a593Smuzhiyun [F_PG_STAT] = REG_FIELD(0x0B, 2, 2),
207*4882a593Smuzhiyun [F_SDP_STAT] = REG_FIELD(0x0B, 1, 1),
208*4882a593Smuzhiyun [F_VSYS_STAT] = REG_FIELD(0x0B, 0, 0),
209*4882a593Smuzhiyun /* REG0C */
210*4882a593Smuzhiyun [F_WD_FAULT] = REG_FIELD(0x0C, 7, 7),
211*4882a593Smuzhiyun [F_BOOST_FAULT] = REG_FIELD(0x0C, 6, 6),
212*4882a593Smuzhiyun [F_CHG_FAULT] = REG_FIELD(0x0C, 4, 5),
213*4882a593Smuzhiyun [F_BAT_FAULT] = REG_FIELD(0x0C, 3, 3),
214*4882a593Smuzhiyun [F_NTC_FAULT] = REG_FIELD(0x0C, 0, 2),
215*4882a593Smuzhiyun /* REG0D */
216*4882a593Smuzhiyun [F_FORCE_VINDPM] = REG_FIELD(0x0D, 7, 7),
217*4882a593Smuzhiyun [F_VINDPM] = REG_FIELD(0x0D, 0, 6),
218*4882a593Smuzhiyun /* REG0E */
219*4882a593Smuzhiyun [F_THERM_STAT] = REG_FIELD(0x0E, 7, 7),
220*4882a593Smuzhiyun [F_BATV] = REG_FIELD(0x0E, 0, 6),
221*4882a593Smuzhiyun /* REG0F */
222*4882a593Smuzhiyun [F_SYSV] = REG_FIELD(0x0F, 0, 6),
223*4882a593Smuzhiyun /* REG10 */
224*4882a593Smuzhiyun [F_TSPCT] = REG_FIELD(0x10, 0, 6),
225*4882a593Smuzhiyun /* REG11 */
226*4882a593Smuzhiyun [F_VBUS_GD] = REG_FIELD(0x11, 7, 7),
227*4882a593Smuzhiyun [F_VBUSV] = REG_FIELD(0x11, 0, 6),
228*4882a593Smuzhiyun /* REG12 */
229*4882a593Smuzhiyun [F_ICHGR] = REG_FIELD(0x12, 0, 6),
230*4882a593Smuzhiyun /* REG13 */
231*4882a593Smuzhiyun [F_VDPM_STAT] = REG_FIELD(0x13, 7, 7),
232*4882a593Smuzhiyun [F_IDPM_STAT] = REG_FIELD(0x13, 6, 6),
233*4882a593Smuzhiyun [F_IDPM_LIM] = REG_FIELD(0x13, 0, 5),
234*4882a593Smuzhiyun /* REG14 */
235*4882a593Smuzhiyun [F_REG_RST] = REG_FIELD(0x14, 7, 7),
236*4882a593Smuzhiyun [F_ICO_OPTIMIZED] = REG_FIELD(0x14, 6, 6),
237*4882a593Smuzhiyun [F_PN] = REG_FIELD(0x14, 3, 5),
238*4882a593Smuzhiyun [F_TS_PROFILE] = REG_FIELD(0x14, 2, 2),
239*4882a593Smuzhiyun [F_DEV_REV] = REG_FIELD(0x14, 0, 1)
240*4882a593Smuzhiyun };
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun enum sc89890_status {
243*4882a593Smuzhiyun STATUS_NOT_CHARGING,
244*4882a593Smuzhiyun STATUS_PRE_CHARGING,
245*4882a593Smuzhiyun STATUS_FAST_CHARGING,
246*4882a593Smuzhiyun STATUS_TERMINATION_DONE,
247*4882a593Smuzhiyun };
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun enum sc89890_chrg_fault {
250*4882a593Smuzhiyun CHRG_FAULT_NORMAL,
251*4882a593Smuzhiyun CHRG_FAULT_INPUT,
252*4882a593Smuzhiyun CHRG_FAULT_THERMAL_SHUTDOWN,
253*4882a593Smuzhiyun CHRG_FAULT_TIMER_EXPIRED,
254*4882a593Smuzhiyun };
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun /*
257*4882a593Smuzhiyun * Most of the val -> idx conversions can be computed, given the minimum,
258*4882a593Smuzhiyun * maximum and the step between values. For the rest of conversions, we use
259*4882a593Smuzhiyun * lookup tables.
260*4882a593Smuzhiyun */
261*4882a593Smuzhiyun enum sc89890_table_ids {
262*4882a593Smuzhiyun /* range tables */
263*4882a593Smuzhiyun TBL_ICHG,
264*4882a593Smuzhiyun TBL_ITERM,
265*4882a593Smuzhiyun TBL_IILIM,
266*4882a593Smuzhiyun TBL_VREG,
267*4882a593Smuzhiyun TBL_BOOSTV,
268*4882a593Smuzhiyun TBL_SYSVMIN,
269*4882a593Smuzhiyun TBL_VBATCOMP,
270*4882a593Smuzhiyun TBL_RBATCOMP,
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun /* lookup tables */
273*4882a593Smuzhiyun TBL_TREG,
274*4882a593Smuzhiyun TBL_BOOSTI,
275*4882a593Smuzhiyun };
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun /* Thermal Regulation Threshold lookup table, in degrees Celsius */
278*4882a593Smuzhiyun static const u32 sc89890_treg_tbl[] = { 60, 80, 100, 120 };
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun #define SC89890_TREG_TBL_SIZE ARRAY_SIZE(sc89890_treg_tbl)
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun /* Boost mode current limit lookup table, in uA */
283*4882a593Smuzhiyun static const u32 sc89890_boosti_tbl[] = {
284*4882a593Smuzhiyun 500000, 700000, 1100000, 1300000, 1600000, 1800000, 2100000, 2400000
285*4882a593Smuzhiyun };
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun #define SC89890_BOOSTI_TBL_SIZE ARRAY_SIZE(sc89890_boosti_tbl)
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun struct sc89890_range {
290*4882a593Smuzhiyun u32 min;
291*4882a593Smuzhiyun u32 max;
292*4882a593Smuzhiyun u32 step;
293*4882a593Smuzhiyun };
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun struct sc89890_lookup {
296*4882a593Smuzhiyun const u32 *tbl;
297*4882a593Smuzhiyun u32 size;
298*4882a593Smuzhiyun };
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun static const union {
301*4882a593Smuzhiyun struct sc89890_range rt;
302*4882a593Smuzhiyun struct sc89890_lookup lt;
303*4882a593Smuzhiyun } sc89890_tables[] = {
304*4882a593Smuzhiyun /* range tables */
305*4882a593Smuzhiyun [TBL_ICHG] = { .rt = {0, 5056000, 64000} }, /* uA */
306*4882a593Smuzhiyun [TBL_ITERM] = { .rt = {64000, 1024000, 64000} }, /* uA */
307*4882a593Smuzhiyun [TBL_IILIM] = { .rt = {100000, 3250000, 50000} }, /* uA */
308*4882a593Smuzhiyun [TBL_VREG] = { .rt = {3840000, 4608000, 16000} }, /* uV */
309*4882a593Smuzhiyun [TBL_BOOSTV] = { .rt = {4550000, 5510000, 64000} }, /* uV */
310*4882a593Smuzhiyun [TBL_SYSVMIN] = { .rt = {3000000, 3700000, 100000} }, /* uV */
311*4882a593Smuzhiyun [TBL_VBATCOMP] = { .rt = {0, 224000, 32000} }, /* uV */
312*4882a593Smuzhiyun [TBL_RBATCOMP] = { .rt = {0, 140000, 20000} }, /* uOhm */
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun /* lookup tables */
315*4882a593Smuzhiyun [TBL_TREG] = { .lt = {sc89890_treg_tbl, SC89890_TREG_TBL_SIZE} },
316*4882a593Smuzhiyun [TBL_BOOSTI] = { .lt = {sc89890_boosti_tbl, SC89890_BOOSTI_TBL_SIZE} }
317*4882a593Smuzhiyun };
318*4882a593Smuzhiyun
sc89890_field_read(struct sc89890_device * sc89890,enum sc89890_fields field_id)319*4882a593Smuzhiyun static int sc89890_field_read(struct sc89890_device *sc89890,
320*4882a593Smuzhiyun enum sc89890_fields field_id)
321*4882a593Smuzhiyun {
322*4882a593Smuzhiyun int ret;
323*4882a593Smuzhiyun int val;
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun ret = regmap_field_read(sc89890->rmap_fields[field_id], &val);
326*4882a593Smuzhiyun if (ret < 0)
327*4882a593Smuzhiyun return ret;
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun return val;
330*4882a593Smuzhiyun }
331*4882a593Smuzhiyun
sc89890_field_write(struct sc89890_device * sc89890,enum sc89890_fields field_id,u8 val)332*4882a593Smuzhiyun static int sc89890_field_write(struct sc89890_device *sc89890,
333*4882a593Smuzhiyun enum sc89890_fields field_id, u8 val)
334*4882a593Smuzhiyun {
335*4882a593Smuzhiyun return regmap_field_write(sc89890->rmap_fields[field_id], val);
336*4882a593Smuzhiyun }
337*4882a593Smuzhiyun
sc89890_find_idx(u32 value,enum sc89890_table_ids id)338*4882a593Smuzhiyun static u8 sc89890_find_idx(u32 value, enum sc89890_table_ids id)
339*4882a593Smuzhiyun {
340*4882a593Smuzhiyun u8 idx;
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun if (id >= TBL_TREG) {
343*4882a593Smuzhiyun const u32 *tbl = sc89890_tables[id].lt.tbl;
344*4882a593Smuzhiyun u32 tbl_size = sc89890_tables[id].lt.size;
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun for (idx = 1; idx < tbl_size && tbl[idx] <= value; idx++)
347*4882a593Smuzhiyun ;
348*4882a593Smuzhiyun } else {
349*4882a593Smuzhiyun const struct sc89890_range *rtbl = &sc89890_tables[id].rt;
350*4882a593Smuzhiyun u8 rtbl_size;
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun rtbl_size = (rtbl->max - rtbl->min) / rtbl->step + 1;
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun for (idx = 1;
355*4882a593Smuzhiyun idx < rtbl_size && (idx * rtbl->step + rtbl->min <= value);
356*4882a593Smuzhiyun idx++)
357*4882a593Smuzhiyun ;
358*4882a593Smuzhiyun }
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun return idx - 1;
361*4882a593Smuzhiyun }
362*4882a593Smuzhiyun
sc89890_find_val(u8 idx,enum sc89890_table_ids id)363*4882a593Smuzhiyun static u32 sc89890_find_val(u8 idx, enum sc89890_table_ids id)
364*4882a593Smuzhiyun {
365*4882a593Smuzhiyun const struct sc89890_range *rtbl;
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun /* lookup table? */
368*4882a593Smuzhiyun if (id >= TBL_TREG)
369*4882a593Smuzhiyun return sc89890_tables[id].lt.tbl[idx];
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun /* range table */
372*4882a593Smuzhiyun rtbl = &sc89890_tables[id].rt;
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun return (rtbl->min + idx * rtbl->step);
375*4882a593Smuzhiyun }
376*4882a593Smuzhiyun
sc89890_is_adc_property(enum power_supply_property psp)377*4882a593Smuzhiyun static bool sc89890_is_adc_property(enum power_supply_property psp)
378*4882a593Smuzhiyun {
379*4882a593Smuzhiyun switch (psp) {
380*4882a593Smuzhiyun case POWER_SUPPLY_PROP_VOLTAGE_NOW:
381*4882a593Smuzhiyun case POWER_SUPPLY_PROP_CURRENT_NOW:
382*4882a593Smuzhiyun return true;
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun default:
385*4882a593Smuzhiyun return false;
386*4882a593Smuzhiyun }
387*4882a593Smuzhiyun }
388*4882a593Smuzhiyun
sc89890_get_chip_state(struct sc89890_device * sc89890,struct sc89890_state * state)389*4882a593Smuzhiyun static int sc89890_get_chip_state(struct sc89890_device *sc89890,
390*4882a593Smuzhiyun struct sc89890_state *state)
391*4882a593Smuzhiyun {
392*4882a593Smuzhiyun int i, ret;
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun struct {
395*4882a593Smuzhiyun enum sc89890_fields id;
396*4882a593Smuzhiyun u8 *data;
397*4882a593Smuzhiyun } state_fields[] = {
398*4882a593Smuzhiyun {F_CHG_STAT, &state->chrg_status},
399*4882a593Smuzhiyun {F_PG_STAT, &state->online},
400*4882a593Smuzhiyun {F_VSYS_STAT, &state->vsys_status},
401*4882a593Smuzhiyun {F_BOOST_FAULT, &state->boost_fault},
402*4882a593Smuzhiyun {F_BAT_FAULT, &state->bat_fault},
403*4882a593Smuzhiyun {F_CHG_FAULT, &state->chrg_fault}
404*4882a593Smuzhiyun };
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(state_fields); i++) {
407*4882a593Smuzhiyun ret = sc89890_field_read(sc89890, state_fields[i].id);
408*4882a593Smuzhiyun if (ret < 0)
409*4882a593Smuzhiyun return ret;
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun *state_fields[i].data = ret;
412*4882a593Smuzhiyun }
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun DBG("SC89890: S:CHG/PG/VSYS=%d/%d/%d, F:CHG/BOOST/BAT=%d/%d/%d\n",
415*4882a593Smuzhiyun state->chrg_status, state->online, state->vsys_status,
416*4882a593Smuzhiyun state->chrg_fault, state->boost_fault, state->bat_fault);
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun return 0;
419*4882a593Smuzhiyun }
420*4882a593Smuzhiyun
__sc89890_handle_irq(struct sc89890_device * sc89890)421*4882a593Smuzhiyun static irqreturn_t __sc89890_handle_irq(struct sc89890_device *sc89890)
422*4882a593Smuzhiyun {
423*4882a593Smuzhiyun struct sc89890_state new_state;
424*4882a593Smuzhiyun int ret;
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun ret = sc89890_get_chip_state(sc89890, &new_state);
427*4882a593Smuzhiyun if (ret < 0)
428*4882a593Smuzhiyun return IRQ_NONE;
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun if (!memcmp(&sc89890->state, &new_state, sizeof(new_state)))
431*4882a593Smuzhiyun return IRQ_NONE;
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun if (!new_state.online && sc89890->state.online) { /* power removed */
434*4882a593Smuzhiyun /* disable ADC */
435*4882a593Smuzhiyun ret = sc89890_field_write(sc89890, F_CONV_START, 0);
436*4882a593Smuzhiyun if (ret < 0)
437*4882a593Smuzhiyun goto error;
438*4882a593Smuzhiyun } else if (new_state.online && !sc89890->state.online) { /* power inserted */
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun /* enable ADC, to have control of charge current/voltage */
441*4882a593Smuzhiyun ret = sc89890_field_write(sc89890, F_CONV_START, 1);
442*4882a593Smuzhiyun if (ret < 0)
443*4882a593Smuzhiyun goto error;
444*4882a593Smuzhiyun }
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun sc89890->state = new_state;
447*4882a593Smuzhiyun power_supply_changed(sc89890->charger);
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun return IRQ_HANDLED;
450*4882a593Smuzhiyun error:
451*4882a593Smuzhiyun dev_err(sc89890->dev, "Error communicating with the chip: %pe\n",
452*4882a593Smuzhiyun ERR_PTR(ret));
453*4882a593Smuzhiyun return IRQ_HANDLED;
454*4882a593Smuzhiyun }
455*4882a593Smuzhiyun
sc89890_power_supply_get_property(struct power_supply * psy,enum power_supply_property psp,union power_supply_propval * val)456*4882a593Smuzhiyun static int sc89890_power_supply_get_property(struct power_supply *psy,
457*4882a593Smuzhiyun enum power_supply_property psp,
458*4882a593Smuzhiyun union power_supply_propval *val)
459*4882a593Smuzhiyun {
460*4882a593Smuzhiyun struct sc89890_device *sc89890 = power_supply_get_drvdata(psy);
461*4882a593Smuzhiyun struct sc89890_state state;
462*4882a593Smuzhiyun bool do_adc_conv;
463*4882a593Smuzhiyun int ret;
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun mutex_lock(&sc89890->lock);
466*4882a593Smuzhiyun /* update state in case we lost an interrupt */
467*4882a593Smuzhiyun __sc89890_handle_irq(sc89890);
468*4882a593Smuzhiyun state = sc89890->state;
469*4882a593Smuzhiyun do_adc_conv = !state.online && sc89890_is_adc_property(psp);
470*4882a593Smuzhiyun if (do_adc_conv)
471*4882a593Smuzhiyun sc89890_field_write(sc89890, F_CONV_START, 1);
472*4882a593Smuzhiyun mutex_unlock(&sc89890->lock);
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun if (do_adc_conv)
475*4882a593Smuzhiyun regmap_field_read_poll_timeout(sc89890->rmap_fields[F_CONV_START],
476*4882a593Smuzhiyun ret, !ret, 25000, 1000000);
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun switch (psp) {
479*4882a593Smuzhiyun case POWER_SUPPLY_PROP_STATUS:
480*4882a593Smuzhiyun if (!state.online)
481*4882a593Smuzhiyun val->intval = POWER_SUPPLY_STATUS_DISCHARGING;
482*4882a593Smuzhiyun else if (state.chrg_status == STATUS_NOT_CHARGING)
483*4882a593Smuzhiyun val->intval = POWER_SUPPLY_STATUS_NOT_CHARGING;
484*4882a593Smuzhiyun else if (state.chrg_status == STATUS_PRE_CHARGING ||
485*4882a593Smuzhiyun state.chrg_status == STATUS_FAST_CHARGING)
486*4882a593Smuzhiyun val->intval = POWER_SUPPLY_STATUS_CHARGING;
487*4882a593Smuzhiyun else if (state.chrg_status == STATUS_TERMINATION_DONE)
488*4882a593Smuzhiyun val->intval = POWER_SUPPLY_STATUS_FULL;
489*4882a593Smuzhiyun else
490*4882a593Smuzhiyun val->intval = POWER_SUPPLY_STATUS_UNKNOWN;
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun break;
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun case POWER_SUPPLY_PROP_CHARGE_TYPE:
495*4882a593Smuzhiyun if (!state.online || state.chrg_status == STATUS_NOT_CHARGING ||
496*4882a593Smuzhiyun state.chrg_status == STATUS_TERMINATION_DONE)
497*4882a593Smuzhiyun val->intval = POWER_SUPPLY_CHARGE_TYPE_NONE;
498*4882a593Smuzhiyun else if (state.chrg_status == STATUS_PRE_CHARGING)
499*4882a593Smuzhiyun val->intval = POWER_SUPPLY_CHARGE_TYPE_STANDARD;
500*4882a593Smuzhiyun else if (state.chrg_status == STATUS_FAST_CHARGING)
501*4882a593Smuzhiyun val->intval = POWER_SUPPLY_CHARGE_TYPE_FAST;
502*4882a593Smuzhiyun else /* unreachable */
503*4882a593Smuzhiyun val->intval = POWER_SUPPLY_CHARGE_TYPE_UNKNOWN;
504*4882a593Smuzhiyun break;
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun case POWER_SUPPLY_PROP_MANUFACTURER:
507*4882a593Smuzhiyun val->strval = SC89890_MANUFACTURER;
508*4882a593Smuzhiyun break;
509*4882a593Smuzhiyun
510*4882a593Smuzhiyun case POWER_SUPPLY_PROP_MODEL_NAME:
511*4882a593Smuzhiyun val->strval = "SC89890";
512*4882a593Smuzhiyun break;
513*4882a593Smuzhiyun
514*4882a593Smuzhiyun case POWER_SUPPLY_PROP_ONLINE:
515*4882a593Smuzhiyun val->intval = !!state.chrg_status;
516*4882a593Smuzhiyun break;
517*4882a593Smuzhiyun
518*4882a593Smuzhiyun case POWER_SUPPLY_PROP_HEALTH:
519*4882a593Smuzhiyun if (!state.chrg_fault && !state.bat_fault && !state.boost_fault)
520*4882a593Smuzhiyun val->intval = POWER_SUPPLY_HEALTH_GOOD;
521*4882a593Smuzhiyun else if (state.bat_fault)
522*4882a593Smuzhiyun val->intval = POWER_SUPPLY_HEALTH_OVERVOLTAGE;
523*4882a593Smuzhiyun else if (state.chrg_fault == CHRG_FAULT_TIMER_EXPIRED)
524*4882a593Smuzhiyun val->intval = POWER_SUPPLY_HEALTH_SAFETY_TIMER_EXPIRE;
525*4882a593Smuzhiyun else if (state.chrg_fault == CHRG_FAULT_THERMAL_SHUTDOWN)
526*4882a593Smuzhiyun val->intval = POWER_SUPPLY_HEALTH_OVERHEAT;
527*4882a593Smuzhiyun else
528*4882a593Smuzhiyun val->intval = POWER_SUPPLY_HEALTH_UNSPEC_FAILURE;
529*4882a593Smuzhiyun break;
530*4882a593Smuzhiyun
531*4882a593Smuzhiyun case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX:
532*4882a593Smuzhiyun val->intval = sc89890_find_val(sc89890->init_data.ichg, TBL_ICHG);
533*4882a593Smuzhiyun break;
534*4882a593Smuzhiyun
535*4882a593Smuzhiyun case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE:
536*4882a593Smuzhiyun if (!state.online) {
537*4882a593Smuzhiyun val->intval = 0;
538*4882a593Smuzhiyun break;
539*4882a593Smuzhiyun }
540*4882a593Smuzhiyun
541*4882a593Smuzhiyun ret = sc89890_field_read(sc89890, F_BATV); /* read measured value */
542*4882a593Smuzhiyun if (ret < 0)
543*4882a593Smuzhiyun return ret;
544*4882a593Smuzhiyun
545*4882a593Smuzhiyun /* converted_val = 2.304V + ADC_val * 20mV (table 10.3.15) */
546*4882a593Smuzhiyun val->intval = 2304000 + ret * 20000;
547*4882a593Smuzhiyun break;
548*4882a593Smuzhiyun
549*4882a593Smuzhiyun case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX:
550*4882a593Smuzhiyun val->intval = sc89890_find_val(sc89890->init_data.vreg, TBL_VREG);
551*4882a593Smuzhiyun break;
552*4882a593Smuzhiyun
553*4882a593Smuzhiyun case POWER_SUPPLY_PROP_PRECHARGE_CURRENT:
554*4882a593Smuzhiyun val->intval = sc89890_find_val(sc89890->init_data.iprechg, TBL_ITERM);
555*4882a593Smuzhiyun break;
556*4882a593Smuzhiyun
557*4882a593Smuzhiyun case POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT:
558*4882a593Smuzhiyun val->intval = sc89890_find_val(sc89890->init_data.iterm, TBL_ITERM);
559*4882a593Smuzhiyun break;
560*4882a593Smuzhiyun
561*4882a593Smuzhiyun case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT:
562*4882a593Smuzhiyun ret = sc89890_field_read(sc89890, F_IILIM);
563*4882a593Smuzhiyun if (ret < 0)
564*4882a593Smuzhiyun return ret;
565*4882a593Smuzhiyun
566*4882a593Smuzhiyun val->intval = sc89890_find_val(ret, TBL_IILIM);
567*4882a593Smuzhiyun break;
568*4882a593Smuzhiyun case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT:
569*4882a593Smuzhiyun val->intval = 13500000; /* uV */
570*4882a593Smuzhiyun break;
571*4882a593Smuzhiyun case POWER_SUPPLY_PROP_VOLTAGE_NOW:
572*4882a593Smuzhiyun ret = sc89890_field_read(sc89890, F_SYSV); /* read measured value */
573*4882a593Smuzhiyun if (ret < 0)
574*4882a593Smuzhiyun return ret;
575*4882a593Smuzhiyun
576*4882a593Smuzhiyun /* converted_val = 2.304V + ADC_val * 20mV (table 10.3.15) */
577*4882a593Smuzhiyun val->intval = 2304000 + ret * 20000;
578*4882a593Smuzhiyun break;
579*4882a593Smuzhiyun
580*4882a593Smuzhiyun case POWER_SUPPLY_PROP_CURRENT_NOW:
581*4882a593Smuzhiyun ret = sc89890_field_read(sc89890, F_ICHGR); /* read measured value */
582*4882a593Smuzhiyun if (ret < 0)
583*4882a593Smuzhiyun return ret;
584*4882a593Smuzhiyun
585*4882a593Smuzhiyun /* converted_val = ADC_val * 50mA (table 10.3.19) */
586*4882a593Smuzhiyun val->intval = ret * -50000;
587*4882a593Smuzhiyun break;
588*4882a593Smuzhiyun
589*4882a593Smuzhiyun default:
590*4882a593Smuzhiyun return -EINVAL;
591*4882a593Smuzhiyun }
592*4882a593Smuzhiyun
593*4882a593Smuzhiyun return 0;
594*4882a593Smuzhiyun }
595*4882a593Smuzhiyun
sc89890_power_supply_set_property(struct power_supply * psy,enum power_supply_property psp,const union power_supply_propval * val)596*4882a593Smuzhiyun static int sc89890_power_supply_set_property(struct power_supply *psy,
597*4882a593Smuzhiyun enum power_supply_property psp,
598*4882a593Smuzhiyun const union power_supply_propval *val)
599*4882a593Smuzhiyun {
600*4882a593Smuzhiyun struct sc89890_device *sc89890 = power_supply_get_drvdata(psy);
601*4882a593Smuzhiyun int index, ret;
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun switch (psp) {
604*4882a593Smuzhiyun case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX:
605*4882a593Smuzhiyun index = sc89890_find_idx(val->intval, TBL_ICHG);
606*4882a593Smuzhiyun ret = sc89890_field_write(sc89890, F_ICHG, index);
607*4882a593Smuzhiyun if (ret < 0)
608*4882a593Smuzhiyun dev_err(sc89890->dev, "set input voltage limit failed\n");
609*4882a593Smuzhiyun break;
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT:
612*4882a593Smuzhiyun index = sc89890_find_idx(val->intval, TBL_IILIM);
613*4882a593Smuzhiyun ret = sc89890_field_write(sc89890, F_IILIM, index);
614*4882a593Smuzhiyun if (ret < 0)
615*4882a593Smuzhiyun dev_err(sc89890->dev, "set input current limit failed\n");
616*4882a593Smuzhiyun break;
617*4882a593Smuzhiyun
618*4882a593Smuzhiyun default:
619*4882a593Smuzhiyun ret = -EINVAL;
620*4882a593Smuzhiyun }
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun return ret;
623*4882a593Smuzhiyun }
624*4882a593Smuzhiyun
sc89890_irq_handler_thread(int irq,void * private)625*4882a593Smuzhiyun static irqreturn_t sc89890_irq_handler_thread(int irq, void *private)
626*4882a593Smuzhiyun {
627*4882a593Smuzhiyun struct sc89890_device *sc89890 = private;
628*4882a593Smuzhiyun irqreturn_t ret;
629*4882a593Smuzhiyun
630*4882a593Smuzhiyun mutex_lock(&sc89890->lock);
631*4882a593Smuzhiyun ret = __sc89890_handle_irq(sc89890);
632*4882a593Smuzhiyun mutex_unlock(&sc89890->lock);
633*4882a593Smuzhiyun
634*4882a593Smuzhiyun return ret;
635*4882a593Smuzhiyun }
636*4882a593Smuzhiyun
sc89890_chip_reset(struct sc89890_device * sc89890)637*4882a593Smuzhiyun static int sc89890_chip_reset(struct sc89890_device *sc89890)
638*4882a593Smuzhiyun {
639*4882a593Smuzhiyun int ret;
640*4882a593Smuzhiyun int rst_check_counter = 10;
641*4882a593Smuzhiyun
642*4882a593Smuzhiyun ret = sc89890_field_write(sc89890, F_REG_RST, 1);
643*4882a593Smuzhiyun if (ret < 0)
644*4882a593Smuzhiyun return ret;
645*4882a593Smuzhiyun
646*4882a593Smuzhiyun do {
647*4882a593Smuzhiyun ret = sc89890_field_read(sc89890, F_REG_RST);
648*4882a593Smuzhiyun if (ret < 0)
649*4882a593Smuzhiyun return ret;
650*4882a593Smuzhiyun
651*4882a593Smuzhiyun usleep_range(5, 10);
652*4882a593Smuzhiyun } while (ret == 1 && --rst_check_counter);
653*4882a593Smuzhiyun
654*4882a593Smuzhiyun if (!rst_check_counter)
655*4882a593Smuzhiyun return -ETIMEDOUT;
656*4882a593Smuzhiyun
657*4882a593Smuzhiyun return 0;
658*4882a593Smuzhiyun }
659*4882a593Smuzhiyun
sc89890_hw_init(struct sc89890_device * sc89890)660*4882a593Smuzhiyun static int sc89890_hw_init(struct sc89890_device *sc89890)
661*4882a593Smuzhiyun {
662*4882a593Smuzhiyun int ret;
663*4882a593Smuzhiyun int i;
664*4882a593Smuzhiyun
665*4882a593Smuzhiyun const struct {
666*4882a593Smuzhiyun enum sc89890_fields id;
667*4882a593Smuzhiyun u32 value;
668*4882a593Smuzhiyun } init_data[] = {
669*4882a593Smuzhiyun {F_ICHG, sc89890->init_data.ichg},
670*4882a593Smuzhiyun {F_VREG, sc89890->init_data.vreg},
671*4882a593Smuzhiyun {F_ITERM, sc89890->init_data.iterm},
672*4882a593Smuzhiyun {F_IPRECHG, sc89890->init_data.iprechg},
673*4882a593Smuzhiyun {F_SYSVMIN, sc89890->init_data.sysvmin},
674*4882a593Smuzhiyun {F_BOOSTV, sc89890->init_data.boostv},
675*4882a593Smuzhiyun {F_BOOSTI, sc89890->init_data.boosti},
676*4882a593Smuzhiyun {F_BOOSTF, sc89890->init_data.boostf},
677*4882a593Smuzhiyun {F_EN_ILIM, sc89890->init_data.ilim_en},
678*4882a593Smuzhiyun {F_TREG, sc89890->init_data.treg},
679*4882a593Smuzhiyun {F_BATCMP, sc89890->init_data.rbatcomp},
680*4882a593Smuzhiyun {F_VCLAMP, sc89890->init_data.vclamp},
681*4882a593Smuzhiyun };
682*4882a593Smuzhiyun
683*4882a593Smuzhiyun ret = sc89890_chip_reset(sc89890);
684*4882a593Smuzhiyun if (ret < 0) {
685*4882a593Smuzhiyun dev_dbg(sc89890->dev, "Reset failed %d\n", ret);
686*4882a593Smuzhiyun return ret;
687*4882a593Smuzhiyun }
688*4882a593Smuzhiyun
689*4882a593Smuzhiyun /* disable watchdog */
690*4882a593Smuzhiyun ret = sc89890_field_write(sc89890, F_WD, 0);
691*4882a593Smuzhiyun if (ret < 0) {
692*4882a593Smuzhiyun dev_dbg(sc89890->dev, "Disabling watchdog failed %d\n", ret);
693*4882a593Smuzhiyun return ret;
694*4882a593Smuzhiyun }
695*4882a593Smuzhiyun
696*4882a593Smuzhiyun /* initialize currents/voltages and other parameters */
697*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(init_data); i++) {
698*4882a593Smuzhiyun ret = sc89890_field_write(sc89890, init_data[i].id,
699*4882a593Smuzhiyun init_data[i].value);
700*4882a593Smuzhiyun if (ret < 0) {
701*4882a593Smuzhiyun dev_dbg(sc89890->dev, "Writing init data failed %d\n", ret);
702*4882a593Smuzhiyun return ret;
703*4882a593Smuzhiyun }
704*4882a593Smuzhiyun }
705*4882a593Smuzhiyun
706*4882a593Smuzhiyun /* Configure ADC for continuous conversions when charging */
707*4882a593Smuzhiyun ret = sc89890_field_write(sc89890, F_CONV_RATE, !!sc89890->state.online);
708*4882a593Smuzhiyun if (ret < 0) {
709*4882a593Smuzhiyun dev_err(sc89890->dev, "Config ADC failed %d\n", ret);
710*4882a593Smuzhiyun return ret;
711*4882a593Smuzhiyun }
712*4882a593Smuzhiyun
713*4882a593Smuzhiyun ret = sc89890_field_write(sc89890, F_AUTO_DPDM_EN, 0);
714*4882a593Smuzhiyun if (ret < 0) {
715*4882a593Smuzhiyun dev_err(sc89890->dev, "Config F_AUTO_DPDM_EN failed %d\n", ret);
716*4882a593Smuzhiyun return ret;
717*4882a593Smuzhiyun }
718*4882a593Smuzhiyun
719*4882a593Smuzhiyun ret = sc89890_field_write(sc89890, F_HVDCP_EN, 0);
720*4882a593Smuzhiyun if (ret < 0) {
721*4882a593Smuzhiyun dev_err(sc89890->dev, "Config F_HVDCP_EN failed %d\n", ret);
722*4882a593Smuzhiyun return ret;
723*4882a593Smuzhiyun }
724*4882a593Smuzhiyun
725*4882a593Smuzhiyun ret = sc89890_get_chip_state(sc89890, &sc89890->state);
726*4882a593Smuzhiyun if (ret < 0) {
727*4882a593Smuzhiyun dev_err(sc89890->dev, "Get state failed %d\n", ret);
728*4882a593Smuzhiyun return ret;
729*4882a593Smuzhiyun }
730*4882a593Smuzhiyun
731*4882a593Smuzhiyun return 0;
732*4882a593Smuzhiyun }
733*4882a593Smuzhiyun
734*4882a593Smuzhiyun static const enum power_supply_property sc89890_power_supply_props[] = {
735*4882a593Smuzhiyun POWER_SUPPLY_PROP_MANUFACTURER,
736*4882a593Smuzhiyun POWER_SUPPLY_PROP_MODEL_NAME,
737*4882a593Smuzhiyun POWER_SUPPLY_PROP_STATUS,
738*4882a593Smuzhiyun POWER_SUPPLY_PROP_CHARGE_TYPE,
739*4882a593Smuzhiyun POWER_SUPPLY_PROP_ONLINE,
740*4882a593Smuzhiyun POWER_SUPPLY_PROP_HEALTH,
741*4882a593Smuzhiyun POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX,
742*4882a593Smuzhiyun POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE,
743*4882a593Smuzhiyun POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX,
744*4882a593Smuzhiyun POWER_SUPPLY_PROP_PRECHARGE_CURRENT,
745*4882a593Smuzhiyun POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT,
746*4882a593Smuzhiyun POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT,
747*4882a593Smuzhiyun POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT,
748*4882a593Smuzhiyun POWER_SUPPLY_PROP_VOLTAGE_NOW,
749*4882a593Smuzhiyun POWER_SUPPLY_PROP_CURRENT_NOW,
750*4882a593Smuzhiyun };
751*4882a593Smuzhiyun
752*4882a593Smuzhiyun static char *sc89890_charger_supplied_to[] = {
753*4882a593Smuzhiyun "usb",
754*4882a593Smuzhiyun };
755*4882a593Smuzhiyun
756*4882a593Smuzhiyun static const struct power_supply_desc sc89890_power_supply_desc = {
757*4882a593Smuzhiyun .name = "sc89890-charger",
758*4882a593Smuzhiyun .type = POWER_SUPPLY_TYPE_USB,
759*4882a593Smuzhiyun .properties = sc89890_power_supply_props,
760*4882a593Smuzhiyun .num_properties = ARRAY_SIZE(sc89890_power_supply_props),
761*4882a593Smuzhiyun .set_property = sc89890_power_supply_set_property,
762*4882a593Smuzhiyun .get_property = sc89890_power_supply_get_property,
763*4882a593Smuzhiyun };
764*4882a593Smuzhiyun
sc89890_power_supply_init(struct sc89890_device * sc89890)765*4882a593Smuzhiyun static int sc89890_power_supply_init(struct sc89890_device *sc89890)
766*4882a593Smuzhiyun {
767*4882a593Smuzhiyun struct power_supply_config psy_cfg = { .drv_data = sc89890, };
768*4882a593Smuzhiyun
769*4882a593Smuzhiyun psy_cfg.of_node = sc89890->dev->of_node;
770*4882a593Smuzhiyun psy_cfg.supplied_to = sc89890_charger_supplied_to;
771*4882a593Smuzhiyun psy_cfg.num_supplicants = ARRAY_SIZE(sc89890_charger_supplied_to);
772*4882a593Smuzhiyun
773*4882a593Smuzhiyun sc89890->charger = devm_power_supply_register(sc89890->dev,
774*4882a593Smuzhiyun &sc89890_power_supply_desc,
775*4882a593Smuzhiyun &psy_cfg);
776*4882a593Smuzhiyun
777*4882a593Smuzhiyun if (PTR_ERR_OR_ZERO(sc89890->charger)) {
778*4882a593Smuzhiyun dev_err(sc89890->dev, "failed to register power supply\n");
779*4882a593Smuzhiyun return PTR_ERR(sc89890->charger);
780*4882a593Smuzhiyun }
781*4882a593Smuzhiyun
782*4882a593Smuzhiyun return 0;
783*4882a593Smuzhiyun }
784*4882a593Smuzhiyun
sc89890_get_chip_version(struct sc89890_device * sc89890)785*4882a593Smuzhiyun static int sc89890_get_chip_version(struct sc89890_device *sc89890)
786*4882a593Smuzhiyun {
787*4882a593Smuzhiyun int id;
788*4882a593Smuzhiyun
789*4882a593Smuzhiyun id = sc89890_field_read(sc89890, F_PN);
790*4882a593Smuzhiyun if (id < 0) {
791*4882a593Smuzhiyun dev_err(sc89890->dev, "Cannot read chip ID.\n");
792*4882a593Smuzhiyun return id;
793*4882a593Smuzhiyun } else if (id != SC89890_ID) {
794*4882a593Smuzhiyun dev_err(sc89890->dev, "Unknown chip ID %d\n", id);
795*4882a593Smuzhiyun return -ENODEV;
796*4882a593Smuzhiyun }
797*4882a593Smuzhiyun
798*4882a593Smuzhiyun DBG("charge IC: SC89890\n");
799*4882a593Smuzhiyun
800*4882a593Smuzhiyun return 0;
801*4882a593Smuzhiyun }
802*4882a593Smuzhiyun
sc89890_set_otg_vbus(struct sc89890_device * sc,bool enable)803*4882a593Smuzhiyun static void sc89890_set_otg_vbus(struct sc89890_device *sc, bool enable)
804*4882a593Smuzhiyun {
805*4882a593Smuzhiyun sc89890_field_write(sc, F_OTG_CFG, enable);
806*4882a593Smuzhiyun }
807*4882a593Smuzhiyun
sc89890_otg_vbus_enable(struct regulator_dev * dev)808*4882a593Smuzhiyun static int sc89890_otg_vbus_enable(struct regulator_dev *dev)
809*4882a593Smuzhiyun {
810*4882a593Smuzhiyun struct sc89890_device *sc = rdev_get_drvdata(dev);
811*4882a593Smuzhiyun
812*4882a593Smuzhiyun sc89890_set_otg_vbus(sc, true);
813*4882a593Smuzhiyun
814*4882a593Smuzhiyun return 0;
815*4882a593Smuzhiyun }
816*4882a593Smuzhiyun
sc89890_otg_vbus_disable(struct regulator_dev * dev)817*4882a593Smuzhiyun static int sc89890_otg_vbus_disable(struct regulator_dev *dev)
818*4882a593Smuzhiyun {
819*4882a593Smuzhiyun struct sc89890_device *sc = rdev_get_drvdata(dev);
820*4882a593Smuzhiyun
821*4882a593Smuzhiyun sc89890_set_otg_vbus(sc, false);
822*4882a593Smuzhiyun
823*4882a593Smuzhiyun return 0;
824*4882a593Smuzhiyun }
825*4882a593Smuzhiyun
sc89890_otg_vbus_is_enabled(struct regulator_dev * dev)826*4882a593Smuzhiyun static int sc89890_otg_vbus_is_enabled(struct regulator_dev *dev)
827*4882a593Smuzhiyun {
828*4882a593Smuzhiyun struct sc89890_device *sc = rdev_get_drvdata(dev);
829*4882a593Smuzhiyun u8 val;
830*4882a593Smuzhiyun
831*4882a593Smuzhiyun val = sc89890_field_read(sc, F_OTG_CFG);
832*4882a593Smuzhiyun
833*4882a593Smuzhiyun return val;
834*4882a593Smuzhiyun }
835*4882a593Smuzhiyun
836*4882a593Smuzhiyun static const struct regulator_ops sc89890_otg_vbus_ops = {
837*4882a593Smuzhiyun .enable = sc89890_otg_vbus_enable,
838*4882a593Smuzhiyun .disable = sc89890_otg_vbus_disable,
839*4882a593Smuzhiyun .is_enabled = sc89890_otg_vbus_is_enabled,
840*4882a593Smuzhiyun };
841*4882a593Smuzhiyun
842*4882a593Smuzhiyun static const struct regulator_desc sc89890_otg_vbus_desc = {
843*4882a593Smuzhiyun .name = "otg-vbus",
844*4882a593Smuzhiyun .of_match = "otg-vbus",
845*4882a593Smuzhiyun .regulators_node = of_match_ptr("regulators"),
846*4882a593Smuzhiyun .owner = THIS_MODULE,
847*4882a593Smuzhiyun .ops = &sc89890_otg_vbus_ops,
848*4882a593Smuzhiyun .type = REGULATOR_VOLTAGE,
849*4882a593Smuzhiyun .fixed_uV = 5000000,
850*4882a593Smuzhiyun .n_voltages = 1,
851*4882a593Smuzhiyun };
852*4882a593Smuzhiyun
sc89890_register_otg_vbus_regulator(struct sc89890_device * sc)853*4882a593Smuzhiyun static int sc89890_register_otg_vbus_regulator(struct sc89890_device *sc)
854*4882a593Smuzhiyun {
855*4882a593Smuzhiyun struct regulator_config config = { };
856*4882a593Smuzhiyun struct device_node *np;
857*4882a593Smuzhiyun
858*4882a593Smuzhiyun np = of_get_child_by_name(sc->dev->of_node, "regulators");
859*4882a593Smuzhiyun if (!np) {
860*4882a593Smuzhiyun dev_warn(sc->dev, "cannot find regulators node\n");
861*4882a593Smuzhiyun return -ENXIO;
862*4882a593Smuzhiyun }
863*4882a593Smuzhiyun
864*4882a593Smuzhiyun config.dev = sc->dev;
865*4882a593Smuzhiyun config.driver_data = sc;
866*4882a593Smuzhiyun
867*4882a593Smuzhiyun sc->otg_vbus_reg = devm_regulator_register(sc->dev,
868*4882a593Smuzhiyun &sc89890_otg_vbus_desc,
869*4882a593Smuzhiyun &config);
870*4882a593Smuzhiyun if (IS_ERR(sc->otg_vbus_reg))
871*4882a593Smuzhiyun return PTR_ERR(sc->otg_vbus_reg);
872*4882a593Smuzhiyun
873*4882a593Smuzhiyun return 0;
874*4882a593Smuzhiyun }
875*4882a593Smuzhiyun
registers_show(struct device * dev,struct device_attribute * attr,char * buf)876*4882a593Smuzhiyun static ssize_t registers_show(struct device *dev,
877*4882a593Smuzhiyun struct device_attribute *attr,
878*4882a593Smuzhiyun char *buf)
879*4882a593Smuzhiyun {
880*4882a593Smuzhiyun struct sc89890_device *sc89890 = dev_get_drvdata(dev);
881*4882a593Smuzhiyun u8 tmpbuf[SC89890_DEBUG_BUF_LEN];
882*4882a593Smuzhiyun int idx = 0;
883*4882a593Smuzhiyun u8 addr;
884*4882a593Smuzhiyun int val;
885*4882a593Smuzhiyun int len;
886*4882a593Smuzhiyun int ret;
887*4882a593Smuzhiyun
888*4882a593Smuzhiyun sc89890_field_write(sc89890, F_CONV_START, 1);
889*4882a593Smuzhiyun
890*4882a593Smuzhiyun regmap_field_read_poll_timeout(sc89890->rmap_fields[F_CONV_START],
891*4882a593Smuzhiyun ret, !ret, 25000, 1000000);
892*4882a593Smuzhiyun
893*4882a593Smuzhiyun for (addr = 0x0; addr <= 0x14; addr++) {
894*4882a593Smuzhiyun ret = regmap_read(sc89890->rmap, addr, &val);
895*4882a593Smuzhiyun if (ret == 0) {
896*4882a593Smuzhiyun len = snprintf(tmpbuf, SC89890_DEBUG_BUF_LEN,
897*4882a593Smuzhiyun "Reg[%.2X] = 0x%.2x\n", addr, val);
898*4882a593Smuzhiyun memcpy(&buf[idx], tmpbuf, len);
899*4882a593Smuzhiyun idx += len;
900*4882a593Smuzhiyun }
901*4882a593Smuzhiyun }
902*4882a593Smuzhiyun
903*4882a593Smuzhiyun val = sc89890_find_val(sc89890->init_data.vreg, TBL_VREG);
904*4882a593Smuzhiyun pr_info("CHARGE_VOLTAGE_MAX: %d\n", val / 1000);
905*4882a593Smuzhiyun
906*4882a593Smuzhiyun val = sc89890_find_val(sc89890->init_data.iprechg, TBL_ITERM);
907*4882a593Smuzhiyun pr_info("PRECHARGE_CURRENT: %d\n", val / 1000);
908*4882a593Smuzhiyun
909*4882a593Smuzhiyun val = sc89890_find_val(sc89890->init_data.iterm, TBL_ITERM);
910*4882a593Smuzhiyun pr_info("CHARGE_TERM_CURRENT: %d\n", val / 1000);
911*4882a593Smuzhiyun
912*4882a593Smuzhiyun ret = sc89890_field_read(sc89890, F_BATV); /* read measured value */
913*4882a593Smuzhiyun if (ret)
914*4882a593Smuzhiyun dev_err(dev, "read F_BAT error!\n");
915*4882a593Smuzhiyun else {
916*4882a593Smuzhiyun /* converted_val = 2.304V + ADC_val * 20mV (table 10.3.15) */
917*4882a593Smuzhiyun val = 2304000 + ret * 20000;
918*4882a593Smuzhiyun pr_info("charge voltage: %d\n", val / 1000);
919*4882a593Smuzhiyun }
920*4882a593Smuzhiyun
921*4882a593Smuzhiyun ret = sc89890_field_read(sc89890, F_IILIM);
922*4882a593Smuzhiyun if (ret)
923*4882a593Smuzhiyun dev_err(dev, "read F_IILIM error!\n");
924*4882a593Smuzhiyun else {
925*4882a593Smuzhiyun val = sc89890_find_val(ret, TBL_IILIM);
926*4882a593Smuzhiyun pr_info("INPUT_CURRENT_LIMIT: %d\n", val / 1000);
927*4882a593Smuzhiyun }
928*4882a593Smuzhiyun ret = sc89890_field_read(sc89890, F_SYSV); /* read measured value */
929*4882a593Smuzhiyun if (ret)
930*4882a593Smuzhiyun dev_err(dev, "read F_SYSV error!\n");
931*4882a593Smuzhiyun else {
932*4882a593Smuzhiyun /* converted_val = 2.304V + ADC_val * 20mV (table 10.3.15) */
933*4882a593Smuzhiyun val = 2304000 + ret * 20000;
934*4882a593Smuzhiyun pr_info("VOLTAGE_NOW: %d\n", val / 1000);
935*4882a593Smuzhiyun }
936*4882a593Smuzhiyun ret = sc89890_field_read(sc89890, F_ICHGR); /* read measured value */
937*4882a593Smuzhiyun if (ret)
938*4882a593Smuzhiyun dev_err(dev, "read F_ICHRG error!\n");
939*4882a593Smuzhiyun else {
940*4882a593Smuzhiyun /* converted_val = ADC_val * 50mA (table 10.3.19) */
941*4882a593Smuzhiyun val = ret * -50000;
942*4882a593Smuzhiyun pr_info("CURRENT_NOW: %d\n", val / 1000);
943*4882a593Smuzhiyun }
944*4882a593Smuzhiyun return idx;
945*4882a593Smuzhiyun }
946*4882a593Smuzhiyun
registers_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)947*4882a593Smuzhiyun static ssize_t registers_store(struct device *dev,
948*4882a593Smuzhiyun struct device_attribute *attr,
949*4882a593Smuzhiyun const char *buf, size_t count)
950*4882a593Smuzhiyun {
951*4882a593Smuzhiyun struct sc89890_device *sc89890 = dev_get_drvdata(dev);
952*4882a593Smuzhiyun int ret;
953*4882a593Smuzhiyun unsigned int reg;
954*4882a593Smuzhiyun int val;
955*4882a593Smuzhiyun
956*4882a593Smuzhiyun ret = sscanf(buf, "%x %x", ®, &val);
957*4882a593Smuzhiyun if (ret == 2 && reg <= 0x14)
958*4882a593Smuzhiyun regmap_write(sc89890->rmap, (unsigned char)reg, val);
959*4882a593Smuzhiyun
960*4882a593Smuzhiyun return count;
961*4882a593Smuzhiyun }
962*4882a593Smuzhiyun
963*4882a593Smuzhiyun static DEVICE_ATTR_RW(registers);
964*4882a593Smuzhiyun
sc89890_create_device_node(struct device * dev)965*4882a593Smuzhiyun static void sc89890_create_device_node(struct device *dev)
966*4882a593Smuzhiyun {
967*4882a593Smuzhiyun device_create_file(dev, &dev_attr_registers);
968*4882a593Smuzhiyun }
969*4882a593Smuzhiyun
sc89890_fw_read_u32_props(struct sc89890_device * sc89890)970*4882a593Smuzhiyun static int sc89890_fw_read_u32_props(struct sc89890_device *sc89890)
971*4882a593Smuzhiyun {
972*4882a593Smuzhiyun struct sc89890_init_data *init = &sc89890->init_data;
973*4882a593Smuzhiyun u32 property;
974*4882a593Smuzhiyun int ret;
975*4882a593Smuzhiyun int i;
976*4882a593Smuzhiyun struct {
977*4882a593Smuzhiyun char *name;
978*4882a593Smuzhiyun bool optional;
979*4882a593Smuzhiyun enum sc89890_table_ids tbl_id;
980*4882a593Smuzhiyun u8 *conv_data; /* holds converted value from given property */
981*4882a593Smuzhiyun } props[] = {
982*4882a593Smuzhiyun /* required properties */
983*4882a593Smuzhiyun {"sc,charge-current", false, TBL_ICHG, &init->ichg},
984*4882a593Smuzhiyun {"sc,battery-regulation-voltage", false, TBL_VREG, &init->vreg},
985*4882a593Smuzhiyun {"sc,termination-current", false, TBL_ITERM, &init->iterm},
986*4882a593Smuzhiyun {"sc,precharge-current", false, TBL_ITERM, &init->iprechg},
987*4882a593Smuzhiyun {"sc,minimum-sys-voltage", false, TBL_SYSVMIN, &init->sysvmin},
988*4882a593Smuzhiyun {"sc,boost-voltage", false, TBL_BOOSTV, &init->boostv},
989*4882a593Smuzhiyun {"sc,boost-max-current", false, TBL_BOOSTI, &init->boosti},
990*4882a593Smuzhiyun
991*4882a593Smuzhiyun /* optional properties */
992*4882a593Smuzhiyun {"sc,thermal-regulation-threshold", true, TBL_TREG, &init->treg},
993*4882a593Smuzhiyun {"sc,ibatcomp-micro-ohms", true, TBL_RBATCOMP, &init->rbatcomp},
994*4882a593Smuzhiyun {"sc,ibatcomp-clamp-microvolt", true, TBL_VBATCOMP, &init->vclamp},
995*4882a593Smuzhiyun };
996*4882a593Smuzhiyun
997*4882a593Smuzhiyun /* initialize data for optional properties */
998*4882a593Smuzhiyun init->treg = 3; /* 120 degrees Celsius */
999*4882a593Smuzhiyun init->rbatcomp = 0;
1000*4882a593Smuzhiyun init->vclamp = 0; /* IBAT compensation disabled */
1001*4882a593Smuzhiyun
1002*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(props); i++) {
1003*4882a593Smuzhiyun ret = device_property_read_u32(sc89890->dev,
1004*4882a593Smuzhiyun props[i].name,
1005*4882a593Smuzhiyun &property);
1006*4882a593Smuzhiyun if (ret < 0) {
1007*4882a593Smuzhiyun if (props[i].optional)
1008*4882a593Smuzhiyun continue;
1009*4882a593Smuzhiyun
1010*4882a593Smuzhiyun dev_err(sc89890->dev, "Unable to read property %d %s\n", ret,
1011*4882a593Smuzhiyun props[i].name);
1012*4882a593Smuzhiyun
1013*4882a593Smuzhiyun return ret;
1014*4882a593Smuzhiyun }
1015*4882a593Smuzhiyun
1016*4882a593Smuzhiyun *props[i].conv_data = sc89890_find_idx(property,
1017*4882a593Smuzhiyun props[i].tbl_id);
1018*4882a593Smuzhiyun }
1019*4882a593Smuzhiyun
1020*4882a593Smuzhiyun return 0;
1021*4882a593Smuzhiyun }
1022*4882a593Smuzhiyun
sc89890_fw_probe(struct sc89890_device * sc89890)1023*4882a593Smuzhiyun static int sc89890_fw_probe(struct sc89890_device *sc89890)
1024*4882a593Smuzhiyun {
1025*4882a593Smuzhiyun int ret;
1026*4882a593Smuzhiyun struct sc89890_init_data *init = &sc89890->init_data;
1027*4882a593Smuzhiyun
1028*4882a593Smuzhiyun ret = sc89890_fw_read_u32_props(sc89890);
1029*4882a593Smuzhiyun if (ret < 0)
1030*4882a593Smuzhiyun return ret;
1031*4882a593Smuzhiyun
1032*4882a593Smuzhiyun init->ilim_en = device_property_read_bool(sc89890->dev, "sc,use-ilim-pin");
1033*4882a593Smuzhiyun init->boostf = device_property_read_bool(sc89890->dev, "sc,boost-low-freq");
1034*4882a593Smuzhiyun
1035*4882a593Smuzhiyun return 0;
1036*4882a593Smuzhiyun }
1037*4882a593Smuzhiyun
sc89890_probe(struct i2c_client * client,const struct i2c_device_id * id)1038*4882a593Smuzhiyun static int sc89890_probe(struct i2c_client *client,
1039*4882a593Smuzhiyun const struct i2c_device_id *id)
1040*4882a593Smuzhiyun {
1041*4882a593Smuzhiyun struct device *dev = &client->dev;
1042*4882a593Smuzhiyun struct sc89890_device *sc89890;
1043*4882a593Smuzhiyun int ret;
1044*4882a593Smuzhiyun int i;
1045*4882a593Smuzhiyun
1046*4882a593Smuzhiyun sc89890 = devm_kzalloc(dev, sizeof(*sc89890), GFP_KERNEL);
1047*4882a593Smuzhiyun if (!sc89890)
1048*4882a593Smuzhiyun return -ENOMEM;
1049*4882a593Smuzhiyun
1050*4882a593Smuzhiyun sc89890->client = client;
1051*4882a593Smuzhiyun sc89890->dev = dev;
1052*4882a593Smuzhiyun
1053*4882a593Smuzhiyun mutex_init(&sc89890->lock);
1054*4882a593Smuzhiyun sc89890->rmap = devm_regmap_init_i2c(client, &sc89890_regmap_config);
1055*4882a593Smuzhiyun if (IS_ERR(sc89890->rmap)) {
1056*4882a593Smuzhiyun dev_err(dev, "failed to allocate register map\n");
1057*4882a593Smuzhiyun return PTR_ERR(sc89890->rmap);
1058*4882a593Smuzhiyun }
1059*4882a593Smuzhiyun
1060*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(sc89890_reg_fields); i++) {
1061*4882a593Smuzhiyun const struct reg_field *reg_fields = sc89890_reg_fields;
1062*4882a593Smuzhiyun
1063*4882a593Smuzhiyun sc89890->rmap_fields[i] = devm_regmap_field_alloc(dev,
1064*4882a593Smuzhiyun sc89890->rmap,
1065*4882a593Smuzhiyun reg_fields[i]);
1066*4882a593Smuzhiyun if (IS_ERR(sc89890->rmap_fields[i])) {
1067*4882a593Smuzhiyun dev_err(dev, "cannot allocate regmap field\n");
1068*4882a593Smuzhiyun return PTR_ERR(sc89890->rmap_fields[i]);
1069*4882a593Smuzhiyun }
1070*4882a593Smuzhiyun }
1071*4882a593Smuzhiyun
1072*4882a593Smuzhiyun i2c_set_clientdata(client, sc89890);
1073*4882a593Smuzhiyun
1074*4882a593Smuzhiyun ret = sc89890_get_chip_version(sc89890);
1075*4882a593Smuzhiyun if (ret) {
1076*4882a593Smuzhiyun dev_err(dev, "Cannot read chip ID or unknown chip.\n");
1077*4882a593Smuzhiyun return ret;
1078*4882a593Smuzhiyun }
1079*4882a593Smuzhiyun
1080*4882a593Smuzhiyun ret = sc89890_power_supply_init(sc89890);
1081*4882a593Smuzhiyun if (ret < 0) {
1082*4882a593Smuzhiyun dev_err(dev, "Failed to register power supply\n");
1083*4882a593Smuzhiyun goto irq_fail;
1084*4882a593Smuzhiyun }
1085*4882a593Smuzhiyun
1086*4882a593Smuzhiyun if (!dev->platform_data) {
1087*4882a593Smuzhiyun ret = sc89890_fw_probe(sc89890);
1088*4882a593Smuzhiyun if (ret < 0) {
1089*4882a593Smuzhiyun dev_err(dev, "Cannot read device properties.\n");
1090*4882a593Smuzhiyun return ret;
1091*4882a593Smuzhiyun }
1092*4882a593Smuzhiyun } else {
1093*4882a593Smuzhiyun return -ENODEV;
1094*4882a593Smuzhiyun }
1095*4882a593Smuzhiyun
1096*4882a593Smuzhiyun ret = sc89890_hw_init(sc89890);
1097*4882a593Smuzhiyun if (ret < 0) {
1098*4882a593Smuzhiyun dev_err(dev, "Cannot initialize the chip.\n");
1099*4882a593Smuzhiyun return ret;
1100*4882a593Smuzhiyun }
1101*4882a593Smuzhiyun
1102*4882a593Smuzhiyun
1103*4882a593Smuzhiyun if (client->irq < 0) {
1104*4882a593Smuzhiyun dev_err(dev, "No irq resource found.\n");
1105*4882a593Smuzhiyun return client->irq;
1106*4882a593Smuzhiyun }
1107*4882a593Smuzhiyun
1108*4882a593Smuzhiyun ret = devm_request_threaded_irq(dev, client->irq, NULL,
1109*4882a593Smuzhiyun sc89890_irq_handler_thread,
1110*4882a593Smuzhiyun IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
1111*4882a593Smuzhiyun SC89890_IRQ, sc89890);
1112*4882a593Smuzhiyun if (ret)
1113*4882a593Smuzhiyun goto irq_fail;
1114*4882a593Smuzhiyun
1115*4882a593Smuzhiyun sc89890_register_otg_vbus_regulator(sc89890);
1116*4882a593Smuzhiyun sc89890_create_device_node(sc89890->dev);
1117*4882a593Smuzhiyun
1118*4882a593Smuzhiyun return 0;
1119*4882a593Smuzhiyun
1120*4882a593Smuzhiyun irq_fail:
1121*4882a593Smuzhiyun
1122*4882a593Smuzhiyun return ret;
1123*4882a593Smuzhiyun }
1124*4882a593Smuzhiyun
sc89890_remove(struct i2c_client * client)1125*4882a593Smuzhiyun static int sc89890_remove(struct i2c_client *client)
1126*4882a593Smuzhiyun {
1127*4882a593Smuzhiyun struct sc89890_device *sc89890 = i2c_get_clientdata(client);
1128*4882a593Smuzhiyun
1129*4882a593Smuzhiyun /* reset all registers to default values */
1130*4882a593Smuzhiyun sc89890_chip_reset(sc89890);
1131*4882a593Smuzhiyun
1132*4882a593Smuzhiyun return 0;
1133*4882a593Smuzhiyun }
1134*4882a593Smuzhiyun
1135*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
sc89890_suspend(struct device * dev)1136*4882a593Smuzhiyun static int sc89890_suspend(struct device *dev)
1137*4882a593Smuzhiyun {
1138*4882a593Smuzhiyun struct sc89890_device *sc89890 = dev_get_drvdata(dev);
1139*4882a593Smuzhiyun
1140*4882a593Smuzhiyun /*
1141*4882a593Smuzhiyun * If charger is removed, while in suspend, make sure ADC is disabled
1142*4882a593Smuzhiyun * since it consumes slightly more power.
1143*4882a593Smuzhiyun */
1144*4882a593Smuzhiyun return sc89890_field_write(sc89890, F_CONV_RATE, 0);
1145*4882a593Smuzhiyun }
1146*4882a593Smuzhiyun
sc89890_resume(struct device * dev)1147*4882a593Smuzhiyun static int sc89890_resume(struct device *dev)
1148*4882a593Smuzhiyun {
1149*4882a593Smuzhiyun int ret;
1150*4882a593Smuzhiyun struct sc89890_device *sc89890 = dev_get_drvdata(dev);
1151*4882a593Smuzhiyun
1152*4882a593Smuzhiyun mutex_lock(&sc89890->lock);
1153*4882a593Smuzhiyun
1154*4882a593Smuzhiyun ret = sc89890_get_chip_state(sc89890, &sc89890->state);
1155*4882a593Smuzhiyun if (ret < 0)
1156*4882a593Smuzhiyun goto unlock;
1157*4882a593Smuzhiyun
1158*4882a593Smuzhiyun /* Re-enable ADC only if charger is plugged in. */
1159*4882a593Smuzhiyun if (sc89890->state.online) {
1160*4882a593Smuzhiyun ret = sc89890_field_write(sc89890, F_CONV_RATE, 1);
1161*4882a593Smuzhiyun if (ret < 0)
1162*4882a593Smuzhiyun goto unlock;
1163*4882a593Smuzhiyun }
1164*4882a593Smuzhiyun
1165*4882a593Smuzhiyun /* signal userspace, maybe state changed while suspended */
1166*4882a593Smuzhiyun power_supply_changed(sc89890->charger);
1167*4882a593Smuzhiyun
1168*4882a593Smuzhiyun unlock:
1169*4882a593Smuzhiyun mutex_unlock(&sc89890->lock);
1170*4882a593Smuzhiyun
1171*4882a593Smuzhiyun return ret;
1172*4882a593Smuzhiyun }
1173*4882a593Smuzhiyun #endif
1174*4882a593Smuzhiyun
1175*4882a593Smuzhiyun static const struct dev_pm_ops sc89890_pm = {
1176*4882a593Smuzhiyun SET_SYSTEM_SLEEP_PM_OPS(sc89890_suspend, sc89890_resume)
1177*4882a593Smuzhiyun };
1178*4882a593Smuzhiyun
1179*4882a593Smuzhiyun static const struct i2c_device_id sc89890_i2c_ids[] = {
1180*4882a593Smuzhiyun { "sc89890", 0 },
1181*4882a593Smuzhiyun {},
1182*4882a593Smuzhiyun };
1183*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, sc89890_i2c_ids);
1184*4882a593Smuzhiyun
1185*4882a593Smuzhiyun static const struct of_device_id sc89890_of_match[] = {
1186*4882a593Smuzhiyun { .compatible = "sc,sc89890", },
1187*4882a593Smuzhiyun { },
1188*4882a593Smuzhiyun };
1189*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, sc89890_of_match);
1190*4882a593Smuzhiyun
1191*4882a593Smuzhiyun #ifdef CONFIG_ACPI
1192*4882a593Smuzhiyun static const struct acpi_device_id sc89890_acpi_match[] = {
1193*4882a593Smuzhiyun {"SC898900", 0},
1194*4882a593Smuzhiyun {},
1195*4882a593Smuzhiyun };
1196*4882a593Smuzhiyun MODULE_DEVICE_TABLE(acpi, sc89890_acpi_match);
1197*4882a593Smuzhiyun #endif
1198*4882a593Smuzhiyun
1199*4882a593Smuzhiyun static struct i2c_driver sc89890_driver = {
1200*4882a593Smuzhiyun .driver = {
1201*4882a593Smuzhiyun .name = "sc89890-charger",
1202*4882a593Smuzhiyun .of_match_table = of_match_ptr(sc89890_of_match),
1203*4882a593Smuzhiyun .acpi_match_table = ACPI_PTR(sc89890_acpi_match),
1204*4882a593Smuzhiyun .pm = &sc89890_pm,
1205*4882a593Smuzhiyun },
1206*4882a593Smuzhiyun .probe = sc89890_probe,
1207*4882a593Smuzhiyun .remove = sc89890_remove,
1208*4882a593Smuzhiyun .id_table = sc89890_i2c_ids,
1209*4882a593Smuzhiyun };
1210*4882a593Smuzhiyun module_i2c_driver(sc89890_driver);
1211*4882a593Smuzhiyun
1212*4882a593Smuzhiyun MODULE_AUTHOR("xsf<xsf@rock-chips.com>");
1213*4882a593Smuzhiyun MODULE_DESCRIPTION("sc89890 charger driver");
1214*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1215