xref: /OK3568_Linux_fs/kernel/drivers/power/supply/rk818_battery.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * rk818_battery.h: fuel gauge driver structures
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Copyright (C) 2016 Rockchip Electronics Co., Ltd
5*4882a593Smuzhiyun  * Author: chenjh <chenjh@rock-chips.com>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * This program is free software; you can redistribute it and/or modify it
8*4882a593Smuzhiyun  * under the terms and conditions of the GNU General Public License,
9*4882a593Smuzhiyun  * version 2, as published by the Free Software Foundation.
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  * This program is distributed in the hope it will be useful, but WITHOUT
12*4882a593Smuzhiyun  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13*4882a593Smuzhiyun  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14*4882a593Smuzhiyun  * more details.
15*4882a593Smuzhiyun  */
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #ifndef RK818_BATTERY
18*4882a593Smuzhiyun #define RK818_BATTERY
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun /* RK818_INT_STS_MSK_REG2 */
21*4882a593Smuzhiyun #define PLUG_IN_MSK		BIT(0)
22*4882a593Smuzhiyun #define PLUG_OUT_MSK		BIT(1)
23*4882a593Smuzhiyun #define CHRG_CVTLMT_INT_MSK	BIT(6)
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun /* RK818_TS_CTRL_REG */
26*4882a593Smuzhiyun #define GG_EN			BIT(7)
27*4882a593Smuzhiyun #define ADC_CUR_EN		BIT(6)
28*4882a593Smuzhiyun #define ADC_TS1_EN		BIT(5)
29*4882a593Smuzhiyun #define ADC_TS2_EN		BIT(4)
30*4882a593Smuzhiyun #define TS1_CUR_MSK		0x03
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun /* RK818_GGCON */
33*4882a593Smuzhiyun #define OCV_SAMP_MIN_MSK	0x0c
34*4882a593Smuzhiyun #define OCV_SAMP_8MIN		(0x00 << 2)
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun #define ADC_CAL_MIN_MSK		0x30
37*4882a593Smuzhiyun #define ADC_CAL_8MIN		(0x00 << 4)
38*4882a593Smuzhiyun #define ADC_CUR_MODE		BIT(1)
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun /* RK818_GGSTS */
41*4882a593Smuzhiyun #define BAT_CON			BIT(4)
42*4882a593Smuzhiyun #define RELAX_VOL1_UPD		BIT(3)
43*4882a593Smuzhiyun #define RELAX_VOL2_UPD		BIT(2)
44*4882a593Smuzhiyun #define RELAX_VOL12_UPD_MSK	(RELAX_VOL1_UPD | RELAX_VOL2_UPD)
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun /* RK818_SUP_STS_REG */
47*4882a593Smuzhiyun #define CHRG_STATUS_MSK		0x70
48*4882a593Smuzhiyun #define BAT_EXS			BIT(7)
49*4882a593Smuzhiyun #define CHARGE_OFF		(0x0 << 4)
50*4882a593Smuzhiyun #define DEAD_CHARGE		(0x1 << 4)
51*4882a593Smuzhiyun #define TRICKLE_CHARGE		(0x2 << 4)
52*4882a593Smuzhiyun #define CC_OR_CV		(0x3 << 4)
53*4882a593Smuzhiyun #define CHARGE_FINISH		(0x4 << 4)
54*4882a593Smuzhiyun #define USB_OVER_VOL		(0x5 << 4)
55*4882a593Smuzhiyun #define BAT_TMP_ERR		(0x6 << 4)
56*4882a593Smuzhiyun #define TIMER_ERR		(0x7 << 4)
57*4882a593Smuzhiyun #define USB_VLIMIT_EN		BIT(3)
58*4882a593Smuzhiyun #define USB_CLIMIT_EN		BIT(2)
59*4882a593Smuzhiyun #define USB_EXIST		BIT(1)
60*4882a593Smuzhiyun #define USB_EFF			BIT(0)
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun /* RK818_USB_CTRL_REG */
63*4882a593Smuzhiyun #define CHRG_CT_EN		BIT(7)
64*4882a593Smuzhiyun #define FINISH_CUR_MSK		0xc0
65*4882a593Smuzhiyun #define TEMP_105C		(0x02 << 2)
66*4882a593Smuzhiyun #define FINISH_100MA		(0x00 << 6)
67*4882a593Smuzhiyun #define FINISH_150MA		(0x01 << 6)
68*4882a593Smuzhiyun #define FINISH_200MA		(0x02 << 6)
69*4882a593Smuzhiyun #define FINISH_250MA		(0x03 << 6)
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun /* RK818_CHRG_CTRL_REG3 */
72*4882a593Smuzhiyun #define CHRG_TERM_MODE_MSK	BIT(5)
73*4882a593Smuzhiyun #define CHRG_TERM_ANA_SIGNAL	(0 << 5)
74*4882a593Smuzhiyun #define CHRG_TERM_DIG_SIGNAL	BIT(5)
75*4882a593Smuzhiyun #define CHRG_TIMER_CCCV_EN	BIT(2)
76*4882a593Smuzhiyun #define CHRG_EN			BIT(7)
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun /* RK818_VB_MON_REG */
79*4882a593Smuzhiyun #define	RK818_VBAT_LOW_3V0      0x02
80*4882a593Smuzhiyun #define	RK818_VBAT_LOW_3V4      0x06
81*4882a593Smuzhiyun #define PLUG_IN_STS		BIT(6)
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun /* RK818_THERMAL_REG */
84*4882a593Smuzhiyun #define FB_TEMP_MSK		0x0c
85*4882a593Smuzhiyun #define HOTDIE_STS		BIT(1)
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun /* RK818_INT_STS_MSK_REG1 */
88*4882a593Smuzhiyun #define VB_LOW_INT_EN		BIT(1)
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun /* RK818_MISC_MARK_REG */
91*4882a593Smuzhiyun #define FG_INIT			BIT(5)
92*4882a593Smuzhiyun #define FG_RESET_LATE		BIT(4)
93*4882a593Smuzhiyun #define FG_RESET_NOW		BIT(3)
94*4882a593Smuzhiyun #define ALGO_REST_MODE_MSK	(0xc0)
95*4882a593Smuzhiyun #define ALGO_REST_MODE_SHIFT	6
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun /* bit shift */
98*4882a593Smuzhiyun #define FB_TEMP_SHIFT		2
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun /* parse ocv table param */
101*4882a593Smuzhiyun #define TIMER_MS_COUNTS		1000
102*4882a593Smuzhiyun #define MAX_PERCENTAGE		100
103*4882a593Smuzhiyun #define MAX_INTERPOLATE		1000
104*4882a593Smuzhiyun #define MAX_INT			0x7FFF
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun #define DRIVER_VERSION		"7.1"
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun struct battery_platform_data {
109*4882a593Smuzhiyun 	u32 *ocv_table;
110*4882a593Smuzhiyun 	u32 *zero_table;
111*4882a593Smuzhiyun 	u32 *ntc_table;
112*4882a593Smuzhiyun 	u32 ocv_size;
113*4882a593Smuzhiyun 	u32 max_chrg_voltage;
114*4882a593Smuzhiyun 	u32 ntc_size;
115*4882a593Smuzhiyun 	int ntc_degree_from;
116*4882a593Smuzhiyun 	u32 pwroff_vol;
117*4882a593Smuzhiyun 	u32 monitor_sec;
118*4882a593Smuzhiyun 	u32 zero_algorithm_vol;
119*4882a593Smuzhiyun 	u32 zero_reserve_dsoc;
120*4882a593Smuzhiyun 	u32 bat_res;
121*4882a593Smuzhiyun 	u32 design_capacity;
122*4882a593Smuzhiyun 	u32 design_qmax;
123*4882a593Smuzhiyun 	u32 sleep_enter_current;
124*4882a593Smuzhiyun 	u32 sleep_exit_current;
125*4882a593Smuzhiyun 	u32 max_soc_offset;
126*4882a593Smuzhiyun 	u32 sample_res;
127*4882a593Smuzhiyun 	u32 bat_mode;
128*4882a593Smuzhiyun 	u32 fb_temp;
129*4882a593Smuzhiyun 	u32 energy_mode;
130*4882a593Smuzhiyun 	u32 cccv_hour;
131*4882a593Smuzhiyun 	u32 ntc_uA;
132*4882a593Smuzhiyun 	u32 ntc_factor;
133*4882a593Smuzhiyun };
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun enum work_mode {
136*4882a593Smuzhiyun 	MODE_ZERO = 0,
137*4882a593Smuzhiyun 	MODE_FINISH,
138*4882a593Smuzhiyun 	MODE_SMOOTH_CHRG,
139*4882a593Smuzhiyun 	MODE_SMOOTH_DISCHRG,
140*4882a593Smuzhiyun 	MODE_SMOOTH,
141*4882a593Smuzhiyun };
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun enum bat_mode {
144*4882a593Smuzhiyun 	MODE_BATTARY = 0,
145*4882a593Smuzhiyun 	MODE_VIRTUAL,
146*4882a593Smuzhiyun };
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun static const u16 feedback_temp_array[] = {
149*4882a593Smuzhiyun 	85, 95, 105, 115
150*4882a593Smuzhiyun };
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun static const u16 chrg_vol_sel_array[] = {
153*4882a593Smuzhiyun 	4050, 4100, 4150, 4200, 4250, 4300, 4350
154*4882a593Smuzhiyun };
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun static const u16 chrg_cur_sel_array[] = {
157*4882a593Smuzhiyun 	1000, 1200, 1400, 1600, 1800, 2000, 2250, 2400, 2600, 2800, 3000
158*4882a593Smuzhiyun };
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun static const u16 chrg_cur_input_array[] = {
161*4882a593Smuzhiyun 	450, 80, 850, 1000, 1250, 1500, 1750, 2000, 2250, 2500, 2750, 3000
162*4882a593Smuzhiyun };
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun void kernel_power_off(void);
165*4882a593Smuzhiyun int rk818_bat_temp_notifier_register(struct notifier_block *nb);
166*4882a593Smuzhiyun int rk818_bat_temp_notifier_unregister(struct notifier_block *nb);
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun #endif
169