1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // Fuel gauge driver for Maxim 17042 / 8966 / 8997
4*4882a593Smuzhiyun // Note that Maxim 8966 and 8997 are mfd and this is its subdevice.
5*4882a593Smuzhiyun //
6*4882a593Smuzhiyun // Copyright (C) 2011 Samsung Electronics
7*4882a593Smuzhiyun // MyungJoo Ham <myungjoo.ham@samsung.com>
8*4882a593Smuzhiyun //
9*4882a593Smuzhiyun // This driver is based on max17040_battery.c
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/acpi.h>
12*4882a593Smuzhiyun #include <linux/init.h>
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun #include <linux/slab.h>
15*4882a593Smuzhiyun #include <linux/i2c.h>
16*4882a593Smuzhiyun #include <linux/delay.h>
17*4882a593Smuzhiyun #include <linux/interrupt.h>
18*4882a593Smuzhiyun #include <linux/pm.h>
19*4882a593Smuzhiyun #include <linux/mod_devicetable.h>
20*4882a593Smuzhiyun #include <linux/power_supply.h>
21*4882a593Smuzhiyun #include <linux/power/max17042_battery.h>
22*4882a593Smuzhiyun #include <linux/of.h>
23*4882a593Smuzhiyun #include <linux/regmap.h>
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun /* Status register bits */
26*4882a593Smuzhiyun #define STATUS_POR_BIT (1 << 1)
27*4882a593Smuzhiyun #define STATUS_BST_BIT (1 << 3)
28*4882a593Smuzhiyun #define STATUS_VMN_BIT (1 << 8)
29*4882a593Smuzhiyun #define STATUS_TMN_BIT (1 << 9)
30*4882a593Smuzhiyun #define STATUS_SMN_BIT (1 << 10)
31*4882a593Smuzhiyun #define STATUS_BI_BIT (1 << 11)
32*4882a593Smuzhiyun #define STATUS_VMX_BIT (1 << 12)
33*4882a593Smuzhiyun #define STATUS_TMX_BIT (1 << 13)
34*4882a593Smuzhiyun #define STATUS_SMX_BIT (1 << 14)
35*4882a593Smuzhiyun #define STATUS_BR_BIT (1 << 15)
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun /* Interrupt mask bits */
38*4882a593Smuzhiyun #define CONFIG_ALRT_BIT_ENBL (1 << 2)
39*4882a593Smuzhiyun #define STATUS_INTR_SOCMIN_BIT (1 << 10)
40*4882a593Smuzhiyun #define STATUS_INTR_SOCMAX_BIT (1 << 14)
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun #define VFSOC0_LOCK 0x0000
43*4882a593Smuzhiyun #define VFSOC0_UNLOCK 0x0080
44*4882a593Smuzhiyun #define MODEL_UNLOCK1 0X0059
45*4882a593Smuzhiyun #define MODEL_UNLOCK2 0X00C4
46*4882a593Smuzhiyun #define MODEL_LOCK1 0X0000
47*4882a593Smuzhiyun #define MODEL_LOCK2 0X0000
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun #define dQ_ACC_DIV 0x4
50*4882a593Smuzhiyun #define dP_ACC_100 0x1900
51*4882a593Smuzhiyun #define dP_ACC_200 0x3200
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun #define MAX17042_VMAX_TOLERANCE 50 /* 50 mV */
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun struct max17042_chip {
56*4882a593Smuzhiyun struct i2c_client *client;
57*4882a593Smuzhiyun struct regmap *regmap;
58*4882a593Smuzhiyun struct power_supply *battery;
59*4882a593Smuzhiyun enum max170xx_chip_type chip_type;
60*4882a593Smuzhiyun struct max17042_platform_data *pdata;
61*4882a593Smuzhiyun struct work_struct work;
62*4882a593Smuzhiyun int init_complete;
63*4882a593Smuzhiyun };
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun static enum power_supply_property max17042_battery_props[] = {
66*4882a593Smuzhiyun POWER_SUPPLY_PROP_STATUS,
67*4882a593Smuzhiyun POWER_SUPPLY_PROP_PRESENT,
68*4882a593Smuzhiyun POWER_SUPPLY_PROP_TECHNOLOGY,
69*4882a593Smuzhiyun POWER_SUPPLY_PROP_CYCLE_COUNT,
70*4882a593Smuzhiyun POWER_SUPPLY_PROP_VOLTAGE_MAX,
71*4882a593Smuzhiyun POWER_SUPPLY_PROP_VOLTAGE_MIN,
72*4882a593Smuzhiyun POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
73*4882a593Smuzhiyun POWER_SUPPLY_PROP_VOLTAGE_NOW,
74*4882a593Smuzhiyun POWER_SUPPLY_PROP_VOLTAGE_AVG,
75*4882a593Smuzhiyun POWER_SUPPLY_PROP_VOLTAGE_OCV,
76*4882a593Smuzhiyun POWER_SUPPLY_PROP_CAPACITY,
77*4882a593Smuzhiyun POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
78*4882a593Smuzhiyun POWER_SUPPLY_PROP_CHARGE_FULL,
79*4882a593Smuzhiyun POWER_SUPPLY_PROP_CHARGE_NOW,
80*4882a593Smuzhiyun POWER_SUPPLY_PROP_CHARGE_COUNTER,
81*4882a593Smuzhiyun POWER_SUPPLY_PROP_TEMP,
82*4882a593Smuzhiyun POWER_SUPPLY_PROP_TEMP_ALERT_MIN,
83*4882a593Smuzhiyun POWER_SUPPLY_PROP_TEMP_ALERT_MAX,
84*4882a593Smuzhiyun POWER_SUPPLY_PROP_TEMP_MIN,
85*4882a593Smuzhiyun POWER_SUPPLY_PROP_TEMP_MAX,
86*4882a593Smuzhiyun POWER_SUPPLY_PROP_HEALTH,
87*4882a593Smuzhiyun POWER_SUPPLY_PROP_SCOPE,
88*4882a593Smuzhiyun POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
89*4882a593Smuzhiyun // these two have to be at the end on the list
90*4882a593Smuzhiyun POWER_SUPPLY_PROP_CURRENT_NOW,
91*4882a593Smuzhiyun POWER_SUPPLY_PROP_CURRENT_AVG,
92*4882a593Smuzhiyun };
93*4882a593Smuzhiyun
max17042_get_temperature(struct max17042_chip * chip,int * temp)94*4882a593Smuzhiyun static int max17042_get_temperature(struct max17042_chip *chip, int *temp)
95*4882a593Smuzhiyun {
96*4882a593Smuzhiyun int ret;
97*4882a593Smuzhiyun u32 data;
98*4882a593Smuzhiyun struct regmap *map = chip->regmap;
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun ret = regmap_read(map, MAX17042_TEMP, &data);
101*4882a593Smuzhiyun if (ret < 0)
102*4882a593Smuzhiyun return ret;
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun *temp = sign_extend32(data, 15);
105*4882a593Smuzhiyun /* The value is converted into deci-centigrade scale */
106*4882a593Smuzhiyun /* Units of LSB = 1 / 256 degree Celsius */
107*4882a593Smuzhiyun *temp = *temp * 10 / 256;
108*4882a593Smuzhiyun return 0;
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun
max17042_get_status(struct max17042_chip * chip,int * status)111*4882a593Smuzhiyun static int max17042_get_status(struct max17042_chip *chip, int *status)
112*4882a593Smuzhiyun {
113*4882a593Smuzhiyun int ret, charge_full, charge_now;
114*4882a593Smuzhiyun int avg_current;
115*4882a593Smuzhiyun u32 data;
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun ret = power_supply_am_i_supplied(chip->battery);
118*4882a593Smuzhiyun if (ret < 0) {
119*4882a593Smuzhiyun *status = POWER_SUPPLY_STATUS_UNKNOWN;
120*4882a593Smuzhiyun return 0;
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun if (ret == 0) {
123*4882a593Smuzhiyun *status = POWER_SUPPLY_STATUS_DISCHARGING;
124*4882a593Smuzhiyun return 0;
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun /*
128*4882a593Smuzhiyun * The MAX170xx has builtin end-of-charge detection and will update
129*4882a593Smuzhiyun * FullCAP to match RepCap when it detects end of charging.
130*4882a593Smuzhiyun *
131*4882a593Smuzhiyun * When this cycle the battery gets charged to a higher (calculated)
132*4882a593Smuzhiyun * capacity then the previous cycle then FullCAP will get updated
133*4882a593Smuzhiyun * contineously once end-of-charge detection kicks in, so allow the
134*4882a593Smuzhiyun * 2 to differ a bit.
135*4882a593Smuzhiyun */
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun ret = regmap_read(chip->regmap, MAX17042_FullCAP, &charge_full);
138*4882a593Smuzhiyun if (ret < 0)
139*4882a593Smuzhiyun return ret;
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun ret = regmap_read(chip->regmap, MAX17042_RepCap, &charge_now);
142*4882a593Smuzhiyun if (ret < 0)
143*4882a593Smuzhiyun return ret;
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun if ((charge_full - charge_now) <= MAX17042_FULL_THRESHOLD) {
146*4882a593Smuzhiyun *status = POWER_SUPPLY_STATUS_FULL;
147*4882a593Smuzhiyun return 0;
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun /*
151*4882a593Smuzhiyun * Even though we are supplied, we may still be discharging if the
152*4882a593Smuzhiyun * supply is e.g. only delivering 5V 0.5A. Check current if available.
153*4882a593Smuzhiyun */
154*4882a593Smuzhiyun if (!chip->pdata->enable_current_sense) {
155*4882a593Smuzhiyun *status = POWER_SUPPLY_STATUS_CHARGING;
156*4882a593Smuzhiyun return 0;
157*4882a593Smuzhiyun }
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun ret = regmap_read(chip->regmap, MAX17042_AvgCurrent, &data);
160*4882a593Smuzhiyun if (ret < 0)
161*4882a593Smuzhiyun return ret;
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun avg_current = sign_extend32(data, 15);
164*4882a593Smuzhiyun avg_current *= 1562500 / chip->pdata->r_sns;
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun if (avg_current > 0)
167*4882a593Smuzhiyun *status = POWER_SUPPLY_STATUS_CHARGING;
168*4882a593Smuzhiyun else
169*4882a593Smuzhiyun *status = POWER_SUPPLY_STATUS_DISCHARGING;
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun return 0;
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun
max17042_get_battery_health(struct max17042_chip * chip,int * health)174*4882a593Smuzhiyun static int max17042_get_battery_health(struct max17042_chip *chip, int *health)
175*4882a593Smuzhiyun {
176*4882a593Smuzhiyun int temp, vavg, vbatt, ret;
177*4882a593Smuzhiyun u32 val;
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun ret = regmap_read(chip->regmap, MAX17042_AvgVCELL, &val);
180*4882a593Smuzhiyun if (ret < 0)
181*4882a593Smuzhiyun goto health_error;
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun /* bits [0-3] unused */
184*4882a593Smuzhiyun vavg = val * 625 / 8;
185*4882a593Smuzhiyun /* Convert to millivolts */
186*4882a593Smuzhiyun vavg /= 1000;
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun ret = regmap_read(chip->regmap, MAX17042_VCELL, &val);
189*4882a593Smuzhiyun if (ret < 0)
190*4882a593Smuzhiyun goto health_error;
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun /* bits [0-3] unused */
193*4882a593Smuzhiyun vbatt = val * 625 / 8;
194*4882a593Smuzhiyun /* Convert to millivolts */
195*4882a593Smuzhiyun vbatt /= 1000;
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun if (vavg < chip->pdata->vmin) {
198*4882a593Smuzhiyun *health = POWER_SUPPLY_HEALTH_DEAD;
199*4882a593Smuzhiyun goto out;
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun if (vbatt > chip->pdata->vmax + MAX17042_VMAX_TOLERANCE) {
203*4882a593Smuzhiyun *health = POWER_SUPPLY_HEALTH_OVERVOLTAGE;
204*4882a593Smuzhiyun goto out;
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun ret = max17042_get_temperature(chip, &temp);
208*4882a593Smuzhiyun if (ret < 0)
209*4882a593Smuzhiyun goto health_error;
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun if (temp < chip->pdata->temp_min) {
212*4882a593Smuzhiyun *health = POWER_SUPPLY_HEALTH_COLD;
213*4882a593Smuzhiyun goto out;
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun if (temp > chip->pdata->temp_max) {
217*4882a593Smuzhiyun *health = POWER_SUPPLY_HEALTH_OVERHEAT;
218*4882a593Smuzhiyun goto out;
219*4882a593Smuzhiyun }
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun *health = POWER_SUPPLY_HEALTH_GOOD;
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun out:
224*4882a593Smuzhiyun return 0;
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun health_error:
227*4882a593Smuzhiyun return ret;
228*4882a593Smuzhiyun }
229*4882a593Smuzhiyun
max17042_get_property(struct power_supply * psy,enum power_supply_property psp,union power_supply_propval * val)230*4882a593Smuzhiyun static int max17042_get_property(struct power_supply *psy,
231*4882a593Smuzhiyun enum power_supply_property psp,
232*4882a593Smuzhiyun union power_supply_propval *val)
233*4882a593Smuzhiyun {
234*4882a593Smuzhiyun struct max17042_chip *chip = power_supply_get_drvdata(psy);
235*4882a593Smuzhiyun struct regmap *map = chip->regmap;
236*4882a593Smuzhiyun int ret;
237*4882a593Smuzhiyun u32 data;
238*4882a593Smuzhiyun u64 data64;
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun if (!chip->init_complete)
241*4882a593Smuzhiyun return -EAGAIN;
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun switch (psp) {
244*4882a593Smuzhiyun case POWER_SUPPLY_PROP_STATUS:
245*4882a593Smuzhiyun ret = max17042_get_status(chip, &val->intval);
246*4882a593Smuzhiyun if (ret < 0)
247*4882a593Smuzhiyun return ret;
248*4882a593Smuzhiyun break;
249*4882a593Smuzhiyun case POWER_SUPPLY_PROP_PRESENT:
250*4882a593Smuzhiyun ret = regmap_read(map, MAX17042_STATUS, &data);
251*4882a593Smuzhiyun if (ret < 0)
252*4882a593Smuzhiyun return ret;
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun if (data & MAX17042_STATUS_BattAbsent)
255*4882a593Smuzhiyun val->intval = 0;
256*4882a593Smuzhiyun else
257*4882a593Smuzhiyun val->intval = 1;
258*4882a593Smuzhiyun break;
259*4882a593Smuzhiyun case POWER_SUPPLY_PROP_TECHNOLOGY:
260*4882a593Smuzhiyun val->intval = POWER_SUPPLY_TECHNOLOGY_LION;
261*4882a593Smuzhiyun break;
262*4882a593Smuzhiyun case POWER_SUPPLY_PROP_CYCLE_COUNT:
263*4882a593Smuzhiyun ret = regmap_read(map, MAX17042_Cycles, &data);
264*4882a593Smuzhiyun if (ret < 0)
265*4882a593Smuzhiyun return ret;
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun val->intval = data;
268*4882a593Smuzhiyun break;
269*4882a593Smuzhiyun case POWER_SUPPLY_PROP_VOLTAGE_MAX:
270*4882a593Smuzhiyun ret = regmap_read(map, MAX17042_MinMaxVolt, &data);
271*4882a593Smuzhiyun if (ret < 0)
272*4882a593Smuzhiyun return ret;
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun val->intval = data >> 8;
275*4882a593Smuzhiyun val->intval *= 20000; /* Units of LSB = 20mV */
276*4882a593Smuzhiyun break;
277*4882a593Smuzhiyun case POWER_SUPPLY_PROP_VOLTAGE_MIN:
278*4882a593Smuzhiyun ret = regmap_read(map, MAX17042_MinMaxVolt, &data);
279*4882a593Smuzhiyun if (ret < 0)
280*4882a593Smuzhiyun return ret;
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun val->intval = (data & 0xff) * 20000; /* Units of 20mV */
283*4882a593Smuzhiyun break;
284*4882a593Smuzhiyun case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
285*4882a593Smuzhiyun if (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17042)
286*4882a593Smuzhiyun ret = regmap_read(map, MAX17042_V_empty, &data);
287*4882a593Smuzhiyun else if (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17055)
288*4882a593Smuzhiyun ret = regmap_read(map, MAX17055_V_empty, &data);
289*4882a593Smuzhiyun else
290*4882a593Smuzhiyun ret = regmap_read(map, MAX17047_V_empty, &data);
291*4882a593Smuzhiyun if (ret < 0)
292*4882a593Smuzhiyun return ret;
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun val->intval = data >> 7;
295*4882a593Smuzhiyun val->intval *= 10000; /* Units of LSB = 10mV */
296*4882a593Smuzhiyun break;
297*4882a593Smuzhiyun case POWER_SUPPLY_PROP_VOLTAGE_NOW:
298*4882a593Smuzhiyun ret = regmap_read(map, MAX17042_VCELL, &data);
299*4882a593Smuzhiyun if (ret < 0)
300*4882a593Smuzhiyun return ret;
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun val->intval = data * 625 / 8;
303*4882a593Smuzhiyun break;
304*4882a593Smuzhiyun case POWER_SUPPLY_PROP_VOLTAGE_AVG:
305*4882a593Smuzhiyun ret = regmap_read(map, MAX17042_AvgVCELL, &data);
306*4882a593Smuzhiyun if (ret < 0)
307*4882a593Smuzhiyun return ret;
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun val->intval = data * 625 / 8;
310*4882a593Smuzhiyun break;
311*4882a593Smuzhiyun case POWER_SUPPLY_PROP_VOLTAGE_OCV:
312*4882a593Smuzhiyun ret = regmap_read(map, MAX17042_OCVInternal, &data);
313*4882a593Smuzhiyun if (ret < 0)
314*4882a593Smuzhiyun return ret;
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun val->intval = data * 625 / 8;
317*4882a593Smuzhiyun break;
318*4882a593Smuzhiyun case POWER_SUPPLY_PROP_CAPACITY:
319*4882a593Smuzhiyun if (chip->pdata->enable_current_sense)
320*4882a593Smuzhiyun ret = regmap_read(map, MAX17042_RepSOC, &data);
321*4882a593Smuzhiyun else
322*4882a593Smuzhiyun ret = regmap_read(map, MAX17042_VFSOC, &data);
323*4882a593Smuzhiyun if (ret < 0)
324*4882a593Smuzhiyun return ret;
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun val->intval = data >> 8;
327*4882a593Smuzhiyun break;
328*4882a593Smuzhiyun case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
329*4882a593Smuzhiyun ret = regmap_read(map, MAX17042_DesignCap, &data);
330*4882a593Smuzhiyun if (ret < 0)
331*4882a593Smuzhiyun return ret;
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun data64 = data * 5000000ll;
334*4882a593Smuzhiyun do_div(data64, chip->pdata->r_sns);
335*4882a593Smuzhiyun val->intval = data64;
336*4882a593Smuzhiyun break;
337*4882a593Smuzhiyun case POWER_SUPPLY_PROP_CHARGE_FULL:
338*4882a593Smuzhiyun ret = regmap_read(map, MAX17042_FullCAP, &data);
339*4882a593Smuzhiyun if (ret < 0)
340*4882a593Smuzhiyun return ret;
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun data64 = data * 5000000ll;
343*4882a593Smuzhiyun do_div(data64, chip->pdata->r_sns);
344*4882a593Smuzhiyun val->intval = data64;
345*4882a593Smuzhiyun break;
346*4882a593Smuzhiyun case POWER_SUPPLY_PROP_CHARGE_NOW:
347*4882a593Smuzhiyun ret = regmap_read(map, MAX17042_RepCap, &data);
348*4882a593Smuzhiyun if (ret < 0)
349*4882a593Smuzhiyun return ret;
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun data64 = data * 5000000ll;
352*4882a593Smuzhiyun do_div(data64, chip->pdata->r_sns);
353*4882a593Smuzhiyun val->intval = data64;
354*4882a593Smuzhiyun break;
355*4882a593Smuzhiyun case POWER_SUPPLY_PROP_CHARGE_COUNTER:
356*4882a593Smuzhiyun ret = regmap_read(map, MAX17042_QH, &data);
357*4882a593Smuzhiyun if (ret < 0)
358*4882a593Smuzhiyun return ret;
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun val->intval = data * 1000 / 2;
361*4882a593Smuzhiyun break;
362*4882a593Smuzhiyun case POWER_SUPPLY_PROP_TEMP:
363*4882a593Smuzhiyun ret = max17042_get_temperature(chip, &val->intval);
364*4882a593Smuzhiyun if (ret < 0)
365*4882a593Smuzhiyun return ret;
366*4882a593Smuzhiyun break;
367*4882a593Smuzhiyun case POWER_SUPPLY_PROP_TEMP_ALERT_MIN:
368*4882a593Smuzhiyun ret = regmap_read(map, MAX17042_TALRT_Th, &data);
369*4882a593Smuzhiyun if (ret < 0)
370*4882a593Smuzhiyun return ret;
371*4882a593Smuzhiyun /* LSB is Alert Minimum. In deci-centigrade */
372*4882a593Smuzhiyun val->intval = sign_extend32(data & 0xff, 7) * 10;
373*4882a593Smuzhiyun break;
374*4882a593Smuzhiyun case POWER_SUPPLY_PROP_TEMP_ALERT_MAX:
375*4882a593Smuzhiyun ret = regmap_read(map, MAX17042_TALRT_Th, &data);
376*4882a593Smuzhiyun if (ret < 0)
377*4882a593Smuzhiyun return ret;
378*4882a593Smuzhiyun /* MSB is Alert Maximum. In deci-centigrade */
379*4882a593Smuzhiyun val->intval = sign_extend32(data >> 8, 7) * 10;
380*4882a593Smuzhiyun break;
381*4882a593Smuzhiyun case POWER_SUPPLY_PROP_TEMP_MIN:
382*4882a593Smuzhiyun val->intval = chip->pdata->temp_min;
383*4882a593Smuzhiyun break;
384*4882a593Smuzhiyun case POWER_SUPPLY_PROP_TEMP_MAX:
385*4882a593Smuzhiyun val->intval = chip->pdata->temp_max;
386*4882a593Smuzhiyun break;
387*4882a593Smuzhiyun case POWER_SUPPLY_PROP_HEALTH:
388*4882a593Smuzhiyun ret = max17042_get_battery_health(chip, &val->intval);
389*4882a593Smuzhiyun if (ret < 0)
390*4882a593Smuzhiyun return ret;
391*4882a593Smuzhiyun break;
392*4882a593Smuzhiyun case POWER_SUPPLY_PROP_SCOPE:
393*4882a593Smuzhiyun val->intval = POWER_SUPPLY_SCOPE_SYSTEM;
394*4882a593Smuzhiyun break;
395*4882a593Smuzhiyun case POWER_SUPPLY_PROP_CURRENT_NOW:
396*4882a593Smuzhiyun if (chip->pdata->enable_current_sense) {
397*4882a593Smuzhiyun ret = regmap_read(map, MAX17042_Current, &data);
398*4882a593Smuzhiyun if (ret < 0)
399*4882a593Smuzhiyun return ret;
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun val->intval = sign_extend32(data, 15);
402*4882a593Smuzhiyun val->intval *= 1562500 / chip->pdata->r_sns;
403*4882a593Smuzhiyun } else {
404*4882a593Smuzhiyun return -EINVAL;
405*4882a593Smuzhiyun }
406*4882a593Smuzhiyun break;
407*4882a593Smuzhiyun case POWER_SUPPLY_PROP_CURRENT_AVG:
408*4882a593Smuzhiyun if (chip->pdata->enable_current_sense) {
409*4882a593Smuzhiyun ret = regmap_read(map, MAX17042_AvgCurrent, &data);
410*4882a593Smuzhiyun if (ret < 0)
411*4882a593Smuzhiyun return ret;
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun val->intval = sign_extend32(data, 15);
414*4882a593Smuzhiyun val->intval *= 1562500 / chip->pdata->r_sns;
415*4882a593Smuzhiyun } else {
416*4882a593Smuzhiyun return -EINVAL;
417*4882a593Smuzhiyun }
418*4882a593Smuzhiyun break;
419*4882a593Smuzhiyun case POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW:
420*4882a593Smuzhiyun ret = regmap_read(map, MAX17042_TTE, &data);
421*4882a593Smuzhiyun if (ret < 0)
422*4882a593Smuzhiyun return ret;
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun val->intval = data * 5625 / 1000;
425*4882a593Smuzhiyun break;
426*4882a593Smuzhiyun default:
427*4882a593Smuzhiyun return -EINVAL;
428*4882a593Smuzhiyun }
429*4882a593Smuzhiyun return 0;
430*4882a593Smuzhiyun }
431*4882a593Smuzhiyun
max17042_set_property(struct power_supply * psy,enum power_supply_property psp,const union power_supply_propval * val)432*4882a593Smuzhiyun static int max17042_set_property(struct power_supply *psy,
433*4882a593Smuzhiyun enum power_supply_property psp,
434*4882a593Smuzhiyun const union power_supply_propval *val)
435*4882a593Smuzhiyun {
436*4882a593Smuzhiyun struct max17042_chip *chip = power_supply_get_drvdata(psy);
437*4882a593Smuzhiyun struct regmap *map = chip->regmap;
438*4882a593Smuzhiyun int ret = 0;
439*4882a593Smuzhiyun u32 data;
440*4882a593Smuzhiyun int8_t temp;
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun switch (psp) {
443*4882a593Smuzhiyun case POWER_SUPPLY_PROP_TEMP_ALERT_MIN:
444*4882a593Smuzhiyun ret = regmap_read(map, MAX17042_TALRT_Th, &data);
445*4882a593Smuzhiyun if (ret < 0)
446*4882a593Smuzhiyun return ret;
447*4882a593Smuzhiyun
448*4882a593Smuzhiyun /* Input in deci-centigrade, convert to centigrade */
449*4882a593Smuzhiyun temp = val->intval / 10;
450*4882a593Smuzhiyun /* force min < max */
451*4882a593Smuzhiyun if (temp >= (int8_t)(data >> 8))
452*4882a593Smuzhiyun temp = (int8_t)(data >> 8) - 1;
453*4882a593Smuzhiyun /* Write both MAX and MIN ALERT */
454*4882a593Smuzhiyun data = (data & 0xff00) + temp;
455*4882a593Smuzhiyun ret = regmap_write(map, MAX17042_TALRT_Th, data);
456*4882a593Smuzhiyun break;
457*4882a593Smuzhiyun case POWER_SUPPLY_PROP_TEMP_ALERT_MAX:
458*4882a593Smuzhiyun ret = regmap_read(map, MAX17042_TALRT_Th, &data);
459*4882a593Smuzhiyun if (ret < 0)
460*4882a593Smuzhiyun return ret;
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun /* Input in Deci-Centigrade, convert to centigrade */
463*4882a593Smuzhiyun temp = val->intval / 10;
464*4882a593Smuzhiyun /* force max > min */
465*4882a593Smuzhiyun if (temp <= (int8_t)(data & 0xff))
466*4882a593Smuzhiyun temp = (int8_t)(data & 0xff) + 1;
467*4882a593Smuzhiyun /* Write both MAX and MIN ALERT */
468*4882a593Smuzhiyun data = (data & 0xff) + (temp << 8);
469*4882a593Smuzhiyun ret = regmap_write(map, MAX17042_TALRT_Th, data);
470*4882a593Smuzhiyun break;
471*4882a593Smuzhiyun default:
472*4882a593Smuzhiyun ret = -EINVAL;
473*4882a593Smuzhiyun }
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun return ret;
476*4882a593Smuzhiyun }
477*4882a593Smuzhiyun
max17042_property_is_writeable(struct power_supply * psy,enum power_supply_property psp)478*4882a593Smuzhiyun static int max17042_property_is_writeable(struct power_supply *psy,
479*4882a593Smuzhiyun enum power_supply_property psp)
480*4882a593Smuzhiyun {
481*4882a593Smuzhiyun int ret;
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun switch (psp) {
484*4882a593Smuzhiyun case POWER_SUPPLY_PROP_TEMP_ALERT_MIN:
485*4882a593Smuzhiyun case POWER_SUPPLY_PROP_TEMP_ALERT_MAX:
486*4882a593Smuzhiyun ret = 1;
487*4882a593Smuzhiyun break;
488*4882a593Smuzhiyun default:
489*4882a593Smuzhiyun ret = 0;
490*4882a593Smuzhiyun }
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun return ret;
493*4882a593Smuzhiyun }
494*4882a593Smuzhiyun
max17042_external_power_changed(struct power_supply * psy)495*4882a593Smuzhiyun static void max17042_external_power_changed(struct power_supply *psy)
496*4882a593Smuzhiyun {
497*4882a593Smuzhiyun power_supply_changed(psy);
498*4882a593Smuzhiyun }
499*4882a593Smuzhiyun
max17042_write_verify_reg(struct regmap * map,u8 reg,u32 value)500*4882a593Smuzhiyun static int max17042_write_verify_reg(struct regmap *map, u8 reg, u32 value)
501*4882a593Smuzhiyun {
502*4882a593Smuzhiyun int retries = 8;
503*4882a593Smuzhiyun int ret;
504*4882a593Smuzhiyun u32 read_value;
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun do {
507*4882a593Smuzhiyun ret = regmap_write(map, reg, value);
508*4882a593Smuzhiyun regmap_read(map, reg, &read_value);
509*4882a593Smuzhiyun if (read_value != value) {
510*4882a593Smuzhiyun ret = -EIO;
511*4882a593Smuzhiyun retries--;
512*4882a593Smuzhiyun }
513*4882a593Smuzhiyun } while (retries && read_value != value);
514*4882a593Smuzhiyun
515*4882a593Smuzhiyun if (ret < 0)
516*4882a593Smuzhiyun pr_err("%s: err %d\n", __func__, ret);
517*4882a593Smuzhiyun
518*4882a593Smuzhiyun return ret;
519*4882a593Smuzhiyun }
520*4882a593Smuzhiyun
max17042_override_por(struct regmap * map,u8 reg,u16 value)521*4882a593Smuzhiyun static inline void max17042_override_por(struct regmap *map,
522*4882a593Smuzhiyun u8 reg, u16 value)
523*4882a593Smuzhiyun {
524*4882a593Smuzhiyun if (value)
525*4882a593Smuzhiyun regmap_write(map, reg, value);
526*4882a593Smuzhiyun }
527*4882a593Smuzhiyun
max17042_unlock_model(struct max17042_chip * chip)528*4882a593Smuzhiyun static inline void max17042_unlock_model(struct max17042_chip *chip)
529*4882a593Smuzhiyun {
530*4882a593Smuzhiyun struct regmap *map = chip->regmap;
531*4882a593Smuzhiyun
532*4882a593Smuzhiyun regmap_write(map, MAX17042_MLOCKReg1, MODEL_UNLOCK1);
533*4882a593Smuzhiyun regmap_write(map, MAX17042_MLOCKReg2, MODEL_UNLOCK2);
534*4882a593Smuzhiyun }
535*4882a593Smuzhiyun
max17042_lock_model(struct max17042_chip * chip)536*4882a593Smuzhiyun static inline void max17042_lock_model(struct max17042_chip *chip)
537*4882a593Smuzhiyun {
538*4882a593Smuzhiyun struct regmap *map = chip->regmap;
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun regmap_write(map, MAX17042_MLOCKReg1, MODEL_LOCK1);
541*4882a593Smuzhiyun regmap_write(map, MAX17042_MLOCKReg2, MODEL_LOCK2);
542*4882a593Smuzhiyun }
543*4882a593Smuzhiyun
max17042_write_model_data(struct max17042_chip * chip,u8 addr,int size)544*4882a593Smuzhiyun static inline void max17042_write_model_data(struct max17042_chip *chip,
545*4882a593Smuzhiyun u8 addr, int size)
546*4882a593Smuzhiyun {
547*4882a593Smuzhiyun struct regmap *map = chip->regmap;
548*4882a593Smuzhiyun int i;
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun for (i = 0; i < size; i++)
551*4882a593Smuzhiyun regmap_write(map, addr + i,
552*4882a593Smuzhiyun chip->pdata->config_data->cell_char_tbl[i]);
553*4882a593Smuzhiyun }
554*4882a593Smuzhiyun
max17042_read_model_data(struct max17042_chip * chip,u8 addr,u16 * data,int size)555*4882a593Smuzhiyun static inline void max17042_read_model_data(struct max17042_chip *chip,
556*4882a593Smuzhiyun u8 addr, u16 *data, int size)
557*4882a593Smuzhiyun {
558*4882a593Smuzhiyun struct regmap *map = chip->regmap;
559*4882a593Smuzhiyun int i;
560*4882a593Smuzhiyun u32 tmp;
561*4882a593Smuzhiyun
562*4882a593Smuzhiyun for (i = 0; i < size; i++) {
563*4882a593Smuzhiyun regmap_read(map, addr + i, &tmp);
564*4882a593Smuzhiyun data[i] = (u16)tmp;
565*4882a593Smuzhiyun }
566*4882a593Smuzhiyun }
567*4882a593Smuzhiyun
max17042_model_data_compare(struct max17042_chip * chip,u16 * data1,u16 * data2,int size)568*4882a593Smuzhiyun static inline int max17042_model_data_compare(struct max17042_chip *chip,
569*4882a593Smuzhiyun u16 *data1, u16 *data2, int size)
570*4882a593Smuzhiyun {
571*4882a593Smuzhiyun int i;
572*4882a593Smuzhiyun
573*4882a593Smuzhiyun if (memcmp(data1, data2, size)) {
574*4882a593Smuzhiyun dev_err(&chip->client->dev, "%s compare failed\n", __func__);
575*4882a593Smuzhiyun for (i = 0; i < size; i++)
576*4882a593Smuzhiyun dev_info(&chip->client->dev, "0x%x, 0x%x",
577*4882a593Smuzhiyun data1[i], data2[i]);
578*4882a593Smuzhiyun dev_info(&chip->client->dev, "\n");
579*4882a593Smuzhiyun return -EINVAL;
580*4882a593Smuzhiyun }
581*4882a593Smuzhiyun return 0;
582*4882a593Smuzhiyun }
583*4882a593Smuzhiyun
max17042_init_model(struct max17042_chip * chip)584*4882a593Smuzhiyun static int max17042_init_model(struct max17042_chip *chip)
585*4882a593Smuzhiyun {
586*4882a593Smuzhiyun int ret;
587*4882a593Smuzhiyun int table_size = ARRAY_SIZE(chip->pdata->config_data->cell_char_tbl);
588*4882a593Smuzhiyun u16 *temp_data;
589*4882a593Smuzhiyun
590*4882a593Smuzhiyun temp_data = kcalloc(table_size, sizeof(*temp_data), GFP_KERNEL);
591*4882a593Smuzhiyun if (!temp_data)
592*4882a593Smuzhiyun return -ENOMEM;
593*4882a593Smuzhiyun
594*4882a593Smuzhiyun max17042_unlock_model(chip);
595*4882a593Smuzhiyun max17042_write_model_data(chip, MAX17042_MODELChrTbl,
596*4882a593Smuzhiyun table_size);
597*4882a593Smuzhiyun max17042_read_model_data(chip, MAX17042_MODELChrTbl, temp_data,
598*4882a593Smuzhiyun table_size);
599*4882a593Smuzhiyun
600*4882a593Smuzhiyun ret = max17042_model_data_compare(
601*4882a593Smuzhiyun chip,
602*4882a593Smuzhiyun chip->pdata->config_data->cell_char_tbl,
603*4882a593Smuzhiyun temp_data,
604*4882a593Smuzhiyun table_size);
605*4882a593Smuzhiyun
606*4882a593Smuzhiyun max17042_lock_model(chip);
607*4882a593Smuzhiyun kfree(temp_data);
608*4882a593Smuzhiyun
609*4882a593Smuzhiyun return ret;
610*4882a593Smuzhiyun }
611*4882a593Smuzhiyun
max17042_verify_model_lock(struct max17042_chip * chip)612*4882a593Smuzhiyun static int max17042_verify_model_lock(struct max17042_chip *chip)
613*4882a593Smuzhiyun {
614*4882a593Smuzhiyun int i;
615*4882a593Smuzhiyun int table_size = ARRAY_SIZE(chip->pdata->config_data->cell_char_tbl);
616*4882a593Smuzhiyun u16 *temp_data;
617*4882a593Smuzhiyun int ret = 0;
618*4882a593Smuzhiyun
619*4882a593Smuzhiyun temp_data = kcalloc(table_size, sizeof(*temp_data), GFP_KERNEL);
620*4882a593Smuzhiyun if (!temp_data)
621*4882a593Smuzhiyun return -ENOMEM;
622*4882a593Smuzhiyun
623*4882a593Smuzhiyun max17042_read_model_data(chip, MAX17042_MODELChrTbl, temp_data,
624*4882a593Smuzhiyun table_size);
625*4882a593Smuzhiyun for (i = 0; i < table_size; i++)
626*4882a593Smuzhiyun if (temp_data[i])
627*4882a593Smuzhiyun ret = -EINVAL;
628*4882a593Smuzhiyun
629*4882a593Smuzhiyun kfree(temp_data);
630*4882a593Smuzhiyun return ret;
631*4882a593Smuzhiyun }
632*4882a593Smuzhiyun
max17042_write_config_regs(struct max17042_chip * chip)633*4882a593Smuzhiyun static void max17042_write_config_regs(struct max17042_chip *chip)
634*4882a593Smuzhiyun {
635*4882a593Smuzhiyun struct max17042_config_data *config = chip->pdata->config_data;
636*4882a593Smuzhiyun struct regmap *map = chip->regmap;
637*4882a593Smuzhiyun
638*4882a593Smuzhiyun regmap_write(map, MAX17042_CONFIG, config->config);
639*4882a593Smuzhiyun regmap_write(map, MAX17042_LearnCFG, config->learn_cfg);
640*4882a593Smuzhiyun regmap_write(map, MAX17042_FilterCFG,
641*4882a593Smuzhiyun config->filter_cfg);
642*4882a593Smuzhiyun regmap_write(map, MAX17042_RelaxCFG, config->relax_cfg);
643*4882a593Smuzhiyun if (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17047 ||
644*4882a593Smuzhiyun chip->chip_type == MAXIM_DEVICE_TYPE_MAX17050 ||
645*4882a593Smuzhiyun chip->chip_type == MAXIM_DEVICE_TYPE_MAX17055)
646*4882a593Smuzhiyun regmap_write(map, MAX17047_FullSOCThr,
647*4882a593Smuzhiyun config->full_soc_thresh);
648*4882a593Smuzhiyun }
649*4882a593Smuzhiyun
max17042_write_custom_regs(struct max17042_chip * chip)650*4882a593Smuzhiyun static void max17042_write_custom_regs(struct max17042_chip *chip)
651*4882a593Smuzhiyun {
652*4882a593Smuzhiyun struct max17042_config_data *config = chip->pdata->config_data;
653*4882a593Smuzhiyun struct regmap *map = chip->regmap;
654*4882a593Smuzhiyun
655*4882a593Smuzhiyun max17042_write_verify_reg(map, MAX17042_RCOMP0, config->rcomp0);
656*4882a593Smuzhiyun max17042_write_verify_reg(map, MAX17042_TempCo, config->tcompc0);
657*4882a593Smuzhiyun max17042_write_verify_reg(map, MAX17042_ICHGTerm, config->ichgt_term);
658*4882a593Smuzhiyun if (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17042) {
659*4882a593Smuzhiyun regmap_write(map, MAX17042_EmptyTempCo, config->empty_tempco);
660*4882a593Smuzhiyun max17042_write_verify_reg(map, MAX17042_K_empty0,
661*4882a593Smuzhiyun config->kempty0);
662*4882a593Smuzhiyun } else {
663*4882a593Smuzhiyun max17042_write_verify_reg(map, MAX17047_QRTbl00,
664*4882a593Smuzhiyun config->qrtbl00);
665*4882a593Smuzhiyun max17042_write_verify_reg(map, MAX17047_QRTbl10,
666*4882a593Smuzhiyun config->qrtbl10);
667*4882a593Smuzhiyun max17042_write_verify_reg(map, MAX17047_QRTbl20,
668*4882a593Smuzhiyun config->qrtbl20);
669*4882a593Smuzhiyun max17042_write_verify_reg(map, MAX17047_QRTbl30,
670*4882a593Smuzhiyun config->qrtbl30);
671*4882a593Smuzhiyun }
672*4882a593Smuzhiyun }
673*4882a593Smuzhiyun
max17042_update_capacity_regs(struct max17042_chip * chip)674*4882a593Smuzhiyun static void max17042_update_capacity_regs(struct max17042_chip *chip)
675*4882a593Smuzhiyun {
676*4882a593Smuzhiyun struct max17042_config_data *config = chip->pdata->config_data;
677*4882a593Smuzhiyun struct regmap *map = chip->regmap;
678*4882a593Smuzhiyun
679*4882a593Smuzhiyun max17042_write_verify_reg(map, MAX17042_FullCAP,
680*4882a593Smuzhiyun config->fullcap);
681*4882a593Smuzhiyun regmap_write(map, MAX17042_DesignCap, config->design_cap);
682*4882a593Smuzhiyun max17042_write_verify_reg(map, MAX17042_FullCAPNom,
683*4882a593Smuzhiyun config->fullcapnom);
684*4882a593Smuzhiyun }
685*4882a593Smuzhiyun
max17042_reset_vfsoc0_reg(struct max17042_chip * chip)686*4882a593Smuzhiyun static void max17042_reset_vfsoc0_reg(struct max17042_chip *chip)
687*4882a593Smuzhiyun {
688*4882a593Smuzhiyun unsigned int vfSoc;
689*4882a593Smuzhiyun struct regmap *map = chip->regmap;
690*4882a593Smuzhiyun
691*4882a593Smuzhiyun regmap_read(map, MAX17042_VFSOC, &vfSoc);
692*4882a593Smuzhiyun regmap_write(map, MAX17042_VFSOC0Enable, VFSOC0_UNLOCK);
693*4882a593Smuzhiyun max17042_write_verify_reg(map, MAX17042_VFSOC0, vfSoc);
694*4882a593Smuzhiyun regmap_write(map, MAX17042_VFSOC0Enable, VFSOC0_LOCK);
695*4882a593Smuzhiyun }
696*4882a593Smuzhiyun
max17042_load_new_capacity_params(struct max17042_chip * chip)697*4882a593Smuzhiyun static void max17042_load_new_capacity_params(struct max17042_chip *chip)
698*4882a593Smuzhiyun {
699*4882a593Smuzhiyun u32 full_cap0, rep_cap, dq_acc, vfSoc;
700*4882a593Smuzhiyun u32 rem_cap;
701*4882a593Smuzhiyun
702*4882a593Smuzhiyun struct max17042_config_data *config = chip->pdata->config_data;
703*4882a593Smuzhiyun struct regmap *map = chip->regmap;
704*4882a593Smuzhiyun
705*4882a593Smuzhiyun regmap_read(map, MAX17042_FullCAP0, &full_cap0);
706*4882a593Smuzhiyun regmap_read(map, MAX17042_VFSOC, &vfSoc);
707*4882a593Smuzhiyun
708*4882a593Smuzhiyun /* fg_vfSoc needs to shifted by 8 bits to get the
709*4882a593Smuzhiyun * perc in 1% accuracy, to get the right rem_cap multiply
710*4882a593Smuzhiyun * full_cap0, fg_vfSoc and devide by 100
711*4882a593Smuzhiyun */
712*4882a593Smuzhiyun rem_cap = ((vfSoc >> 8) * full_cap0) / 100;
713*4882a593Smuzhiyun max17042_write_verify_reg(map, MAX17042_RemCap, rem_cap);
714*4882a593Smuzhiyun
715*4882a593Smuzhiyun rep_cap = rem_cap;
716*4882a593Smuzhiyun max17042_write_verify_reg(map, MAX17042_RepCap, rep_cap);
717*4882a593Smuzhiyun
718*4882a593Smuzhiyun /* Write dQ_acc to 200% of Capacity and dP_acc to 200% */
719*4882a593Smuzhiyun dq_acc = config->fullcap / dQ_ACC_DIV;
720*4882a593Smuzhiyun max17042_write_verify_reg(map, MAX17042_dQacc, dq_acc);
721*4882a593Smuzhiyun max17042_write_verify_reg(map, MAX17042_dPacc, dP_ACC_200);
722*4882a593Smuzhiyun
723*4882a593Smuzhiyun max17042_write_verify_reg(map, MAX17042_FullCAP,
724*4882a593Smuzhiyun config->fullcap);
725*4882a593Smuzhiyun regmap_write(map, MAX17042_DesignCap,
726*4882a593Smuzhiyun config->design_cap);
727*4882a593Smuzhiyun max17042_write_verify_reg(map, MAX17042_FullCAPNom,
728*4882a593Smuzhiyun config->fullcapnom);
729*4882a593Smuzhiyun /* Update SOC register with new SOC */
730*4882a593Smuzhiyun regmap_write(map, MAX17042_RepSOC, vfSoc);
731*4882a593Smuzhiyun }
732*4882a593Smuzhiyun
733*4882a593Smuzhiyun /*
734*4882a593Smuzhiyun * Block write all the override values coming from platform data.
735*4882a593Smuzhiyun * This function MUST be called before the POR initialization proceedure
736*4882a593Smuzhiyun * specified by maxim.
737*4882a593Smuzhiyun */
max17042_override_por_values(struct max17042_chip * chip)738*4882a593Smuzhiyun static inline void max17042_override_por_values(struct max17042_chip *chip)
739*4882a593Smuzhiyun {
740*4882a593Smuzhiyun struct regmap *map = chip->regmap;
741*4882a593Smuzhiyun struct max17042_config_data *config = chip->pdata->config_data;
742*4882a593Smuzhiyun
743*4882a593Smuzhiyun max17042_override_por(map, MAX17042_TGAIN, config->tgain);
744*4882a593Smuzhiyun max17042_override_por(map, MAX17042_TOFF, config->toff);
745*4882a593Smuzhiyun max17042_override_por(map, MAX17042_CGAIN, config->cgain);
746*4882a593Smuzhiyun max17042_override_por(map, MAX17042_COFF, config->coff);
747*4882a593Smuzhiyun
748*4882a593Smuzhiyun max17042_override_por(map, MAX17042_VALRT_Th, config->valrt_thresh);
749*4882a593Smuzhiyun max17042_override_por(map, MAX17042_TALRT_Th, config->talrt_thresh);
750*4882a593Smuzhiyun max17042_override_por(map, MAX17042_SALRT_Th,
751*4882a593Smuzhiyun config->soc_alrt_thresh);
752*4882a593Smuzhiyun max17042_override_por(map, MAX17042_CONFIG, config->config);
753*4882a593Smuzhiyun max17042_override_por(map, MAX17042_SHDNTIMER, config->shdntimer);
754*4882a593Smuzhiyun
755*4882a593Smuzhiyun max17042_override_por(map, MAX17042_DesignCap, config->design_cap);
756*4882a593Smuzhiyun max17042_override_por(map, MAX17042_ICHGTerm, config->ichgt_term);
757*4882a593Smuzhiyun
758*4882a593Smuzhiyun max17042_override_por(map, MAX17042_AtRate, config->at_rate);
759*4882a593Smuzhiyun max17042_override_por(map, MAX17042_LearnCFG, config->learn_cfg);
760*4882a593Smuzhiyun max17042_override_por(map, MAX17042_FilterCFG, config->filter_cfg);
761*4882a593Smuzhiyun max17042_override_por(map, MAX17042_RelaxCFG, config->relax_cfg);
762*4882a593Smuzhiyun max17042_override_por(map, MAX17042_MiscCFG, config->misc_cfg);
763*4882a593Smuzhiyun max17042_override_por(map, MAX17042_MaskSOC, config->masksoc);
764*4882a593Smuzhiyun
765*4882a593Smuzhiyun max17042_override_por(map, MAX17042_FullCAP, config->fullcap);
766*4882a593Smuzhiyun max17042_override_por(map, MAX17042_FullCAPNom, config->fullcapnom);
767*4882a593Smuzhiyun if (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17042)
768*4882a593Smuzhiyun max17042_override_por(map, MAX17042_SOC_empty,
769*4882a593Smuzhiyun config->socempty);
770*4882a593Smuzhiyun max17042_override_por(map, MAX17042_LAvg_empty, config->lavg_empty);
771*4882a593Smuzhiyun max17042_override_por(map, MAX17042_dQacc, config->dqacc);
772*4882a593Smuzhiyun max17042_override_por(map, MAX17042_dPacc, config->dpacc);
773*4882a593Smuzhiyun
774*4882a593Smuzhiyun if (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17042)
775*4882a593Smuzhiyun max17042_override_por(map, MAX17042_V_empty, config->vempty);
776*4882a593Smuzhiyun if (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17055)
777*4882a593Smuzhiyun max17042_override_por(map, MAX17055_V_empty, config->vempty);
778*4882a593Smuzhiyun else
779*4882a593Smuzhiyun max17042_override_por(map, MAX17047_V_empty, config->vempty);
780*4882a593Smuzhiyun max17042_override_por(map, MAX17042_TempNom, config->temp_nom);
781*4882a593Smuzhiyun max17042_override_por(map, MAX17042_TempLim, config->temp_lim);
782*4882a593Smuzhiyun max17042_override_por(map, MAX17042_FCTC, config->fctc);
783*4882a593Smuzhiyun max17042_override_por(map, MAX17042_RCOMP0, config->rcomp0);
784*4882a593Smuzhiyun max17042_override_por(map, MAX17042_TempCo, config->tcompc0);
785*4882a593Smuzhiyun if (chip->chip_type &&
786*4882a593Smuzhiyun ((chip->chip_type == MAXIM_DEVICE_TYPE_MAX17042) ||
787*4882a593Smuzhiyun (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17047) ||
788*4882a593Smuzhiyun (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17050))) {
789*4882a593Smuzhiyun max17042_override_por(map, MAX17042_EmptyTempCo,
790*4882a593Smuzhiyun config->empty_tempco);
791*4882a593Smuzhiyun max17042_override_por(map, MAX17042_K_empty0,
792*4882a593Smuzhiyun config->kempty0);
793*4882a593Smuzhiyun }
794*4882a593Smuzhiyun }
795*4882a593Smuzhiyun
max17042_init_chip(struct max17042_chip * chip)796*4882a593Smuzhiyun static int max17042_init_chip(struct max17042_chip *chip)
797*4882a593Smuzhiyun {
798*4882a593Smuzhiyun struct regmap *map = chip->regmap;
799*4882a593Smuzhiyun int ret;
800*4882a593Smuzhiyun
801*4882a593Smuzhiyun max17042_override_por_values(chip);
802*4882a593Smuzhiyun /* After Power up, the MAX17042 requires 500mS in order
803*4882a593Smuzhiyun * to perform signal debouncing and initial SOC reporting
804*4882a593Smuzhiyun */
805*4882a593Smuzhiyun msleep(500);
806*4882a593Smuzhiyun
807*4882a593Smuzhiyun /* Initialize configaration */
808*4882a593Smuzhiyun max17042_write_config_regs(chip);
809*4882a593Smuzhiyun
810*4882a593Smuzhiyun /* write cell characterization data */
811*4882a593Smuzhiyun ret = max17042_init_model(chip);
812*4882a593Smuzhiyun if (ret) {
813*4882a593Smuzhiyun dev_err(&chip->client->dev, "%s init failed\n",
814*4882a593Smuzhiyun __func__);
815*4882a593Smuzhiyun return -EIO;
816*4882a593Smuzhiyun }
817*4882a593Smuzhiyun
818*4882a593Smuzhiyun ret = max17042_verify_model_lock(chip);
819*4882a593Smuzhiyun if (ret) {
820*4882a593Smuzhiyun dev_err(&chip->client->dev, "%s lock verify failed\n",
821*4882a593Smuzhiyun __func__);
822*4882a593Smuzhiyun return -EIO;
823*4882a593Smuzhiyun }
824*4882a593Smuzhiyun /* write custom parameters */
825*4882a593Smuzhiyun max17042_write_custom_regs(chip);
826*4882a593Smuzhiyun
827*4882a593Smuzhiyun /* update capacity params */
828*4882a593Smuzhiyun max17042_update_capacity_regs(chip);
829*4882a593Smuzhiyun
830*4882a593Smuzhiyun /* delay must be atleast 350mS to allow VFSOC
831*4882a593Smuzhiyun * to be calculated from the new configuration
832*4882a593Smuzhiyun */
833*4882a593Smuzhiyun msleep(350);
834*4882a593Smuzhiyun
835*4882a593Smuzhiyun /* reset vfsoc0 reg */
836*4882a593Smuzhiyun max17042_reset_vfsoc0_reg(chip);
837*4882a593Smuzhiyun
838*4882a593Smuzhiyun /* load new capacity params */
839*4882a593Smuzhiyun max17042_load_new_capacity_params(chip);
840*4882a593Smuzhiyun
841*4882a593Smuzhiyun /* Init complete, Clear the POR bit */
842*4882a593Smuzhiyun regmap_update_bits(map, MAX17042_STATUS, STATUS_POR_BIT, 0x0);
843*4882a593Smuzhiyun return 0;
844*4882a593Smuzhiyun }
845*4882a593Smuzhiyun
max17042_set_soc_threshold(struct max17042_chip * chip,u16 off)846*4882a593Smuzhiyun static void max17042_set_soc_threshold(struct max17042_chip *chip, u16 off)
847*4882a593Smuzhiyun {
848*4882a593Smuzhiyun struct regmap *map = chip->regmap;
849*4882a593Smuzhiyun u32 soc, soc_tr;
850*4882a593Smuzhiyun
851*4882a593Smuzhiyun /* program interrupt thesholds such that we should
852*4882a593Smuzhiyun * get interrupt for every 'off' perc change in the soc
853*4882a593Smuzhiyun */
854*4882a593Smuzhiyun regmap_read(map, MAX17042_RepSOC, &soc);
855*4882a593Smuzhiyun soc >>= 8;
856*4882a593Smuzhiyun soc_tr = (soc + off) << 8;
857*4882a593Smuzhiyun if (off < soc)
858*4882a593Smuzhiyun soc_tr |= soc - off;
859*4882a593Smuzhiyun regmap_write(map, MAX17042_SALRT_Th, soc_tr);
860*4882a593Smuzhiyun }
861*4882a593Smuzhiyun
max17042_thread_handler(int id,void * dev)862*4882a593Smuzhiyun static irqreturn_t max17042_thread_handler(int id, void *dev)
863*4882a593Smuzhiyun {
864*4882a593Smuzhiyun struct max17042_chip *chip = dev;
865*4882a593Smuzhiyun u32 val;
866*4882a593Smuzhiyun int ret;
867*4882a593Smuzhiyun
868*4882a593Smuzhiyun ret = regmap_read(chip->regmap, MAX17042_STATUS, &val);
869*4882a593Smuzhiyun if (ret)
870*4882a593Smuzhiyun return IRQ_HANDLED;
871*4882a593Smuzhiyun
872*4882a593Smuzhiyun if ((val & STATUS_INTR_SOCMIN_BIT) ||
873*4882a593Smuzhiyun (val & STATUS_INTR_SOCMAX_BIT)) {
874*4882a593Smuzhiyun dev_info(&chip->client->dev, "SOC threshold INTR\n");
875*4882a593Smuzhiyun max17042_set_soc_threshold(chip, 1);
876*4882a593Smuzhiyun }
877*4882a593Smuzhiyun
878*4882a593Smuzhiyun /* we implicitly handle all alerts via power_supply_changed */
879*4882a593Smuzhiyun regmap_clear_bits(chip->regmap, MAX17042_STATUS,
880*4882a593Smuzhiyun 0xFFFF & ~(STATUS_POR_BIT | STATUS_BST_BIT));
881*4882a593Smuzhiyun
882*4882a593Smuzhiyun power_supply_changed(chip->battery);
883*4882a593Smuzhiyun return IRQ_HANDLED;
884*4882a593Smuzhiyun }
885*4882a593Smuzhiyun
max17042_init_worker(struct work_struct * work)886*4882a593Smuzhiyun static void max17042_init_worker(struct work_struct *work)
887*4882a593Smuzhiyun {
888*4882a593Smuzhiyun struct max17042_chip *chip = container_of(work,
889*4882a593Smuzhiyun struct max17042_chip, work);
890*4882a593Smuzhiyun int ret;
891*4882a593Smuzhiyun
892*4882a593Smuzhiyun /* Initialize registers according to values from the platform data */
893*4882a593Smuzhiyun if (chip->pdata->enable_por_init && chip->pdata->config_data) {
894*4882a593Smuzhiyun ret = max17042_init_chip(chip);
895*4882a593Smuzhiyun if (ret)
896*4882a593Smuzhiyun return;
897*4882a593Smuzhiyun }
898*4882a593Smuzhiyun
899*4882a593Smuzhiyun chip->init_complete = 1;
900*4882a593Smuzhiyun }
901*4882a593Smuzhiyun
902*4882a593Smuzhiyun #ifdef CONFIG_OF
903*4882a593Smuzhiyun static struct max17042_platform_data *
max17042_get_of_pdata(struct max17042_chip * chip)904*4882a593Smuzhiyun max17042_get_of_pdata(struct max17042_chip *chip)
905*4882a593Smuzhiyun {
906*4882a593Smuzhiyun struct device *dev = &chip->client->dev;
907*4882a593Smuzhiyun struct device_node *np = dev->of_node;
908*4882a593Smuzhiyun u32 prop;
909*4882a593Smuzhiyun struct max17042_platform_data *pdata;
910*4882a593Smuzhiyun
911*4882a593Smuzhiyun pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
912*4882a593Smuzhiyun if (!pdata)
913*4882a593Smuzhiyun return NULL;
914*4882a593Smuzhiyun
915*4882a593Smuzhiyun /*
916*4882a593Smuzhiyun * Require current sense resistor value to be specified for
917*4882a593Smuzhiyun * current-sense functionality to be enabled at all.
918*4882a593Smuzhiyun */
919*4882a593Smuzhiyun if (of_property_read_u32(np, "maxim,rsns-microohm", &prop) == 0) {
920*4882a593Smuzhiyun pdata->r_sns = prop;
921*4882a593Smuzhiyun pdata->enable_current_sense = true;
922*4882a593Smuzhiyun }
923*4882a593Smuzhiyun
924*4882a593Smuzhiyun if (of_property_read_s32(np, "maxim,cold-temp", &pdata->temp_min))
925*4882a593Smuzhiyun pdata->temp_min = INT_MIN;
926*4882a593Smuzhiyun if (of_property_read_s32(np, "maxim,over-heat-temp", &pdata->temp_max))
927*4882a593Smuzhiyun pdata->temp_max = INT_MAX;
928*4882a593Smuzhiyun if (of_property_read_s32(np, "maxim,dead-volt", &pdata->vmin))
929*4882a593Smuzhiyun pdata->vmin = INT_MIN;
930*4882a593Smuzhiyun if (of_property_read_s32(np, "maxim,over-volt", &pdata->vmax))
931*4882a593Smuzhiyun pdata->vmax = INT_MAX;
932*4882a593Smuzhiyun
933*4882a593Smuzhiyun return pdata;
934*4882a593Smuzhiyun }
935*4882a593Smuzhiyun #endif
936*4882a593Smuzhiyun
937*4882a593Smuzhiyun static struct max17042_reg_data max17047_default_pdata_init_regs[] = {
938*4882a593Smuzhiyun /*
939*4882a593Smuzhiyun * Some firmwares do not set FullSOCThr, Enable End-of-Charge Detection
940*4882a593Smuzhiyun * when the voltage FG reports 95%, as recommended in the datasheet.
941*4882a593Smuzhiyun */
942*4882a593Smuzhiyun { MAX17047_FullSOCThr, MAX17042_BATTERY_FULL << 8 },
943*4882a593Smuzhiyun };
944*4882a593Smuzhiyun
945*4882a593Smuzhiyun static struct max17042_platform_data *
max17042_get_default_pdata(struct max17042_chip * chip)946*4882a593Smuzhiyun max17042_get_default_pdata(struct max17042_chip *chip)
947*4882a593Smuzhiyun {
948*4882a593Smuzhiyun struct device *dev = &chip->client->dev;
949*4882a593Smuzhiyun struct max17042_platform_data *pdata;
950*4882a593Smuzhiyun int ret, misc_cfg;
951*4882a593Smuzhiyun
952*4882a593Smuzhiyun /*
953*4882a593Smuzhiyun * The MAX17047 gets used on x86 where we might not have pdata, assume
954*4882a593Smuzhiyun * the firmware will already have initialized the fuel-gauge and provide
955*4882a593Smuzhiyun * default values for the non init bits to make things work.
956*4882a593Smuzhiyun */
957*4882a593Smuzhiyun pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
958*4882a593Smuzhiyun if (!pdata)
959*4882a593Smuzhiyun return pdata;
960*4882a593Smuzhiyun
961*4882a593Smuzhiyun if ((chip->chip_type == MAXIM_DEVICE_TYPE_MAX17047) ||
962*4882a593Smuzhiyun (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17050)) {
963*4882a593Smuzhiyun pdata->init_data = max17047_default_pdata_init_regs;
964*4882a593Smuzhiyun pdata->num_init_data =
965*4882a593Smuzhiyun ARRAY_SIZE(max17047_default_pdata_init_regs);
966*4882a593Smuzhiyun }
967*4882a593Smuzhiyun
968*4882a593Smuzhiyun ret = regmap_read(chip->regmap, MAX17042_MiscCFG, &misc_cfg);
969*4882a593Smuzhiyun if (ret < 0)
970*4882a593Smuzhiyun return NULL;
971*4882a593Smuzhiyun
972*4882a593Smuzhiyun /* If bits 0-1 are set to 3 then only Voltage readings are used */
973*4882a593Smuzhiyun if ((misc_cfg & 0x3) == 0x3)
974*4882a593Smuzhiyun pdata->enable_current_sense = false;
975*4882a593Smuzhiyun else
976*4882a593Smuzhiyun pdata->enable_current_sense = true;
977*4882a593Smuzhiyun
978*4882a593Smuzhiyun pdata->vmin = MAX17042_DEFAULT_VMIN;
979*4882a593Smuzhiyun pdata->vmax = MAX17042_DEFAULT_VMAX;
980*4882a593Smuzhiyun pdata->temp_min = MAX17042_DEFAULT_TEMP_MIN;
981*4882a593Smuzhiyun pdata->temp_max = MAX17042_DEFAULT_TEMP_MAX;
982*4882a593Smuzhiyun
983*4882a593Smuzhiyun return pdata;
984*4882a593Smuzhiyun }
985*4882a593Smuzhiyun
986*4882a593Smuzhiyun static struct max17042_platform_data *
max17042_get_pdata(struct max17042_chip * chip)987*4882a593Smuzhiyun max17042_get_pdata(struct max17042_chip *chip)
988*4882a593Smuzhiyun {
989*4882a593Smuzhiyun struct device *dev = &chip->client->dev;
990*4882a593Smuzhiyun
991*4882a593Smuzhiyun #ifdef CONFIG_OF
992*4882a593Smuzhiyun if (dev->of_node)
993*4882a593Smuzhiyun return max17042_get_of_pdata(chip);
994*4882a593Smuzhiyun #endif
995*4882a593Smuzhiyun if (dev->platform_data)
996*4882a593Smuzhiyun return dev->platform_data;
997*4882a593Smuzhiyun
998*4882a593Smuzhiyun return max17042_get_default_pdata(chip);
999*4882a593Smuzhiyun }
1000*4882a593Smuzhiyun
1001*4882a593Smuzhiyun static const struct regmap_config max17042_regmap_config = {
1002*4882a593Smuzhiyun .reg_bits = 8,
1003*4882a593Smuzhiyun .val_bits = 16,
1004*4882a593Smuzhiyun .val_format_endian = REGMAP_ENDIAN_NATIVE,
1005*4882a593Smuzhiyun };
1006*4882a593Smuzhiyun
1007*4882a593Smuzhiyun static const struct power_supply_desc max17042_psy_desc = {
1008*4882a593Smuzhiyun .name = "max170xx_battery",
1009*4882a593Smuzhiyun .type = POWER_SUPPLY_TYPE_BATTERY,
1010*4882a593Smuzhiyun .get_property = max17042_get_property,
1011*4882a593Smuzhiyun .set_property = max17042_set_property,
1012*4882a593Smuzhiyun .property_is_writeable = max17042_property_is_writeable,
1013*4882a593Smuzhiyun .external_power_changed = max17042_external_power_changed,
1014*4882a593Smuzhiyun .properties = max17042_battery_props,
1015*4882a593Smuzhiyun .num_properties = ARRAY_SIZE(max17042_battery_props),
1016*4882a593Smuzhiyun };
1017*4882a593Smuzhiyun
1018*4882a593Smuzhiyun static const struct power_supply_desc max17042_no_current_sense_psy_desc = {
1019*4882a593Smuzhiyun .name = "max170xx_battery",
1020*4882a593Smuzhiyun .type = POWER_SUPPLY_TYPE_BATTERY,
1021*4882a593Smuzhiyun .get_property = max17042_get_property,
1022*4882a593Smuzhiyun .set_property = max17042_set_property,
1023*4882a593Smuzhiyun .property_is_writeable = max17042_property_is_writeable,
1024*4882a593Smuzhiyun .properties = max17042_battery_props,
1025*4882a593Smuzhiyun .num_properties = ARRAY_SIZE(max17042_battery_props) - 2,
1026*4882a593Smuzhiyun };
1027*4882a593Smuzhiyun
max17042_stop_work(void * data)1028*4882a593Smuzhiyun static void max17042_stop_work(void *data)
1029*4882a593Smuzhiyun {
1030*4882a593Smuzhiyun struct max17042_chip *chip = data;
1031*4882a593Smuzhiyun
1032*4882a593Smuzhiyun cancel_work_sync(&chip->work);
1033*4882a593Smuzhiyun }
1034*4882a593Smuzhiyun
max17042_probe(struct i2c_client * client,const struct i2c_device_id * id)1035*4882a593Smuzhiyun static int max17042_probe(struct i2c_client *client,
1036*4882a593Smuzhiyun const struct i2c_device_id *id)
1037*4882a593Smuzhiyun {
1038*4882a593Smuzhiyun struct i2c_adapter *adapter = client->adapter;
1039*4882a593Smuzhiyun const struct power_supply_desc *max17042_desc = &max17042_psy_desc;
1040*4882a593Smuzhiyun struct power_supply_config psy_cfg = {};
1041*4882a593Smuzhiyun const struct acpi_device_id *acpi_id = NULL;
1042*4882a593Smuzhiyun struct device *dev = &client->dev;
1043*4882a593Smuzhiyun struct max17042_chip *chip;
1044*4882a593Smuzhiyun int ret;
1045*4882a593Smuzhiyun int i;
1046*4882a593Smuzhiyun u32 val;
1047*4882a593Smuzhiyun
1048*4882a593Smuzhiyun if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA))
1049*4882a593Smuzhiyun return -EIO;
1050*4882a593Smuzhiyun
1051*4882a593Smuzhiyun chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
1052*4882a593Smuzhiyun if (!chip)
1053*4882a593Smuzhiyun return -ENOMEM;
1054*4882a593Smuzhiyun
1055*4882a593Smuzhiyun chip->client = client;
1056*4882a593Smuzhiyun if (id) {
1057*4882a593Smuzhiyun chip->chip_type = id->driver_data;
1058*4882a593Smuzhiyun } else {
1059*4882a593Smuzhiyun acpi_id = acpi_match_device(dev->driver->acpi_match_table, dev);
1060*4882a593Smuzhiyun if (!acpi_id)
1061*4882a593Smuzhiyun return -ENODEV;
1062*4882a593Smuzhiyun
1063*4882a593Smuzhiyun chip->chip_type = acpi_id->driver_data;
1064*4882a593Smuzhiyun }
1065*4882a593Smuzhiyun chip->regmap = devm_regmap_init_i2c(client, &max17042_regmap_config);
1066*4882a593Smuzhiyun if (IS_ERR(chip->regmap)) {
1067*4882a593Smuzhiyun dev_err(&client->dev, "Failed to initialize regmap\n");
1068*4882a593Smuzhiyun return -EINVAL;
1069*4882a593Smuzhiyun }
1070*4882a593Smuzhiyun
1071*4882a593Smuzhiyun chip->pdata = max17042_get_pdata(chip);
1072*4882a593Smuzhiyun if (!chip->pdata) {
1073*4882a593Smuzhiyun dev_err(&client->dev, "no platform data provided\n");
1074*4882a593Smuzhiyun return -EINVAL;
1075*4882a593Smuzhiyun }
1076*4882a593Smuzhiyun
1077*4882a593Smuzhiyun i2c_set_clientdata(client, chip);
1078*4882a593Smuzhiyun psy_cfg.drv_data = chip;
1079*4882a593Smuzhiyun psy_cfg.of_node = dev->of_node;
1080*4882a593Smuzhiyun
1081*4882a593Smuzhiyun /* When current is not measured,
1082*4882a593Smuzhiyun * CURRENT_NOW and CURRENT_AVG properties should be invisible. */
1083*4882a593Smuzhiyun if (!chip->pdata->enable_current_sense)
1084*4882a593Smuzhiyun max17042_desc = &max17042_no_current_sense_psy_desc;
1085*4882a593Smuzhiyun
1086*4882a593Smuzhiyun if (chip->pdata->r_sns == 0)
1087*4882a593Smuzhiyun chip->pdata->r_sns = MAX17042_DEFAULT_SNS_RESISTOR;
1088*4882a593Smuzhiyun
1089*4882a593Smuzhiyun if (chip->pdata->init_data)
1090*4882a593Smuzhiyun for (i = 0; i < chip->pdata->num_init_data; i++)
1091*4882a593Smuzhiyun regmap_write(chip->regmap,
1092*4882a593Smuzhiyun chip->pdata->init_data[i].addr,
1093*4882a593Smuzhiyun chip->pdata->init_data[i].data);
1094*4882a593Smuzhiyun
1095*4882a593Smuzhiyun if (!chip->pdata->enable_current_sense) {
1096*4882a593Smuzhiyun regmap_write(chip->regmap, MAX17042_CGAIN, 0x0000);
1097*4882a593Smuzhiyun regmap_write(chip->regmap, MAX17042_MiscCFG, 0x0003);
1098*4882a593Smuzhiyun regmap_write(chip->regmap, MAX17042_LearnCFG, 0x0007);
1099*4882a593Smuzhiyun }
1100*4882a593Smuzhiyun
1101*4882a593Smuzhiyun chip->battery = devm_power_supply_register(&client->dev, max17042_desc,
1102*4882a593Smuzhiyun &psy_cfg);
1103*4882a593Smuzhiyun if (IS_ERR(chip->battery)) {
1104*4882a593Smuzhiyun dev_err(&client->dev, "failed: power supply register\n");
1105*4882a593Smuzhiyun return PTR_ERR(chip->battery);
1106*4882a593Smuzhiyun }
1107*4882a593Smuzhiyun
1108*4882a593Smuzhiyun if (client->irq) {
1109*4882a593Smuzhiyun unsigned int flags = IRQF_ONESHOT;
1110*4882a593Smuzhiyun
1111*4882a593Smuzhiyun /*
1112*4882a593Smuzhiyun * On ACPI systems the IRQ may be handled by ACPI-event code,
1113*4882a593Smuzhiyun * so we need to share (if the ACPI code is willing to share).
1114*4882a593Smuzhiyun */
1115*4882a593Smuzhiyun if (acpi_id)
1116*4882a593Smuzhiyun flags |= IRQF_SHARED | IRQF_PROBE_SHARED;
1117*4882a593Smuzhiyun
1118*4882a593Smuzhiyun ret = devm_request_threaded_irq(&client->dev, client->irq,
1119*4882a593Smuzhiyun NULL,
1120*4882a593Smuzhiyun max17042_thread_handler, flags,
1121*4882a593Smuzhiyun chip->battery->desc->name,
1122*4882a593Smuzhiyun chip);
1123*4882a593Smuzhiyun if (!ret) {
1124*4882a593Smuzhiyun regmap_update_bits(chip->regmap, MAX17042_CONFIG,
1125*4882a593Smuzhiyun CONFIG_ALRT_BIT_ENBL,
1126*4882a593Smuzhiyun CONFIG_ALRT_BIT_ENBL);
1127*4882a593Smuzhiyun max17042_set_soc_threshold(chip, 1);
1128*4882a593Smuzhiyun } else {
1129*4882a593Smuzhiyun client->irq = 0;
1130*4882a593Smuzhiyun if (ret != -EBUSY)
1131*4882a593Smuzhiyun dev_err(&client->dev, "Failed to get IRQ\n");
1132*4882a593Smuzhiyun }
1133*4882a593Smuzhiyun }
1134*4882a593Smuzhiyun /* Not able to update the charge threshold when exceeded? -> disable */
1135*4882a593Smuzhiyun if (!client->irq)
1136*4882a593Smuzhiyun regmap_write(chip->regmap, MAX17042_SALRT_Th, 0xff00);
1137*4882a593Smuzhiyun
1138*4882a593Smuzhiyun regmap_read(chip->regmap, MAX17042_STATUS, &val);
1139*4882a593Smuzhiyun if (val & STATUS_POR_BIT) {
1140*4882a593Smuzhiyun INIT_WORK(&chip->work, max17042_init_worker);
1141*4882a593Smuzhiyun ret = devm_add_action(&client->dev, max17042_stop_work, chip);
1142*4882a593Smuzhiyun if (ret)
1143*4882a593Smuzhiyun return ret;
1144*4882a593Smuzhiyun schedule_work(&chip->work);
1145*4882a593Smuzhiyun } else {
1146*4882a593Smuzhiyun chip->init_complete = 1;
1147*4882a593Smuzhiyun }
1148*4882a593Smuzhiyun
1149*4882a593Smuzhiyun return 0;
1150*4882a593Smuzhiyun }
1151*4882a593Smuzhiyun
1152*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
max17042_suspend(struct device * dev)1153*4882a593Smuzhiyun static int max17042_suspend(struct device *dev)
1154*4882a593Smuzhiyun {
1155*4882a593Smuzhiyun struct max17042_chip *chip = dev_get_drvdata(dev);
1156*4882a593Smuzhiyun
1157*4882a593Smuzhiyun /*
1158*4882a593Smuzhiyun * disable the irq and enable irq_wake
1159*4882a593Smuzhiyun * capability to the interrupt line.
1160*4882a593Smuzhiyun */
1161*4882a593Smuzhiyun if (chip->client->irq) {
1162*4882a593Smuzhiyun disable_irq(chip->client->irq);
1163*4882a593Smuzhiyun enable_irq_wake(chip->client->irq);
1164*4882a593Smuzhiyun }
1165*4882a593Smuzhiyun
1166*4882a593Smuzhiyun return 0;
1167*4882a593Smuzhiyun }
1168*4882a593Smuzhiyun
max17042_resume(struct device * dev)1169*4882a593Smuzhiyun static int max17042_resume(struct device *dev)
1170*4882a593Smuzhiyun {
1171*4882a593Smuzhiyun struct max17042_chip *chip = dev_get_drvdata(dev);
1172*4882a593Smuzhiyun
1173*4882a593Smuzhiyun if (chip->client->irq) {
1174*4882a593Smuzhiyun disable_irq_wake(chip->client->irq);
1175*4882a593Smuzhiyun enable_irq(chip->client->irq);
1176*4882a593Smuzhiyun /* re-program the SOC thresholds to 1% change */
1177*4882a593Smuzhiyun max17042_set_soc_threshold(chip, 1);
1178*4882a593Smuzhiyun }
1179*4882a593Smuzhiyun
1180*4882a593Smuzhiyun return 0;
1181*4882a593Smuzhiyun }
1182*4882a593Smuzhiyun #endif
1183*4882a593Smuzhiyun
1184*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(max17042_pm_ops, max17042_suspend,
1185*4882a593Smuzhiyun max17042_resume);
1186*4882a593Smuzhiyun
1187*4882a593Smuzhiyun #ifdef CONFIG_ACPI
1188*4882a593Smuzhiyun static const struct acpi_device_id max17042_acpi_match[] = {
1189*4882a593Smuzhiyun { "MAX17047", MAXIM_DEVICE_TYPE_MAX17047 },
1190*4882a593Smuzhiyun { }
1191*4882a593Smuzhiyun };
1192*4882a593Smuzhiyun MODULE_DEVICE_TABLE(acpi, max17042_acpi_match);
1193*4882a593Smuzhiyun #endif
1194*4882a593Smuzhiyun
1195*4882a593Smuzhiyun #ifdef CONFIG_OF
1196*4882a593Smuzhiyun static const struct of_device_id max17042_dt_match[] = {
1197*4882a593Smuzhiyun { .compatible = "maxim,max17042" },
1198*4882a593Smuzhiyun { .compatible = "maxim,max17047" },
1199*4882a593Smuzhiyun { .compatible = "maxim,max17050" },
1200*4882a593Smuzhiyun { .compatible = "maxim,max17055" },
1201*4882a593Smuzhiyun { },
1202*4882a593Smuzhiyun };
1203*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, max17042_dt_match);
1204*4882a593Smuzhiyun #endif
1205*4882a593Smuzhiyun
1206*4882a593Smuzhiyun static const struct i2c_device_id max17042_id[] = {
1207*4882a593Smuzhiyun { "max17042", MAXIM_DEVICE_TYPE_MAX17042 },
1208*4882a593Smuzhiyun { "max17047", MAXIM_DEVICE_TYPE_MAX17047 },
1209*4882a593Smuzhiyun { "max17050", MAXIM_DEVICE_TYPE_MAX17050 },
1210*4882a593Smuzhiyun { "max17055", MAXIM_DEVICE_TYPE_MAX17055 },
1211*4882a593Smuzhiyun { }
1212*4882a593Smuzhiyun };
1213*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, max17042_id);
1214*4882a593Smuzhiyun
1215*4882a593Smuzhiyun static struct i2c_driver max17042_i2c_driver = {
1216*4882a593Smuzhiyun .driver = {
1217*4882a593Smuzhiyun .name = "max17042",
1218*4882a593Smuzhiyun .acpi_match_table = ACPI_PTR(max17042_acpi_match),
1219*4882a593Smuzhiyun .of_match_table = of_match_ptr(max17042_dt_match),
1220*4882a593Smuzhiyun .pm = &max17042_pm_ops,
1221*4882a593Smuzhiyun },
1222*4882a593Smuzhiyun .probe = max17042_probe,
1223*4882a593Smuzhiyun .id_table = max17042_id,
1224*4882a593Smuzhiyun };
1225*4882a593Smuzhiyun module_i2c_driver(max17042_i2c_driver);
1226*4882a593Smuzhiyun
1227*4882a593Smuzhiyun MODULE_AUTHOR("MyungJoo Ham <myungjoo.ham@samsung.com>");
1228*4882a593Smuzhiyun MODULE_DESCRIPTION("MAX17042 Fuel Gauge");
1229*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1230