1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // max17040_battery.c
4*4882a593Smuzhiyun // fuel-gauge systems for lithium-ion (Li+) batteries
5*4882a593Smuzhiyun //
6*4882a593Smuzhiyun // Copyright (C) 2009 Samsung Electronics
7*4882a593Smuzhiyun // Minkyu Kang <mk7.kang@samsung.com>
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/init.h>
11*4882a593Smuzhiyun #include <linux/platform_device.h>
12*4882a593Smuzhiyun #include <linux/mutex.h>
13*4882a593Smuzhiyun #include <linux/err.h>
14*4882a593Smuzhiyun #include <linux/i2c.h>
15*4882a593Smuzhiyun #include <linux/delay.h>
16*4882a593Smuzhiyun #include <linux/interrupt.h>
17*4882a593Smuzhiyun #include <linux/power_supply.h>
18*4882a593Smuzhiyun #include <linux/of_device.h>
19*4882a593Smuzhiyun #include <linux/max17040_battery.h>
20*4882a593Smuzhiyun #include <linux/regmap.h>
21*4882a593Smuzhiyun #include <linux/slab.h>
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #define MAX17040_VCELL 0x02
24*4882a593Smuzhiyun #define MAX17040_SOC 0x04
25*4882a593Smuzhiyun #define MAX17040_MODE 0x06
26*4882a593Smuzhiyun #define MAX17040_VER 0x08
27*4882a593Smuzhiyun #define MAX17040_CONFIG 0x0C
28*4882a593Smuzhiyun #define MAX17040_STATUS 0x1A
29*4882a593Smuzhiyun #define MAX17040_CMD 0xFE
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #define MAX17040_DELAY 1000
33*4882a593Smuzhiyun #define MAX17040_BATTERY_FULL 95
34*4882a593Smuzhiyun #define MAX17040_RCOMP_DEFAULT 0x9700
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun #define MAX17040_ATHD_MASK 0x3f
37*4882a593Smuzhiyun #define MAX17040_ALSC_MASK 0x40
38*4882a593Smuzhiyun #define MAX17040_ATHD_DEFAULT_POWER_UP 4
39*4882a593Smuzhiyun #define MAX17040_STATUS_HD_MASK 0x1000
40*4882a593Smuzhiyun #define MAX17040_STATUS_SC_MASK 0x2000
41*4882a593Smuzhiyun #define MAX17040_CFG_RCOMP_MASK 0xff00
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun enum chip_id {
44*4882a593Smuzhiyun ID_MAX17040,
45*4882a593Smuzhiyun ID_MAX17041,
46*4882a593Smuzhiyun ID_MAX17043,
47*4882a593Smuzhiyun ID_MAX17044,
48*4882a593Smuzhiyun ID_MAX17048,
49*4882a593Smuzhiyun ID_MAX17049,
50*4882a593Smuzhiyun ID_MAX17058,
51*4882a593Smuzhiyun ID_MAX17059,
52*4882a593Smuzhiyun };
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun /* values that differ by chip_id */
55*4882a593Smuzhiyun struct chip_data {
56*4882a593Smuzhiyun u16 reset_val;
57*4882a593Smuzhiyun u16 vcell_shift;
58*4882a593Smuzhiyun u16 vcell_mul;
59*4882a593Smuzhiyun u16 vcell_div;
60*4882a593Smuzhiyun u8 has_low_soc_alert;
61*4882a593Smuzhiyun u8 rcomp_bytes;
62*4882a593Smuzhiyun u8 has_soc_alert;
63*4882a593Smuzhiyun };
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun static struct chip_data max17040_family[] = {
66*4882a593Smuzhiyun [ID_MAX17040] = {
67*4882a593Smuzhiyun .reset_val = 0x0054,
68*4882a593Smuzhiyun .vcell_shift = 4,
69*4882a593Smuzhiyun .vcell_mul = 1250,
70*4882a593Smuzhiyun .vcell_div = 1,
71*4882a593Smuzhiyun .has_low_soc_alert = 0,
72*4882a593Smuzhiyun .rcomp_bytes = 2,
73*4882a593Smuzhiyun .has_soc_alert = 0,
74*4882a593Smuzhiyun },
75*4882a593Smuzhiyun [ID_MAX17041] = {
76*4882a593Smuzhiyun .reset_val = 0x0054,
77*4882a593Smuzhiyun .vcell_shift = 4,
78*4882a593Smuzhiyun .vcell_mul = 2500,
79*4882a593Smuzhiyun .vcell_div = 1,
80*4882a593Smuzhiyun .has_low_soc_alert = 0,
81*4882a593Smuzhiyun .rcomp_bytes = 2,
82*4882a593Smuzhiyun .has_soc_alert = 0,
83*4882a593Smuzhiyun },
84*4882a593Smuzhiyun [ID_MAX17043] = {
85*4882a593Smuzhiyun .reset_val = 0x0054,
86*4882a593Smuzhiyun .vcell_shift = 4,
87*4882a593Smuzhiyun .vcell_mul = 1250,
88*4882a593Smuzhiyun .vcell_div = 1,
89*4882a593Smuzhiyun .has_low_soc_alert = 1,
90*4882a593Smuzhiyun .rcomp_bytes = 1,
91*4882a593Smuzhiyun .has_soc_alert = 0,
92*4882a593Smuzhiyun },
93*4882a593Smuzhiyun [ID_MAX17044] = {
94*4882a593Smuzhiyun .reset_val = 0x0054,
95*4882a593Smuzhiyun .vcell_shift = 4,
96*4882a593Smuzhiyun .vcell_mul = 2500,
97*4882a593Smuzhiyun .vcell_div = 1,
98*4882a593Smuzhiyun .has_low_soc_alert = 1,
99*4882a593Smuzhiyun .rcomp_bytes = 1,
100*4882a593Smuzhiyun .has_soc_alert = 0,
101*4882a593Smuzhiyun },
102*4882a593Smuzhiyun [ID_MAX17048] = {
103*4882a593Smuzhiyun .reset_val = 0x5400,
104*4882a593Smuzhiyun .vcell_shift = 0,
105*4882a593Smuzhiyun .vcell_mul = 625,
106*4882a593Smuzhiyun .vcell_div = 8,
107*4882a593Smuzhiyun .has_low_soc_alert = 1,
108*4882a593Smuzhiyun .rcomp_bytes = 1,
109*4882a593Smuzhiyun .has_soc_alert = 1,
110*4882a593Smuzhiyun },
111*4882a593Smuzhiyun [ID_MAX17049] = {
112*4882a593Smuzhiyun .reset_val = 0x5400,
113*4882a593Smuzhiyun .vcell_shift = 0,
114*4882a593Smuzhiyun .vcell_mul = 625,
115*4882a593Smuzhiyun .vcell_div = 4,
116*4882a593Smuzhiyun .has_low_soc_alert = 1,
117*4882a593Smuzhiyun .rcomp_bytes = 1,
118*4882a593Smuzhiyun .has_soc_alert = 1,
119*4882a593Smuzhiyun },
120*4882a593Smuzhiyun [ID_MAX17058] = {
121*4882a593Smuzhiyun .reset_val = 0x5400,
122*4882a593Smuzhiyun .vcell_shift = 0,
123*4882a593Smuzhiyun .vcell_mul = 625,
124*4882a593Smuzhiyun .vcell_div = 8,
125*4882a593Smuzhiyun .has_low_soc_alert = 1,
126*4882a593Smuzhiyun .rcomp_bytes = 1,
127*4882a593Smuzhiyun .has_soc_alert = 0,
128*4882a593Smuzhiyun },
129*4882a593Smuzhiyun [ID_MAX17059] = {
130*4882a593Smuzhiyun .reset_val = 0x5400,
131*4882a593Smuzhiyun .vcell_shift = 0,
132*4882a593Smuzhiyun .vcell_mul = 625,
133*4882a593Smuzhiyun .vcell_div = 4,
134*4882a593Smuzhiyun .has_low_soc_alert = 1,
135*4882a593Smuzhiyun .rcomp_bytes = 1,
136*4882a593Smuzhiyun .has_soc_alert = 0,
137*4882a593Smuzhiyun },
138*4882a593Smuzhiyun };
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun struct max17040_chip {
141*4882a593Smuzhiyun struct i2c_client *client;
142*4882a593Smuzhiyun struct regmap *regmap;
143*4882a593Smuzhiyun struct delayed_work work;
144*4882a593Smuzhiyun struct power_supply *battery;
145*4882a593Smuzhiyun struct max17040_platform_data *pdata;
146*4882a593Smuzhiyun struct chip_data data;
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun /* battery capacity */
149*4882a593Smuzhiyun int soc;
150*4882a593Smuzhiyun /* State Of Charge */
151*4882a593Smuzhiyun int status;
152*4882a593Smuzhiyun /* Low alert threshold from 32% to 1% of the State of Charge */
153*4882a593Smuzhiyun u32 low_soc_alert;
154*4882a593Smuzhiyun /* some devices return twice the capacity */
155*4882a593Smuzhiyun bool quirk_double_soc;
156*4882a593Smuzhiyun /* higher 8 bits for 17043+, 16 bits for 17040,41 */
157*4882a593Smuzhiyun u16 rcomp;
158*4882a593Smuzhiyun };
159*4882a593Smuzhiyun
max17040_reset(struct max17040_chip * chip)160*4882a593Smuzhiyun static int max17040_reset(struct max17040_chip *chip)
161*4882a593Smuzhiyun {
162*4882a593Smuzhiyun return regmap_write(chip->regmap, MAX17040_CMD, chip->data.reset_val);
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun
max17040_set_low_soc_alert(struct max17040_chip * chip,u32 level)165*4882a593Smuzhiyun static int max17040_set_low_soc_alert(struct max17040_chip *chip, u32 level)
166*4882a593Smuzhiyun {
167*4882a593Smuzhiyun level = 32 - level * (chip->quirk_double_soc ? 2 : 1);
168*4882a593Smuzhiyun return regmap_update_bits(chip->regmap, MAX17040_CONFIG,
169*4882a593Smuzhiyun MAX17040_ATHD_MASK, level);
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun
max17040_set_soc_alert(struct max17040_chip * chip,bool enable)172*4882a593Smuzhiyun static int max17040_set_soc_alert(struct max17040_chip *chip, bool enable)
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun return regmap_update_bits(chip->regmap, MAX17040_CONFIG,
175*4882a593Smuzhiyun MAX17040_ALSC_MASK, enable ? MAX17040_ALSC_MASK : 0);
176*4882a593Smuzhiyun }
177*4882a593Smuzhiyun
max17040_set_rcomp(struct max17040_chip * chip,u16 rcomp)178*4882a593Smuzhiyun static int max17040_set_rcomp(struct max17040_chip *chip, u16 rcomp)
179*4882a593Smuzhiyun {
180*4882a593Smuzhiyun u16 mask = chip->data.rcomp_bytes == 2 ?
181*4882a593Smuzhiyun 0xffff : MAX17040_CFG_RCOMP_MASK;
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun return regmap_update_bits(chip->regmap, MAX17040_CONFIG, mask, rcomp);
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun
max17040_raw_vcell_to_uvolts(struct max17040_chip * chip,u16 vcell)186*4882a593Smuzhiyun static int max17040_raw_vcell_to_uvolts(struct max17040_chip *chip, u16 vcell)
187*4882a593Smuzhiyun {
188*4882a593Smuzhiyun struct chip_data *d = &chip->data;
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun return (vcell >> d->vcell_shift) * d->vcell_mul / d->vcell_div;
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun
max17040_get_vcell(struct max17040_chip * chip)194*4882a593Smuzhiyun static int max17040_get_vcell(struct max17040_chip *chip)
195*4882a593Smuzhiyun {
196*4882a593Smuzhiyun u32 vcell;
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun regmap_read(chip->regmap, MAX17040_VCELL, &vcell);
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun return max17040_raw_vcell_to_uvolts(chip, vcell);
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun
max17040_get_soc(struct max17040_chip * chip)203*4882a593Smuzhiyun static int max17040_get_soc(struct max17040_chip *chip)
204*4882a593Smuzhiyun {
205*4882a593Smuzhiyun u32 soc;
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun regmap_read(chip->regmap, MAX17040_SOC, &soc);
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun return soc >> (chip->quirk_double_soc ? 9 : 8);
210*4882a593Smuzhiyun }
211*4882a593Smuzhiyun
max17040_get_version(struct max17040_chip * chip)212*4882a593Smuzhiyun static int max17040_get_version(struct max17040_chip *chip)
213*4882a593Smuzhiyun {
214*4882a593Smuzhiyun int ret;
215*4882a593Smuzhiyun u32 version;
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun ret = regmap_read(chip->regmap, MAX17040_VER, &version);
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun return ret ? ret : version;
220*4882a593Smuzhiyun }
221*4882a593Smuzhiyun
max17040_get_online(struct max17040_chip * chip)222*4882a593Smuzhiyun static int max17040_get_online(struct max17040_chip *chip)
223*4882a593Smuzhiyun {
224*4882a593Smuzhiyun return chip->pdata && chip->pdata->battery_online ?
225*4882a593Smuzhiyun chip->pdata->battery_online() : 1;
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun
max17040_get_status(struct max17040_chip * chip)228*4882a593Smuzhiyun static int max17040_get_status(struct max17040_chip *chip)
229*4882a593Smuzhiyun {
230*4882a593Smuzhiyun if (!chip->pdata || !chip->pdata->charger_online
231*4882a593Smuzhiyun || !chip->pdata->charger_enable)
232*4882a593Smuzhiyun return POWER_SUPPLY_STATUS_UNKNOWN;
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun if (max17040_get_soc(chip) > MAX17040_BATTERY_FULL)
235*4882a593Smuzhiyun return POWER_SUPPLY_STATUS_FULL;
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun if (chip->pdata->charger_online())
238*4882a593Smuzhiyun if (chip->pdata->charger_enable())
239*4882a593Smuzhiyun return POWER_SUPPLY_STATUS_CHARGING;
240*4882a593Smuzhiyun else
241*4882a593Smuzhiyun return POWER_SUPPLY_STATUS_NOT_CHARGING;
242*4882a593Smuzhiyun else
243*4882a593Smuzhiyun return POWER_SUPPLY_STATUS_DISCHARGING;
244*4882a593Smuzhiyun }
245*4882a593Smuzhiyun
max17040_get_of_data(struct max17040_chip * chip)246*4882a593Smuzhiyun static int max17040_get_of_data(struct max17040_chip *chip)
247*4882a593Smuzhiyun {
248*4882a593Smuzhiyun struct device *dev = &chip->client->dev;
249*4882a593Smuzhiyun struct chip_data *data = &max17040_family[
250*4882a593Smuzhiyun (uintptr_t) of_device_get_match_data(dev)];
251*4882a593Smuzhiyun int rcomp_len;
252*4882a593Smuzhiyun u8 rcomp[2];
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun chip->quirk_double_soc = device_property_read_bool(dev,
255*4882a593Smuzhiyun "maxim,double-soc");
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun chip->low_soc_alert = MAX17040_ATHD_DEFAULT_POWER_UP;
258*4882a593Smuzhiyun device_property_read_u32(dev,
259*4882a593Smuzhiyun "maxim,alert-low-soc-level",
260*4882a593Smuzhiyun &chip->low_soc_alert);
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun if (chip->low_soc_alert <= 0 ||
263*4882a593Smuzhiyun chip->low_soc_alert > (chip->quirk_double_soc ? 16 : 32)) {
264*4882a593Smuzhiyun dev_err(dev, "maxim,alert-low-soc-level out of bounds\n");
265*4882a593Smuzhiyun return -EINVAL;
266*4882a593Smuzhiyun }
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun rcomp_len = device_property_count_u8(dev, "maxim,rcomp");
269*4882a593Smuzhiyun chip->rcomp = MAX17040_RCOMP_DEFAULT;
270*4882a593Smuzhiyun if (rcomp_len == data->rcomp_bytes) {
271*4882a593Smuzhiyun device_property_read_u8_array(dev, "maxim,rcomp",
272*4882a593Smuzhiyun rcomp, rcomp_len);
273*4882a593Smuzhiyun chip->rcomp = rcomp_len == 2 ?
274*4882a593Smuzhiyun rcomp[0] << 8 | rcomp[1] :
275*4882a593Smuzhiyun rcomp[0] << 8;
276*4882a593Smuzhiyun } else if (rcomp_len > 0) {
277*4882a593Smuzhiyun dev_err(dev, "maxim,rcomp has incorrect length\n");
278*4882a593Smuzhiyun return -EINVAL;
279*4882a593Smuzhiyun }
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun return 0;
282*4882a593Smuzhiyun }
283*4882a593Smuzhiyun
max17040_check_changes(struct max17040_chip * chip)284*4882a593Smuzhiyun static void max17040_check_changes(struct max17040_chip *chip)
285*4882a593Smuzhiyun {
286*4882a593Smuzhiyun chip->soc = max17040_get_soc(chip);
287*4882a593Smuzhiyun chip->status = max17040_get_status(chip);
288*4882a593Smuzhiyun }
289*4882a593Smuzhiyun
max17040_queue_work(struct max17040_chip * chip)290*4882a593Smuzhiyun static void max17040_queue_work(struct max17040_chip *chip)
291*4882a593Smuzhiyun {
292*4882a593Smuzhiyun queue_delayed_work(system_power_efficient_wq, &chip->work,
293*4882a593Smuzhiyun MAX17040_DELAY);
294*4882a593Smuzhiyun }
295*4882a593Smuzhiyun
max17040_stop_work(void * data)296*4882a593Smuzhiyun static void max17040_stop_work(void *data)
297*4882a593Smuzhiyun {
298*4882a593Smuzhiyun struct max17040_chip *chip = data;
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun cancel_delayed_work_sync(&chip->work);
301*4882a593Smuzhiyun }
302*4882a593Smuzhiyun
max17040_work(struct work_struct * work)303*4882a593Smuzhiyun static void max17040_work(struct work_struct *work)
304*4882a593Smuzhiyun {
305*4882a593Smuzhiyun struct max17040_chip *chip;
306*4882a593Smuzhiyun int last_soc, last_status;
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun chip = container_of(work, struct max17040_chip, work.work);
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun /* store SOC and status to check changes */
311*4882a593Smuzhiyun last_soc = chip->soc;
312*4882a593Smuzhiyun last_status = chip->status;
313*4882a593Smuzhiyun max17040_check_changes(chip);
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun /* check changes and send uevent */
316*4882a593Smuzhiyun if (last_soc != chip->soc || last_status != chip->status)
317*4882a593Smuzhiyun power_supply_changed(chip->battery);
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun max17040_queue_work(chip);
320*4882a593Smuzhiyun }
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun /* Returns true if alert cause was SOC change, not low SOC */
max17040_handle_soc_alert(struct max17040_chip * chip)323*4882a593Smuzhiyun static bool max17040_handle_soc_alert(struct max17040_chip *chip)
324*4882a593Smuzhiyun {
325*4882a593Smuzhiyun bool ret = true;
326*4882a593Smuzhiyun u32 data;
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun regmap_read(chip->regmap, MAX17040_STATUS, &data);
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun if (data & MAX17040_STATUS_HD_MASK) {
331*4882a593Smuzhiyun // this alert was caused by low soc
332*4882a593Smuzhiyun ret = false;
333*4882a593Smuzhiyun }
334*4882a593Smuzhiyun if (data & MAX17040_STATUS_SC_MASK) {
335*4882a593Smuzhiyun // soc change bit -- deassert to mark as handled
336*4882a593Smuzhiyun regmap_write(chip->regmap, MAX17040_STATUS,
337*4882a593Smuzhiyun data & ~MAX17040_STATUS_SC_MASK);
338*4882a593Smuzhiyun }
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun return ret;
341*4882a593Smuzhiyun }
342*4882a593Smuzhiyun
max17040_thread_handler(int id,void * dev)343*4882a593Smuzhiyun static irqreturn_t max17040_thread_handler(int id, void *dev)
344*4882a593Smuzhiyun {
345*4882a593Smuzhiyun struct max17040_chip *chip = dev;
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun if (!(chip->data.has_soc_alert && max17040_handle_soc_alert(chip)))
348*4882a593Smuzhiyun dev_warn(&chip->client->dev, "IRQ: Alert battery low level\n");
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun /* read registers */
351*4882a593Smuzhiyun max17040_check_changes(chip);
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun /* send uevent */
354*4882a593Smuzhiyun power_supply_changed(chip->battery);
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun /* reset alert bit */
357*4882a593Smuzhiyun max17040_set_low_soc_alert(chip, chip->low_soc_alert);
358*4882a593Smuzhiyun
359*4882a593Smuzhiyun return IRQ_HANDLED;
360*4882a593Smuzhiyun }
361*4882a593Smuzhiyun
max17040_enable_alert_irq(struct max17040_chip * chip)362*4882a593Smuzhiyun static int max17040_enable_alert_irq(struct max17040_chip *chip)
363*4882a593Smuzhiyun {
364*4882a593Smuzhiyun struct i2c_client *client = chip->client;
365*4882a593Smuzhiyun unsigned int flags;
366*4882a593Smuzhiyun int ret;
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun flags = IRQF_TRIGGER_FALLING | IRQF_ONESHOT;
369*4882a593Smuzhiyun ret = devm_request_threaded_irq(&client->dev, client->irq, NULL,
370*4882a593Smuzhiyun max17040_thread_handler, flags,
371*4882a593Smuzhiyun chip->battery->desc->name, chip);
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun return ret;
374*4882a593Smuzhiyun }
375*4882a593Smuzhiyun
max17040_prop_writeable(struct power_supply * psy,enum power_supply_property psp)376*4882a593Smuzhiyun static int max17040_prop_writeable(struct power_supply *psy,
377*4882a593Smuzhiyun enum power_supply_property psp)
378*4882a593Smuzhiyun {
379*4882a593Smuzhiyun switch (psp) {
380*4882a593Smuzhiyun case POWER_SUPPLY_PROP_CAPACITY_ALERT_MIN:
381*4882a593Smuzhiyun return 1;
382*4882a593Smuzhiyun default:
383*4882a593Smuzhiyun return 0;
384*4882a593Smuzhiyun }
385*4882a593Smuzhiyun }
386*4882a593Smuzhiyun
max17040_set_property(struct power_supply * psy,enum power_supply_property psp,const union power_supply_propval * val)387*4882a593Smuzhiyun static int max17040_set_property(struct power_supply *psy,
388*4882a593Smuzhiyun enum power_supply_property psp,
389*4882a593Smuzhiyun const union power_supply_propval *val)
390*4882a593Smuzhiyun {
391*4882a593Smuzhiyun struct max17040_chip *chip = power_supply_get_drvdata(psy);
392*4882a593Smuzhiyun int ret;
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun switch (psp) {
395*4882a593Smuzhiyun case POWER_SUPPLY_PROP_CAPACITY_ALERT_MIN:
396*4882a593Smuzhiyun /* alert threshold can be programmed from 1% up to 16/32% */
397*4882a593Smuzhiyun if ((val->intval < 1) ||
398*4882a593Smuzhiyun (val->intval > (chip->quirk_double_soc ? 16 : 32))) {
399*4882a593Smuzhiyun ret = -EINVAL;
400*4882a593Smuzhiyun break;
401*4882a593Smuzhiyun }
402*4882a593Smuzhiyun ret = max17040_set_low_soc_alert(chip, val->intval);
403*4882a593Smuzhiyun chip->low_soc_alert = val->intval;
404*4882a593Smuzhiyun break;
405*4882a593Smuzhiyun default:
406*4882a593Smuzhiyun ret = -EINVAL;
407*4882a593Smuzhiyun }
408*4882a593Smuzhiyun
409*4882a593Smuzhiyun return ret;
410*4882a593Smuzhiyun }
411*4882a593Smuzhiyun
max17040_get_property(struct power_supply * psy,enum power_supply_property psp,union power_supply_propval * val)412*4882a593Smuzhiyun static int max17040_get_property(struct power_supply *psy,
413*4882a593Smuzhiyun enum power_supply_property psp,
414*4882a593Smuzhiyun union power_supply_propval *val)
415*4882a593Smuzhiyun {
416*4882a593Smuzhiyun struct max17040_chip *chip = power_supply_get_drvdata(psy);
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun switch (psp) {
419*4882a593Smuzhiyun case POWER_SUPPLY_PROP_STATUS:
420*4882a593Smuzhiyun val->intval = max17040_get_status(chip);
421*4882a593Smuzhiyun break;
422*4882a593Smuzhiyun case POWER_SUPPLY_PROP_ONLINE:
423*4882a593Smuzhiyun val->intval = max17040_get_online(chip);
424*4882a593Smuzhiyun break;
425*4882a593Smuzhiyun case POWER_SUPPLY_PROP_VOLTAGE_NOW:
426*4882a593Smuzhiyun val->intval = max17040_get_vcell(chip);
427*4882a593Smuzhiyun break;
428*4882a593Smuzhiyun case POWER_SUPPLY_PROP_CAPACITY:
429*4882a593Smuzhiyun val->intval = max17040_get_soc(chip);
430*4882a593Smuzhiyun break;
431*4882a593Smuzhiyun case POWER_SUPPLY_PROP_CAPACITY_ALERT_MIN:
432*4882a593Smuzhiyun val->intval = chip->low_soc_alert;
433*4882a593Smuzhiyun break;
434*4882a593Smuzhiyun default:
435*4882a593Smuzhiyun return -EINVAL;
436*4882a593Smuzhiyun }
437*4882a593Smuzhiyun return 0;
438*4882a593Smuzhiyun }
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun static const struct regmap_config max17040_regmap = {
441*4882a593Smuzhiyun .reg_bits = 8,
442*4882a593Smuzhiyun .reg_stride = 2,
443*4882a593Smuzhiyun .val_bits = 16,
444*4882a593Smuzhiyun .val_format_endian = REGMAP_ENDIAN_BIG,
445*4882a593Smuzhiyun };
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun static enum power_supply_property max17040_battery_props[] = {
448*4882a593Smuzhiyun POWER_SUPPLY_PROP_STATUS,
449*4882a593Smuzhiyun POWER_SUPPLY_PROP_ONLINE,
450*4882a593Smuzhiyun POWER_SUPPLY_PROP_VOLTAGE_NOW,
451*4882a593Smuzhiyun POWER_SUPPLY_PROP_CAPACITY,
452*4882a593Smuzhiyun POWER_SUPPLY_PROP_CAPACITY_ALERT_MIN,
453*4882a593Smuzhiyun };
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun static const struct power_supply_desc max17040_battery_desc = {
456*4882a593Smuzhiyun .name = "battery",
457*4882a593Smuzhiyun .type = POWER_SUPPLY_TYPE_BATTERY,
458*4882a593Smuzhiyun .get_property = max17040_get_property,
459*4882a593Smuzhiyun .set_property = max17040_set_property,
460*4882a593Smuzhiyun .property_is_writeable = max17040_prop_writeable,
461*4882a593Smuzhiyun .properties = max17040_battery_props,
462*4882a593Smuzhiyun .num_properties = ARRAY_SIZE(max17040_battery_props),
463*4882a593Smuzhiyun };
464*4882a593Smuzhiyun
max17040_probe(struct i2c_client * client,const struct i2c_device_id * id)465*4882a593Smuzhiyun static int max17040_probe(struct i2c_client *client,
466*4882a593Smuzhiyun const struct i2c_device_id *id)
467*4882a593Smuzhiyun {
468*4882a593Smuzhiyun struct i2c_adapter *adapter = client->adapter;
469*4882a593Smuzhiyun struct power_supply_config psy_cfg = {};
470*4882a593Smuzhiyun struct max17040_chip *chip;
471*4882a593Smuzhiyun enum chip_id chip_id;
472*4882a593Smuzhiyun bool enable_irq = false;
473*4882a593Smuzhiyun int ret;
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE))
476*4882a593Smuzhiyun return -EIO;
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
479*4882a593Smuzhiyun if (!chip)
480*4882a593Smuzhiyun return -ENOMEM;
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun chip->client = client;
483*4882a593Smuzhiyun chip->regmap = devm_regmap_init_i2c(client, &max17040_regmap);
484*4882a593Smuzhiyun chip->pdata = client->dev.platform_data;
485*4882a593Smuzhiyun if (IS_ERR(chip->regmap))
486*4882a593Smuzhiyun return PTR_ERR(chip->regmap);
487*4882a593Smuzhiyun chip_id = (enum chip_id) id->driver_data;
488*4882a593Smuzhiyun if (client->dev.of_node) {
489*4882a593Smuzhiyun ret = max17040_get_of_data(chip);
490*4882a593Smuzhiyun if (ret)
491*4882a593Smuzhiyun return ret;
492*4882a593Smuzhiyun chip_id = (enum chip_id) (uintptr_t)
493*4882a593Smuzhiyun of_device_get_match_data(&client->dev);
494*4882a593Smuzhiyun }
495*4882a593Smuzhiyun chip->data = max17040_family[chip_id];
496*4882a593Smuzhiyun
497*4882a593Smuzhiyun i2c_set_clientdata(client, chip);
498*4882a593Smuzhiyun psy_cfg.drv_data = chip;
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun chip->battery = devm_power_supply_register(&client->dev,
501*4882a593Smuzhiyun &max17040_battery_desc, &psy_cfg);
502*4882a593Smuzhiyun if (IS_ERR(chip->battery)) {
503*4882a593Smuzhiyun dev_err(&client->dev, "failed: power supply register\n");
504*4882a593Smuzhiyun return PTR_ERR(chip->battery);
505*4882a593Smuzhiyun }
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun ret = max17040_get_version(chip);
508*4882a593Smuzhiyun if (ret < 0)
509*4882a593Smuzhiyun return ret;
510*4882a593Smuzhiyun dev_dbg(&chip->client->dev, "MAX17040 Fuel-Gauge Ver 0x%x\n", ret);
511*4882a593Smuzhiyun
512*4882a593Smuzhiyun if (chip_id == ID_MAX17040 || chip_id == ID_MAX17041)
513*4882a593Smuzhiyun max17040_reset(chip);
514*4882a593Smuzhiyun
515*4882a593Smuzhiyun max17040_set_rcomp(chip, chip->rcomp);
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun /* check interrupt */
518*4882a593Smuzhiyun if (client->irq && chip->data.has_low_soc_alert) {
519*4882a593Smuzhiyun ret = max17040_set_low_soc_alert(chip, chip->low_soc_alert);
520*4882a593Smuzhiyun if (ret) {
521*4882a593Smuzhiyun dev_err(&client->dev,
522*4882a593Smuzhiyun "Failed to set low SOC alert: err %d\n", ret);
523*4882a593Smuzhiyun return ret;
524*4882a593Smuzhiyun }
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun enable_irq = true;
527*4882a593Smuzhiyun }
528*4882a593Smuzhiyun
529*4882a593Smuzhiyun if (client->irq && chip->data.has_soc_alert) {
530*4882a593Smuzhiyun ret = max17040_set_soc_alert(chip, 1);
531*4882a593Smuzhiyun if (ret) {
532*4882a593Smuzhiyun dev_err(&client->dev,
533*4882a593Smuzhiyun "Failed to set SOC alert: err %d\n", ret);
534*4882a593Smuzhiyun return ret;
535*4882a593Smuzhiyun }
536*4882a593Smuzhiyun enable_irq = true;
537*4882a593Smuzhiyun } else {
538*4882a593Smuzhiyun /* soc alerts negate the need for polling */
539*4882a593Smuzhiyun INIT_DEFERRABLE_WORK(&chip->work, max17040_work);
540*4882a593Smuzhiyun ret = devm_add_action(&client->dev, max17040_stop_work, chip);
541*4882a593Smuzhiyun if (ret)
542*4882a593Smuzhiyun return ret;
543*4882a593Smuzhiyun max17040_queue_work(chip);
544*4882a593Smuzhiyun }
545*4882a593Smuzhiyun
546*4882a593Smuzhiyun if (enable_irq) {
547*4882a593Smuzhiyun ret = max17040_enable_alert_irq(chip);
548*4882a593Smuzhiyun if (ret) {
549*4882a593Smuzhiyun client->irq = 0;
550*4882a593Smuzhiyun dev_warn(&client->dev,
551*4882a593Smuzhiyun "Failed to get IRQ err %d\n", ret);
552*4882a593Smuzhiyun }
553*4882a593Smuzhiyun }
554*4882a593Smuzhiyun
555*4882a593Smuzhiyun return 0;
556*4882a593Smuzhiyun }
557*4882a593Smuzhiyun
558*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
559*4882a593Smuzhiyun
max17040_suspend(struct device * dev)560*4882a593Smuzhiyun static int max17040_suspend(struct device *dev)
561*4882a593Smuzhiyun {
562*4882a593Smuzhiyun struct i2c_client *client = to_i2c_client(dev);
563*4882a593Smuzhiyun struct max17040_chip *chip = i2c_get_clientdata(client);
564*4882a593Smuzhiyun
565*4882a593Smuzhiyun if (client->irq && chip->data.has_soc_alert)
566*4882a593Smuzhiyun // disable soc alert to prevent wakeup
567*4882a593Smuzhiyun max17040_set_soc_alert(chip, 0);
568*4882a593Smuzhiyun else
569*4882a593Smuzhiyun cancel_delayed_work(&chip->work);
570*4882a593Smuzhiyun
571*4882a593Smuzhiyun if (client->irq && device_may_wakeup(dev))
572*4882a593Smuzhiyun enable_irq_wake(client->irq);
573*4882a593Smuzhiyun
574*4882a593Smuzhiyun return 0;
575*4882a593Smuzhiyun }
576*4882a593Smuzhiyun
max17040_resume(struct device * dev)577*4882a593Smuzhiyun static int max17040_resume(struct device *dev)
578*4882a593Smuzhiyun {
579*4882a593Smuzhiyun struct i2c_client *client = to_i2c_client(dev);
580*4882a593Smuzhiyun struct max17040_chip *chip = i2c_get_clientdata(client);
581*4882a593Smuzhiyun
582*4882a593Smuzhiyun if (client->irq && device_may_wakeup(dev))
583*4882a593Smuzhiyun disable_irq_wake(client->irq);
584*4882a593Smuzhiyun
585*4882a593Smuzhiyun if (client->irq && chip->data.has_soc_alert)
586*4882a593Smuzhiyun max17040_set_soc_alert(chip, 1);
587*4882a593Smuzhiyun else
588*4882a593Smuzhiyun max17040_queue_work(chip);
589*4882a593Smuzhiyun
590*4882a593Smuzhiyun return 0;
591*4882a593Smuzhiyun }
592*4882a593Smuzhiyun
593*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(max17040_pm_ops, max17040_suspend, max17040_resume);
594*4882a593Smuzhiyun #define MAX17040_PM_OPS (&max17040_pm_ops)
595*4882a593Smuzhiyun
596*4882a593Smuzhiyun #else
597*4882a593Smuzhiyun
598*4882a593Smuzhiyun #define MAX17040_PM_OPS NULL
599*4882a593Smuzhiyun
600*4882a593Smuzhiyun #endif /* CONFIG_PM_SLEEP */
601*4882a593Smuzhiyun
602*4882a593Smuzhiyun static const struct i2c_device_id max17040_id[] = {
603*4882a593Smuzhiyun { "max17040", ID_MAX17040 },
604*4882a593Smuzhiyun { "max17041", ID_MAX17041 },
605*4882a593Smuzhiyun { "max17043", ID_MAX17043 },
606*4882a593Smuzhiyun { "max77836-battery", ID_MAX17043 },
607*4882a593Smuzhiyun { "max17044", ID_MAX17044 },
608*4882a593Smuzhiyun { "max17048", ID_MAX17048 },
609*4882a593Smuzhiyun { "max17049", ID_MAX17049 },
610*4882a593Smuzhiyun { "max17058", ID_MAX17058 },
611*4882a593Smuzhiyun { "max17059", ID_MAX17059 },
612*4882a593Smuzhiyun { /* sentinel */ }
613*4882a593Smuzhiyun };
614*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, max17040_id);
615*4882a593Smuzhiyun
616*4882a593Smuzhiyun static const struct of_device_id max17040_of_match[] = {
617*4882a593Smuzhiyun { .compatible = "maxim,max17040", .data = (void *) ID_MAX17040 },
618*4882a593Smuzhiyun { .compatible = "maxim,max17041", .data = (void *) ID_MAX17041 },
619*4882a593Smuzhiyun { .compatible = "maxim,max17043", .data = (void *) ID_MAX17043 },
620*4882a593Smuzhiyun { .compatible = "maxim,max77836-battery", .data = (void *) ID_MAX17043 },
621*4882a593Smuzhiyun { .compatible = "maxim,max17044", .data = (void *) ID_MAX17044 },
622*4882a593Smuzhiyun { .compatible = "maxim,max17048", .data = (void *) ID_MAX17048 },
623*4882a593Smuzhiyun { .compatible = "maxim,max17049", .data = (void *) ID_MAX17049 },
624*4882a593Smuzhiyun { .compatible = "maxim,max17058", .data = (void *) ID_MAX17058 },
625*4882a593Smuzhiyun { .compatible = "maxim,max17059", .data = (void *) ID_MAX17059 },
626*4882a593Smuzhiyun { /* sentinel */ },
627*4882a593Smuzhiyun };
628*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, max17040_of_match);
629*4882a593Smuzhiyun
630*4882a593Smuzhiyun static struct i2c_driver max17040_i2c_driver = {
631*4882a593Smuzhiyun .driver = {
632*4882a593Smuzhiyun .name = "max17040",
633*4882a593Smuzhiyun .of_match_table = max17040_of_match,
634*4882a593Smuzhiyun .pm = MAX17040_PM_OPS,
635*4882a593Smuzhiyun },
636*4882a593Smuzhiyun .probe = max17040_probe,
637*4882a593Smuzhiyun .id_table = max17040_id,
638*4882a593Smuzhiyun };
639*4882a593Smuzhiyun module_i2c_driver(max17040_i2c_driver);
640*4882a593Smuzhiyun
641*4882a593Smuzhiyun MODULE_AUTHOR("Minkyu Kang <mk7.kang@samsung.com>");
642*4882a593Smuzhiyun MODULE_DESCRIPTION("MAX17040 Fuel Gauge");
643*4882a593Smuzhiyun MODULE_LICENSE("GPL");
644