1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Maxim MAX14656 / AL32 USB Charger Detector driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2014 LG Electronics, Inc
6*4882a593Smuzhiyun * Copyright (C) 2016 Alexander Kurz <akurz@blala.de>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Components from Maxim AL32 Charger detection Driver for MX50 Yoshi Board
9*4882a593Smuzhiyun * Copyright (C) Amazon Technologies Inc. All rights reserved.
10*4882a593Smuzhiyun * Manish Lachwani (lachwani@lab126.com)
11*4882a593Smuzhiyun */
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/init.h>
14*4882a593Smuzhiyun #include <linux/delay.h>
15*4882a593Smuzhiyun #include <linux/i2c.h>
16*4882a593Smuzhiyun #include <linux/interrupt.h>
17*4882a593Smuzhiyun #include <linux/slab.h>
18*4882a593Smuzhiyun #include <linux/gpio.h>
19*4882a593Smuzhiyun #include <linux/of_gpio.h>
20*4882a593Smuzhiyun #include <linux/of_device.h>
21*4882a593Smuzhiyun #include <linux/workqueue.h>
22*4882a593Smuzhiyun #include <linux/power_supply.h>
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #define MAX14656_MANUFACTURER "Maxim Integrated"
25*4882a593Smuzhiyun #define MAX14656_NAME "max14656"
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #define MAX14656_DEVICE_ID 0x00
28*4882a593Smuzhiyun #define MAX14656_INTERRUPT_1 0x01
29*4882a593Smuzhiyun #define MAX14656_INTERRUPT_2 0x02
30*4882a593Smuzhiyun #define MAX14656_STATUS_1 0x03
31*4882a593Smuzhiyun #define MAX14656_STATUS_2 0x04
32*4882a593Smuzhiyun #define MAX14656_INTMASK_1 0x05
33*4882a593Smuzhiyun #define MAX14656_INTMASK_2 0x06
34*4882a593Smuzhiyun #define MAX14656_CONTROL_1 0x07
35*4882a593Smuzhiyun #define MAX14656_CONTROL_2 0x08
36*4882a593Smuzhiyun #define MAX14656_CONTROL_3 0x09
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun #define DEVICE_VENDOR_MASK 0xf0
39*4882a593Smuzhiyun #define DEVICE_REV_MASK 0x0f
40*4882a593Smuzhiyun #define INT_EN_REG_MASK BIT(4)
41*4882a593Smuzhiyun #define CHG_TYPE_INT_MASK BIT(0)
42*4882a593Smuzhiyun #define STATUS1_VB_VALID_MASK BIT(4)
43*4882a593Smuzhiyun #define STATUS1_CHG_TYPE_MASK 0xf
44*4882a593Smuzhiyun #define INT1_DCD_TIMEOUT_MASK BIT(7)
45*4882a593Smuzhiyun #define CONTROL1_DEFAULT 0x0d
46*4882a593Smuzhiyun #define CONTROL1_INT_EN BIT(4)
47*4882a593Smuzhiyun #define CONTROL1_INT_ACTIVE_HIGH BIT(5)
48*4882a593Smuzhiyun #define CONTROL1_EDGE BIT(7)
49*4882a593Smuzhiyun #define CONTROL2_DEFAULT 0x8e
50*4882a593Smuzhiyun #define CONTROL2_ADC_EN BIT(0)
51*4882a593Smuzhiyun #define CONTROL3_DEFAULT 0x8d
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun enum max14656_chg_type {
54*4882a593Smuzhiyun MAX14656_NO_CHARGER = 0,
55*4882a593Smuzhiyun MAX14656_SDP_CHARGER,
56*4882a593Smuzhiyun MAX14656_CDP_CHARGER,
57*4882a593Smuzhiyun MAX14656_DCP_CHARGER,
58*4882a593Smuzhiyun MAX14656_APPLE_500MA_CHARGER,
59*4882a593Smuzhiyun MAX14656_APPLE_1A_CHARGER,
60*4882a593Smuzhiyun MAX14656_APPLE_2A_CHARGER,
61*4882a593Smuzhiyun MAX14656_SPECIAL_500MA_CHARGER,
62*4882a593Smuzhiyun MAX14656_APPLE_12W,
63*4882a593Smuzhiyun MAX14656_CHARGER_LAST
64*4882a593Smuzhiyun };
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun static const struct max14656_chg_type_props {
67*4882a593Smuzhiyun enum power_supply_type type;
68*4882a593Smuzhiyun } chg_type_props[] = {
69*4882a593Smuzhiyun { POWER_SUPPLY_TYPE_UNKNOWN },
70*4882a593Smuzhiyun { POWER_SUPPLY_TYPE_USB },
71*4882a593Smuzhiyun { POWER_SUPPLY_TYPE_USB_CDP },
72*4882a593Smuzhiyun { POWER_SUPPLY_TYPE_USB_DCP },
73*4882a593Smuzhiyun { POWER_SUPPLY_TYPE_USB_DCP },
74*4882a593Smuzhiyun { POWER_SUPPLY_TYPE_USB_DCP },
75*4882a593Smuzhiyun { POWER_SUPPLY_TYPE_USB_DCP },
76*4882a593Smuzhiyun { POWER_SUPPLY_TYPE_USB_DCP },
77*4882a593Smuzhiyun { POWER_SUPPLY_TYPE_USB },
78*4882a593Smuzhiyun };
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun struct max14656_chip {
81*4882a593Smuzhiyun struct i2c_client *client;
82*4882a593Smuzhiyun struct power_supply *detect_psy;
83*4882a593Smuzhiyun struct power_supply_desc psy_desc;
84*4882a593Smuzhiyun struct delayed_work irq_work;
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun int irq;
87*4882a593Smuzhiyun int online;
88*4882a593Smuzhiyun };
89*4882a593Smuzhiyun
max14656_read_reg(struct i2c_client * client,int reg,u8 * val)90*4882a593Smuzhiyun static int max14656_read_reg(struct i2c_client *client, int reg, u8 *val)
91*4882a593Smuzhiyun {
92*4882a593Smuzhiyun s32 ret;
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun ret = i2c_smbus_read_byte_data(client, reg);
95*4882a593Smuzhiyun if (ret < 0) {
96*4882a593Smuzhiyun dev_err(&client->dev,
97*4882a593Smuzhiyun "i2c read fail: can't read from %02x: %d\n",
98*4882a593Smuzhiyun reg, ret);
99*4882a593Smuzhiyun return ret;
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun *val = ret;
102*4882a593Smuzhiyun return 0;
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun
max14656_write_reg(struct i2c_client * client,int reg,u8 val)105*4882a593Smuzhiyun static int max14656_write_reg(struct i2c_client *client, int reg, u8 val)
106*4882a593Smuzhiyun {
107*4882a593Smuzhiyun s32 ret;
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun ret = i2c_smbus_write_byte_data(client, reg, val);
110*4882a593Smuzhiyun if (ret < 0) {
111*4882a593Smuzhiyun dev_err(&client->dev,
112*4882a593Smuzhiyun "i2c write fail: can't write %02x to %02x: %d\n",
113*4882a593Smuzhiyun val, reg, ret);
114*4882a593Smuzhiyun return ret;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun return 0;
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun
max14656_read_block_reg(struct i2c_client * client,u8 reg,u8 length,u8 * val)119*4882a593Smuzhiyun static int max14656_read_block_reg(struct i2c_client *client, u8 reg,
120*4882a593Smuzhiyun u8 length, u8 *val)
121*4882a593Smuzhiyun {
122*4882a593Smuzhiyun int ret;
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun ret = i2c_smbus_read_i2c_block_data(client, reg, length, val);
125*4882a593Smuzhiyun if (ret < 0) {
126*4882a593Smuzhiyun dev_err(&client->dev, "failed to block read reg 0x%x: %d\n",
127*4882a593Smuzhiyun reg, ret);
128*4882a593Smuzhiyun return ret;
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun return 0;
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun #define REG_TOTAL_NUM 5
max14656_irq_worker(struct work_struct * work)135*4882a593Smuzhiyun static void max14656_irq_worker(struct work_struct *work)
136*4882a593Smuzhiyun {
137*4882a593Smuzhiyun struct max14656_chip *chip =
138*4882a593Smuzhiyun container_of(work, struct max14656_chip, irq_work.work);
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun u8 buf[REG_TOTAL_NUM];
141*4882a593Smuzhiyun u8 chg_type;
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun max14656_read_block_reg(chip->client, MAX14656_DEVICE_ID,
144*4882a593Smuzhiyun REG_TOTAL_NUM, buf);
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun if ((buf[MAX14656_STATUS_1] & STATUS1_VB_VALID_MASK) &&
147*4882a593Smuzhiyun (buf[MAX14656_STATUS_1] & STATUS1_CHG_TYPE_MASK)) {
148*4882a593Smuzhiyun chg_type = buf[MAX14656_STATUS_1] & STATUS1_CHG_TYPE_MASK;
149*4882a593Smuzhiyun if (chg_type < MAX14656_CHARGER_LAST)
150*4882a593Smuzhiyun chip->psy_desc.type = chg_type_props[chg_type].type;
151*4882a593Smuzhiyun else
152*4882a593Smuzhiyun chip->psy_desc.type = POWER_SUPPLY_TYPE_UNKNOWN;
153*4882a593Smuzhiyun chip->online = 1;
154*4882a593Smuzhiyun } else {
155*4882a593Smuzhiyun chip->online = 0;
156*4882a593Smuzhiyun chip->psy_desc.type = POWER_SUPPLY_TYPE_UNKNOWN;
157*4882a593Smuzhiyun }
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun power_supply_changed(chip->detect_psy);
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun
max14656_irq(int irq,void * dev_id)162*4882a593Smuzhiyun static irqreturn_t max14656_irq(int irq, void *dev_id)
163*4882a593Smuzhiyun {
164*4882a593Smuzhiyun struct max14656_chip *chip = dev_id;
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun schedule_delayed_work(&chip->irq_work, msecs_to_jiffies(100));
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun return IRQ_HANDLED;
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun
max14656_hw_init(struct max14656_chip * chip)171*4882a593Smuzhiyun static int max14656_hw_init(struct max14656_chip *chip)
172*4882a593Smuzhiyun {
173*4882a593Smuzhiyun uint8_t val = 0;
174*4882a593Smuzhiyun uint8_t rev;
175*4882a593Smuzhiyun struct i2c_client *client = chip->client;
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun if (max14656_read_reg(client, MAX14656_DEVICE_ID, &val))
178*4882a593Smuzhiyun return -ENODEV;
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun if ((val & DEVICE_VENDOR_MASK) != 0x20) {
181*4882a593Smuzhiyun dev_err(&client->dev, "wrong vendor ID %d\n",
182*4882a593Smuzhiyun ((val & DEVICE_VENDOR_MASK) >> 4));
183*4882a593Smuzhiyun return -ENODEV;
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun rev = val & DEVICE_REV_MASK;
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun /* Turn on ADC_EN */
188*4882a593Smuzhiyun if (max14656_write_reg(client, MAX14656_CONTROL_2, CONTROL2_ADC_EN))
189*4882a593Smuzhiyun return -EINVAL;
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun /* turn on interrupts and low power mode */
192*4882a593Smuzhiyun if (max14656_write_reg(client, MAX14656_CONTROL_1,
193*4882a593Smuzhiyun CONTROL1_DEFAULT |
194*4882a593Smuzhiyun CONTROL1_INT_EN |
195*4882a593Smuzhiyun CONTROL1_INT_ACTIVE_HIGH |
196*4882a593Smuzhiyun CONTROL1_EDGE))
197*4882a593Smuzhiyun return -EINVAL;
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun if (max14656_write_reg(client, MAX14656_INTMASK_1, 0x3))
200*4882a593Smuzhiyun return -EINVAL;
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun if (max14656_write_reg(client, MAX14656_INTMASK_2, 0x1))
203*4882a593Smuzhiyun return -EINVAL;
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun dev_info(&client->dev, "detected revision %d\n", rev);
206*4882a593Smuzhiyun return 0;
207*4882a593Smuzhiyun }
208*4882a593Smuzhiyun
max14656_get_property(struct power_supply * psy,enum power_supply_property psp,union power_supply_propval * val)209*4882a593Smuzhiyun static int max14656_get_property(struct power_supply *psy,
210*4882a593Smuzhiyun enum power_supply_property psp,
211*4882a593Smuzhiyun union power_supply_propval *val)
212*4882a593Smuzhiyun {
213*4882a593Smuzhiyun struct max14656_chip *chip = power_supply_get_drvdata(psy);
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun switch (psp) {
216*4882a593Smuzhiyun case POWER_SUPPLY_PROP_ONLINE:
217*4882a593Smuzhiyun val->intval = chip->online;
218*4882a593Smuzhiyun break;
219*4882a593Smuzhiyun case POWER_SUPPLY_PROP_MODEL_NAME:
220*4882a593Smuzhiyun val->strval = MAX14656_NAME;
221*4882a593Smuzhiyun break;
222*4882a593Smuzhiyun case POWER_SUPPLY_PROP_MANUFACTURER:
223*4882a593Smuzhiyun val->strval = MAX14656_MANUFACTURER;
224*4882a593Smuzhiyun break;
225*4882a593Smuzhiyun default:
226*4882a593Smuzhiyun return -EINVAL;
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun return 0;
230*4882a593Smuzhiyun }
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun static enum power_supply_property max14656_battery_props[] = {
233*4882a593Smuzhiyun POWER_SUPPLY_PROP_ONLINE,
234*4882a593Smuzhiyun POWER_SUPPLY_PROP_MODEL_NAME,
235*4882a593Smuzhiyun POWER_SUPPLY_PROP_MANUFACTURER,
236*4882a593Smuzhiyun };
237*4882a593Smuzhiyun
stop_irq_work(void * data)238*4882a593Smuzhiyun static void stop_irq_work(void *data)
239*4882a593Smuzhiyun {
240*4882a593Smuzhiyun struct max14656_chip *chip = data;
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun cancel_delayed_work_sync(&chip->irq_work);
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun
max14656_probe(struct i2c_client * client,const struct i2c_device_id * id)246*4882a593Smuzhiyun static int max14656_probe(struct i2c_client *client,
247*4882a593Smuzhiyun const struct i2c_device_id *id)
248*4882a593Smuzhiyun {
249*4882a593Smuzhiyun struct i2c_adapter *adapter = client->adapter;
250*4882a593Smuzhiyun struct device *dev = &client->dev;
251*4882a593Smuzhiyun struct power_supply_config psy_cfg = {};
252*4882a593Smuzhiyun struct max14656_chip *chip;
253*4882a593Smuzhiyun int irq = client->irq;
254*4882a593Smuzhiyun int ret = 0;
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun if (irq <= 0) {
257*4882a593Smuzhiyun dev_err(dev, "invalid irq number: %d\n", irq);
258*4882a593Smuzhiyun return -ENODEV;
259*4882a593Smuzhiyun }
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
262*4882a593Smuzhiyun dev_err(dev, "No support for SMBUS_BYTE_DATA\n");
263*4882a593Smuzhiyun return -ENODEV;
264*4882a593Smuzhiyun }
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
267*4882a593Smuzhiyun if (!chip)
268*4882a593Smuzhiyun return -ENOMEM;
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun psy_cfg.drv_data = chip;
271*4882a593Smuzhiyun chip->client = client;
272*4882a593Smuzhiyun chip->online = 0;
273*4882a593Smuzhiyun chip->psy_desc.name = MAX14656_NAME;
274*4882a593Smuzhiyun chip->psy_desc.type = POWER_SUPPLY_TYPE_UNKNOWN;
275*4882a593Smuzhiyun chip->psy_desc.properties = max14656_battery_props;
276*4882a593Smuzhiyun chip->psy_desc.num_properties = ARRAY_SIZE(max14656_battery_props);
277*4882a593Smuzhiyun chip->psy_desc.get_property = max14656_get_property;
278*4882a593Smuzhiyun chip->irq = irq;
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun ret = max14656_hw_init(chip);
281*4882a593Smuzhiyun if (ret)
282*4882a593Smuzhiyun return -ENODEV;
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun chip->detect_psy = devm_power_supply_register(dev,
285*4882a593Smuzhiyun &chip->psy_desc, &psy_cfg);
286*4882a593Smuzhiyun if (IS_ERR(chip->detect_psy)) {
287*4882a593Smuzhiyun dev_err(dev, "power_supply_register failed\n");
288*4882a593Smuzhiyun return -EINVAL;
289*4882a593Smuzhiyun }
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun INIT_DELAYED_WORK(&chip->irq_work, max14656_irq_worker);
292*4882a593Smuzhiyun ret = devm_add_action(dev, stop_irq_work, chip);
293*4882a593Smuzhiyun if (ret) {
294*4882a593Smuzhiyun dev_err(dev, "devm_add_action %d failed\n", ret);
295*4882a593Smuzhiyun return ret;
296*4882a593Smuzhiyun }
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun ret = devm_request_irq(dev, chip->irq, max14656_irq,
299*4882a593Smuzhiyun IRQF_TRIGGER_FALLING,
300*4882a593Smuzhiyun MAX14656_NAME, chip);
301*4882a593Smuzhiyun if (ret) {
302*4882a593Smuzhiyun dev_err(dev, "request_irq %d failed\n", chip->irq);
303*4882a593Smuzhiyun return -EINVAL;
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun enable_irq_wake(chip->irq);
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun schedule_delayed_work(&chip->irq_work, msecs_to_jiffies(2000));
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun return 0;
310*4882a593Smuzhiyun }
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun static const struct i2c_device_id max14656_id[] = {
313*4882a593Smuzhiyun { "max14656", 0 },
314*4882a593Smuzhiyun {}
315*4882a593Smuzhiyun };
316*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, max14656_id);
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun static const struct of_device_id max14656_match_table[] = {
319*4882a593Smuzhiyun { .compatible = "maxim,max14656", },
320*4882a593Smuzhiyun {}
321*4882a593Smuzhiyun };
322*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, max14656_match_table);
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun static struct i2c_driver max14656_i2c_driver = {
325*4882a593Smuzhiyun .driver = {
326*4882a593Smuzhiyun .name = "max14656",
327*4882a593Smuzhiyun .of_match_table = max14656_match_table,
328*4882a593Smuzhiyun },
329*4882a593Smuzhiyun .probe = max14656_probe,
330*4882a593Smuzhiyun .id_table = max14656_id,
331*4882a593Smuzhiyun };
332*4882a593Smuzhiyun module_i2c_driver(max14656_i2c_driver);
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun MODULE_DESCRIPTION("MAX14656 USB charger detector");
335*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
336