xref: /OK3568_Linux_fs/kernel/drivers/power/supply/cw221x_battery.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Chrager driver for cw221x
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Author: Xu Shengfei <xsf@rock-chips.com>
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun #include <linux/delay.h>
10*4882a593Smuzhiyun #include <linux/init.h>
11*4882a593Smuzhiyun #include <linux/i2c.h>
12*4882a593Smuzhiyun #include <linux/kernel.h>
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun #include <linux/platform_device.h>
15*4882a593Smuzhiyun #include <linux/power_supply.h>
16*4882a593Smuzhiyun #include <linux/sizes.h>
17*4882a593Smuzhiyun #include <linux/time.h>
18*4882a593Smuzhiyun #include <linux/workqueue.h>
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun /* Module parameters. */
21*4882a593Smuzhiyun static int debug;
22*4882a593Smuzhiyun module_param_named(debug, debug, int, 0644);
23*4882a593Smuzhiyun MODULE_PARM_DESC(debug, "Set to one to enable debugging messages.");
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #define cw_printk(fmt, arg...)	\
26*4882a593Smuzhiyun 	{	\
27*4882a593Smuzhiyun 		if (debug)	\
28*4882a593Smuzhiyun 			pr_info("FG_CW221X: %s-%d:" fmt, __func__, __LINE__, ##arg);	\
29*4882a593Smuzhiyun 	}
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun #define CW_PROPERTIES "cw221X-bat"
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun #define REG_CHIP_ID		0x00
34*4882a593Smuzhiyun #define REG_VCELL_H		0x02
35*4882a593Smuzhiyun #define REG_VCELL_L		0x03
36*4882a593Smuzhiyun #define REG_SOC_INT		0x04
37*4882a593Smuzhiyun #define REG_SOC_DECIMAL		0x05
38*4882a593Smuzhiyun #define REG_TEMP		0x06
39*4882a593Smuzhiyun #define REG_MODE_CONFIG		0x08
40*4882a593Smuzhiyun #define REG_GPIO_CONFIG		0x0A
41*4882a593Smuzhiyun #define REG_SOC_ALERT		0x0B
42*4882a593Smuzhiyun #define REG_TEMP_MAX		0x0C
43*4882a593Smuzhiyun #define REG_TEMP_MIN		0x0D
44*4882a593Smuzhiyun #define REG_CURRENT_H		0x0E
45*4882a593Smuzhiyun #define REG_CURRENT_L		0x0F
46*4882a593Smuzhiyun #define REG_T_HOST_H		0xA0
47*4882a593Smuzhiyun #define REG_T_HOST_L		0xA1
48*4882a593Smuzhiyun #define REG_USER_CONF		0xA2
49*4882a593Smuzhiyun #define REG_CYCLE_H		0xA4
50*4882a593Smuzhiyun #define REG_CYCLE_L		0xA5
51*4882a593Smuzhiyun #define REG_SOH			0xA6
52*4882a593Smuzhiyun #define REG_IC_STATE		0xA7
53*4882a593Smuzhiyun #define REG_FW_VERSION		0xAB
54*4882a593Smuzhiyun #define REG_BAT_PROFILE		0x10
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun #define CONFIG_MODE_RESTART	0x30
57*4882a593Smuzhiyun #define CONFIG_MODE_ACTIVE	0x00
58*4882a593Smuzhiyun #define CONFIG_MODE_SLEEP	0xF0
59*4882a593Smuzhiyun #define CONFIG_UPDATE_FLG	0x80
60*4882a593Smuzhiyun #define IC_VCHIP_ID		0xA0
61*4882a593Smuzhiyun #define IC_READY_MARK		0x0C
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun #define GPIO_ENABLE_MIN_TEMP	0
64*4882a593Smuzhiyun #define GPIO_ENABLE_MAX_TEMP	0
65*4882a593Smuzhiyun #define GPIO_ENABLE_SOC_CHANGE		0
66*4882a593Smuzhiyun #define GPIO_SOC_IRQ_VALUE		0x0 /* 0x7F */
67*4882a593Smuzhiyun #define DEFINED_MAX_TEMP		45
68*4882a593Smuzhiyun #define DEFINED_MIN_TEMP		0
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun #define CWFG_NAME			"cw221X"
71*4882a593Smuzhiyun #define SIZE_OF_PROFILE			80
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun /* mhom rsense * 1000 for convenience calculation */
74*4882a593Smuzhiyun #define USER_RSENSE			1500
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun #define queue_delayed_work_time		5000
77*4882a593Smuzhiyun #define queue_start_work_time		50
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun #define CW_SLEEP_20MS			20
80*4882a593Smuzhiyun #define CW_SLEEP_10MS			10
81*4882a593Smuzhiyun #define CW_UI_FULL			100
82*4882a593Smuzhiyun #define COMPLEMENT_CODE_U16		0x8000
83*4882a593Smuzhiyun #define CW_SLEEP_100MS			100
84*4882a593Smuzhiyun #define CW_SLEEP_200MS			200
85*4882a593Smuzhiyun #define CW_SLEEP_COUNTS			50
86*4882a593Smuzhiyun #define CW_TRUE				1
87*4882a593Smuzhiyun #define CW_RETRY_COUNT			3
88*4882a593Smuzhiyun #define CW_VOL_UNIT			1000
89*4882a593Smuzhiyun #define CW_LOW_VOLTAGE_REF		2500
90*4882a593Smuzhiyun #define CW_LOW_VOLTAGE			3000
91*4882a593Smuzhiyun #define CW_LOW_VOLTAGE_STEP		10
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun #define CW221X_NOT_ACTIVE		1
94*4882a593Smuzhiyun #define CW221X_PROFILE_NOT_READY	2
95*4882a593Smuzhiyun #define CW221X_PROFILE_NEED_UPDATE	3
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun #define CW2215_MARK			0x80
98*4882a593Smuzhiyun #define CW2217_MARK			0x40
99*4882a593Smuzhiyun #define CW2218_MARK			0x00
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun static unsigned char config_profile_info[SIZE_OF_PROFILE] = {
102*4882a593Smuzhiyun 	0x5A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xB2,
103*4882a593Smuzhiyun 	0xC2, 0xCA, 0xC2, 0xBD, 0x9C, 0x5C, 0x38, 0xFF, 0xFF, 0xC4,
104*4882a593Smuzhiyun 	0x86, 0x74, 0x60, 0x55, 0x4F, 0x4D, 0x4B, 0x80, 0xC0, 0xDB,
105*4882a593Smuzhiyun 	0xCD, 0xD0, 0xCE, 0xD2, 0xD3, 0xD2, 0xD0, 0xCE, 0xC3, 0xD5,
106*4882a593Smuzhiyun 	0xB9, 0xC9, 0xC5, 0xA3, 0x92, 0x8A, 0x80, 0x72, 0x63, 0x62,
107*4882a593Smuzhiyun 	0x74, 0x90, 0xA6, 0x7E, 0x5F, 0x48, 0x80, 0x00, 0xAB, 0x10,
108*4882a593Smuzhiyun 	0x00, 0xA1, 0xFB, 0x00, 0x00, 0x00, 0x64, 0x1E, 0xB1, 0x04,
109*4882a593Smuzhiyun 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x4D,
110*4882a593Smuzhiyun };
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun struct cw_battery {
113*4882a593Smuzhiyun 	struct i2c_client *client;
114*4882a593Smuzhiyun 	struct device *dev;
115*4882a593Smuzhiyun 	struct workqueue_struct *cwfg_workqueue;
116*4882a593Smuzhiyun 	struct delayed_work battery_delay_work;
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun 	struct power_supply *cw_bat;
119*4882a593Smuzhiyun 	u8 *bat_profile;
120*4882a593Smuzhiyun 	int chip_id;
121*4882a593Smuzhiyun 	int voltage;
122*4882a593Smuzhiyun 	int ic_soc_h;
123*4882a593Smuzhiyun 	int ic_soc_l;
124*4882a593Smuzhiyun 	int ui_soc;
125*4882a593Smuzhiyun 	int temp;
126*4882a593Smuzhiyun 	long cw_current;
127*4882a593Smuzhiyun 	int cycle;
128*4882a593Smuzhiyun 	int soh;
129*4882a593Smuzhiyun 	int fw_version;
130*4882a593Smuzhiyun };
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun /* CW221X iic read function */
cw_read(struct i2c_client * client,unsigned char reg,unsigned char buf[])133*4882a593Smuzhiyun static int cw_read(struct i2c_client *client,
134*4882a593Smuzhiyun 		   unsigned char reg,
135*4882a593Smuzhiyun 		   unsigned char buf[])
136*4882a593Smuzhiyun {
137*4882a593Smuzhiyun 	int ret;
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun 	ret = i2c_smbus_read_i2c_block_data(client, reg, 1, buf);
140*4882a593Smuzhiyun 	if (ret < 0)
141*4882a593Smuzhiyun 		dev_err(&client->dev, "IIC error %d\n", ret);
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	return ret;
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun /* CW221X iic write function */
cw_write(struct i2c_client * client,unsigned char reg,unsigned char const buf[])147*4882a593Smuzhiyun static int cw_write(struct i2c_client *client,
148*4882a593Smuzhiyun 		    unsigned char reg,
149*4882a593Smuzhiyun 		    unsigned char const buf[])
150*4882a593Smuzhiyun {
151*4882a593Smuzhiyun 	int ret;
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun 	ret = i2c_smbus_write_i2c_block_data(client, reg, 1, &buf[0]);
154*4882a593Smuzhiyun 	if (ret < 0)
155*4882a593Smuzhiyun 		dev_err(&client->dev, "IIC error %d\n", ret);
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 	return ret;
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun /* CW221X iic read word function */
cw_read_word(struct i2c_client * client,unsigned char reg,unsigned char buf[])161*4882a593Smuzhiyun static int cw_read_word(struct i2c_client *client,
162*4882a593Smuzhiyun 			unsigned char reg,
163*4882a593Smuzhiyun 			unsigned char buf[])
164*4882a593Smuzhiyun {
165*4882a593Smuzhiyun 	unsigned char reg_val[2] = {0, 0};
166*4882a593Smuzhiyun 	unsigned int temp_val_buff;
167*4882a593Smuzhiyun 	unsigned int temp_val_second;
168*4882a593Smuzhiyun 	int ret;
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun 	ret = i2c_smbus_read_i2c_block_data(client, reg, 2, reg_val);
171*4882a593Smuzhiyun 	if (ret < 0)
172*4882a593Smuzhiyun 		dev_err(&client->dev, "IIC error %d\n", ret);
173*4882a593Smuzhiyun 	temp_val_buff = (reg_val[0] << 8) + reg_val[1];
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun 	msleep(CW_SLEEP_10MS);
176*4882a593Smuzhiyun 	ret = i2c_smbus_read_i2c_block_data(client, reg, 2, reg_val);
177*4882a593Smuzhiyun 	if (ret < 0)
178*4882a593Smuzhiyun 		dev_err(&client->dev, "IIC error %d\n", ret);
179*4882a593Smuzhiyun 	temp_val_second = (reg_val[0] << 8) + reg_val[1];
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun 	if (temp_val_buff != temp_val_second) {
182*4882a593Smuzhiyun 		msleep(CW_SLEEP_10MS);
183*4882a593Smuzhiyun 		ret = i2c_smbus_read_i2c_block_data(client, reg, 2, reg_val);
184*4882a593Smuzhiyun 		if (ret < 0) {
185*4882a593Smuzhiyun 			dev_err(&client->dev, "IIC error %d\n", ret);
186*4882a593Smuzhiyun 			return ret;
187*4882a593Smuzhiyun 		}
188*4882a593Smuzhiyun 	}
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun 	buf[0] = reg_val[0];
191*4882a593Smuzhiyun 	buf[1] = reg_val[1];
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun 	return ret;
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun /* CW221X iic write profile function */
cw_write_profile(struct i2c_client * client,unsigned char const buf[])197*4882a593Smuzhiyun static int cw_write_profile(struct i2c_client *client, unsigned char const buf[])
198*4882a593Smuzhiyun {
199*4882a593Smuzhiyun 	int ret;
200*4882a593Smuzhiyun 	int i;
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun 	for (i = 0; i < SIZE_OF_PROFILE; i++) {
203*4882a593Smuzhiyun 		ret = cw_write(client, REG_BAT_PROFILE + i, &buf[i]);
204*4882a593Smuzhiyun 		if (ret < 0) {
205*4882a593Smuzhiyun 			dev_err(&client->dev, "IIC error %d\n", ret);
206*4882a593Smuzhiyun 			return ret;
207*4882a593Smuzhiyun 		}
208*4882a593Smuzhiyun 	}
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun 	return ret;
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun /*
214*4882a593Smuzhiyun  * CW221X Active function
215*4882a593Smuzhiyun  * The CONFIG register is used for the host MCU to configure the fuel gauge IC.
216*4882a593Smuzhiyun  * The default value is 0xF0, SLEEP and RESTART bits are set. To power up the IC,
217*4882a593Smuzhiyun  * the host MCU needs to write 0x30 to exit shutdown mode, and then write 0x00 to
218*4882a593Smuzhiyun  * restart the gauge to enter active mode. To reset the IC, the host MCU needs
219*4882a593Smuzhiyun  * to write 0xF0, 0x30 and 0x00 in sequence to this register to complete the
220*4882a593Smuzhiyun  * restart procedure. The CW221X will reload relevant parameters and settings and
221*4882a593Smuzhiyun  * restart SOC calculation. Note that the SOC may be a different value after reset
222*4882a593Smuzhiyun  * operation since it is a brand-new calculation based on the latest battery status.
223*4882a593Smuzhiyun  * CONFIG [3:0] is reserved. Don't do any operation with it.
224*4882a593Smuzhiyun  */
cw221X_active(struct cw_battery * cw_bat)225*4882a593Smuzhiyun static int cw221X_active(struct cw_battery *cw_bat)
226*4882a593Smuzhiyun {
227*4882a593Smuzhiyun 	unsigned char reg_val = CONFIG_MODE_RESTART;
228*4882a593Smuzhiyun 	int ret;
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 	ret = cw_write(cw_bat->client, REG_MODE_CONFIG, &reg_val);
231*4882a593Smuzhiyun 	if (ret < 0)
232*4882a593Smuzhiyun 		return ret;
233*4882a593Smuzhiyun 	msleep(CW_SLEEP_20MS); /* Here delay must >= 20 ms */
234*4882a593Smuzhiyun 
235*4882a593Smuzhiyun 	reg_val = CONFIG_MODE_ACTIVE;
236*4882a593Smuzhiyun 	ret = cw_write(cw_bat->client, REG_MODE_CONFIG, &reg_val);
237*4882a593Smuzhiyun 	if (ret < 0)
238*4882a593Smuzhiyun 		return ret;
239*4882a593Smuzhiyun 	msleep(CW_SLEEP_10MS);
240*4882a593Smuzhiyun 
241*4882a593Smuzhiyun 	return 0;
242*4882a593Smuzhiyun }
243*4882a593Smuzhiyun 
244*4882a593Smuzhiyun /*
245*4882a593Smuzhiyun  * CW221X Sleep function
246*4882a593Smuzhiyun  * The CONFIG register is used for the host MCU to configure the fuel gauge IC.
247*4882a593Smuzhiyun  * The default value is 0xF0,SLEEP and RESTART bits are set. To power up the IC,
248*4882a593Smuzhiyun  * the host MCU needs to write 0x30 to exit shutdown mode, and then write 0x00
249*4882a593Smuzhiyun  * to restart the gauge to enter active mode. To reset the IC, the host MCU needs
250*4882a593Smuzhiyun  * to write 0xF0, 0x30 and 0x00 in sequence to this register to complete the restart
251*4882a593Smuzhiyun  * procedure. The CW221X will reload relevant parameters and settings and restart SOC
252*4882a593Smuzhiyun  * calculation. Note that the SOC may be a different value after reset operation since
253*4882a593Smuzhiyun  * it is a brand-new calculation based on the latest battery status.
254*4882a593Smuzhiyun  * CONFIG [3:0] is reserved. Don't do any operation with it.
255*4882a593Smuzhiyun  */
cw221X_sleep(struct cw_battery * cw_bat)256*4882a593Smuzhiyun static int cw221X_sleep(struct cw_battery *cw_bat)
257*4882a593Smuzhiyun {
258*4882a593Smuzhiyun 	unsigned char reg_val = CONFIG_MODE_RESTART;
259*4882a593Smuzhiyun 	int ret;
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun 	ret = cw_write(cw_bat->client, REG_MODE_CONFIG, &reg_val);
262*4882a593Smuzhiyun 	if (ret < 0)
263*4882a593Smuzhiyun 		return ret;
264*4882a593Smuzhiyun 	msleep(CW_SLEEP_20MS); /* Here delay must >= 20 ms */
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun 	reg_val = CONFIG_MODE_SLEEP;
267*4882a593Smuzhiyun 	ret = cw_write(cw_bat->client, REG_MODE_CONFIG, &reg_val);
268*4882a593Smuzhiyun 	if (ret < 0)
269*4882a593Smuzhiyun 		return ret;
270*4882a593Smuzhiyun 	msleep(CW_SLEEP_10MS);
271*4882a593Smuzhiyun 
272*4882a593Smuzhiyun 	return 0;
273*4882a593Smuzhiyun }
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun /*
276*4882a593Smuzhiyun  * The 0x00 register is an UNSIGNED 8bit read-only register. Its value is
277*4882a593Smuzhiyun  * fixed to 0xA0 in shutdown mode and active mode.
278*4882a593Smuzhiyun  */
cw_get_chip_id(struct cw_battery * cw_bat)279*4882a593Smuzhiyun static int cw_get_chip_id(struct cw_battery *cw_bat)
280*4882a593Smuzhiyun {
281*4882a593Smuzhiyun 	unsigned char reg_val;
282*4882a593Smuzhiyun 	int chip_id;
283*4882a593Smuzhiyun 	int ret;
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun 	ret = cw_read(cw_bat->client, REG_CHIP_ID, &reg_val);
286*4882a593Smuzhiyun 	if (ret < 0)
287*4882a593Smuzhiyun 		return ret;
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun 	chip_id = reg_val; /* This value must be 0xA0! */
290*4882a593Smuzhiyun 	pr_info("CW: chip_id = 0x%x\n", chip_id);
291*4882a593Smuzhiyun 	cw_bat->chip_id = chip_id;
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun 	return 0;
294*4882a593Smuzhiyun }
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun /*
297*4882a593Smuzhiyun  * The VCELL register(0x02 0x03) is an UNSIGNED 14bit read-only register that
298*4882a593Smuzhiyun  * updates the battery voltage continuously. Battery voltage is measured between
299*4882a593Smuzhiyun  * the VCELL pin and VSS pin, which is the ground reference. A 14bit
300*4882a593Smuzhiyun  * sigma-delta A/D converter is used and the voltage resolution is 312.5uV. (0.3125mV is *5/16)
301*4882a593Smuzhiyun  */
cw_get_voltage(struct cw_battery * cw_bat)302*4882a593Smuzhiyun static int cw_get_voltage(struct cw_battery *cw_bat)
303*4882a593Smuzhiyun {
304*4882a593Smuzhiyun 	unsigned char reg_val[2] = {0, 0};
305*4882a593Smuzhiyun 	unsigned int voltage;
306*4882a593Smuzhiyun 	int ret;
307*4882a593Smuzhiyun 
308*4882a593Smuzhiyun 	ret = cw_read_word(cw_bat->client, REG_VCELL_H, reg_val);
309*4882a593Smuzhiyun 	if (ret < 0)
310*4882a593Smuzhiyun 		return ret;
311*4882a593Smuzhiyun 
312*4882a593Smuzhiyun 	voltage = (reg_val[0] << 8) + reg_val[1];
313*4882a593Smuzhiyun 	voltage = voltage * 5 / 16;
314*4882a593Smuzhiyun 	cw_bat->voltage = voltage;
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun 	return 0;
317*4882a593Smuzhiyun }
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun /*
320*4882a593Smuzhiyun  * The SOC register(0x04 0x05) is an UNSIGNED 16bit read-only register that indicates
321*4882a593Smuzhiyun  * the SOC of the battery. The SOC shows in % format, which means how much percent of
322*4882a593Smuzhiyun  * the battery's total available capacity is remaining in the battery now. The SOC can
323*4882a593Smuzhiyun  * intrinsically adjust itself to cater to the change of battery status,
324*4882a593Smuzhiyun  * including load, temperature and aging etc.
325*4882a593Smuzhiyun  * The high byte(0x04) contains the SOC in 1% unit which can be directly used if
326*4882a593Smuzhiyun  * this resolution is good enough for the application. The low byte(0x05) provides
327*4882a593Smuzhiyun  * more accurate fractional part of the SOC and its
328*4882a593Smuzhiyun  * LSB is (1/256) %.
329*4882a593Smuzhiyun  */
cw_get_capacity(struct cw_battery * cw_bat)330*4882a593Smuzhiyun static int cw_get_capacity(struct cw_battery *cw_bat)
331*4882a593Smuzhiyun {
332*4882a593Smuzhiyun 	unsigned char reg_val[2] = {0, 0};
333*4882a593Smuzhiyun 	int ui_100 = CW_UI_FULL;
334*4882a593Smuzhiyun 	int ui_soc;
335*4882a593Smuzhiyun 	int soc_h;
336*4882a593Smuzhiyun 	int soc_l;
337*4882a593Smuzhiyun 	int ret;
338*4882a593Smuzhiyun 
339*4882a593Smuzhiyun 	ret = cw_read_word(cw_bat->client, REG_SOC_INT, reg_val);
340*4882a593Smuzhiyun 	if (ret < 0)
341*4882a593Smuzhiyun 		return ret;
342*4882a593Smuzhiyun 	soc_h = reg_val[0];
343*4882a593Smuzhiyun 	soc_l = reg_val[1];
344*4882a593Smuzhiyun 	ui_soc = ((soc_h * 256 + soc_l) * 100) / (ui_100 * 256);
345*4882a593Smuzhiyun 	/* remainder = (((soc_h * 256 + soc_l) * 100 * 100) / (ui_100 * 256)) % 100; */
346*4882a593Smuzhiyun 	if (ui_soc >= 100) {
347*4882a593Smuzhiyun 		cw_printk("CW221x[%d]: UI_SOC = %d larger 100!\n", __LINE__, ui_soc);
348*4882a593Smuzhiyun 		ui_soc = 100;
349*4882a593Smuzhiyun 	}
350*4882a593Smuzhiyun 	cw_bat->ic_soc_h = soc_h;
351*4882a593Smuzhiyun 	cw_bat->ic_soc_l = soc_l;
352*4882a593Smuzhiyun 	cw_bat->ui_soc = ui_soc;
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun 	return 0;
355*4882a593Smuzhiyun }
356*4882a593Smuzhiyun 
357*4882a593Smuzhiyun /*
358*4882a593Smuzhiyun  * The TEMP register is an UNSIGNED 8bit read only register.
359*4882a593Smuzhiyun  * It reports the real-time battery temperature
360*4882a593Smuzhiyun  * measured at TS pin. The scope is from -40 to 87.5 degrees Celsius,
361*4882a593Smuzhiyun  * LSB is 0.5 degree Celsius. TEMP(C) = - 40 + Value(0x06 Reg) / 2
362*4882a593Smuzhiyun  */
cw_get_temp(struct cw_battery * cw_bat)363*4882a593Smuzhiyun static int cw_get_temp(struct cw_battery *cw_bat)
364*4882a593Smuzhiyun {
365*4882a593Smuzhiyun 	unsigned char reg_val;
366*4882a593Smuzhiyun 	int temp;
367*4882a593Smuzhiyun 	int ret;
368*4882a593Smuzhiyun 
369*4882a593Smuzhiyun 	ret = cw_read(cw_bat->client, REG_TEMP, &reg_val);
370*4882a593Smuzhiyun 	if (ret < 0)
371*4882a593Smuzhiyun 		return ret;
372*4882a593Smuzhiyun 
373*4882a593Smuzhiyun 	temp = (int)reg_val * 10 / 2 - 400;
374*4882a593Smuzhiyun 	cw_bat->temp = temp;
375*4882a593Smuzhiyun 
376*4882a593Smuzhiyun 	return 0;
377*4882a593Smuzhiyun }
378*4882a593Smuzhiyun 
379*4882a593Smuzhiyun /* get complement code function, unsigned short must be U16 */
get_complement_code(unsigned short raw_code)380*4882a593Smuzhiyun static long get_complement_code(unsigned short raw_code)
381*4882a593Smuzhiyun {
382*4882a593Smuzhiyun 	long complement_code;
383*4882a593Smuzhiyun 	int dir;
384*4882a593Smuzhiyun 
385*4882a593Smuzhiyun 	if (0 != (raw_code & COMPLEMENT_CODE_U16)) {
386*4882a593Smuzhiyun 		dir = -1;
387*4882a593Smuzhiyun 		raw_code =  (0xFFFF - raw_code) + 1;
388*4882a593Smuzhiyun 	} else {
389*4882a593Smuzhiyun 		dir = 1;
390*4882a593Smuzhiyun 	}
391*4882a593Smuzhiyun 	complement_code = (long)raw_code * dir;
392*4882a593Smuzhiyun 
393*4882a593Smuzhiyun 	return complement_code;
394*4882a593Smuzhiyun }
395*4882a593Smuzhiyun 
396*4882a593Smuzhiyun /*
397*4882a593Smuzhiyun  * CURRENT is a SIGNED 16bit register(0x0E 0x0F) that reports current A/D converter
398*4882a593Smuzhiyun  * result of the voltage across the current sense resistor, 10mohm typical.
399*4882a593Smuzhiyun  * The result is stored as a two's complement value to show positive and negative current.
400*4882a593Smuzhiyun  * Voltages outside the minimum and maximum register values are reported as the
401*4882a593Smuzhiyun  * minimum or maximum value. The register value should be divided by the sense
402*4882a593Smuzhiyun  * resistance to convert to amperes. The value of the sense resistor determines
403*4882a593Smuzhiyun  * the resolution and the full-scale range of the current readings. The LSB of 0x0F
404*4882a593Smuzhiyun  * is (52.4/32768)uV for CW2215 and CW2217. The LSB of 0x0F is (125/32768)uV for CW2218.
405*4882a593Smuzhiyun  * The default value is 0x0000, stands for 0mA. 0x7FFF stands for the maximum charging
406*4882a593Smuzhiyun  * current and 0x8001 stands for the maximum discharging current.
407*4882a593Smuzhiyun  */
cw_get_current(struct cw_battery * cw_bat)408*4882a593Smuzhiyun static int cw_get_current(struct cw_battery *cw_bat)
409*4882a593Smuzhiyun {
410*4882a593Smuzhiyun 	unsigned char reg_val[2] = {0, 0};
411*4882a593Smuzhiyun 	unsigned short current_reg; /* unsigned short must u16 */
412*4882a593Smuzhiyun 	long long cw_current; /* use long long type to guarantee 8 bytes space */
413*4882a593Smuzhiyun 	int ret;
414*4882a593Smuzhiyun 
415*4882a593Smuzhiyun 	ret = cw_read_word(cw_bat->client, REG_CURRENT_H, reg_val);
416*4882a593Smuzhiyun 	if (ret < 0)
417*4882a593Smuzhiyun 		return ret;
418*4882a593Smuzhiyun 
419*4882a593Smuzhiyun 	current_reg = (reg_val[0] << 8) + reg_val[1];
420*4882a593Smuzhiyun 	cw_current = get_complement_code(current_reg);
421*4882a593Smuzhiyun 
422*4882a593Smuzhiyun 	if (((cw_bat->fw_version & CW2215_MARK) != 0) || ((cw_bat->fw_version & CW2217_MARK) != 0))
423*4882a593Smuzhiyun 		cw_current = cw_current * 1600 / USER_RSENSE;
424*4882a593Smuzhiyun 	else if ((cw_bat->fw_version != 0) && ((cw_bat->fw_version & 0xC0) == CW2218_MARK))
425*4882a593Smuzhiyun 		cw_current = cw_current * 3815 / USER_RSENSE;
426*4882a593Smuzhiyun 	else {
427*4882a593Smuzhiyun 		cw_bat->cw_current = 0;
428*4882a593Smuzhiyun 		dev_err(cw_bat->dev, "error! cw221x firmware read error!\n");
429*4882a593Smuzhiyun 	}
430*4882a593Smuzhiyun 
431*4882a593Smuzhiyun 	cw_bat->cw_current = cw_current;
432*4882a593Smuzhiyun 
433*4882a593Smuzhiyun 	return 0;
434*4882a593Smuzhiyun }
435*4882a593Smuzhiyun 
436*4882a593Smuzhiyun /*
437*4882a593Smuzhiyun  * CYCLECNT is an UNSIGNED 16bit register(0xA4 0xA5) that counts cycle life of the battery.
438*4882a593Smuzhiyun  * The LSB of 0xA5 stands for 1/16 cycle. This register will be clear after enters shutdown mode
439*4882a593Smuzhiyun  */
cw_get_cycle_count(struct cw_battery * cw_bat)440*4882a593Smuzhiyun static int cw_get_cycle_count(struct cw_battery *cw_bat)
441*4882a593Smuzhiyun {
442*4882a593Smuzhiyun 	unsigned char reg_val[2] = {0, 0};
443*4882a593Smuzhiyun 	int cycle;
444*4882a593Smuzhiyun 	int ret;
445*4882a593Smuzhiyun 
446*4882a593Smuzhiyun 	ret = cw_read_word(cw_bat->client, REG_CYCLE_H, reg_val);
447*4882a593Smuzhiyun 	if (ret < 0)
448*4882a593Smuzhiyun 		return ret;
449*4882a593Smuzhiyun 
450*4882a593Smuzhiyun 	cycle = (reg_val[0] << 8) + reg_val[1];
451*4882a593Smuzhiyun 	cw_bat->cycle = cycle / 16;
452*4882a593Smuzhiyun 
453*4882a593Smuzhiyun 	return 0;
454*4882a593Smuzhiyun }
455*4882a593Smuzhiyun 
456*4882a593Smuzhiyun /*
457*4882a593Smuzhiyun  * SOH (State of Health) is an UNSIGNED 8bit register(0xA6) that represents the level of
458*4882a593Smuzhiyun  * battery aging by tracking battery internal impedance increment. When the device enters
459*4882a593Smuzhiyun  * active mode, this register refresh to 0x64 by default. Its range is 0x00 to 0x64,
460*4882a593Smuzhiyun  * indicating 0 to 100%. This register will be clear after enters shutdown mode.
461*4882a593Smuzhiyun  */
cw_get_soh(struct cw_battery * cw_bat)462*4882a593Smuzhiyun static int cw_get_soh(struct cw_battery *cw_bat)
463*4882a593Smuzhiyun {
464*4882a593Smuzhiyun 	int ret;
465*4882a593Smuzhiyun 	unsigned char reg_val;
466*4882a593Smuzhiyun 	int soh;
467*4882a593Smuzhiyun 
468*4882a593Smuzhiyun 	ret = cw_read(cw_bat->client, REG_SOH, &reg_val);
469*4882a593Smuzhiyun 	if (ret < 0)
470*4882a593Smuzhiyun 		return ret;
471*4882a593Smuzhiyun 
472*4882a593Smuzhiyun 	soh = reg_val;
473*4882a593Smuzhiyun 	cw_bat->soh = soh;
474*4882a593Smuzhiyun 
475*4882a593Smuzhiyun 	return 0;
476*4882a593Smuzhiyun }
477*4882a593Smuzhiyun 
478*4882a593Smuzhiyun /*
479*4882a593Smuzhiyun  * FW_VERSION register reports the firmware (FW) running in the chip. It is fixed to
480*4882a593Smuzhiyun  * 0x00 when the chip is in shutdown mode. When in active mode, Bit [7:6] = '01' stand
481*4882a593Smuzhiyun  * for the CW2217, Bit [7:6] = '00' stand for the CW2218 and Bit [7:6] = '10' stand for CW2215.
482*4882a593Smuzhiyun  * Bit[5:0] stand for the FW version running in the chip. Note that the FW version is
483*4882a593Smuzhiyun  * subject to update and contact sales office for confirmation when necessary.
484*4882a593Smuzhiyun  */
cw_get_fw_version(struct cw_battery * cw_bat)485*4882a593Smuzhiyun static int cw_get_fw_version(struct cw_battery *cw_bat)
486*4882a593Smuzhiyun {
487*4882a593Smuzhiyun 	int ret;
488*4882a593Smuzhiyun 	unsigned char reg_val;
489*4882a593Smuzhiyun 	int fw_version;
490*4882a593Smuzhiyun 
491*4882a593Smuzhiyun 	ret = cw_read(cw_bat->client, REG_FW_VERSION, &reg_val);
492*4882a593Smuzhiyun 	if (ret < 0)
493*4882a593Smuzhiyun 		return ret;
494*4882a593Smuzhiyun 
495*4882a593Smuzhiyun 	fw_version = reg_val;
496*4882a593Smuzhiyun 	cw_bat->fw_version = fw_version;
497*4882a593Smuzhiyun 
498*4882a593Smuzhiyun 	return 0;
499*4882a593Smuzhiyun }
500*4882a593Smuzhiyun 
cw_update_data(struct cw_battery * cw_bat)501*4882a593Smuzhiyun static int cw_update_data(struct cw_battery *cw_bat)
502*4882a593Smuzhiyun {
503*4882a593Smuzhiyun 	int ret = 0;
504*4882a593Smuzhiyun 
505*4882a593Smuzhiyun 	ret += cw_get_voltage(cw_bat);
506*4882a593Smuzhiyun 	ret += cw_get_capacity(cw_bat);
507*4882a593Smuzhiyun 	ret += cw_get_temp(cw_bat);
508*4882a593Smuzhiyun 	ret += cw_get_current(cw_bat);
509*4882a593Smuzhiyun 	ret += cw_get_cycle_count(cw_bat);
510*4882a593Smuzhiyun 	ret += cw_get_soh(cw_bat);
511*4882a593Smuzhiyun 	cw_printk("vol = %d  current = %ld cap = %d temp = %d\n",
512*4882a593Smuzhiyun 		  cw_bat->voltage, cw_bat->cw_current, cw_bat->ui_soc, cw_bat->temp);
513*4882a593Smuzhiyun 
514*4882a593Smuzhiyun 	return ret;
515*4882a593Smuzhiyun }
516*4882a593Smuzhiyun 
cw_init_data(struct cw_battery * cw_bat)517*4882a593Smuzhiyun static int cw_init_data(struct cw_battery *cw_bat)
518*4882a593Smuzhiyun {
519*4882a593Smuzhiyun 	int ret = 0;
520*4882a593Smuzhiyun 
521*4882a593Smuzhiyun 	ret = cw_get_fw_version(cw_bat);
522*4882a593Smuzhiyun 	if (ret != 0)
523*4882a593Smuzhiyun 		return ret;
524*4882a593Smuzhiyun 
525*4882a593Smuzhiyun 	ret += cw_get_chip_id(cw_bat);
526*4882a593Smuzhiyun 	ret += cw_get_voltage(cw_bat);
527*4882a593Smuzhiyun 	ret += cw_get_capacity(cw_bat);
528*4882a593Smuzhiyun 	ret += cw_get_temp(cw_bat);
529*4882a593Smuzhiyun 	ret += cw_get_current(cw_bat);
530*4882a593Smuzhiyun 	ret += cw_get_cycle_count(cw_bat);
531*4882a593Smuzhiyun 	ret += cw_get_soh(cw_bat);
532*4882a593Smuzhiyun 
533*4882a593Smuzhiyun 	cw_printk("chip_id = %d vol = %d  cur = %ld cap = %d temp = %d  fw_version = %d\n",
534*4882a593Smuzhiyun 		  cw_bat->chip_id, cw_bat->voltage, cw_bat->cw_current,
535*4882a593Smuzhiyun 		  cw_bat->ui_soc, cw_bat->temp, cw_bat->fw_version);
536*4882a593Smuzhiyun 
537*4882a593Smuzhiyun 	return ret;
538*4882a593Smuzhiyun }
539*4882a593Smuzhiyun 
cw221x_parse_properties(struct cw_battery * cw_bat)540*4882a593Smuzhiyun static int cw221x_parse_properties(struct cw_battery *cw_bat)
541*4882a593Smuzhiyun {
542*4882a593Smuzhiyun 	struct device *dev = cw_bat->dev;
543*4882a593Smuzhiyun 	int length;
544*4882a593Smuzhiyun 	int ret;
545*4882a593Smuzhiyun 
546*4882a593Smuzhiyun 	length = device_property_count_u8(dev, "cellwise,battery-profile");
547*4882a593Smuzhiyun 	if (length < 0) {
548*4882a593Smuzhiyun 		dev_warn(cw_bat->dev,
549*4882a593Smuzhiyun 			 "No battery-profile found, using current flash contents\n");
550*4882a593Smuzhiyun 	} else if (length != SIZE_OF_PROFILE) {
551*4882a593Smuzhiyun 		dev_err(cw_bat->dev, "battery-profile must be %d bytes\n",
552*4882a593Smuzhiyun 			SIZE_OF_PROFILE);
553*4882a593Smuzhiyun 		return -EINVAL;
554*4882a593Smuzhiyun 	}
555*4882a593Smuzhiyun 
556*4882a593Smuzhiyun 	cw_bat->bat_profile = devm_kzalloc(dev, length, GFP_KERNEL);
557*4882a593Smuzhiyun 	if (!cw_bat->bat_profile)
558*4882a593Smuzhiyun 		return -ENOMEM;
559*4882a593Smuzhiyun 
560*4882a593Smuzhiyun 	ret = device_property_read_u8_array(dev,
561*4882a593Smuzhiyun 					    "cellwise,battery-profile",
562*4882a593Smuzhiyun 					    cw_bat->bat_profile,
563*4882a593Smuzhiyun 					    length);
564*4882a593Smuzhiyun 
565*4882a593Smuzhiyun 	return ret;
566*4882a593Smuzhiyun }
567*4882a593Smuzhiyun 
cw_config_profile_init(struct cw_battery * cw_bat)568*4882a593Smuzhiyun static void cw_config_profile_init(struct cw_battery *cw_bat)
569*4882a593Smuzhiyun {
570*4882a593Smuzhiyun 	int i, ret;
571*4882a593Smuzhiyun 
572*4882a593Smuzhiyun 	ret = cw221x_parse_properties(cw_bat);
573*4882a593Smuzhiyun 	if (ret) {
574*4882a593Smuzhiyun 		/* update new battery info */
575*4882a593Smuzhiyun 		cw_bat->bat_profile = config_profile_info;
576*4882a593Smuzhiyun 		cw_printk("the driver profile:\n");
577*4882a593Smuzhiyun 	}
578*4882a593Smuzhiyun 
579*4882a593Smuzhiyun 	for (i = 0; i < SIZE_OF_PROFILE; i++)
580*4882a593Smuzhiyun 		cw_printk("[%d]: 0x%x\n", i, cw_bat->bat_profile[i]);
581*4882a593Smuzhiyun }
582*4882a593Smuzhiyun 
583*4882a593Smuzhiyun /*CW221X update profile function, Often called during initialization*/
cw_config_start_ic(struct cw_battery * cw_bat)584*4882a593Smuzhiyun static int cw_config_start_ic(struct cw_battery *cw_bat)
585*4882a593Smuzhiyun {
586*4882a593Smuzhiyun 	unsigned char reg_val;
587*4882a593Smuzhiyun 	int count = 0;
588*4882a593Smuzhiyun 	int i, ret;
589*4882a593Smuzhiyun 
590*4882a593Smuzhiyun 	ret = cw221X_sleep(cw_bat);
591*4882a593Smuzhiyun 	if (ret < 0)
592*4882a593Smuzhiyun 		return ret;
593*4882a593Smuzhiyun 
594*4882a593Smuzhiyun 	/* update new battery info */
595*4882a593Smuzhiyun 	ret = cw_write_profile(cw_bat->client, cw_bat->bat_profile);
596*4882a593Smuzhiyun 	if (ret < 0)
597*4882a593Smuzhiyun 		return ret;
598*4882a593Smuzhiyun 
599*4882a593Smuzhiyun 	cw_printk("the driver profile:\n");
600*4882a593Smuzhiyun 	for (i = 0; i < SIZE_OF_PROFILE; i++)
601*4882a593Smuzhiyun 		cw_printk("[%d]: 0x%x\n", i, cw_bat->bat_profile[i]);
602*4882a593Smuzhiyun 
603*4882a593Smuzhiyun 	/* set UPDATE_FLAG AND SOC INTTERRUP VALUE */
604*4882a593Smuzhiyun 	reg_val = CONFIG_UPDATE_FLG | GPIO_SOC_IRQ_VALUE;
605*4882a593Smuzhiyun 	ret = cw_write(cw_bat->client, REG_SOC_ALERT, &reg_val);
606*4882a593Smuzhiyun 	if (ret < 0)
607*4882a593Smuzhiyun 		return ret;
608*4882a593Smuzhiyun 
609*4882a593Smuzhiyun 	/* close all interruptes */
610*4882a593Smuzhiyun 	reg_val = 0;
611*4882a593Smuzhiyun 	ret = cw_write(cw_bat->client, REG_GPIO_CONFIG, &reg_val);
612*4882a593Smuzhiyun 	if (ret < 0)
613*4882a593Smuzhiyun 		return ret;
614*4882a593Smuzhiyun 
615*4882a593Smuzhiyun 	ret = cw221X_active(cw_bat);
616*4882a593Smuzhiyun 	if (ret < 0)
617*4882a593Smuzhiyun 		return ret;
618*4882a593Smuzhiyun 
619*4882a593Smuzhiyun 	while (CW_TRUE) {
620*4882a593Smuzhiyun 		msleep(CW_SLEEP_100MS);
621*4882a593Smuzhiyun 		cw_read(cw_bat->client, REG_IC_STATE, &reg_val);
622*4882a593Smuzhiyun 		if (IC_READY_MARK == (reg_val & IC_READY_MARK))
623*4882a593Smuzhiyun 			break;
624*4882a593Smuzhiyun 		count++;
625*4882a593Smuzhiyun 		if (count >= CW_SLEEP_COUNTS) {
626*4882a593Smuzhiyun 			cw221X_sleep(cw_bat);
627*4882a593Smuzhiyun 			return -1;
628*4882a593Smuzhiyun 		}
629*4882a593Smuzhiyun 	}
630*4882a593Smuzhiyun 
631*4882a593Smuzhiyun 	return 0;
632*4882a593Smuzhiyun }
633*4882a593Smuzhiyun 
634*4882a593Smuzhiyun /*
635*4882a593Smuzhiyun  * Get the cw221X running state
636*4882a593Smuzhiyun  * Determine whether the profile needs to be updated
637*4882a593Smuzhiyun  */
cw221X_get_state(struct cw_battery * cw_bat)638*4882a593Smuzhiyun static int cw221X_get_state(struct cw_battery *cw_bat)
639*4882a593Smuzhiyun {
640*4882a593Smuzhiyun 	int ret;
641*4882a593Smuzhiyun 	unsigned char reg_val;
642*4882a593Smuzhiyun 	int i;
643*4882a593Smuzhiyun 	int reg_profile;
644*4882a593Smuzhiyun 
645*4882a593Smuzhiyun 	ret = cw_read(cw_bat->client, REG_MODE_CONFIG, &reg_val);
646*4882a593Smuzhiyun 	if (ret < 0)
647*4882a593Smuzhiyun 		return ret;
648*4882a593Smuzhiyun 	if (reg_val != CONFIG_MODE_ACTIVE)
649*4882a593Smuzhiyun 		return CW221X_NOT_ACTIVE;
650*4882a593Smuzhiyun 
651*4882a593Smuzhiyun 	ret = cw_read(cw_bat->client, REG_SOC_ALERT, &reg_val);
652*4882a593Smuzhiyun 	if (ret < 0)
653*4882a593Smuzhiyun 		return ret;
654*4882a593Smuzhiyun 	if (0x00 == (reg_val & CONFIG_UPDATE_FLG))
655*4882a593Smuzhiyun 		return CW221X_PROFILE_NOT_READY;
656*4882a593Smuzhiyun 
657*4882a593Smuzhiyun 	for (i = 0; i < SIZE_OF_PROFILE; i++) {
658*4882a593Smuzhiyun 		ret = cw_read(cw_bat->client, (REG_BAT_PROFILE + i), &reg_val);
659*4882a593Smuzhiyun 		if (ret < 0)
660*4882a593Smuzhiyun 			return ret;
661*4882a593Smuzhiyun 		reg_profile = REG_BAT_PROFILE + i;
662*4882a593Smuzhiyun 		cw_printk("fuelgauge: 0x%2x = 0x%2x\n", reg_profile, reg_val);
663*4882a593Smuzhiyun 		if (cw_bat->bat_profile[i] != reg_val)
664*4882a593Smuzhiyun 			break;
665*4882a593Smuzhiyun 	}
666*4882a593Smuzhiyun 	if (i != SIZE_OF_PROFILE)
667*4882a593Smuzhiyun 		return CW221X_PROFILE_NEED_UPDATE;
668*4882a593Smuzhiyun 
669*4882a593Smuzhiyun 	return 0;
670*4882a593Smuzhiyun }
671*4882a593Smuzhiyun 
672*4882a593Smuzhiyun /* CW221X init function, Often called during initialization */
cw_init(struct cw_battery * cw_bat)673*4882a593Smuzhiyun static int cw_init(struct cw_battery *cw_bat)
674*4882a593Smuzhiyun {
675*4882a593Smuzhiyun 	int ret;
676*4882a593Smuzhiyun 
677*4882a593Smuzhiyun 	ret = cw_get_chip_id(cw_bat);
678*4882a593Smuzhiyun 	if (ret < 0) {
679*4882a593Smuzhiyun 		dev_err(cw_bat->dev, "iic read write error");
680*4882a593Smuzhiyun 		return ret;
681*4882a593Smuzhiyun 	}
682*4882a593Smuzhiyun 	if (cw_bat->chip_id != IC_VCHIP_ID) {
683*4882a593Smuzhiyun 		dev_err(cw_bat->dev, "not cw221X\n");
684*4882a593Smuzhiyun 		return -1;
685*4882a593Smuzhiyun 	}
686*4882a593Smuzhiyun 
687*4882a593Smuzhiyun 	ret = cw221X_get_state(cw_bat);
688*4882a593Smuzhiyun 	if (ret < 0) {
689*4882a593Smuzhiyun 		dev_err(cw_bat->dev, "iic read write error");
690*4882a593Smuzhiyun 		return ret;
691*4882a593Smuzhiyun 	}
692*4882a593Smuzhiyun 
693*4882a593Smuzhiyun 	if (ret != 0) {
694*4882a593Smuzhiyun 		cw_printk("need update profile\n");
695*4882a593Smuzhiyun 
696*4882a593Smuzhiyun 		ret = cw_config_start_ic(cw_bat);
697*4882a593Smuzhiyun 		if (ret < 0)
698*4882a593Smuzhiyun 			return ret;
699*4882a593Smuzhiyun 	} else
700*4882a593Smuzhiyun 		cw_printk("not need update profile\n");
701*4882a593Smuzhiyun 	cw_printk("cw221X init success!\n");
702*4882a593Smuzhiyun 
703*4882a593Smuzhiyun 	return 0;
704*4882a593Smuzhiyun }
705*4882a593Smuzhiyun 
cw_bat_work(struct work_struct * work)706*4882a593Smuzhiyun static void cw_bat_work(struct work_struct *work)
707*4882a593Smuzhiyun {
708*4882a593Smuzhiyun 	struct delayed_work *delay_work;
709*4882a593Smuzhiyun 	struct cw_battery *cw_bat;
710*4882a593Smuzhiyun 	static int soc;
711*4882a593Smuzhiyun 	int ret;
712*4882a593Smuzhiyun 
713*4882a593Smuzhiyun 	delay_work = container_of(work,
714*4882a593Smuzhiyun 				  struct delayed_work,
715*4882a593Smuzhiyun 				  work);
716*4882a593Smuzhiyun 	cw_bat = container_of(delay_work,
717*4882a593Smuzhiyun 			      struct cw_battery,
718*4882a593Smuzhiyun 			      battery_delay_work);
719*4882a593Smuzhiyun 
720*4882a593Smuzhiyun 	ret = cw_update_data(cw_bat);
721*4882a593Smuzhiyun 	if (ret < 0)
722*4882a593Smuzhiyun 		dev_err(cw_bat->dev, "i2c read error when update data");
723*4882a593Smuzhiyun 	if (cw_bat->ui_soc != soc) {
724*4882a593Smuzhiyun 		soc = cw_bat->ui_soc;
725*4882a593Smuzhiyun 		power_supply_changed(cw_bat->cw_bat);
726*4882a593Smuzhiyun 	}
727*4882a593Smuzhiyun 	queue_delayed_work(cw_bat->cwfg_workqueue,
728*4882a593Smuzhiyun 			   &cw_bat->battery_delay_work,
729*4882a593Smuzhiyun 			   msecs_to_jiffies(queue_delayed_work_time));
730*4882a593Smuzhiyun }
731*4882a593Smuzhiyun 
cw_battery_set_property(struct power_supply * psy,enum power_supply_property psp,const union power_supply_propval * val)732*4882a593Smuzhiyun static int cw_battery_set_property(struct power_supply *psy,
733*4882a593Smuzhiyun 				   enum power_supply_property psp,
734*4882a593Smuzhiyun 				   const union power_supply_propval *val)
735*4882a593Smuzhiyun {
736*4882a593Smuzhiyun 	/* struct cw_battery *cw_bat = power_supply_get_drvdata(psy); */
737*4882a593Smuzhiyun 	int ret = 0;
738*4882a593Smuzhiyun 
739*4882a593Smuzhiyun 	switch (psp) {
740*4882a593Smuzhiyun 	default:
741*4882a593Smuzhiyun 		ret = -EINVAL;
742*4882a593Smuzhiyun 		break;
743*4882a593Smuzhiyun 	}
744*4882a593Smuzhiyun 
745*4882a593Smuzhiyun 	return ret;
746*4882a593Smuzhiyun }
747*4882a593Smuzhiyun 
cw_battery_get_property(struct power_supply * psy,enum power_supply_property psp,union power_supply_propval * val)748*4882a593Smuzhiyun static int cw_battery_get_property(struct power_supply *psy,
749*4882a593Smuzhiyun 				   enum power_supply_property psp,
750*4882a593Smuzhiyun 				   union power_supply_propval *val)
751*4882a593Smuzhiyun {
752*4882a593Smuzhiyun 	struct cw_battery *cw_bat = power_supply_get_drvdata(psy);
753*4882a593Smuzhiyun 	int ret = 0;
754*4882a593Smuzhiyun 
755*4882a593Smuzhiyun 	switch (psp) {
756*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_CYCLE_COUNT:
757*4882a593Smuzhiyun 		val->intval = cw_bat->cycle;
758*4882a593Smuzhiyun 		break;
759*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_CAPACITY:
760*4882a593Smuzhiyun 		val->intval = cw_bat->ui_soc;
761*4882a593Smuzhiyun 		break;
762*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_CAPACITY_LEVEL:
763*4882a593Smuzhiyun 		if ((cw_bat->ui_soc < 1) && (!power_supply_is_system_supplied()))
764*4882a593Smuzhiyun 			val->intval = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
765*4882a593Smuzhiyun 		else if (cw_bat->ui_soc <= 20)
766*4882a593Smuzhiyun 			val->intval = POWER_SUPPLY_CAPACITY_LEVEL_LOW;
767*4882a593Smuzhiyun 		else if (cw_bat->ui_soc <= 70)
768*4882a593Smuzhiyun 			val->intval = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
769*4882a593Smuzhiyun 		else if (cw_bat->ui_soc <= 90)
770*4882a593Smuzhiyun 			val->intval = POWER_SUPPLY_CAPACITY_LEVEL_HIGH;
771*4882a593Smuzhiyun 		else
772*4882a593Smuzhiyun 			val->intval = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
773*4882a593Smuzhiyun 		break;
774*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_STATUS:
775*4882a593Smuzhiyun 		if (cw_bat->ui_soc == 100 * 1000)
776*4882a593Smuzhiyun 			val->intval = POWER_SUPPLY_STATUS_FULL;
777*4882a593Smuzhiyun 		else {
778*4882a593Smuzhiyun 			if (power_supply_is_system_supplied())
779*4882a593Smuzhiyun 				val->intval = POWER_SUPPLY_STATUS_CHARGING;
780*4882a593Smuzhiyun 			else
781*4882a593Smuzhiyun 				val->intval = POWER_SUPPLY_STATUS_DISCHARGING;
782*4882a593Smuzhiyun 		}
783*4882a593Smuzhiyun 		break;
784*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_CHARGE_FULL:
785*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
786*4882a593Smuzhiyun 		val->intval = 10 * 1000 * 1000;/* uAh */
787*4882a593Smuzhiyun 		break;
788*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_HEALTH:
789*4882a593Smuzhiyun 		val->intval = POWER_SUPPLY_HEALTH_GOOD;
790*4882a593Smuzhiyun 		break;
791*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_PRESENT:
792*4882a593Smuzhiyun 		val->intval = (cw_bat->voltage <= 0) ? 0 : 1;
793*4882a593Smuzhiyun 		break;
794*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_VOLTAGE_NOW:
795*4882a593Smuzhiyun 		cw_get_voltage(cw_bat);
796*4882a593Smuzhiyun 		val->intval = cw_bat->voltage * CW_VOL_UNIT;
797*4882a593Smuzhiyun 		break;
798*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_CURRENT_NOW:
799*4882a593Smuzhiyun 		cw_get_current(cw_bat);
800*4882a593Smuzhiyun 		val->intval = cw_bat->cw_current * 1000; /* uA */
801*4882a593Smuzhiyun 		break;
802*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_TECHNOLOGY:
803*4882a593Smuzhiyun 		val->intval = POWER_SUPPLY_TECHNOLOGY_LION;
804*4882a593Smuzhiyun 		break;
805*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_TEMP:
806*4882a593Smuzhiyun 		val->intval = cw_bat->temp;
807*4882a593Smuzhiyun 		break;
808*4882a593Smuzhiyun 	default:
809*4882a593Smuzhiyun 		ret = -EINVAL;
810*4882a593Smuzhiyun 		break;
811*4882a593Smuzhiyun 	}
812*4882a593Smuzhiyun 
813*4882a593Smuzhiyun 	return ret;
814*4882a593Smuzhiyun }
815*4882a593Smuzhiyun 
816*4882a593Smuzhiyun static enum power_supply_property cw_battery_properties[] = {
817*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CYCLE_COUNT,
818*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CAPACITY,
819*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
820*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_HEALTH,
821*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_PRESENT,
822*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_FULL,
823*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
824*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CURRENT_NOW,
825*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TECHNOLOGY,
826*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_STATUS,
827*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TEMP,
828*4882a593Smuzhiyun };
829*4882a593Smuzhiyun 
cw221X_probe(struct i2c_client * client,const struct i2c_device_id * id)830*4882a593Smuzhiyun static int cw221X_probe(struct i2c_client *client, const struct i2c_device_id *id)
831*4882a593Smuzhiyun {
832*4882a593Smuzhiyun 	struct power_supply_config psy_cfg = {0};
833*4882a593Smuzhiyun 	struct power_supply_desc *psy_desc;
834*4882a593Smuzhiyun 	struct cw_battery *cw_bat;
835*4882a593Smuzhiyun 	int loop = 0;
836*4882a593Smuzhiyun 	int ret;
837*4882a593Smuzhiyun 
838*4882a593Smuzhiyun 	cw_bat = devm_kzalloc(&client->dev, sizeof(*cw_bat), GFP_KERNEL);
839*4882a593Smuzhiyun 	if (!cw_bat)
840*4882a593Smuzhiyun 		return -ENOMEM;
841*4882a593Smuzhiyun 
842*4882a593Smuzhiyun 	i2c_set_clientdata(client, cw_bat);
843*4882a593Smuzhiyun 	cw_bat->client = client;
844*4882a593Smuzhiyun 	cw_bat->dev = &client->dev;
845*4882a593Smuzhiyun 
846*4882a593Smuzhiyun 	dev_dbg(cw_bat->dev, "cw221X driver versions-%d\n", 20220830);
847*4882a593Smuzhiyun 	cw_config_profile_init(cw_bat);
848*4882a593Smuzhiyun 	ret = cw_init(cw_bat);
849*4882a593Smuzhiyun 	while ((loop++ < CW_RETRY_COUNT) && (ret != 0)) {
850*4882a593Smuzhiyun 		msleep(CW_SLEEP_200MS);
851*4882a593Smuzhiyun 		ret = cw_init(cw_bat);
852*4882a593Smuzhiyun 	}
853*4882a593Smuzhiyun 	if (ret) {
854*4882a593Smuzhiyun 		dev_err(cw_bat->dev, "cw221X init fail!\n");
855*4882a593Smuzhiyun 		return ret;
856*4882a593Smuzhiyun 	}
857*4882a593Smuzhiyun 
858*4882a593Smuzhiyun 	ret = cw_init_data(cw_bat);
859*4882a593Smuzhiyun 	if (ret) {
860*4882a593Smuzhiyun 		dev_err(cw_bat->dev, "cw221X init data fail!\n");
861*4882a593Smuzhiyun 		return ret;
862*4882a593Smuzhiyun 	}
863*4882a593Smuzhiyun 
864*4882a593Smuzhiyun 	psy_desc = devm_kzalloc(&client->dev, sizeof(*psy_desc), GFP_KERNEL);
865*4882a593Smuzhiyun 	if (!psy_desc)
866*4882a593Smuzhiyun 		return -ENOMEM;
867*4882a593Smuzhiyun 	psy_cfg.drv_data = cw_bat;
868*4882a593Smuzhiyun 	psy_desc->name = CW_PROPERTIES;
869*4882a593Smuzhiyun 	psy_desc->type = POWER_SUPPLY_TYPE_BATTERY;
870*4882a593Smuzhiyun 	psy_desc->properties = cw_battery_properties;
871*4882a593Smuzhiyun 	psy_desc->num_properties = ARRAY_SIZE(cw_battery_properties);
872*4882a593Smuzhiyun 	psy_desc->get_property = cw_battery_get_property;
873*4882a593Smuzhiyun 	psy_desc->set_property = cw_battery_set_property;
874*4882a593Smuzhiyun 	cw_bat->cw_bat = devm_power_supply_register(&client->dev, psy_desc, &psy_cfg);
875*4882a593Smuzhiyun 	if (IS_ERR(cw_bat->cw_bat)) {
876*4882a593Smuzhiyun 		ret = PTR_ERR(cw_bat->cw_bat);
877*4882a593Smuzhiyun 		dev_err(cw_bat->dev, "failed to register battery: %d\n", ret);
878*4882a593Smuzhiyun 		return ret;
879*4882a593Smuzhiyun 	}
880*4882a593Smuzhiyun 
881*4882a593Smuzhiyun 	cw_bat->cwfg_workqueue = create_singlethread_workqueue("cwfg_gauge");
882*4882a593Smuzhiyun 	INIT_DELAYED_WORK(&cw_bat->battery_delay_work, cw_bat_work);
883*4882a593Smuzhiyun 	queue_delayed_work(cw_bat->cwfg_workqueue,
884*4882a593Smuzhiyun 			   &cw_bat->battery_delay_work,
885*4882a593Smuzhiyun 			   msecs_to_jiffies(queue_start_work_time));
886*4882a593Smuzhiyun 
887*4882a593Smuzhiyun 	cw_printk("cw221X driver probe success!\n");
888*4882a593Smuzhiyun 
889*4882a593Smuzhiyun 	return 0;
890*4882a593Smuzhiyun }
891*4882a593Smuzhiyun 
cw221X_remove(struct i2c_client * client)892*4882a593Smuzhiyun static int cw221X_remove(struct i2c_client *client)
893*4882a593Smuzhiyun {
894*4882a593Smuzhiyun 	struct cw_battery *cw_bat = i2c_get_clientdata(client);
895*4882a593Smuzhiyun 
896*4882a593Smuzhiyun 	cancel_delayed_work_sync(&cw_bat->battery_delay_work);
897*4882a593Smuzhiyun 	destroy_workqueue(cw_bat->cwfg_workqueue);
898*4882a593Smuzhiyun 	return 0;
899*4882a593Smuzhiyun }
900*4882a593Smuzhiyun 
901*4882a593Smuzhiyun #ifdef CONFIG_PM
cw_bat_suspend(struct device * dev)902*4882a593Smuzhiyun static int cw_bat_suspend(struct device *dev)
903*4882a593Smuzhiyun {
904*4882a593Smuzhiyun 	struct i2c_client *client = to_i2c_client(dev);
905*4882a593Smuzhiyun 	struct cw_battery *cw_bat = i2c_get_clientdata(client);
906*4882a593Smuzhiyun 
907*4882a593Smuzhiyun 	cancel_delayed_work(&cw_bat->battery_delay_work);
908*4882a593Smuzhiyun 	return 0;
909*4882a593Smuzhiyun }
910*4882a593Smuzhiyun 
cw_bat_resume(struct device * dev)911*4882a593Smuzhiyun static int cw_bat_resume(struct device *dev)
912*4882a593Smuzhiyun {
913*4882a593Smuzhiyun 	struct i2c_client *client = to_i2c_client(dev);
914*4882a593Smuzhiyun 	struct cw_battery *cw_bat = i2c_get_clientdata(client);
915*4882a593Smuzhiyun 
916*4882a593Smuzhiyun 	queue_delayed_work(cw_bat->cwfg_workqueue,
917*4882a593Smuzhiyun 			   &cw_bat->battery_delay_work,
918*4882a593Smuzhiyun 			   msecs_to_jiffies(20));
919*4882a593Smuzhiyun 	return 0;
920*4882a593Smuzhiyun }
921*4882a593Smuzhiyun 
922*4882a593Smuzhiyun static const struct dev_pm_ops cw_bat_pm_ops = {
923*4882a593Smuzhiyun 	.suspend = cw_bat_suspend,
924*4882a593Smuzhiyun 	.resume = cw_bat_resume,
925*4882a593Smuzhiyun };
926*4882a593Smuzhiyun #endif
927*4882a593Smuzhiyun 
928*4882a593Smuzhiyun static const struct i2c_device_id cw221X_id_table[] = {
929*4882a593Smuzhiyun 	{ CWFG_NAME, 0 },
930*4882a593Smuzhiyun 	{ }
931*4882a593Smuzhiyun };
932*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, cw221X_id_table);
933*4882a593Smuzhiyun 
934*4882a593Smuzhiyun #ifdef CONFIG_OF
935*4882a593Smuzhiyun static const struct of_device_id cw221X_match_table[] = {
936*4882a593Smuzhiyun 	{ .compatible = "cellwise,cw221X", },
937*4882a593Smuzhiyun 	{ },
938*4882a593Smuzhiyun };
939*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, cw221X_match_table);
940*4882a593Smuzhiyun #endif
941*4882a593Smuzhiyun 
942*4882a593Smuzhiyun static struct i2c_driver cw221X_driver = {
943*4882a593Smuzhiyun 	.driver = {
944*4882a593Smuzhiyun 		.name = CWFG_NAME,
945*4882a593Smuzhiyun #ifdef CONFIG_PM
946*4882a593Smuzhiyun 		.pm = &cw_bat_pm_ops,
947*4882a593Smuzhiyun #endif
948*4882a593Smuzhiyun 		.owner = THIS_MODULE,
949*4882a593Smuzhiyun 		.of_match_table = of_match_ptr(cw221X_match_table),
950*4882a593Smuzhiyun 	},
951*4882a593Smuzhiyun 	.probe = cw221X_probe,
952*4882a593Smuzhiyun 	.remove = cw221X_remove,
953*4882a593Smuzhiyun 	.id_table = cw221X_id_table,
954*4882a593Smuzhiyun };
955*4882a593Smuzhiyun 
956*4882a593Smuzhiyun module_i2c_driver(cw221X_driver);
957*4882a593Smuzhiyun 
958*4882a593Smuzhiyun MODULE_AUTHOR("Xu Shengfei <xsf@rock-chips.com>");
959*4882a593Smuzhiyun MODULE_DESCRIPTION("CW221X FGADC Device Driver V0.1");
960*4882a593Smuzhiyun MODULE_LICENSE("GPL");
961