xref: /OK3568_Linux_fs/kernel/drivers/power/supply/bq24257_charger.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * TI BQ24257 charger driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2015 Intel Corporation
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Datasheets:
8*4882a593Smuzhiyun  * https://www.ti.com/product/bq24250
9*4882a593Smuzhiyun  * https://www.ti.com/product/bq24251
10*4882a593Smuzhiyun  * https://www.ti.com/product/bq24257
11*4882a593Smuzhiyun  */
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun #include <linux/i2c.h>
15*4882a593Smuzhiyun #include <linux/power_supply.h>
16*4882a593Smuzhiyun #include <linux/regmap.h>
17*4882a593Smuzhiyun #include <linux/types.h>
18*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
19*4882a593Smuzhiyun #include <linux/interrupt.h>
20*4882a593Smuzhiyun #include <linux/delay.h>
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #include <linux/acpi.h>
23*4882a593Smuzhiyun #include <linux/of.h>
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #define BQ24257_REG_1			0x00
26*4882a593Smuzhiyun #define BQ24257_REG_2			0x01
27*4882a593Smuzhiyun #define BQ24257_REG_3			0x02
28*4882a593Smuzhiyun #define BQ24257_REG_4			0x03
29*4882a593Smuzhiyun #define BQ24257_REG_5			0x04
30*4882a593Smuzhiyun #define BQ24257_REG_6			0x05
31*4882a593Smuzhiyun #define BQ24257_REG_7			0x06
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun #define BQ24257_MANUFACTURER		"Texas Instruments"
34*4882a593Smuzhiyun #define BQ24257_PG_GPIO			"pg"
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun #define BQ24257_ILIM_SET_DELAY		1000	/* msec */
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun /*
39*4882a593Smuzhiyun  * When adding support for new devices make sure that enum bq2425x_chip and
40*4882a593Smuzhiyun  * bq2425x_chip_name[] always stay in sync!
41*4882a593Smuzhiyun  */
42*4882a593Smuzhiyun enum bq2425x_chip {
43*4882a593Smuzhiyun 	BQ24250,
44*4882a593Smuzhiyun 	BQ24251,
45*4882a593Smuzhiyun 	BQ24257,
46*4882a593Smuzhiyun };
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun static const char *const bq2425x_chip_name[] = {
49*4882a593Smuzhiyun 	"bq24250",
50*4882a593Smuzhiyun 	"bq24251",
51*4882a593Smuzhiyun 	"bq24257",
52*4882a593Smuzhiyun };
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun enum bq24257_fields {
55*4882a593Smuzhiyun 	F_WD_FAULT, F_WD_EN, F_STAT, F_FAULT,			    /* REG 1 */
56*4882a593Smuzhiyun 	F_RESET, F_IILIMIT, F_EN_STAT, F_EN_TERM, F_CE, F_HZ_MODE,  /* REG 2 */
57*4882a593Smuzhiyun 	F_VBAT, F_USB_DET,					    /* REG 3 */
58*4882a593Smuzhiyun 	F_ICHG, F_ITERM,					    /* REG 4 */
59*4882a593Smuzhiyun 	F_LOOP_STATUS, F_LOW_CHG, F_DPDM_EN, F_CE_STATUS, F_VINDPM, /* REG 5 */
60*4882a593Smuzhiyun 	F_X2_TMR_EN, F_TMR, F_SYSOFF, F_TS_EN, F_TS_STAT,	    /* REG 6 */
61*4882a593Smuzhiyun 	F_VOVP, F_CLR_VDP, F_FORCE_BATDET, F_FORCE_PTM,		    /* REG 7 */
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun 	F_MAX_FIELDS
64*4882a593Smuzhiyun };
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun /* initial field values, converted from uV/uA */
67*4882a593Smuzhiyun struct bq24257_init_data {
68*4882a593Smuzhiyun 	u8 ichg;	/* charge current      */
69*4882a593Smuzhiyun 	u8 vbat;	/* regulation voltage  */
70*4882a593Smuzhiyun 	u8 iterm;	/* termination current */
71*4882a593Smuzhiyun 	u8 iilimit;	/* input current limit */
72*4882a593Smuzhiyun 	u8 vovp;	/* over voltage protection voltage */
73*4882a593Smuzhiyun 	u8 vindpm;	/* VDMP input threshold voltage */
74*4882a593Smuzhiyun };
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun struct bq24257_state {
77*4882a593Smuzhiyun 	u8 status;
78*4882a593Smuzhiyun 	u8 fault;
79*4882a593Smuzhiyun 	bool power_good;
80*4882a593Smuzhiyun };
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun struct bq24257_device {
83*4882a593Smuzhiyun 	struct i2c_client *client;
84*4882a593Smuzhiyun 	struct device *dev;
85*4882a593Smuzhiyun 	struct power_supply *charger;
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun 	enum bq2425x_chip chip;
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun 	struct regmap *rmap;
90*4882a593Smuzhiyun 	struct regmap_field *rmap_fields[F_MAX_FIELDS];
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	struct gpio_desc *pg;
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun 	struct delayed_work iilimit_setup_work;
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 	struct bq24257_init_data init_data;
97*4882a593Smuzhiyun 	struct bq24257_state state;
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun 	struct mutex lock; /* protect state data */
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun 	bool iilimit_autoset_enable;
102*4882a593Smuzhiyun };
103*4882a593Smuzhiyun 
bq24257_is_volatile_reg(struct device * dev,unsigned int reg)104*4882a593Smuzhiyun static bool bq24257_is_volatile_reg(struct device *dev, unsigned int reg)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun 	switch (reg) {
107*4882a593Smuzhiyun 	case BQ24257_REG_2:
108*4882a593Smuzhiyun 	case BQ24257_REG_4:
109*4882a593Smuzhiyun 		return false;
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun 	default:
112*4882a593Smuzhiyun 		return true;
113*4882a593Smuzhiyun 	}
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun static const struct regmap_config bq24257_regmap_config = {
117*4882a593Smuzhiyun 	.reg_bits = 8,
118*4882a593Smuzhiyun 	.val_bits = 8,
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	.max_register = BQ24257_REG_7,
121*4882a593Smuzhiyun 	.cache_type = REGCACHE_RBTREE,
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	.volatile_reg = bq24257_is_volatile_reg,
124*4882a593Smuzhiyun };
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun static const struct reg_field bq24257_reg_fields[] = {
127*4882a593Smuzhiyun 	/* REG 1 */
128*4882a593Smuzhiyun 	[F_WD_FAULT]		= REG_FIELD(BQ24257_REG_1, 7, 7),
129*4882a593Smuzhiyun 	[F_WD_EN]		= REG_FIELD(BQ24257_REG_1, 6, 6),
130*4882a593Smuzhiyun 	[F_STAT]		= REG_FIELD(BQ24257_REG_1, 4, 5),
131*4882a593Smuzhiyun 	[F_FAULT]		= REG_FIELD(BQ24257_REG_1, 0, 3),
132*4882a593Smuzhiyun 	/* REG 2 */
133*4882a593Smuzhiyun 	[F_RESET]		= REG_FIELD(BQ24257_REG_2, 7, 7),
134*4882a593Smuzhiyun 	[F_IILIMIT]		= REG_FIELD(BQ24257_REG_2, 4, 6),
135*4882a593Smuzhiyun 	[F_EN_STAT]		= REG_FIELD(BQ24257_REG_2, 3, 3),
136*4882a593Smuzhiyun 	[F_EN_TERM]		= REG_FIELD(BQ24257_REG_2, 2, 2),
137*4882a593Smuzhiyun 	[F_CE]			= REG_FIELD(BQ24257_REG_2, 1, 1),
138*4882a593Smuzhiyun 	[F_HZ_MODE]		= REG_FIELD(BQ24257_REG_2, 0, 0),
139*4882a593Smuzhiyun 	/* REG 3 */
140*4882a593Smuzhiyun 	[F_VBAT]		= REG_FIELD(BQ24257_REG_3, 2, 7),
141*4882a593Smuzhiyun 	[F_USB_DET]		= REG_FIELD(BQ24257_REG_3, 0, 1),
142*4882a593Smuzhiyun 	/* REG 4 */
143*4882a593Smuzhiyun 	[F_ICHG]		= REG_FIELD(BQ24257_REG_4, 3, 7),
144*4882a593Smuzhiyun 	[F_ITERM]		= REG_FIELD(BQ24257_REG_4, 0, 2),
145*4882a593Smuzhiyun 	/* REG 5 */
146*4882a593Smuzhiyun 	[F_LOOP_STATUS]		= REG_FIELD(BQ24257_REG_5, 6, 7),
147*4882a593Smuzhiyun 	[F_LOW_CHG]		= REG_FIELD(BQ24257_REG_5, 5, 5),
148*4882a593Smuzhiyun 	[F_DPDM_EN]		= REG_FIELD(BQ24257_REG_5, 4, 4),
149*4882a593Smuzhiyun 	[F_CE_STATUS]		= REG_FIELD(BQ24257_REG_5, 3, 3),
150*4882a593Smuzhiyun 	[F_VINDPM]		= REG_FIELD(BQ24257_REG_5, 0, 2),
151*4882a593Smuzhiyun 	/* REG 6 */
152*4882a593Smuzhiyun 	[F_X2_TMR_EN]		= REG_FIELD(BQ24257_REG_6, 7, 7),
153*4882a593Smuzhiyun 	[F_TMR]			= REG_FIELD(BQ24257_REG_6, 5, 6),
154*4882a593Smuzhiyun 	[F_SYSOFF]		= REG_FIELD(BQ24257_REG_6, 4, 4),
155*4882a593Smuzhiyun 	[F_TS_EN]		= REG_FIELD(BQ24257_REG_6, 3, 3),
156*4882a593Smuzhiyun 	[F_TS_STAT]		= REG_FIELD(BQ24257_REG_6, 0, 2),
157*4882a593Smuzhiyun 	/* REG 7 */
158*4882a593Smuzhiyun 	[F_VOVP]		= REG_FIELD(BQ24257_REG_7, 5, 7),
159*4882a593Smuzhiyun 	[F_CLR_VDP]		= REG_FIELD(BQ24257_REG_7, 4, 4),
160*4882a593Smuzhiyun 	[F_FORCE_BATDET]	= REG_FIELD(BQ24257_REG_7, 3, 3),
161*4882a593Smuzhiyun 	[F_FORCE_PTM]		= REG_FIELD(BQ24257_REG_7, 2, 2)
162*4882a593Smuzhiyun };
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun static const u32 bq24257_vbat_map[] = {
165*4882a593Smuzhiyun 	3500000, 3520000, 3540000, 3560000, 3580000, 3600000, 3620000, 3640000,
166*4882a593Smuzhiyun 	3660000, 3680000, 3700000, 3720000, 3740000, 3760000, 3780000, 3800000,
167*4882a593Smuzhiyun 	3820000, 3840000, 3860000, 3880000, 3900000, 3920000, 3940000, 3960000,
168*4882a593Smuzhiyun 	3980000, 4000000, 4020000, 4040000, 4060000, 4080000, 4100000, 4120000,
169*4882a593Smuzhiyun 	4140000, 4160000, 4180000, 4200000, 4220000, 4240000, 4260000, 4280000,
170*4882a593Smuzhiyun 	4300000, 4320000, 4340000, 4360000, 4380000, 4400000, 4420000, 4440000
171*4882a593Smuzhiyun };
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun #define BQ24257_VBAT_MAP_SIZE		ARRAY_SIZE(bq24257_vbat_map)
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun static const u32 bq24257_ichg_map[] = {
176*4882a593Smuzhiyun 	500000, 550000, 600000, 650000, 700000, 750000, 800000, 850000, 900000,
177*4882a593Smuzhiyun 	950000, 1000000, 1050000, 1100000, 1150000, 1200000, 1250000, 1300000,
178*4882a593Smuzhiyun 	1350000, 1400000, 1450000, 1500000, 1550000, 1600000, 1650000, 1700000,
179*4882a593Smuzhiyun 	1750000, 1800000, 1850000, 1900000, 1950000, 2000000
180*4882a593Smuzhiyun };
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun #define BQ24257_ICHG_MAP_SIZE		ARRAY_SIZE(bq24257_ichg_map)
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun static const u32 bq24257_iterm_map[] = {
185*4882a593Smuzhiyun 	50000, 75000, 100000, 125000, 150000, 175000, 200000, 225000
186*4882a593Smuzhiyun };
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun #define BQ24257_ITERM_MAP_SIZE		ARRAY_SIZE(bq24257_iterm_map)
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun static const u32 bq24257_iilimit_map[] = {
191*4882a593Smuzhiyun 	100000, 150000, 500000, 900000, 1500000, 2000000
192*4882a593Smuzhiyun };
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun #define BQ24257_IILIMIT_MAP_SIZE	ARRAY_SIZE(bq24257_iilimit_map)
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun static const u32 bq24257_vovp_map[] = {
197*4882a593Smuzhiyun 	6000000, 6500000, 7000000, 8000000, 9000000, 9500000, 10000000,
198*4882a593Smuzhiyun 	10500000
199*4882a593Smuzhiyun };
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun #define BQ24257_VOVP_MAP_SIZE		ARRAY_SIZE(bq24257_vovp_map)
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun static const u32 bq24257_vindpm_map[] = {
204*4882a593Smuzhiyun 	4200000, 4280000, 4360000, 4440000, 4520000, 4600000, 4680000,
205*4882a593Smuzhiyun 	4760000
206*4882a593Smuzhiyun };
207*4882a593Smuzhiyun 
208*4882a593Smuzhiyun #define BQ24257_VINDPM_MAP_SIZE		ARRAY_SIZE(bq24257_vindpm_map)
209*4882a593Smuzhiyun 
bq24257_field_read(struct bq24257_device * bq,enum bq24257_fields field_id)210*4882a593Smuzhiyun static int bq24257_field_read(struct bq24257_device *bq,
211*4882a593Smuzhiyun 			      enum bq24257_fields field_id)
212*4882a593Smuzhiyun {
213*4882a593Smuzhiyun 	int ret;
214*4882a593Smuzhiyun 	int val;
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun 	ret = regmap_field_read(bq->rmap_fields[field_id], &val);
217*4882a593Smuzhiyun 	if (ret < 0)
218*4882a593Smuzhiyun 		return ret;
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 	return val;
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun 
bq24257_field_write(struct bq24257_device * bq,enum bq24257_fields field_id,u8 val)223*4882a593Smuzhiyun static int bq24257_field_write(struct bq24257_device *bq,
224*4882a593Smuzhiyun 			       enum bq24257_fields field_id, u8 val)
225*4882a593Smuzhiyun {
226*4882a593Smuzhiyun 	return regmap_field_write(bq->rmap_fields[field_id], val);
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun 
bq24257_find_idx(u32 value,const u32 * map,u8 map_size)229*4882a593Smuzhiyun static u8 bq24257_find_idx(u32 value, const u32 *map, u8 map_size)
230*4882a593Smuzhiyun {
231*4882a593Smuzhiyun 	u8 idx;
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun 	for (idx = 1; idx < map_size; idx++)
234*4882a593Smuzhiyun 		if (value < map[idx])
235*4882a593Smuzhiyun 			break;
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun 	return idx - 1;
238*4882a593Smuzhiyun }
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun enum bq24257_status {
241*4882a593Smuzhiyun 	STATUS_READY,
242*4882a593Smuzhiyun 	STATUS_CHARGE_IN_PROGRESS,
243*4882a593Smuzhiyun 	STATUS_CHARGE_DONE,
244*4882a593Smuzhiyun 	STATUS_FAULT,
245*4882a593Smuzhiyun };
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun enum bq24257_fault {
248*4882a593Smuzhiyun 	FAULT_NORMAL,
249*4882a593Smuzhiyun 	FAULT_INPUT_OVP,
250*4882a593Smuzhiyun 	FAULT_INPUT_UVLO,
251*4882a593Smuzhiyun 	FAULT_SLEEP,
252*4882a593Smuzhiyun 	FAULT_BAT_TS,
253*4882a593Smuzhiyun 	FAULT_BAT_OVP,
254*4882a593Smuzhiyun 	FAULT_TS,
255*4882a593Smuzhiyun 	FAULT_TIMER,
256*4882a593Smuzhiyun 	FAULT_NO_BAT,
257*4882a593Smuzhiyun 	FAULT_ISET,
258*4882a593Smuzhiyun 	FAULT_INPUT_LDO_LOW,
259*4882a593Smuzhiyun };
260*4882a593Smuzhiyun 
bq24257_get_input_current_limit(struct bq24257_device * bq,union power_supply_propval * val)261*4882a593Smuzhiyun static int bq24257_get_input_current_limit(struct bq24257_device *bq,
262*4882a593Smuzhiyun 					   union power_supply_propval *val)
263*4882a593Smuzhiyun {
264*4882a593Smuzhiyun 	int ret;
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun 	ret = bq24257_field_read(bq, F_IILIMIT);
267*4882a593Smuzhiyun 	if (ret < 0)
268*4882a593Smuzhiyun 		return ret;
269*4882a593Smuzhiyun 
270*4882a593Smuzhiyun 	/*
271*4882a593Smuzhiyun 	 * The "External ILIM" and "Production & Test" modes are not exposed
272*4882a593Smuzhiyun 	 * through this driver and not being covered by the lookup table.
273*4882a593Smuzhiyun 	 * Should such a mode have become active let's return an error rather
274*4882a593Smuzhiyun 	 * than exceeding the bounds of the lookup table and returning
275*4882a593Smuzhiyun 	 * garbage.
276*4882a593Smuzhiyun 	 */
277*4882a593Smuzhiyun 	if (ret >= BQ24257_IILIMIT_MAP_SIZE)
278*4882a593Smuzhiyun 		return -ENODATA;
279*4882a593Smuzhiyun 
280*4882a593Smuzhiyun 	val->intval = bq24257_iilimit_map[ret];
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun 	return 0;
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun 
bq24257_set_input_current_limit(struct bq24257_device * bq,const union power_supply_propval * val)285*4882a593Smuzhiyun static int bq24257_set_input_current_limit(struct bq24257_device *bq,
286*4882a593Smuzhiyun 					const union power_supply_propval *val)
287*4882a593Smuzhiyun {
288*4882a593Smuzhiyun 	/*
289*4882a593Smuzhiyun 	 * Address the case where the user manually sets an input current limit
290*4882a593Smuzhiyun 	 * while the charger auto-detection mechanism is is active. In this
291*4882a593Smuzhiyun 	 * case we want to abort and go straight to the user-specified value.
292*4882a593Smuzhiyun 	 */
293*4882a593Smuzhiyun 	if (bq->iilimit_autoset_enable)
294*4882a593Smuzhiyun 		cancel_delayed_work_sync(&bq->iilimit_setup_work);
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun 	return bq24257_field_write(bq, F_IILIMIT,
297*4882a593Smuzhiyun 				   bq24257_find_idx(val->intval,
298*4882a593Smuzhiyun 						    bq24257_iilimit_map,
299*4882a593Smuzhiyun 						    BQ24257_IILIMIT_MAP_SIZE));
300*4882a593Smuzhiyun }
301*4882a593Smuzhiyun 
bq24257_power_supply_get_property(struct power_supply * psy,enum power_supply_property psp,union power_supply_propval * val)302*4882a593Smuzhiyun static int bq24257_power_supply_get_property(struct power_supply *psy,
303*4882a593Smuzhiyun 					     enum power_supply_property psp,
304*4882a593Smuzhiyun 					     union power_supply_propval *val)
305*4882a593Smuzhiyun {
306*4882a593Smuzhiyun 	struct bq24257_device *bq = power_supply_get_drvdata(psy);
307*4882a593Smuzhiyun 	struct bq24257_state state;
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun 	mutex_lock(&bq->lock);
310*4882a593Smuzhiyun 	state = bq->state;
311*4882a593Smuzhiyun 	mutex_unlock(&bq->lock);
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 	switch (psp) {
314*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_STATUS:
315*4882a593Smuzhiyun 		if (!state.power_good)
316*4882a593Smuzhiyun 			val->intval = POWER_SUPPLY_STATUS_DISCHARGING;
317*4882a593Smuzhiyun 		else if (state.status == STATUS_READY)
318*4882a593Smuzhiyun 			val->intval = POWER_SUPPLY_STATUS_NOT_CHARGING;
319*4882a593Smuzhiyun 		else if (state.status == STATUS_CHARGE_IN_PROGRESS)
320*4882a593Smuzhiyun 			val->intval = POWER_SUPPLY_STATUS_CHARGING;
321*4882a593Smuzhiyun 		else if (state.status == STATUS_CHARGE_DONE)
322*4882a593Smuzhiyun 			val->intval = POWER_SUPPLY_STATUS_FULL;
323*4882a593Smuzhiyun 		else
324*4882a593Smuzhiyun 			val->intval = POWER_SUPPLY_STATUS_UNKNOWN;
325*4882a593Smuzhiyun 		break;
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_MANUFACTURER:
328*4882a593Smuzhiyun 		val->strval = BQ24257_MANUFACTURER;
329*4882a593Smuzhiyun 		break;
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_MODEL_NAME:
332*4882a593Smuzhiyun 		val->strval = bq2425x_chip_name[bq->chip];
333*4882a593Smuzhiyun 		break;
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_ONLINE:
336*4882a593Smuzhiyun 		val->intval = state.power_good;
337*4882a593Smuzhiyun 		break;
338*4882a593Smuzhiyun 
339*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_HEALTH:
340*4882a593Smuzhiyun 		switch (state.fault) {
341*4882a593Smuzhiyun 		case FAULT_NORMAL:
342*4882a593Smuzhiyun 			val->intval = POWER_SUPPLY_HEALTH_GOOD;
343*4882a593Smuzhiyun 			break;
344*4882a593Smuzhiyun 
345*4882a593Smuzhiyun 		case FAULT_INPUT_OVP:
346*4882a593Smuzhiyun 		case FAULT_BAT_OVP:
347*4882a593Smuzhiyun 			val->intval = POWER_SUPPLY_HEALTH_OVERVOLTAGE;
348*4882a593Smuzhiyun 			break;
349*4882a593Smuzhiyun 
350*4882a593Smuzhiyun 		case FAULT_TS:
351*4882a593Smuzhiyun 		case FAULT_BAT_TS:
352*4882a593Smuzhiyun 			val->intval = POWER_SUPPLY_HEALTH_OVERHEAT;
353*4882a593Smuzhiyun 			break;
354*4882a593Smuzhiyun 
355*4882a593Smuzhiyun 		case FAULT_TIMER:
356*4882a593Smuzhiyun 			val->intval = POWER_SUPPLY_HEALTH_SAFETY_TIMER_EXPIRE;
357*4882a593Smuzhiyun 			break;
358*4882a593Smuzhiyun 
359*4882a593Smuzhiyun 		default:
360*4882a593Smuzhiyun 			val->intval = POWER_SUPPLY_HEALTH_UNSPEC_FAILURE;
361*4882a593Smuzhiyun 			break;
362*4882a593Smuzhiyun 		}
363*4882a593Smuzhiyun 
364*4882a593Smuzhiyun 		break;
365*4882a593Smuzhiyun 
366*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT:
367*4882a593Smuzhiyun 		val->intval = bq24257_ichg_map[bq->init_data.ichg];
368*4882a593Smuzhiyun 		break;
369*4882a593Smuzhiyun 
370*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX:
371*4882a593Smuzhiyun 		val->intval = bq24257_ichg_map[BQ24257_ICHG_MAP_SIZE - 1];
372*4882a593Smuzhiyun 		break;
373*4882a593Smuzhiyun 
374*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE:
375*4882a593Smuzhiyun 		val->intval = bq24257_vbat_map[bq->init_data.vbat];
376*4882a593Smuzhiyun 		break;
377*4882a593Smuzhiyun 
378*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX:
379*4882a593Smuzhiyun 		val->intval = bq24257_vbat_map[BQ24257_VBAT_MAP_SIZE - 1];
380*4882a593Smuzhiyun 		break;
381*4882a593Smuzhiyun 
382*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT:
383*4882a593Smuzhiyun 		val->intval = bq24257_iterm_map[bq->init_data.iterm];
384*4882a593Smuzhiyun 		break;
385*4882a593Smuzhiyun 
386*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT:
387*4882a593Smuzhiyun 		return bq24257_get_input_current_limit(bq, val);
388*4882a593Smuzhiyun 
389*4882a593Smuzhiyun 	default:
390*4882a593Smuzhiyun 		return -EINVAL;
391*4882a593Smuzhiyun 	}
392*4882a593Smuzhiyun 
393*4882a593Smuzhiyun 	return 0;
394*4882a593Smuzhiyun }
395*4882a593Smuzhiyun 
bq24257_power_supply_set_property(struct power_supply * psy,enum power_supply_property prop,const union power_supply_propval * val)396*4882a593Smuzhiyun static int bq24257_power_supply_set_property(struct power_supply *psy,
397*4882a593Smuzhiyun 					enum power_supply_property prop,
398*4882a593Smuzhiyun 					const union power_supply_propval *val)
399*4882a593Smuzhiyun {
400*4882a593Smuzhiyun 	struct bq24257_device *bq = power_supply_get_drvdata(psy);
401*4882a593Smuzhiyun 
402*4882a593Smuzhiyun 	switch (prop) {
403*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT:
404*4882a593Smuzhiyun 		return bq24257_set_input_current_limit(bq, val);
405*4882a593Smuzhiyun 	default:
406*4882a593Smuzhiyun 		return -EINVAL;
407*4882a593Smuzhiyun 	}
408*4882a593Smuzhiyun }
409*4882a593Smuzhiyun 
bq24257_power_supply_property_is_writeable(struct power_supply * psy,enum power_supply_property psp)410*4882a593Smuzhiyun static int bq24257_power_supply_property_is_writeable(struct power_supply *psy,
411*4882a593Smuzhiyun 					enum power_supply_property psp)
412*4882a593Smuzhiyun {
413*4882a593Smuzhiyun 	switch (psp) {
414*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT:
415*4882a593Smuzhiyun 		return true;
416*4882a593Smuzhiyun 	default:
417*4882a593Smuzhiyun 		return false;
418*4882a593Smuzhiyun 	}
419*4882a593Smuzhiyun }
420*4882a593Smuzhiyun 
bq24257_get_chip_state(struct bq24257_device * bq,struct bq24257_state * state)421*4882a593Smuzhiyun static int bq24257_get_chip_state(struct bq24257_device *bq,
422*4882a593Smuzhiyun 				  struct bq24257_state *state)
423*4882a593Smuzhiyun {
424*4882a593Smuzhiyun 	int ret;
425*4882a593Smuzhiyun 
426*4882a593Smuzhiyun 	ret = bq24257_field_read(bq, F_STAT);
427*4882a593Smuzhiyun 	if (ret < 0)
428*4882a593Smuzhiyun 		return ret;
429*4882a593Smuzhiyun 
430*4882a593Smuzhiyun 	state->status = ret;
431*4882a593Smuzhiyun 
432*4882a593Smuzhiyun 	ret = bq24257_field_read(bq, F_FAULT);
433*4882a593Smuzhiyun 	if (ret < 0)
434*4882a593Smuzhiyun 		return ret;
435*4882a593Smuzhiyun 
436*4882a593Smuzhiyun 	state->fault = ret;
437*4882a593Smuzhiyun 
438*4882a593Smuzhiyun 	if (bq->pg)
439*4882a593Smuzhiyun 		state->power_good = !gpiod_get_value_cansleep(bq->pg);
440*4882a593Smuzhiyun 	else
441*4882a593Smuzhiyun 		/*
442*4882a593Smuzhiyun 		 * If we have a chip without a dedicated power-good GPIO or
443*4882a593Smuzhiyun 		 * some other explicit bit that would provide this information
444*4882a593Smuzhiyun 		 * assume the power is good if there is no supply related
445*4882a593Smuzhiyun 		 * fault - and not good otherwise. There is a possibility for
446*4882a593Smuzhiyun 		 * other errors to mask that power in fact is not good but this
447*4882a593Smuzhiyun 		 * is probably the best we can do here.
448*4882a593Smuzhiyun 		 */
449*4882a593Smuzhiyun 		switch (state->fault) {
450*4882a593Smuzhiyun 		case FAULT_INPUT_OVP:
451*4882a593Smuzhiyun 		case FAULT_INPUT_UVLO:
452*4882a593Smuzhiyun 		case FAULT_INPUT_LDO_LOW:
453*4882a593Smuzhiyun 			state->power_good = false;
454*4882a593Smuzhiyun 			break;
455*4882a593Smuzhiyun 		default:
456*4882a593Smuzhiyun 			state->power_good = true;
457*4882a593Smuzhiyun 		}
458*4882a593Smuzhiyun 
459*4882a593Smuzhiyun 	return 0;
460*4882a593Smuzhiyun }
461*4882a593Smuzhiyun 
bq24257_state_changed(struct bq24257_device * bq,struct bq24257_state * new_state)462*4882a593Smuzhiyun static bool bq24257_state_changed(struct bq24257_device *bq,
463*4882a593Smuzhiyun 				  struct bq24257_state *new_state)
464*4882a593Smuzhiyun {
465*4882a593Smuzhiyun 	int ret;
466*4882a593Smuzhiyun 
467*4882a593Smuzhiyun 	mutex_lock(&bq->lock);
468*4882a593Smuzhiyun 	ret = (bq->state.status != new_state->status ||
469*4882a593Smuzhiyun 	       bq->state.fault != new_state->fault ||
470*4882a593Smuzhiyun 	       bq->state.power_good != new_state->power_good);
471*4882a593Smuzhiyun 	mutex_unlock(&bq->lock);
472*4882a593Smuzhiyun 
473*4882a593Smuzhiyun 	return ret;
474*4882a593Smuzhiyun }
475*4882a593Smuzhiyun 
476*4882a593Smuzhiyun enum bq24257_loop_status {
477*4882a593Smuzhiyun 	LOOP_STATUS_NONE,
478*4882a593Smuzhiyun 	LOOP_STATUS_IN_DPM,
479*4882a593Smuzhiyun 	LOOP_STATUS_IN_CURRENT_LIMIT,
480*4882a593Smuzhiyun 	LOOP_STATUS_THERMAL,
481*4882a593Smuzhiyun };
482*4882a593Smuzhiyun 
483*4882a593Smuzhiyun enum bq24257_in_ilimit {
484*4882a593Smuzhiyun 	IILIMIT_100,
485*4882a593Smuzhiyun 	IILIMIT_150,
486*4882a593Smuzhiyun 	IILIMIT_500,
487*4882a593Smuzhiyun 	IILIMIT_900,
488*4882a593Smuzhiyun 	IILIMIT_1500,
489*4882a593Smuzhiyun 	IILIMIT_2000,
490*4882a593Smuzhiyun 	IILIMIT_EXT,
491*4882a593Smuzhiyun 	IILIMIT_NONE,
492*4882a593Smuzhiyun };
493*4882a593Smuzhiyun 
494*4882a593Smuzhiyun enum bq24257_vovp {
495*4882a593Smuzhiyun 	VOVP_6000,
496*4882a593Smuzhiyun 	VOVP_6500,
497*4882a593Smuzhiyun 	VOVP_7000,
498*4882a593Smuzhiyun 	VOVP_8000,
499*4882a593Smuzhiyun 	VOVP_9000,
500*4882a593Smuzhiyun 	VOVP_9500,
501*4882a593Smuzhiyun 	VOVP_10000,
502*4882a593Smuzhiyun 	VOVP_10500
503*4882a593Smuzhiyun };
504*4882a593Smuzhiyun 
505*4882a593Smuzhiyun enum bq24257_vindpm {
506*4882a593Smuzhiyun 	VINDPM_4200,
507*4882a593Smuzhiyun 	VINDPM_4280,
508*4882a593Smuzhiyun 	VINDPM_4360,
509*4882a593Smuzhiyun 	VINDPM_4440,
510*4882a593Smuzhiyun 	VINDPM_4520,
511*4882a593Smuzhiyun 	VINDPM_4600,
512*4882a593Smuzhiyun 	VINDPM_4680,
513*4882a593Smuzhiyun 	VINDPM_4760
514*4882a593Smuzhiyun };
515*4882a593Smuzhiyun 
516*4882a593Smuzhiyun enum bq24257_port_type {
517*4882a593Smuzhiyun 	PORT_TYPE_DCP,		/* Dedicated Charging Port */
518*4882a593Smuzhiyun 	PORT_TYPE_CDP,		/* Charging Downstream Port */
519*4882a593Smuzhiyun 	PORT_TYPE_SDP,		/* Standard Downstream Port */
520*4882a593Smuzhiyun 	PORT_TYPE_NON_STANDARD,
521*4882a593Smuzhiyun };
522*4882a593Smuzhiyun 
523*4882a593Smuzhiyun enum bq24257_safety_timer {
524*4882a593Smuzhiyun 	SAFETY_TIMER_45,
525*4882a593Smuzhiyun 	SAFETY_TIMER_360,
526*4882a593Smuzhiyun 	SAFETY_TIMER_540,
527*4882a593Smuzhiyun 	SAFETY_TIMER_NONE,
528*4882a593Smuzhiyun };
529*4882a593Smuzhiyun 
bq24257_iilimit_autoset(struct bq24257_device * bq)530*4882a593Smuzhiyun static int bq24257_iilimit_autoset(struct bq24257_device *bq)
531*4882a593Smuzhiyun {
532*4882a593Smuzhiyun 	int loop_status;
533*4882a593Smuzhiyun 	int iilimit;
534*4882a593Smuzhiyun 	int port_type;
535*4882a593Smuzhiyun 	int ret;
536*4882a593Smuzhiyun 	const u8 new_iilimit[] = {
537*4882a593Smuzhiyun 		[PORT_TYPE_DCP] = IILIMIT_2000,
538*4882a593Smuzhiyun 		[PORT_TYPE_CDP] = IILIMIT_2000,
539*4882a593Smuzhiyun 		[PORT_TYPE_SDP] = IILIMIT_500,
540*4882a593Smuzhiyun 		[PORT_TYPE_NON_STANDARD] = IILIMIT_500
541*4882a593Smuzhiyun 	};
542*4882a593Smuzhiyun 
543*4882a593Smuzhiyun 	ret = bq24257_field_read(bq, F_LOOP_STATUS);
544*4882a593Smuzhiyun 	if (ret < 0)
545*4882a593Smuzhiyun 		goto error;
546*4882a593Smuzhiyun 
547*4882a593Smuzhiyun 	loop_status = ret;
548*4882a593Smuzhiyun 
549*4882a593Smuzhiyun 	ret = bq24257_field_read(bq, F_IILIMIT);
550*4882a593Smuzhiyun 	if (ret < 0)
551*4882a593Smuzhiyun 		goto error;
552*4882a593Smuzhiyun 
553*4882a593Smuzhiyun 	iilimit = ret;
554*4882a593Smuzhiyun 
555*4882a593Smuzhiyun 	/*
556*4882a593Smuzhiyun 	 * All USB ports should be able to handle 500mA. If not, DPM will lower
557*4882a593Smuzhiyun 	 * the charging current to accommodate the power source. No need to set
558*4882a593Smuzhiyun 	 * a lower IILIMIT value.
559*4882a593Smuzhiyun 	 */
560*4882a593Smuzhiyun 	if (loop_status == LOOP_STATUS_IN_DPM && iilimit == IILIMIT_500)
561*4882a593Smuzhiyun 		return 0;
562*4882a593Smuzhiyun 
563*4882a593Smuzhiyun 	ret = bq24257_field_read(bq, F_USB_DET);
564*4882a593Smuzhiyun 	if (ret < 0)
565*4882a593Smuzhiyun 		goto error;
566*4882a593Smuzhiyun 
567*4882a593Smuzhiyun 	port_type = ret;
568*4882a593Smuzhiyun 
569*4882a593Smuzhiyun 	ret = bq24257_field_write(bq, F_IILIMIT, new_iilimit[port_type]);
570*4882a593Smuzhiyun 	if (ret < 0)
571*4882a593Smuzhiyun 		goto error;
572*4882a593Smuzhiyun 
573*4882a593Smuzhiyun 	ret = bq24257_field_write(bq, F_TMR, SAFETY_TIMER_360);
574*4882a593Smuzhiyun 	if (ret < 0)
575*4882a593Smuzhiyun 		goto error;
576*4882a593Smuzhiyun 
577*4882a593Smuzhiyun 	ret = bq24257_field_write(bq, F_CLR_VDP, 1);
578*4882a593Smuzhiyun 	if (ret < 0)
579*4882a593Smuzhiyun 		goto error;
580*4882a593Smuzhiyun 
581*4882a593Smuzhiyun 	dev_dbg(bq->dev, "port/loop = %d/%d -> iilimit = %d\n",
582*4882a593Smuzhiyun 		port_type, loop_status, new_iilimit[port_type]);
583*4882a593Smuzhiyun 
584*4882a593Smuzhiyun 	return 0;
585*4882a593Smuzhiyun 
586*4882a593Smuzhiyun error:
587*4882a593Smuzhiyun 	dev_err(bq->dev, "%s: Error communicating with the chip.\n", __func__);
588*4882a593Smuzhiyun 	return ret;
589*4882a593Smuzhiyun }
590*4882a593Smuzhiyun 
bq24257_iilimit_setup_work(struct work_struct * work)591*4882a593Smuzhiyun static void bq24257_iilimit_setup_work(struct work_struct *work)
592*4882a593Smuzhiyun {
593*4882a593Smuzhiyun 	struct bq24257_device *bq = container_of(work, struct bq24257_device,
594*4882a593Smuzhiyun 						 iilimit_setup_work.work);
595*4882a593Smuzhiyun 
596*4882a593Smuzhiyun 	bq24257_iilimit_autoset(bq);
597*4882a593Smuzhiyun }
598*4882a593Smuzhiyun 
bq24257_handle_state_change(struct bq24257_device * bq,struct bq24257_state * new_state)599*4882a593Smuzhiyun static void bq24257_handle_state_change(struct bq24257_device *bq,
600*4882a593Smuzhiyun 					struct bq24257_state *new_state)
601*4882a593Smuzhiyun {
602*4882a593Smuzhiyun 	int ret;
603*4882a593Smuzhiyun 	struct bq24257_state old_state;
604*4882a593Smuzhiyun 
605*4882a593Smuzhiyun 	mutex_lock(&bq->lock);
606*4882a593Smuzhiyun 	old_state = bq->state;
607*4882a593Smuzhiyun 	mutex_unlock(&bq->lock);
608*4882a593Smuzhiyun 
609*4882a593Smuzhiyun 	/*
610*4882a593Smuzhiyun 	 * Handle BQ2425x state changes observing whether the D+/D- based input
611*4882a593Smuzhiyun 	 * current limit autoset functionality is enabled.
612*4882a593Smuzhiyun 	 */
613*4882a593Smuzhiyun 	if (!new_state->power_good) {
614*4882a593Smuzhiyun 		dev_dbg(bq->dev, "Power removed\n");
615*4882a593Smuzhiyun 		if (bq->iilimit_autoset_enable) {
616*4882a593Smuzhiyun 			cancel_delayed_work_sync(&bq->iilimit_setup_work);
617*4882a593Smuzhiyun 
618*4882a593Smuzhiyun 			/* activate D+/D- port detection algorithm */
619*4882a593Smuzhiyun 			ret = bq24257_field_write(bq, F_DPDM_EN, 1);
620*4882a593Smuzhiyun 			if (ret < 0)
621*4882a593Smuzhiyun 				goto error;
622*4882a593Smuzhiyun 		}
623*4882a593Smuzhiyun 		/*
624*4882a593Smuzhiyun 		 * When power is removed always return to the default input
625*4882a593Smuzhiyun 		 * current limit as configured during probe.
626*4882a593Smuzhiyun 		 */
627*4882a593Smuzhiyun 		ret = bq24257_field_write(bq, F_IILIMIT, bq->init_data.iilimit);
628*4882a593Smuzhiyun 		if (ret < 0)
629*4882a593Smuzhiyun 			goto error;
630*4882a593Smuzhiyun 	} else if (!old_state.power_good) {
631*4882a593Smuzhiyun 		dev_dbg(bq->dev, "Power inserted\n");
632*4882a593Smuzhiyun 
633*4882a593Smuzhiyun 		if (bq->iilimit_autoset_enable)
634*4882a593Smuzhiyun 			/* configure input current limit */
635*4882a593Smuzhiyun 			schedule_delayed_work(&bq->iilimit_setup_work,
636*4882a593Smuzhiyun 				      msecs_to_jiffies(BQ24257_ILIM_SET_DELAY));
637*4882a593Smuzhiyun 	} else if (new_state->fault == FAULT_NO_BAT) {
638*4882a593Smuzhiyun 		dev_warn(bq->dev, "Battery removed\n");
639*4882a593Smuzhiyun 	} else if (new_state->fault == FAULT_TIMER) {
640*4882a593Smuzhiyun 		dev_err(bq->dev, "Safety timer expired! Battery dead?\n");
641*4882a593Smuzhiyun 	}
642*4882a593Smuzhiyun 
643*4882a593Smuzhiyun 	return;
644*4882a593Smuzhiyun 
645*4882a593Smuzhiyun error:
646*4882a593Smuzhiyun 	dev_err(bq->dev, "%s: Error communicating with the chip.\n", __func__);
647*4882a593Smuzhiyun }
648*4882a593Smuzhiyun 
bq24257_irq_handler_thread(int irq,void * private)649*4882a593Smuzhiyun static irqreturn_t bq24257_irq_handler_thread(int irq, void *private)
650*4882a593Smuzhiyun {
651*4882a593Smuzhiyun 	int ret;
652*4882a593Smuzhiyun 	struct bq24257_device *bq = private;
653*4882a593Smuzhiyun 	struct bq24257_state state;
654*4882a593Smuzhiyun 
655*4882a593Smuzhiyun 	ret = bq24257_get_chip_state(bq, &state);
656*4882a593Smuzhiyun 	if (ret < 0)
657*4882a593Smuzhiyun 		return IRQ_HANDLED;
658*4882a593Smuzhiyun 
659*4882a593Smuzhiyun 	if (!bq24257_state_changed(bq, &state))
660*4882a593Smuzhiyun 		return IRQ_HANDLED;
661*4882a593Smuzhiyun 
662*4882a593Smuzhiyun 	dev_dbg(bq->dev, "irq(state changed): status/fault/pg = %d/%d/%d\n",
663*4882a593Smuzhiyun 		state.status, state.fault, state.power_good);
664*4882a593Smuzhiyun 
665*4882a593Smuzhiyun 	bq24257_handle_state_change(bq, &state);
666*4882a593Smuzhiyun 
667*4882a593Smuzhiyun 	mutex_lock(&bq->lock);
668*4882a593Smuzhiyun 	bq->state = state;
669*4882a593Smuzhiyun 	mutex_unlock(&bq->lock);
670*4882a593Smuzhiyun 
671*4882a593Smuzhiyun 	power_supply_changed(bq->charger);
672*4882a593Smuzhiyun 
673*4882a593Smuzhiyun 	return IRQ_HANDLED;
674*4882a593Smuzhiyun }
675*4882a593Smuzhiyun 
bq24257_hw_init(struct bq24257_device * bq)676*4882a593Smuzhiyun static int bq24257_hw_init(struct bq24257_device *bq)
677*4882a593Smuzhiyun {
678*4882a593Smuzhiyun 	int ret;
679*4882a593Smuzhiyun 	int i;
680*4882a593Smuzhiyun 	struct bq24257_state state;
681*4882a593Smuzhiyun 
682*4882a593Smuzhiyun 	const struct {
683*4882a593Smuzhiyun 		int field;
684*4882a593Smuzhiyun 		u32 value;
685*4882a593Smuzhiyun 	} init_data[] = {
686*4882a593Smuzhiyun 		{F_ICHG, bq->init_data.ichg},
687*4882a593Smuzhiyun 		{F_VBAT, bq->init_data.vbat},
688*4882a593Smuzhiyun 		{F_ITERM, bq->init_data.iterm},
689*4882a593Smuzhiyun 		{F_VOVP, bq->init_data.vovp},
690*4882a593Smuzhiyun 		{F_VINDPM, bq->init_data.vindpm},
691*4882a593Smuzhiyun 	};
692*4882a593Smuzhiyun 
693*4882a593Smuzhiyun 	/*
694*4882a593Smuzhiyun 	 * Disable the watchdog timer to prevent the IC from going back to
695*4882a593Smuzhiyun 	 * default settings after 50 seconds of I2C inactivity.
696*4882a593Smuzhiyun 	 */
697*4882a593Smuzhiyun 	ret = bq24257_field_write(bq, F_WD_EN, 0);
698*4882a593Smuzhiyun 	if (ret < 0)
699*4882a593Smuzhiyun 		return ret;
700*4882a593Smuzhiyun 
701*4882a593Smuzhiyun 	/* configure the charge currents and voltages */
702*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(init_data); i++) {
703*4882a593Smuzhiyun 		ret = bq24257_field_write(bq, init_data[i].field,
704*4882a593Smuzhiyun 					  init_data[i].value);
705*4882a593Smuzhiyun 		if (ret < 0)
706*4882a593Smuzhiyun 			return ret;
707*4882a593Smuzhiyun 	}
708*4882a593Smuzhiyun 
709*4882a593Smuzhiyun 	ret = bq24257_get_chip_state(bq, &state);
710*4882a593Smuzhiyun 	if (ret < 0)
711*4882a593Smuzhiyun 		return ret;
712*4882a593Smuzhiyun 
713*4882a593Smuzhiyun 	mutex_lock(&bq->lock);
714*4882a593Smuzhiyun 	bq->state = state;
715*4882a593Smuzhiyun 	mutex_unlock(&bq->lock);
716*4882a593Smuzhiyun 
717*4882a593Smuzhiyun 	if (!bq->iilimit_autoset_enable) {
718*4882a593Smuzhiyun 		dev_dbg(bq->dev, "manually setting iilimit = %u\n",
719*4882a593Smuzhiyun 			bq->init_data.iilimit);
720*4882a593Smuzhiyun 
721*4882a593Smuzhiyun 		/* program fixed input current limit */
722*4882a593Smuzhiyun 		ret = bq24257_field_write(bq, F_IILIMIT,
723*4882a593Smuzhiyun 					  bq->init_data.iilimit);
724*4882a593Smuzhiyun 		if (ret < 0)
725*4882a593Smuzhiyun 			return ret;
726*4882a593Smuzhiyun 	} else if (!state.power_good)
727*4882a593Smuzhiyun 		/* activate D+/D- detection algorithm */
728*4882a593Smuzhiyun 		ret = bq24257_field_write(bq, F_DPDM_EN, 1);
729*4882a593Smuzhiyun 	else if (state.fault != FAULT_NO_BAT)
730*4882a593Smuzhiyun 		ret = bq24257_iilimit_autoset(bq);
731*4882a593Smuzhiyun 
732*4882a593Smuzhiyun 	return ret;
733*4882a593Smuzhiyun }
734*4882a593Smuzhiyun 
735*4882a593Smuzhiyun static enum power_supply_property bq24257_power_supply_props[] = {
736*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_MANUFACTURER,
737*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_MODEL_NAME,
738*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_STATUS,
739*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_ONLINE,
740*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_HEALTH,
741*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT,
742*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX,
743*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE,
744*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX,
745*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT,
746*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT,
747*4882a593Smuzhiyun };
748*4882a593Smuzhiyun 
749*4882a593Smuzhiyun static char *bq24257_charger_supplied_to[] = {
750*4882a593Smuzhiyun 	"main-battery",
751*4882a593Smuzhiyun };
752*4882a593Smuzhiyun 
753*4882a593Smuzhiyun static const struct power_supply_desc bq24257_power_supply_desc = {
754*4882a593Smuzhiyun 	.name = "bq24257-charger",
755*4882a593Smuzhiyun 	.type = POWER_SUPPLY_TYPE_USB,
756*4882a593Smuzhiyun 	.properties = bq24257_power_supply_props,
757*4882a593Smuzhiyun 	.num_properties = ARRAY_SIZE(bq24257_power_supply_props),
758*4882a593Smuzhiyun 	.get_property = bq24257_power_supply_get_property,
759*4882a593Smuzhiyun 	.set_property = bq24257_power_supply_set_property,
760*4882a593Smuzhiyun 	.property_is_writeable = bq24257_power_supply_property_is_writeable,
761*4882a593Smuzhiyun };
762*4882a593Smuzhiyun 
bq24257_show_ovp_voltage(struct device * dev,struct device_attribute * attr,char * buf)763*4882a593Smuzhiyun static ssize_t bq24257_show_ovp_voltage(struct device *dev,
764*4882a593Smuzhiyun 					struct device_attribute *attr,
765*4882a593Smuzhiyun 					char *buf)
766*4882a593Smuzhiyun {
767*4882a593Smuzhiyun 	struct power_supply *psy = dev_get_drvdata(dev);
768*4882a593Smuzhiyun 	struct bq24257_device *bq = power_supply_get_drvdata(psy);
769*4882a593Smuzhiyun 
770*4882a593Smuzhiyun 	return scnprintf(buf, PAGE_SIZE, "%u\n",
771*4882a593Smuzhiyun 			 bq24257_vovp_map[bq->init_data.vovp]);
772*4882a593Smuzhiyun }
773*4882a593Smuzhiyun 
bq24257_show_in_dpm_voltage(struct device * dev,struct device_attribute * attr,char * buf)774*4882a593Smuzhiyun static ssize_t bq24257_show_in_dpm_voltage(struct device *dev,
775*4882a593Smuzhiyun 					   struct device_attribute *attr,
776*4882a593Smuzhiyun 					   char *buf)
777*4882a593Smuzhiyun {
778*4882a593Smuzhiyun 	struct power_supply *psy = dev_get_drvdata(dev);
779*4882a593Smuzhiyun 	struct bq24257_device *bq = power_supply_get_drvdata(psy);
780*4882a593Smuzhiyun 
781*4882a593Smuzhiyun 	return scnprintf(buf, PAGE_SIZE, "%u\n",
782*4882a593Smuzhiyun 			 bq24257_vindpm_map[bq->init_data.vindpm]);
783*4882a593Smuzhiyun }
784*4882a593Smuzhiyun 
bq24257_sysfs_show_enable(struct device * dev,struct device_attribute * attr,char * buf)785*4882a593Smuzhiyun static ssize_t bq24257_sysfs_show_enable(struct device *dev,
786*4882a593Smuzhiyun 					 struct device_attribute *attr,
787*4882a593Smuzhiyun 					 char *buf)
788*4882a593Smuzhiyun {
789*4882a593Smuzhiyun 	struct power_supply *psy = dev_get_drvdata(dev);
790*4882a593Smuzhiyun 	struct bq24257_device *bq = power_supply_get_drvdata(psy);
791*4882a593Smuzhiyun 	int ret;
792*4882a593Smuzhiyun 
793*4882a593Smuzhiyun 	if (strcmp(attr->attr.name, "high_impedance_enable") == 0)
794*4882a593Smuzhiyun 		ret = bq24257_field_read(bq, F_HZ_MODE);
795*4882a593Smuzhiyun 	else if (strcmp(attr->attr.name, "sysoff_enable") == 0)
796*4882a593Smuzhiyun 		ret = bq24257_field_read(bq, F_SYSOFF);
797*4882a593Smuzhiyun 	else
798*4882a593Smuzhiyun 		return -EINVAL;
799*4882a593Smuzhiyun 
800*4882a593Smuzhiyun 	if (ret < 0)
801*4882a593Smuzhiyun 		return ret;
802*4882a593Smuzhiyun 
803*4882a593Smuzhiyun 	return scnprintf(buf, PAGE_SIZE, "%d\n", ret);
804*4882a593Smuzhiyun }
805*4882a593Smuzhiyun 
bq24257_sysfs_set_enable(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)806*4882a593Smuzhiyun static ssize_t bq24257_sysfs_set_enable(struct device *dev,
807*4882a593Smuzhiyun 					struct device_attribute *attr,
808*4882a593Smuzhiyun 					const char *buf,
809*4882a593Smuzhiyun 					size_t count)
810*4882a593Smuzhiyun {
811*4882a593Smuzhiyun 	struct power_supply *psy = dev_get_drvdata(dev);
812*4882a593Smuzhiyun 	struct bq24257_device *bq = power_supply_get_drvdata(psy);
813*4882a593Smuzhiyun 	long val;
814*4882a593Smuzhiyun 	int ret;
815*4882a593Smuzhiyun 
816*4882a593Smuzhiyun 	if (kstrtol(buf, 10, &val) < 0)
817*4882a593Smuzhiyun 		return -EINVAL;
818*4882a593Smuzhiyun 
819*4882a593Smuzhiyun 	if (strcmp(attr->attr.name, "high_impedance_enable") == 0)
820*4882a593Smuzhiyun 		ret = bq24257_field_write(bq, F_HZ_MODE, (bool)val);
821*4882a593Smuzhiyun 	else if (strcmp(attr->attr.name, "sysoff_enable") == 0)
822*4882a593Smuzhiyun 		ret = bq24257_field_write(bq, F_SYSOFF, (bool)val);
823*4882a593Smuzhiyun 	else
824*4882a593Smuzhiyun 		return -EINVAL;
825*4882a593Smuzhiyun 
826*4882a593Smuzhiyun 	if (ret < 0)
827*4882a593Smuzhiyun 		return ret;
828*4882a593Smuzhiyun 
829*4882a593Smuzhiyun 	return count;
830*4882a593Smuzhiyun }
831*4882a593Smuzhiyun 
832*4882a593Smuzhiyun static DEVICE_ATTR(ovp_voltage, S_IRUGO, bq24257_show_ovp_voltage, NULL);
833*4882a593Smuzhiyun static DEVICE_ATTR(in_dpm_voltage, S_IRUGO, bq24257_show_in_dpm_voltage, NULL);
834*4882a593Smuzhiyun static DEVICE_ATTR(high_impedance_enable, S_IWUSR | S_IRUGO,
835*4882a593Smuzhiyun 		   bq24257_sysfs_show_enable, bq24257_sysfs_set_enable);
836*4882a593Smuzhiyun static DEVICE_ATTR(sysoff_enable, S_IWUSR | S_IRUGO,
837*4882a593Smuzhiyun 		   bq24257_sysfs_show_enable, bq24257_sysfs_set_enable);
838*4882a593Smuzhiyun 
839*4882a593Smuzhiyun static struct attribute *bq24257_charger_sysfs_attrs[] = {
840*4882a593Smuzhiyun 	&dev_attr_ovp_voltage.attr,
841*4882a593Smuzhiyun 	&dev_attr_in_dpm_voltage.attr,
842*4882a593Smuzhiyun 	&dev_attr_high_impedance_enable.attr,
843*4882a593Smuzhiyun 	&dev_attr_sysoff_enable.attr,
844*4882a593Smuzhiyun 	NULL,
845*4882a593Smuzhiyun };
846*4882a593Smuzhiyun 
847*4882a593Smuzhiyun ATTRIBUTE_GROUPS(bq24257_charger_sysfs);
848*4882a593Smuzhiyun 
bq24257_power_supply_init(struct bq24257_device * bq)849*4882a593Smuzhiyun static int bq24257_power_supply_init(struct bq24257_device *bq)
850*4882a593Smuzhiyun {
851*4882a593Smuzhiyun 	struct power_supply_config psy_cfg = { .drv_data = bq, };
852*4882a593Smuzhiyun 
853*4882a593Smuzhiyun 	psy_cfg.attr_grp = bq24257_charger_sysfs_groups;
854*4882a593Smuzhiyun 	psy_cfg.supplied_to = bq24257_charger_supplied_to;
855*4882a593Smuzhiyun 	psy_cfg.num_supplicants = ARRAY_SIZE(bq24257_charger_supplied_to);
856*4882a593Smuzhiyun 
857*4882a593Smuzhiyun 	bq->charger = devm_power_supply_register(bq->dev,
858*4882a593Smuzhiyun 						 &bq24257_power_supply_desc,
859*4882a593Smuzhiyun 						 &psy_cfg);
860*4882a593Smuzhiyun 
861*4882a593Smuzhiyun 	return PTR_ERR_OR_ZERO(bq->charger);
862*4882a593Smuzhiyun }
863*4882a593Smuzhiyun 
bq24257_pg_gpio_probe(struct bq24257_device * bq)864*4882a593Smuzhiyun static void bq24257_pg_gpio_probe(struct bq24257_device *bq)
865*4882a593Smuzhiyun {
866*4882a593Smuzhiyun 	bq->pg = devm_gpiod_get_optional(bq->dev, BQ24257_PG_GPIO, GPIOD_IN);
867*4882a593Smuzhiyun 
868*4882a593Smuzhiyun 	if (PTR_ERR(bq->pg) == -EPROBE_DEFER) {
869*4882a593Smuzhiyun 		dev_info(bq->dev, "probe retry requested for PG pin\n");
870*4882a593Smuzhiyun 		return;
871*4882a593Smuzhiyun 	} else if (IS_ERR(bq->pg)) {
872*4882a593Smuzhiyun 		dev_err(bq->dev, "error probing PG pin\n");
873*4882a593Smuzhiyun 		bq->pg = NULL;
874*4882a593Smuzhiyun 		return;
875*4882a593Smuzhiyun 	}
876*4882a593Smuzhiyun 
877*4882a593Smuzhiyun 	if (bq->pg)
878*4882a593Smuzhiyun 		dev_dbg(bq->dev, "probed PG pin = %d\n", desc_to_gpio(bq->pg));
879*4882a593Smuzhiyun }
880*4882a593Smuzhiyun 
bq24257_fw_probe(struct bq24257_device * bq)881*4882a593Smuzhiyun static int bq24257_fw_probe(struct bq24257_device *bq)
882*4882a593Smuzhiyun {
883*4882a593Smuzhiyun 	int ret;
884*4882a593Smuzhiyun 	u32 property;
885*4882a593Smuzhiyun 
886*4882a593Smuzhiyun 	/* Required properties */
887*4882a593Smuzhiyun 	ret = device_property_read_u32(bq->dev, "ti,charge-current", &property);
888*4882a593Smuzhiyun 	if (ret < 0)
889*4882a593Smuzhiyun 		return ret;
890*4882a593Smuzhiyun 
891*4882a593Smuzhiyun 	bq->init_data.ichg = bq24257_find_idx(property, bq24257_ichg_map,
892*4882a593Smuzhiyun 					      BQ24257_ICHG_MAP_SIZE);
893*4882a593Smuzhiyun 
894*4882a593Smuzhiyun 	ret = device_property_read_u32(bq->dev, "ti,battery-regulation-voltage",
895*4882a593Smuzhiyun 				       &property);
896*4882a593Smuzhiyun 	if (ret < 0)
897*4882a593Smuzhiyun 		return ret;
898*4882a593Smuzhiyun 
899*4882a593Smuzhiyun 	bq->init_data.vbat = bq24257_find_idx(property, bq24257_vbat_map,
900*4882a593Smuzhiyun 					      BQ24257_VBAT_MAP_SIZE);
901*4882a593Smuzhiyun 
902*4882a593Smuzhiyun 	ret = device_property_read_u32(bq->dev, "ti,termination-current",
903*4882a593Smuzhiyun 				       &property);
904*4882a593Smuzhiyun 	if (ret < 0)
905*4882a593Smuzhiyun 		return ret;
906*4882a593Smuzhiyun 
907*4882a593Smuzhiyun 	bq->init_data.iterm = bq24257_find_idx(property, bq24257_iterm_map,
908*4882a593Smuzhiyun 					       BQ24257_ITERM_MAP_SIZE);
909*4882a593Smuzhiyun 
910*4882a593Smuzhiyun 	/* Optional properties. If not provided use reasonable default. */
911*4882a593Smuzhiyun 	ret = device_property_read_u32(bq->dev, "ti,current-limit",
912*4882a593Smuzhiyun 				       &property);
913*4882a593Smuzhiyun 	if (ret < 0) {
914*4882a593Smuzhiyun 		bq->iilimit_autoset_enable = true;
915*4882a593Smuzhiyun 
916*4882a593Smuzhiyun 		/*
917*4882a593Smuzhiyun 		 * Explicitly set a default value which will be needed for
918*4882a593Smuzhiyun 		 * devices that don't support the automatic setting of the input
919*4882a593Smuzhiyun 		 * current limit through the charger type detection mechanism.
920*4882a593Smuzhiyun 		 */
921*4882a593Smuzhiyun 		bq->init_data.iilimit = IILIMIT_500;
922*4882a593Smuzhiyun 	} else
923*4882a593Smuzhiyun 		bq->init_data.iilimit =
924*4882a593Smuzhiyun 				bq24257_find_idx(property,
925*4882a593Smuzhiyun 						 bq24257_iilimit_map,
926*4882a593Smuzhiyun 						 BQ24257_IILIMIT_MAP_SIZE);
927*4882a593Smuzhiyun 
928*4882a593Smuzhiyun 	ret = device_property_read_u32(bq->dev, "ti,ovp-voltage",
929*4882a593Smuzhiyun 				       &property);
930*4882a593Smuzhiyun 	if (ret < 0)
931*4882a593Smuzhiyun 		bq->init_data.vovp = VOVP_6500;
932*4882a593Smuzhiyun 	else
933*4882a593Smuzhiyun 		bq->init_data.vovp = bq24257_find_idx(property,
934*4882a593Smuzhiyun 						      bq24257_vovp_map,
935*4882a593Smuzhiyun 						      BQ24257_VOVP_MAP_SIZE);
936*4882a593Smuzhiyun 
937*4882a593Smuzhiyun 	ret = device_property_read_u32(bq->dev, "ti,in-dpm-voltage",
938*4882a593Smuzhiyun 				       &property);
939*4882a593Smuzhiyun 	if (ret < 0)
940*4882a593Smuzhiyun 		bq->init_data.vindpm = VINDPM_4360;
941*4882a593Smuzhiyun 	else
942*4882a593Smuzhiyun 		bq->init_data.vindpm =
943*4882a593Smuzhiyun 				bq24257_find_idx(property,
944*4882a593Smuzhiyun 						 bq24257_vindpm_map,
945*4882a593Smuzhiyun 						 BQ24257_VINDPM_MAP_SIZE);
946*4882a593Smuzhiyun 
947*4882a593Smuzhiyun 	return 0;
948*4882a593Smuzhiyun }
949*4882a593Smuzhiyun 
bq24257_probe(struct i2c_client * client,const struct i2c_device_id * id)950*4882a593Smuzhiyun static int bq24257_probe(struct i2c_client *client,
951*4882a593Smuzhiyun 			 const struct i2c_device_id *id)
952*4882a593Smuzhiyun {
953*4882a593Smuzhiyun 	struct i2c_adapter *adapter = client->adapter;
954*4882a593Smuzhiyun 	struct device *dev = &client->dev;
955*4882a593Smuzhiyun 	const struct acpi_device_id *acpi_id;
956*4882a593Smuzhiyun 	struct bq24257_device *bq;
957*4882a593Smuzhiyun 	int ret;
958*4882a593Smuzhiyun 	int i;
959*4882a593Smuzhiyun 
960*4882a593Smuzhiyun 	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
961*4882a593Smuzhiyun 		dev_err(dev, "No support for SMBUS_BYTE_DATA\n");
962*4882a593Smuzhiyun 		return -ENODEV;
963*4882a593Smuzhiyun 	}
964*4882a593Smuzhiyun 
965*4882a593Smuzhiyun 	bq = devm_kzalloc(dev, sizeof(*bq), GFP_KERNEL);
966*4882a593Smuzhiyun 	if (!bq)
967*4882a593Smuzhiyun 		return -ENOMEM;
968*4882a593Smuzhiyun 
969*4882a593Smuzhiyun 	bq->client = client;
970*4882a593Smuzhiyun 	bq->dev = dev;
971*4882a593Smuzhiyun 
972*4882a593Smuzhiyun 	if (ACPI_HANDLE(dev)) {
973*4882a593Smuzhiyun 		acpi_id = acpi_match_device(dev->driver->acpi_match_table,
974*4882a593Smuzhiyun 					    &client->dev);
975*4882a593Smuzhiyun 		if (!acpi_id) {
976*4882a593Smuzhiyun 			dev_err(dev, "Failed to match ACPI device\n");
977*4882a593Smuzhiyun 			return -ENODEV;
978*4882a593Smuzhiyun 		}
979*4882a593Smuzhiyun 		bq->chip = (enum bq2425x_chip)acpi_id->driver_data;
980*4882a593Smuzhiyun 	} else {
981*4882a593Smuzhiyun 		bq->chip = (enum bq2425x_chip)id->driver_data;
982*4882a593Smuzhiyun 	}
983*4882a593Smuzhiyun 
984*4882a593Smuzhiyun 	mutex_init(&bq->lock);
985*4882a593Smuzhiyun 
986*4882a593Smuzhiyun 	bq->rmap = devm_regmap_init_i2c(client, &bq24257_regmap_config);
987*4882a593Smuzhiyun 	if (IS_ERR(bq->rmap)) {
988*4882a593Smuzhiyun 		dev_err(dev, "failed to allocate register map\n");
989*4882a593Smuzhiyun 		return PTR_ERR(bq->rmap);
990*4882a593Smuzhiyun 	}
991*4882a593Smuzhiyun 
992*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(bq24257_reg_fields); i++) {
993*4882a593Smuzhiyun 		const struct reg_field *reg_fields = bq24257_reg_fields;
994*4882a593Smuzhiyun 
995*4882a593Smuzhiyun 		bq->rmap_fields[i] = devm_regmap_field_alloc(dev, bq->rmap,
996*4882a593Smuzhiyun 							     reg_fields[i]);
997*4882a593Smuzhiyun 		if (IS_ERR(bq->rmap_fields[i])) {
998*4882a593Smuzhiyun 			dev_err(dev, "cannot allocate regmap field\n");
999*4882a593Smuzhiyun 			return PTR_ERR(bq->rmap_fields[i]);
1000*4882a593Smuzhiyun 		}
1001*4882a593Smuzhiyun 	}
1002*4882a593Smuzhiyun 
1003*4882a593Smuzhiyun 	i2c_set_clientdata(client, bq);
1004*4882a593Smuzhiyun 
1005*4882a593Smuzhiyun 	if (!dev->platform_data) {
1006*4882a593Smuzhiyun 		ret = bq24257_fw_probe(bq);
1007*4882a593Smuzhiyun 		if (ret < 0) {
1008*4882a593Smuzhiyun 			dev_err(dev, "Cannot read device properties.\n");
1009*4882a593Smuzhiyun 			return ret;
1010*4882a593Smuzhiyun 		}
1011*4882a593Smuzhiyun 	} else {
1012*4882a593Smuzhiyun 		return -ENODEV;
1013*4882a593Smuzhiyun 	}
1014*4882a593Smuzhiyun 
1015*4882a593Smuzhiyun 	/*
1016*4882a593Smuzhiyun 	 * The BQ24250 doesn't support the D+/D- based charger type detection
1017*4882a593Smuzhiyun 	 * used for the automatic setting of the input current limit setting so
1018*4882a593Smuzhiyun 	 * explicitly disable that feature.
1019*4882a593Smuzhiyun 	 */
1020*4882a593Smuzhiyun 	if (bq->chip == BQ24250)
1021*4882a593Smuzhiyun 		bq->iilimit_autoset_enable = false;
1022*4882a593Smuzhiyun 
1023*4882a593Smuzhiyun 	if (bq->iilimit_autoset_enable)
1024*4882a593Smuzhiyun 		INIT_DELAYED_WORK(&bq->iilimit_setup_work,
1025*4882a593Smuzhiyun 				  bq24257_iilimit_setup_work);
1026*4882a593Smuzhiyun 
1027*4882a593Smuzhiyun 	/*
1028*4882a593Smuzhiyun 	 * The BQ24250 doesn't have a dedicated Power Good (PG) pin so let's
1029*4882a593Smuzhiyun 	 * not probe for it and instead use a SW-based approach to determine
1030*4882a593Smuzhiyun 	 * the PG state. We also use a SW-based approach for all other devices
1031*4882a593Smuzhiyun 	 * if the PG pin is either not defined or can't be probed.
1032*4882a593Smuzhiyun 	 */
1033*4882a593Smuzhiyun 	if (bq->chip != BQ24250)
1034*4882a593Smuzhiyun 		bq24257_pg_gpio_probe(bq);
1035*4882a593Smuzhiyun 
1036*4882a593Smuzhiyun 	if (PTR_ERR(bq->pg) == -EPROBE_DEFER)
1037*4882a593Smuzhiyun 		return PTR_ERR(bq->pg);
1038*4882a593Smuzhiyun 	else if (!bq->pg)
1039*4882a593Smuzhiyun 		dev_info(bq->dev, "using SW-based power-good detection\n");
1040*4882a593Smuzhiyun 
1041*4882a593Smuzhiyun 	/* reset all registers to defaults */
1042*4882a593Smuzhiyun 	ret = bq24257_field_write(bq, F_RESET, 1);
1043*4882a593Smuzhiyun 	if (ret < 0)
1044*4882a593Smuzhiyun 		return ret;
1045*4882a593Smuzhiyun 
1046*4882a593Smuzhiyun 	/*
1047*4882a593Smuzhiyun 	 * Put the RESET bit back to 0, in cache. For some reason the HW always
1048*4882a593Smuzhiyun 	 * returns 1 on this bit, so this is the only way to avoid resetting the
1049*4882a593Smuzhiyun 	 * chip every time we update another field in this register.
1050*4882a593Smuzhiyun 	 */
1051*4882a593Smuzhiyun 	ret = bq24257_field_write(bq, F_RESET, 0);
1052*4882a593Smuzhiyun 	if (ret < 0)
1053*4882a593Smuzhiyun 		return ret;
1054*4882a593Smuzhiyun 
1055*4882a593Smuzhiyun 	ret = bq24257_hw_init(bq);
1056*4882a593Smuzhiyun 	if (ret < 0) {
1057*4882a593Smuzhiyun 		dev_err(dev, "Cannot initialize the chip.\n");
1058*4882a593Smuzhiyun 		return ret;
1059*4882a593Smuzhiyun 	}
1060*4882a593Smuzhiyun 
1061*4882a593Smuzhiyun 	ret = bq24257_power_supply_init(bq);
1062*4882a593Smuzhiyun 	if (ret < 0) {
1063*4882a593Smuzhiyun 		dev_err(dev, "Failed to register power supply\n");
1064*4882a593Smuzhiyun 		return ret;
1065*4882a593Smuzhiyun 	}
1066*4882a593Smuzhiyun 
1067*4882a593Smuzhiyun 	ret = devm_request_threaded_irq(dev, client->irq, NULL,
1068*4882a593Smuzhiyun 					bq24257_irq_handler_thread,
1069*4882a593Smuzhiyun 					IRQF_TRIGGER_FALLING |
1070*4882a593Smuzhiyun 					IRQF_TRIGGER_RISING | IRQF_ONESHOT,
1071*4882a593Smuzhiyun 					bq2425x_chip_name[bq->chip], bq);
1072*4882a593Smuzhiyun 	if (ret) {
1073*4882a593Smuzhiyun 		dev_err(dev, "Failed to request IRQ #%d\n", client->irq);
1074*4882a593Smuzhiyun 		return ret;
1075*4882a593Smuzhiyun 	}
1076*4882a593Smuzhiyun 
1077*4882a593Smuzhiyun 	return 0;
1078*4882a593Smuzhiyun }
1079*4882a593Smuzhiyun 
bq24257_remove(struct i2c_client * client)1080*4882a593Smuzhiyun static int bq24257_remove(struct i2c_client *client)
1081*4882a593Smuzhiyun {
1082*4882a593Smuzhiyun 	struct bq24257_device *bq = i2c_get_clientdata(client);
1083*4882a593Smuzhiyun 
1084*4882a593Smuzhiyun 	if (bq->iilimit_autoset_enable)
1085*4882a593Smuzhiyun 		cancel_delayed_work_sync(&bq->iilimit_setup_work);
1086*4882a593Smuzhiyun 
1087*4882a593Smuzhiyun 	bq24257_field_write(bq, F_RESET, 1); /* reset to defaults */
1088*4882a593Smuzhiyun 
1089*4882a593Smuzhiyun 	return 0;
1090*4882a593Smuzhiyun }
1091*4882a593Smuzhiyun 
1092*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
bq24257_suspend(struct device * dev)1093*4882a593Smuzhiyun static int bq24257_suspend(struct device *dev)
1094*4882a593Smuzhiyun {
1095*4882a593Smuzhiyun 	struct bq24257_device *bq = dev_get_drvdata(dev);
1096*4882a593Smuzhiyun 	int ret = 0;
1097*4882a593Smuzhiyun 
1098*4882a593Smuzhiyun 	if (bq->iilimit_autoset_enable)
1099*4882a593Smuzhiyun 		cancel_delayed_work_sync(&bq->iilimit_setup_work);
1100*4882a593Smuzhiyun 
1101*4882a593Smuzhiyun 	/* reset all registers to default (and activate standalone mode) */
1102*4882a593Smuzhiyun 	ret = bq24257_field_write(bq, F_RESET, 1);
1103*4882a593Smuzhiyun 	if (ret < 0)
1104*4882a593Smuzhiyun 		dev_err(bq->dev, "Cannot reset chip to standalone mode.\n");
1105*4882a593Smuzhiyun 
1106*4882a593Smuzhiyun 	return ret;
1107*4882a593Smuzhiyun }
1108*4882a593Smuzhiyun 
bq24257_resume(struct device * dev)1109*4882a593Smuzhiyun static int bq24257_resume(struct device *dev)
1110*4882a593Smuzhiyun {
1111*4882a593Smuzhiyun 	int ret;
1112*4882a593Smuzhiyun 	struct bq24257_device *bq = dev_get_drvdata(dev);
1113*4882a593Smuzhiyun 
1114*4882a593Smuzhiyun 	ret = regcache_drop_region(bq->rmap, BQ24257_REG_1, BQ24257_REG_7);
1115*4882a593Smuzhiyun 	if (ret < 0)
1116*4882a593Smuzhiyun 		return ret;
1117*4882a593Smuzhiyun 
1118*4882a593Smuzhiyun 	ret = bq24257_field_write(bq, F_RESET, 0);
1119*4882a593Smuzhiyun 	if (ret < 0)
1120*4882a593Smuzhiyun 		return ret;
1121*4882a593Smuzhiyun 
1122*4882a593Smuzhiyun 	ret = bq24257_hw_init(bq);
1123*4882a593Smuzhiyun 	if (ret < 0) {
1124*4882a593Smuzhiyun 		dev_err(bq->dev, "Cannot init chip after resume.\n");
1125*4882a593Smuzhiyun 		return ret;
1126*4882a593Smuzhiyun 	}
1127*4882a593Smuzhiyun 
1128*4882a593Smuzhiyun 	/* signal userspace, maybe state changed while suspended */
1129*4882a593Smuzhiyun 	power_supply_changed(bq->charger);
1130*4882a593Smuzhiyun 
1131*4882a593Smuzhiyun 	return 0;
1132*4882a593Smuzhiyun }
1133*4882a593Smuzhiyun #endif
1134*4882a593Smuzhiyun 
1135*4882a593Smuzhiyun static const struct dev_pm_ops bq24257_pm = {
1136*4882a593Smuzhiyun 	SET_SYSTEM_SLEEP_PM_OPS(bq24257_suspend, bq24257_resume)
1137*4882a593Smuzhiyun };
1138*4882a593Smuzhiyun 
1139*4882a593Smuzhiyun static const struct i2c_device_id bq24257_i2c_ids[] = {
1140*4882a593Smuzhiyun 	{ "bq24250", BQ24250 },
1141*4882a593Smuzhiyun 	{ "bq24251", BQ24251 },
1142*4882a593Smuzhiyun 	{ "bq24257", BQ24257 },
1143*4882a593Smuzhiyun 	{},
1144*4882a593Smuzhiyun };
1145*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, bq24257_i2c_ids);
1146*4882a593Smuzhiyun 
1147*4882a593Smuzhiyun static const struct of_device_id bq24257_of_match[] = {
1148*4882a593Smuzhiyun 	{ .compatible = "ti,bq24250", },
1149*4882a593Smuzhiyun 	{ .compatible = "ti,bq24251", },
1150*4882a593Smuzhiyun 	{ .compatible = "ti,bq24257", },
1151*4882a593Smuzhiyun 	{ },
1152*4882a593Smuzhiyun };
1153*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, bq24257_of_match);
1154*4882a593Smuzhiyun 
1155*4882a593Smuzhiyun #ifdef CONFIG_ACPI
1156*4882a593Smuzhiyun static const struct acpi_device_id bq24257_acpi_match[] = {
1157*4882a593Smuzhiyun 	{ "BQ242500", BQ24250 },
1158*4882a593Smuzhiyun 	{ "BQ242510", BQ24251 },
1159*4882a593Smuzhiyun 	{ "BQ242570", BQ24257 },
1160*4882a593Smuzhiyun 	{},
1161*4882a593Smuzhiyun };
1162*4882a593Smuzhiyun MODULE_DEVICE_TABLE(acpi, bq24257_acpi_match);
1163*4882a593Smuzhiyun #endif
1164*4882a593Smuzhiyun 
1165*4882a593Smuzhiyun static struct i2c_driver bq24257_driver = {
1166*4882a593Smuzhiyun 	.driver = {
1167*4882a593Smuzhiyun 		.name = "bq24257-charger",
1168*4882a593Smuzhiyun 		.of_match_table = of_match_ptr(bq24257_of_match),
1169*4882a593Smuzhiyun 		.acpi_match_table = ACPI_PTR(bq24257_acpi_match),
1170*4882a593Smuzhiyun 		.pm = &bq24257_pm,
1171*4882a593Smuzhiyun 	},
1172*4882a593Smuzhiyun 	.probe = bq24257_probe,
1173*4882a593Smuzhiyun 	.remove = bq24257_remove,
1174*4882a593Smuzhiyun 	.id_table = bq24257_i2c_ids,
1175*4882a593Smuzhiyun };
1176*4882a593Smuzhiyun module_i2c_driver(bq24257_driver);
1177*4882a593Smuzhiyun 
1178*4882a593Smuzhiyun MODULE_AUTHOR("Laurentiu Palcu <laurentiu.palcu@intel.com>");
1179*4882a593Smuzhiyun MODULE_DESCRIPTION("bq24257 charger driver");
1180*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1181