1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Driver for the Intel SCU IPC mechanism
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * (C) Copyright 2008-2010 Intel Corporation
6*4882a593Smuzhiyun * Author: Sreedhara DS (sreedhara.ds@intel.com)
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * This driver provides IOCTL interfaces to call Intel SCU IPC driver API.
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/errno.h>
12*4882a593Smuzhiyun #include <linux/fcntl.h>
13*4882a593Smuzhiyun #include <linux/fs.h>
14*4882a593Smuzhiyun #include <linux/kernel.h>
15*4882a593Smuzhiyun #include <linux/module.h>
16*4882a593Smuzhiyun #include <linux/sched.h>
17*4882a593Smuzhiyun #include <linux/slab.h>
18*4882a593Smuzhiyun #include <linux/types.h>
19*4882a593Smuzhiyun #include <linux/uaccess.h>
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #include <asm/intel_scu_ipc.h>
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun static int major;
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun struct intel_scu_ipc_dev *scu;
26*4882a593Smuzhiyun static DEFINE_MUTEX(scu_lock);
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun /* IOCTL commands */
29*4882a593Smuzhiyun #define INTE_SCU_IPC_REGISTER_READ 0
30*4882a593Smuzhiyun #define INTE_SCU_IPC_REGISTER_WRITE 1
31*4882a593Smuzhiyun #define INTE_SCU_IPC_REGISTER_UPDATE 2
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun struct scu_ipc_data {
34*4882a593Smuzhiyun u32 count; /* No. of registers */
35*4882a593Smuzhiyun u16 addr[5]; /* Register addresses */
36*4882a593Smuzhiyun u8 data[5]; /* Register data */
37*4882a593Smuzhiyun u8 mask; /* Valid for read-modify-write */
38*4882a593Smuzhiyun };
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun /**
41*4882a593Smuzhiyun * scu_reg_access - implement register access ioctls
42*4882a593Smuzhiyun * @cmd: command we are doing (read/write/update)
43*4882a593Smuzhiyun * @data: kernel copy of ioctl data
44*4882a593Smuzhiyun *
45*4882a593Smuzhiyun * Allow the user to perform register accesses on the SCU via the
46*4882a593Smuzhiyun * kernel interface
47*4882a593Smuzhiyun */
48*4882a593Smuzhiyun
scu_reg_access(u32 cmd,struct scu_ipc_data * data)49*4882a593Smuzhiyun static int scu_reg_access(u32 cmd, struct scu_ipc_data *data)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun unsigned int count = data->count;
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun if (count == 0 || count == 3 || count > 4)
54*4882a593Smuzhiyun return -EINVAL;
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun switch (cmd) {
57*4882a593Smuzhiyun case INTE_SCU_IPC_REGISTER_READ:
58*4882a593Smuzhiyun return intel_scu_ipc_dev_readv(scu, data->addr, data->data, count);
59*4882a593Smuzhiyun case INTE_SCU_IPC_REGISTER_WRITE:
60*4882a593Smuzhiyun return intel_scu_ipc_dev_writev(scu, data->addr, data->data, count);
61*4882a593Smuzhiyun case INTE_SCU_IPC_REGISTER_UPDATE:
62*4882a593Smuzhiyun return intel_scu_ipc_dev_update(scu, data->addr[0], data->data[0],
63*4882a593Smuzhiyun data->mask);
64*4882a593Smuzhiyun default:
65*4882a593Smuzhiyun return -ENOTTY;
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun }
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun /**
70*4882a593Smuzhiyun * scu_ipc_ioctl - control ioctls for the SCU
71*4882a593Smuzhiyun * @fp: file handle of the SCU device
72*4882a593Smuzhiyun * @cmd: ioctl coce
73*4882a593Smuzhiyun * @arg: pointer to user passed structure
74*4882a593Smuzhiyun *
75*4882a593Smuzhiyun * Support the I/O and firmware flashing interfaces of the SCU
76*4882a593Smuzhiyun */
scu_ipc_ioctl(struct file * fp,unsigned int cmd,unsigned long arg)77*4882a593Smuzhiyun static long scu_ipc_ioctl(struct file *fp, unsigned int cmd,
78*4882a593Smuzhiyun unsigned long arg)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun int ret;
81*4882a593Smuzhiyun struct scu_ipc_data data;
82*4882a593Smuzhiyun void __user *argp = (void __user *)arg;
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun if (!capable(CAP_SYS_RAWIO))
85*4882a593Smuzhiyun return -EPERM;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun if (copy_from_user(&data, argp, sizeof(struct scu_ipc_data)))
88*4882a593Smuzhiyun return -EFAULT;
89*4882a593Smuzhiyun ret = scu_reg_access(cmd, &data);
90*4882a593Smuzhiyun if (ret < 0)
91*4882a593Smuzhiyun return ret;
92*4882a593Smuzhiyun if (copy_to_user(argp, &data, sizeof(struct scu_ipc_data)))
93*4882a593Smuzhiyun return -EFAULT;
94*4882a593Smuzhiyun return 0;
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun
scu_ipc_open(struct inode * inode,struct file * file)97*4882a593Smuzhiyun static int scu_ipc_open(struct inode *inode, struct file *file)
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun int ret = 0;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun /* Only single open at the time */
102*4882a593Smuzhiyun mutex_lock(&scu_lock);
103*4882a593Smuzhiyun if (scu) {
104*4882a593Smuzhiyun ret = -EBUSY;
105*4882a593Smuzhiyun goto unlock;
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun scu = intel_scu_ipc_dev_get();
109*4882a593Smuzhiyun if (!scu)
110*4882a593Smuzhiyun ret = -ENODEV;
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun unlock:
113*4882a593Smuzhiyun mutex_unlock(&scu_lock);
114*4882a593Smuzhiyun return ret;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
scu_ipc_release(struct inode * inode,struct file * file)117*4882a593Smuzhiyun static int scu_ipc_release(struct inode *inode, struct file *file)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun mutex_lock(&scu_lock);
120*4882a593Smuzhiyun intel_scu_ipc_dev_put(scu);
121*4882a593Smuzhiyun scu = NULL;
122*4882a593Smuzhiyun mutex_unlock(&scu_lock);
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun return 0;
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun static const struct file_operations scu_ipc_fops = {
128*4882a593Smuzhiyun .unlocked_ioctl = scu_ipc_ioctl,
129*4882a593Smuzhiyun .open = scu_ipc_open,
130*4882a593Smuzhiyun .release = scu_ipc_release,
131*4882a593Smuzhiyun };
132*4882a593Smuzhiyun
ipc_module_init(void)133*4882a593Smuzhiyun static int __init ipc_module_init(void)
134*4882a593Smuzhiyun {
135*4882a593Smuzhiyun major = register_chrdev(0, "intel_mid_scu", &scu_ipc_fops);
136*4882a593Smuzhiyun if (major < 0)
137*4882a593Smuzhiyun return major;
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun return 0;
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun
ipc_module_exit(void)142*4882a593Smuzhiyun static void __exit ipc_module_exit(void)
143*4882a593Smuzhiyun {
144*4882a593Smuzhiyun unregister_chrdev(major, "intel_mid_scu");
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun module_init(ipc_module_init);
148*4882a593Smuzhiyun module_exit(ipc_module_exit);
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
151*4882a593Smuzhiyun MODULE_DESCRIPTION("Utility driver for intel scu ipc");
152*4882a593Smuzhiyun MODULE_AUTHOR("Sreedhara <sreedhara.ds@intel.com>");
153