xref: /OK3568_Linux_fs/kernel/drivers/platform/x86/dcdbas.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  *  dcdbas.h: Definitions for Dell Systems Management Base driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  *  Copyright (C) 1995-2005 Dell Inc.
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #ifndef _DCDBAS_H_
9*4882a593Smuzhiyun #define _DCDBAS_H_
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include <linux/device.h>
12*4882a593Smuzhiyun #include <linux/sysfs.h>
13*4882a593Smuzhiyun #include <linux/types.h>
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #define MAX_SMI_DATA_BUF_SIZE			(256 * 1024)
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #define HC_ACTION_NONE				(0)
18*4882a593Smuzhiyun #define HC_ACTION_HOST_CONTROL_POWEROFF		BIT(1)
19*4882a593Smuzhiyun #define HC_ACTION_HOST_CONTROL_POWERCYCLE	BIT(2)
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #define HC_SMITYPE_NONE				(0)
22*4882a593Smuzhiyun #define HC_SMITYPE_TYPE1			(1)
23*4882a593Smuzhiyun #define HC_SMITYPE_TYPE2			(2)
24*4882a593Smuzhiyun #define HC_SMITYPE_TYPE3			(3)
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #define ESM_APM_CMD				(0x0A0)
27*4882a593Smuzhiyun #define ESM_APM_POWER_CYCLE			(0x10)
28*4882a593Smuzhiyun #define ESM_STATUS_CMD_UNSUCCESSFUL		(-1)
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun #define CMOS_BASE_PORT				(0x070)
31*4882a593Smuzhiyun #define CMOS_PAGE1_INDEX_PORT			(0)
32*4882a593Smuzhiyun #define CMOS_PAGE1_DATA_PORT			(1)
33*4882a593Smuzhiyun #define CMOS_PAGE2_INDEX_PORT_PIIX4		(2)
34*4882a593Smuzhiyun #define CMOS_PAGE2_DATA_PORT_PIIX4		(3)
35*4882a593Smuzhiyun #define PE1400_APM_CONTROL_PORT			(0x0B0)
36*4882a593Smuzhiyun #define PCAT_APM_CONTROL_PORT			(0x0B2)
37*4882a593Smuzhiyun #define PCAT_APM_STATUS_PORT			(0x0B3)
38*4882a593Smuzhiyun #define PE1300_CMOS_CMD_STRUCT_PTR		(0x38)
39*4882a593Smuzhiyun #define PE1400_CMOS_CMD_STRUCT_PTR		(0x70)
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun #define MAX_SYSMGMT_SHORTCMD_PARMBUF_LEN	(14)
42*4882a593Smuzhiyun #define MAX_SYSMGMT_LONGCMD_SGENTRY_NUM		(16)
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun #define TIMEOUT_USEC_SHORT_SEMA_BLOCKING	(10000)
45*4882a593Smuzhiyun #define EXPIRED_TIMER				(0)
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun #define SMI_CMD_MAGIC				(0x534D4931)
48*4882a593Smuzhiyun #define SMM_EPS_SIG				"$SCB"
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun #define DCDBAS_DEV_ATTR_RW(_name) \
51*4882a593Smuzhiyun 	DEVICE_ATTR(_name,0600,_name##_show,_name##_store);
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun #define DCDBAS_DEV_ATTR_RO(_name) \
54*4882a593Smuzhiyun 	DEVICE_ATTR(_name,0400,_name##_show,NULL);
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun #define DCDBAS_DEV_ATTR_WO(_name) \
57*4882a593Smuzhiyun 	DEVICE_ATTR(_name,0200,NULL,_name##_store);
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun #define DCDBAS_BIN_ATTR_RW(_name) \
60*4882a593Smuzhiyun struct bin_attribute bin_attr_##_name = { \
61*4882a593Smuzhiyun 	.attr =  { .name = __stringify(_name), \
62*4882a593Smuzhiyun 		   .mode = 0600 }, \
63*4882a593Smuzhiyun 	.read =  _name##_read, \
64*4882a593Smuzhiyun 	.write = _name##_write, \
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun struct smi_cmd {
68*4882a593Smuzhiyun 	__u32 magic;
69*4882a593Smuzhiyun 	__u32 ebx;
70*4882a593Smuzhiyun 	__u32 ecx;
71*4882a593Smuzhiyun 	__u16 command_address;
72*4882a593Smuzhiyun 	__u8 command_code;
73*4882a593Smuzhiyun 	__u8 reserved;
74*4882a593Smuzhiyun 	__u8 command_buffer[1];
75*4882a593Smuzhiyun } __attribute__ ((packed));
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun struct apm_cmd {
78*4882a593Smuzhiyun 	__u8 command;
79*4882a593Smuzhiyun 	__s8 status;
80*4882a593Smuzhiyun 	__u16 reserved;
81*4882a593Smuzhiyun 	union {
82*4882a593Smuzhiyun 		struct {
83*4882a593Smuzhiyun 			__u8 parm[MAX_SYSMGMT_SHORTCMD_PARMBUF_LEN];
84*4882a593Smuzhiyun 		} __attribute__ ((packed)) shortreq;
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 		struct {
87*4882a593Smuzhiyun 			__u16 num_sg_entries;
88*4882a593Smuzhiyun 			struct {
89*4882a593Smuzhiyun 				__u32 size;
90*4882a593Smuzhiyun 				__u64 addr;
91*4882a593Smuzhiyun 			} __attribute__ ((packed))
92*4882a593Smuzhiyun 			    sglist[MAX_SYSMGMT_LONGCMD_SGENTRY_NUM];
93*4882a593Smuzhiyun 		} __attribute__ ((packed)) longreq;
94*4882a593Smuzhiyun 	} __attribute__ ((packed)) parameters;
95*4882a593Smuzhiyun } __attribute__ ((packed));
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun int dcdbas_smi_request(struct smi_cmd *smi_cmd);
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun struct smm_eps_table {
100*4882a593Smuzhiyun 	char smm_comm_buff_anchor[4];
101*4882a593Smuzhiyun 	u8 length;
102*4882a593Smuzhiyun 	u8 checksum;
103*4882a593Smuzhiyun 	u8 version;
104*4882a593Smuzhiyun 	u64 smm_comm_buff_addr;
105*4882a593Smuzhiyun 	u64 num_of_4k_pages;
106*4882a593Smuzhiyun } __packed;
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun #endif /* _DCDBAS_H_ */
109*4882a593Smuzhiyun 
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