xref: /OK3568_Linux_fs/kernel/drivers/platform/goldfish/goldfish_pipe.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (C) 2012 Intel, Inc.
4*4882a593Smuzhiyun  * Copyright (C) 2013 Intel, Inc.
5*4882a593Smuzhiyun  * Copyright (C) 2014 Linaro Limited
6*4882a593Smuzhiyun  * Copyright (C) 2011-2016 Google, Inc.
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * This software is licensed under the terms of the GNU General Public
9*4882a593Smuzhiyun  * License version 2, as published by the Free Software Foundation, and
10*4882a593Smuzhiyun  * may be copied, distributed, and modified under those terms.
11*4882a593Smuzhiyun  *
12*4882a593Smuzhiyun  * This program is distributed in the hope that it will be useful,
13*4882a593Smuzhiyun  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14*4882a593Smuzhiyun  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15*4882a593Smuzhiyun  * GNU General Public License for more details.
16*4882a593Smuzhiyun  *
17*4882a593Smuzhiyun  */
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun /* This source file contains the implementation of a special device driver
20*4882a593Smuzhiyun  * that intends to provide a *very* fast communication channel between the
21*4882a593Smuzhiyun  * guest system and the QEMU emulator.
22*4882a593Smuzhiyun  *
23*4882a593Smuzhiyun  * Usage from the guest is simply the following (error handling simplified):
24*4882a593Smuzhiyun  *
25*4882a593Smuzhiyun  *    int  fd = open("/dev/qemu_pipe",O_RDWR);
26*4882a593Smuzhiyun  *    .... write() or read() through the pipe.
27*4882a593Smuzhiyun  *
28*4882a593Smuzhiyun  * This driver doesn't deal with the exact protocol used during the session.
29*4882a593Smuzhiyun  * It is intended to be as simple as something like:
30*4882a593Smuzhiyun  *
31*4882a593Smuzhiyun  *    // do this _just_ after opening the fd to connect to a specific
32*4882a593Smuzhiyun  *    // emulator service.
33*4882a593Smuzhiyun  *    const char*  msg = "<pipename>";
34*4882a593Smuzhiyun  *    if (write(fd, msg, strlen(msg)+1) < 0) {
35*4882a593Smuzhiyun  *       ... could not connect to <pipename> service
36*4882a593Smuzhiyun  *       close(fd);
37*4882a593Smuzhiyun  *    }
38*4882a593Smuzhiyun  *
39*4882a593Smuzhiyun  *    // after this, simply read() and write() to communicate with the
40*4882a593Smuzhiyun  *    // service. Exact protocol details left as an exercise to the reader.
41*4882a593Smuzhiyun  *
42*4882a593Smuzhiyun  * This driver is very fast because it doesn't copy any data through
43*4882a593Smuzhiyun  * intermediate buffers, since the emulator is capable of translating
44*4882a593Smuzhiyun  * guest user addresses into host ones.
45*4882a593Smuzhiyun  *
46*4882a593Smuzhiyun  * Note that we must however ensure that each user page involved in the
47*4882a593Smuzhiyun  * exchange is properly mapped during a transfer.
48*4882a593Smuzhiyun  */
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun #include <linux/module.h>
51*4882a593Smuzhiyun #include <linux/mod_devicetable.h>
52*4882a593Smuzhiyun #include <linux/interrupt.h>
53*4882a593Smuzhiyun #include <linux/kernel.h>
54*4882a593Smuzhiyun #include <linux/spinlock.h>
55*4882a593Smuzhiyun #include <linux/miscdevice.h>
56*4882a593Smuzhiyun #include <linux/platform_device.h>
57*4882a593Smuzhiyun #include <linux/poll.h>
58*4882a593Smuzhiyun #include <linux/sched.h>
59*4882a593Smuzhiyun #include <linux/bitops.h>
60*4882a593Smuzhiyun #include <linux/slab.h>
61*4882a593Smuzhiyun #include <linux/io.h>
62*4882a593Smuzhiyun #include <linux/dma-mapping.h>
63*4882a593Smuzhiyun #include <linux/mm.h>
64*4882a593Smuzhiyun #include <linux/acpi.h>
65*4882a593Smuzhiyun #include <linux/bug.h>
66*4882a593Smuzhiyun #include "goldfish_pipe_qemu.h"
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun /*
69*4882a593Smuzhiyun  * Update this when something changes in the driver's behavior so the host
70*4882a593Smuzhiyun  * can benefit from knowing it
71*4882a593Smuzhiyun  */
72*4882a593Smuzhiyun enum {
73*4882a593Smuzhiyun 	PIPE_DRIVER_VERSION = 2,
74*4882a593Smuzhiyun 	PIPE_CURRENT_DEVICE_VERSION = 2
75*4882a593Smuzhiyun };
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun enum {
78*4882a593Smuzhiyun 	MAX_BUFFERS_PER_COMMAND = 336,
79*4882a593Smuzhiyun 	MAX_SIGNALLED_PIPES = 64,
80*4882a593Smuzhiyun 	INITIAL_PIPES_CAPACITY = 64
81*4882a593Smuzhiyun };
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun struct goldfish_pipe_dev;
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun /* A per-pipe command structure, shared with the host */
86*4882a593Smuzhiyun struct goldfish_pipe_command {
87*4882a593Smuzhiyun 	s32 cmd;	/* PipeCmdCode, guest -> host */
88*4882a593Smuzhiyun 	s32 id;		/* pipe id, guest -> host */
89*4882a593Smuzhiyun 	s32 status;	/* command execution status, host -> guest */
90*4882a593Smuzhiyun 	s32 reserved;	/* to pad to 64-bit boundary */
91*4882a593Smuzhiyun 	union {
92*4882a593Smuzhiyun 		/* Parameters for PIPE_CMD_{READ,WRITE} */
93*4882a593Smuzhiyun 		struct {
94*4882a593Smuzhiyun 			/* number of buffers, guest -> host */
95*4882a593Smuzhiyun 			u32 buffers_count;
96*4882a593Smuzhiyun 			/* number of consumed bytes, host -> guest */
97*4882a593Smuzhiyun 			s32 consumed_size;
98*4882a593Smuzhiyun 			/* buffer pointers, guest -> host */
99*4882a593Smuzhiyun 			u64 ptrs[MAX_BUFFERS_PER_COMMAND];
100*4882a593Smuzhiyun 			/* buffer sizes, guest -> host */
101*4882a593Smuzhiyun 			u32 sizes[MAX_BUFFERS_PER_COMMAND];
102*4882a593Smuzhiyun 		} rw_params;
103*4882a593Smuzhiyun 	};
104*4882a593Smuzhiyun };
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun /* A single signalled pipe information */
107*4882a593Smuzhiyun struct signalled_pipe_buffer {
108*4882a593Smuzhiyun 	u32 id;
109*4882a593Smuzhiyun 	u32 flags;
110*4882a593Smuzhiyun };
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun /* Parameters for the PIPE_CMD_OPEN command */
113*4882a593Smuzhiyun struct open_command_param {
114*4882a593Smuzhiyun 	u64 command_buffer_ptr;
115*4882a593Smuzhiyun 	u32 rw_params_max_count;
116*4882a593Smuzhiyun };
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun /* Device-level set of buffers shared with the host */
119*4882a593Smuzhiyun struct goldfish_pipe_dev_buffers {
120*4882a593Smuzhiyun 	struct open_command_param open_command_params;
121*4882a593Smuzhiyun 	struct signalled_pipe_buffer
122*4882a593Smuzhiyun 		signalled_pipe_buffers[MAX_SIGNALLED_PIPES];
123*4882a593Smuzhiyun };
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun /* This data type models a given pipe instance */
126*4882a593Smuzhiyun struct goldfish_pipe {
127*4882a593Smuzhiyun 	/* pipe ID - index into goldfish_pipe_dev::pipes array */
128*4882a593Smuzhiyun 	u32 id;
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	/* The wake flags pipe is waiting for
131*4882a593Smuzhiyun 	 * Note: not protected with any lock, uses atomic operations
132*4882a593Smuzhiyun 	 *  and barriers to make it thread-safe.
133*4882a593Smuzhiyun 	 */
134*4882a593Smuzhiyun 	unsigned long flags;
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun 	/* wake flags host have signalled,
137*4882a593Smuzhiyun 	 *  - protected by goldfish_pipe_dev::lock
138*4882a593Smuzhiyun 	 */
139*4882a593Smuzhiyun 	unsigned long signalled_flags;
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun 	/* A pointer to command buffer */
142*4882a593Smuzhiyun 	struct goldfish_pipe_command *command_buffer;
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	/* doubly linked list of signalled pipes, protected by
145*4882a593Smuzhiyun 	 * goldfish_pipe_dev::lock
146*4882a593Smuzhiyun 	 */
147*4882a593Smuzhiyun 	struct goldfish_pipe *prev_signalled;
148*4882a593Smuzhiyun 	struct goldfish_pipe *next_signalled;
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun 	/*
151*4882a593Smuzhiyun 	 * A pipe's own lock. Protects the following:
152*4882a593Smuzhiyun 	 *  - *command_buffer - makes sure a command can safely write its
153*4882a593Smuzhiyun 	 *    parameters to the host and read the results back.
154*4882a593Smuzhiyun 	 */
155*4882a593Smuzhiyun 	struct mutex lock;
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 	/* A wake queue for sleeping until host signals an event */
158*4882a593Smuzhiyun 	wait_queue_head_t wake_queue;
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun 	/* Pointer to the parent goldfish_pipe_dev instance */
161*4882a593Smuzhiyun 	struct goldfish_pipe_dev *dev;
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 	/* A buffer of pages, too large to fit into a stack frame */
164*4882a593Smuzhiyun 	struct page *pages[MAX_BUFFERS_PER_COMMAND];
165*4882a593Smuzhiyun };
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun /* The global driver data. Holds a reference to the i/o page used to
168*4882a593Smuzhiyun  * communicate with the emulator, and a wake queue for blocked tasks
169*4882a593Smuzhiyun  * waiting to be awoken.
170*4882a593Smuzhiyun  */
171*4882a593Smuzhiyun struct goldfish_pipe_dev {
172*4882a593Smuzhiyun 	/* A magic number to check if this is an instance of this struct */
173*4882a593Smuzhiyun 	void *magic;
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun 	/*
176*4882a593Smuzhiyun 	 * Global device spinlock. Protects the following members:
177*4882a593Smuzhiyun 	 *  - pipes, pipes_capacity
178*4882a593Smuzhiyun 	 *  - [*pipes, *pipes + pipes_capacity) - array data
179*4882a593Smuzhiyun 	 *  - first_signalled_pipe,
180*4882a593Smuzhiyun 	 *      goldfish_pipe::prev_signalled,
181*4882a593Smuzhiyun 	 *      goldfish_pipe::next_signalled,
182*4882a593Smuzhiyun 	 *      goldfish_pipe::signalled_flags - all singnalled-related fields,
183*4882a593Smuzhiyun 	 *                                       in all allocated pipes
184*4882a593Smuzhiyun 	 *  - open_command_params - PIPE_CMD_OPEN-related buffers
185*4882a593Smuzhiyun 	 *
186*4882a593Smuzhiyun 	 * It looks like a lot of different fields, but the trick is that
187*4882a593Smuzhiyun 	 * the only operation that happens often is the signalled pipes array
188*4882a593Smuzhiyun 	 * manipulation. That's why it's OK for now to keep the rest of the
189*4882a593Smuzhiyun 	 * fields under the same lock. If we notice too much contention because
190*4882a593Smuzhiyun 	 * of PIPE_CMD_OPEN, then we should add a separate lock there.
191*4882a593Smuzhiyun 	 */
192*4882a593Smuzhiyun 	spinlock_t lock;
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun 	/*
195*4882a593Smuzhiyun 	 * Array of the pipes of |pipes_capacity| elements,
196*4882a593Smuzhiyun 	 * indexed by goldfish_pipe::id
197*4882a593Smuzhiyun 	 */
198*4882a593Smuzhiyun 	struct goldfish_pipe **pipes;
199*4882a593Smuzhiyun 	u32 pipes_capacity;
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun 	/* Pointers to the buffers host uses for interaction with this driver */
202*4882a593Smuzhiyun 	struct goldfish_pipe_dev_buffers *buffers;
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun 	/* Head of a doubly linked list of signalled pipes */
205*4882a593Smuzhiyun 	struct goldfish_pipe *first_signalled_pipe;
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	/* ptr to platform device's device struct */
208*4882a593Smuzhiyun 	struct device *pdev_dev;
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun 	/* Some device-specific data */
211*4882a593Smuzhiyun 	int irq;
212*4882a593Smuzhiyun 	int version;
213*4882a593Smuzhiyun 	unsigned char __iomem *base;
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun 	/* an irq tasklet to run goldfish_interrupt_task */
216*4882a593Smuzhiyun 	struct tasklet_struct irq_tasklet;
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun 	struct miscdevice miscdev;
219*4882a593Smuzhiyun };
220*4882a593Smuzhiyun 
goldfish_pipe_cmd_locked(struct goldfish_pipe * pipe,enum PipeCmdCode cmd)221*4882a593Smuzhiyun static int goldfish_pipe_cmd_locked(struct goldfish_pipe *pipe,
222*4882a593Smuzhiyun 				    enum PipeCmdCode cmd)
223*4882a593Smuzhiyun {
224*4882a593Smuzhiyun 	pipe->command_buffer->cmd = cmd;
225*4882a593Smuzhiyun 	/* failure by default */
226*4882a593Smuzhiyun 	pipe->command_buffer->status = PIPE_ERROR_INVAL;
227*4882a593Smuzhiyun 	writel(pipe->id, pipe->dev->base + PIPE_REG_CMD);
228*4882a593Smuzhiyun 	return pipe->command_buffer->status;
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun 
goldfish_pipe_cmd(struct goldfish_pipe * pipe,enum PipeCmdCode cmd)231*4882a593Smuzhiyun static int goldfish_pipe_cmd(struct goldfish_pipe *pipe, enum PipeCmdCode cmd)
232*4882a593Smuzhiyun {
233*4882a593Smuzhiyun 	int status;
234*4882a593Smuzhiyun 
235*4882a593Smuzhiyun 	if (mutex_lock_interruptible(&pipe->lock))
236*4882a593Smuzhiyun 		return PIPE_ERROR_IO;
237*4882a593Smuzhiyun 	status = goldfish_pipe_cmd_locked(pipe, cmd);
238*4882a593Smuzhiyun 	mutex_unlock(&pipe->lock);
239*4882a593Smuzhiyun 	return status;
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun /*
243*4882a593Smuzhiyun  * This function converts an error code returned by the emulator through
244*4882a593Smuzhiyun  * the PIPE_REG_STATUS i/o register into a valid negative errno value.
245*4882a593Smuzhiyun  */
goldfish_pipe_error_convert(int status)246*4882a593Smuzhiyun static int goldfish_pipe_error_convert(int status)
247*4882a593Smuzhiyun {
248*4882a593Smuzhiyun 	switch (status) {
249*4882a593Smuzhiyun 	case PIPE_ERROR_AGAIN:
250*4882a593Smuzhiyun 		return -EAGAIN;
251*4882a593Smuzhiyun 	case PIPE_ERROR_NOMEM:
252*4882a593Smuzhiyun 		return -ENOMEM;
253*4882a593Smuzhiyun 	case PIPE_ERROR_IO:
254*4882a593Smuzhiyun 		return -EIO;
255*4882a593Smuzhiyun 	default:
256*4882a593Smuzhiyun 		return -EINVAL;
257*4882a593Smuzhiyun 	}
258*4882a593Smuzhiyun }
259*4882a593Smuzhiyun 
goldfish_pin_pages(unsigned long first_page,unsigned long last_page,unsigned int last_page_size,int is_write,struct page * pages[MAX_BUFFERS_PER_COMMAND],unsigned int * iter_last_page_size)260*4882a593Smuzhiyun static int goldfish_pin_pages(unsigned long first_page,
261*4882a593Smuzhiyun 			      unsigned long last_page,
262*4882a593Smuzhiyun 			      unsigned int last_page_size,
263*4882a593Smuzhiyun 			      int is_write,
264*4882a593Smuzhiyun 			      struct page *pages[MAX_BUFFERS_PER_COMMAND],
265*4882a593Smuzhiyun 			      unsigned int *iter_last_page_size)
266*4882a593Smuzhiyun {
267*4882a593Smuzhiyun 	int ret;
268*4882a593Smuzhiyun 	int requested_pages = ((last_page - first_page) >> PAGE_SHIFT) + 1;
269*4882a593Smuzhiyun 
270*4882a593Smuzhiyun 	if (requested_pages > MAX_BUFFERS_PER_COMMAND) {
271*4882a593Smuzhiyun 		requested_pages = MAX_BUFFERS_PER_COMMAND;
272*4882a593Smuzhiyun 		*iter_last_page_size = PAGE_SIZE;
273*4882a593Smuzhiyun 	} else {
274*4882a593Smuzhiyun 		*iter_last_page_size = last_page_size;
275*4882a593Smuzhiyun 	}
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun 	ret = pin_user_pages_fast(first_page, requested_pages,
278*4882a593Smuzhiyun 				  !is_write ? FOLL_WRITE : 0,
279*4882a593Smuzhiyun 				  pages);
280*4882a593Smuzhiyun 	if (ret <= 0)
281*4882a593Smuzhiyun 		return -EFAULT;
282*4882a593Smuzhiyun 	if (ret < requested_pages)
283*4882a593Smuzhiyun 		*iter_last_page_size = PAGE_SIZE;
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun 	return ret;
286*4882a593Smuzhiyun }
287*4882a593Smuzhiyun 
288*4882a593Smuzhiyun /* Populate the call parameters, merging adjacent pages together */
populate_rw_params(struct page ** pages,int pages_count,unsigned long address,unsigned long address_end,unsigned long first_page,unsigned long last_page,unsigned int iter_last_page_size,int is_write,struct goldfish_pipe_command * command)289*4882a593Smuzhiyun static void populate_rw_params(struct page **pages,
290*4882a593Smuzhiyun 			       int pages_count,
291*4882a593Smuzhiyun 			       unsigned long address,
292*4882a593Smuzhiyun 			       unsigned long address_end,
293*4882a593Smuzhiyun 			       unsigned long first_page,
294*4882a593Smuzhiyun 			       unsigned long last_page,
295*4882a593Smuzhiyun 			       unsigned int iter_last_page_size,
296*4882a593Smuzhiyun 			       int is_write,
297*4882a593Smuzhiyun 			       struct goldfish_pipe_command *command)
298*4882a593Smuzhiyun {
299*4882a593Smuzhiyun 	/*
300*4882a593Smuzhiyun 	 * Process the first page separately - it's the only page that
301*4882a593Smuzhiyun 	 * needs special handling for its start address.
302*4882a593Smuzhiyun 	 */
303*4882a593Smuzhiyun 	unsigned long xaddr = page_to_phys(pages[0]);
304*4882a593Smuzhiyun 	unsigned long xaddr_prev = xaddr;
305*4882a593Smuzhiyun 	int buffer_idx = 0;
306*4882a593Smuzhiyun 	int i = 1;
307*4882a593Smuzhiyun 	int size_on_page = first_page == last_page
308*4882a593Smuzhiyun 			? (int)(address_end - address)
309*4882a593Smuzhiyun 			: (PAGE_SIZE - (address & ~PAGE_MASK));
310*4882a593Smuzhiyun 	command->rw_params.ptrs[0] = (u64)(xaddr | (address & ~PAGE_MASK));
311*4882a593Smuzhiyun 	command->rw_params.sizes[0] = size_on_page;
312*4882a593Smuzhiyun 	for (; i < pages_count; ++i) {
313*4882a593Smuzhiyun 		xaddr = page_to_phys(pages[i]);
314*4882a593Smuzhiyun 		size_on_page = (i == pages_count - 1) ?
315*4882a593Smuzhiyun 			iter_last_page_size : PAGE_SIZE;
316*4882a593Smuzhiyun 		if (xaddr == xaddr_prev + PAGE_SIZE) {
317*4882a593Smuzhiyun 			command->rw_params.sizes[buffer_idx] += size_on_page;
318*4882a593Smuzhiyun 		} else {
319*4882a593Smuzhiyun 			++buffer_idx;
320*4882a593Smuzhiyun 			command->rw_params.ptrs[buffer_idx] = (u64)xaddr;
321*4882a593Smuzhiyun 			command->rw_params.sizes[buffer_idx] = size_on_page;
322*4882a593Smuzhiyun 		}
323*4882a593Smuzhiyun 		xaddr_prev = xaddr;
324*4882a593Smuzhiyun 	}
325*4882a593Smuzhiyun 	command->rw_params.buffers_count = buffer_idx + 1;
326*4882a593Smuzhiyun }
327*4882a593Smuzhiyun 
transfer_max_buffers(struct goldfish_pipe * pipe,unsigned long address,unsigned long address_end,int is_write,unsigned long last_page,unsigned int last_page_size,s32 * consumed_size,int * status)328*4882a593Smuzhiyun static int transfer_max_buffers(struct goldfish_pipe *pipe,
329*4882a593Smuzhiyun 				unsigned long address,
330*4882a593Smuzhiyun 				unsigned long address_end,
331*4882a593Smuzhiyun 				int is_write,
332*4882a593Smuzhiyun 				unsigned long last_page,
333*4882a593Smuzhiyun 				unsigned int last_page_size,
334*4882a593Smuzhiyun 				s32 *consumed_size,
335*4882a593Smuzhiyun 				int *status)
336*4882a593Smuzhiyun {
337*4882a593Smuzhiyun 	unsigned long first_page = address & PAGE_MASK;
338*4882a593Smuzhiyun 	unsigned int iter_last_page_size;
339*4882a593Smuzhiyun 	int pages_count;
340*4882a593Smuzhiyun 
341*4882a593Smuzhiyun 	/* Serialize access to the pipe command buffers */
342*4882a593Smuzhiyun 	if (mutex_lock_interruptible(&pipe->lock))
343*4882a593Smuzhiyun 		return -ERESTARTSYS;
344*4882a593Smuzhiyun 
345*4882a593Smuzhiyun 	pages_count = goldfish_pin_pages(first_page, last_page,
346*4882a593Smuzhiyun 					 last_page_size, is_write,
347*4882a593Smuzhiyun 					 pipe->pages, &iter_last_page_size);
348*4882a593Smuzhiyun 	if (pages_count < 0) {
349*4882a593Smuzhiyun 		mutex_unlock(&pipe->lock);
350*4882a593Smuzhiyun 		return pages_count;
351*4882a593Smuzhiyun 	}
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun 	populate_rw_params(pipe->pages, pages_count, address, address_end,
354*4882a593Smuzhiyun 			   first_page, last_page, iter_last_page_size, is_write,
355*4882a593Smuzhiyun 			   pipe->command_buffer);
356*4882a593Smuzhiyun 
357*4882a593Smuzhiyun 	/* Transfer the data */
358*4882a593Smuzhiyun 	*status = goldfish_pipe_cmd_locked(pipe,
359*4882a593Smuzhiyun 				is_write ? PIPE_CMD_WRITE : PIPE_CMD_READ);
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun 	*consumed_size = pipe->command_buffer->rw_params.consumed_size;
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun 	unpin_user_pages_dirty_lock(pipe->pages, pages_count,
364*4882a593Smuzhiyun 				    !is_write && *consumed_size > 0);
365*4882a593Smuzhiyun 
366*4882a593Smuzhiyun 	mutex_unlock(&pipe->lock);
367*4882a593Smuzhiyun 	return 0;
368*4882a593Smuzhiyun }
369*4882a593Smuzhiyun 
wait_for_host_signal(struct goldfish_pipe * pipe,int is_write)370*4882a593Smuzhiyun static int wait_for_host_signal(struct goldfish_pipe *pipe, int is_write)
371*4882a593Smuzhiyun {
372*4882a593Smuzhiyun 	u32 wake_bit = is_write ? BIT_WAKE_ON_WRITE : BIT_WAKE_ON_READ;
373*4882a593Smuzhiyun 
374*4882a593Smuzhiyun 	set_bit(wake_bit, &pipe->flags);
375*4882a593Smuzhiyun 
376*4882a593Smuzhiyun 	/* Tell the emulator we're going to wait for a wake event */
377*4882a593Smuzhiyun 	goldfish_pipe_cmd(pipe,
378*4882a593Smuzhiyun 		is_write ? PIPE_CMD_WAKE_ON_WRITE : PIPE_CMD_WAKE_ON_READ);
379*4882a593Smuzhiyun 
380*4882a593Smuzhiyun 	while (test_bit(wake_bit, &pipe->flags)) {
381*4882a593Smuzhiyun 		if (wait_event_interruptible(pipe->wake_queue,
382*4882a593Smuzhiyun 					     !test_bit(wake_bit, &pipe->flags)))
383*4882a593Smuzhiyun 			return -ERESTARTSYS;
384*4882a593Smuzhiyun 
385*4882a593Smuzhiyun 		if (test_bit(BIT_CLOSED_ON_HOST, &pipe->flags))
386*4882a593Smuzhiyun 			return -EIO;
387*4882a593Smuzhiyun 	}
388*4882a593Smuzhiyun 
389*4882a593Smuzhiyun 	return 0;
390*4882a593Smuzhiyun }
391*4882a593Smuzhiyun 
goldfish_pipe_read_write(struct file * filp,char __user * buffer,size_t bufflen,int is_write)392*4882a593Smuzhiyun static ssize_t goldfish_pipe_read_write(struct file *filp,
393*4882a593Smuzhiyun 					char __user *buffer,
394*4882a593Smuzhiyun 					size_t bufflen,
395*4882a593Smuzhiyun 					int is_write)
396*4882a593Smuzhiyun {
397*4882a593Smuzhiyun 	struct goldfish_pipe *pipe = filp->private_data;
398*4882a593Smuzhiyun 	int count = 0, ret = -EINVAL;
399*4882a593Smuzhiyun 	unsigned long address, address_end, last_page;
400*4882a593Smuzhiyun 	unsigned int last_page_size;
401*4882a593Smuzhiyun 
402*4882a593Smuzhiyun 	/* If the emulator already closed the pipe, no need to go further */
403*4882a593Smuzhiyun 	if (unlikely(test_bit(BIT_CLOSED_ON_HOST, &pipe->flags)))
404*4882a593Smuzhiyun 		return -EIO;
405*4882a593Smuzhiyun 	/* Null reads or writes succeeds */
406*4882a593Smuzhiyun 	if (unlikely(bufflen == 0))
407*4882a593Smuzhiyun 		return 0;
408*4882a593Smuzhiyun 	/* Check the buffer range for access */
409*4882a593Smuzhiyun 	if (unlikely(!access_ok(buffer, bufflen)))
410*4882a593Smuzhiyun 		return -EFAULT;
411*4882a593Smuzhiyun 
412*4882a593Smuzhiyun 	address = (unsigned long)buffer;
413*4882a593Smuzhiyun 	address_end = address + bufflen;
414*4882a593Smuzhiyun 	last_page = (address_end - 1) & PAGE_MASK;
415*4882a593Smuzhiyun 	last_page_size = ((address_end - 1) & ~PAGE_MASK) + 1;
416*4882a593Smuzhiyun 
417*4882a593Smuzhiyun 	while (address < address_end) {
418*4882a593Smuzhiyun 		s32 consumed_size;
419*4882a593Smuzhiyun 		int status;
420*4882a593Smuzhiyun 
421*4882a593Smuzhiyun 		ret = transfer_max_buffers(pipe, address, address_end, is_write,
422*4882a593Smuzhiyun 					   last_page, last_page_size,
423*4882a593Smuzhiyun 					   &consumed_size, &status);
424*4882a593Smuzhiyun 		if (ret < 0)
425*4882a593Smuzhiyun 			break;
426*4882a593Smuzhiyun 
427*4882a593Smuzhiyun 		if (consumed_size > 0) {
428*4882a593Smuzhiyun 			/* No matter what's the status, we've transferred
429*4882a593Smuzhiyun 			 * something.
430*4882a593Smuzhiyun 			 */
431*4882a593Smuzhiyun 			count += consumed_size;
432*4882a593Smuzhiyun 			address += consumed_size;
433*4882a593Smuzhiyun 		}
434*4882a593Smuzhiyun 		if (status > 0)
435*4882a593Smuzhiyun 			continue;
436*4882a593Smuzhiyun 		if (status == 0) {
437*4882a593Smuzhiyun 			/* EOF */
438*4882a593Smuzhiyun 			ret = 0;
439*4882a593Smuzhiyun 			break;
440*4882a593Smuzhiyun 		}
441*4882a593Smuzhiyun 		if (count > 0) {
442*4882a593Smuzhiyun 			/*
443*4882a593Smuzhiyun 			 * An error occurred, but we already transferred
444*4882a593Smuzhiyun 			 * something on one of the previous iterations.
445*4882a593Smuzhiyun 			 * Just return what we already copied and log this
446*4882a593Smuzhiyun 			 * err.
447*4882a593Smuzhiyun 			 */
448*4882a593Smuzhiyun 			if (status != PIPE_ERROR_AGAIN)
449*4882a593Smuzhiyun 				dev_err_ratelimited(pipe->dev->pdev_dev,
450*4882a593Smuzhiyun 					"backend error %d on %s\n",
451*4882a593Smuzhiyun 					status, is_write ? "write" : "read");
452*4882a593Smuzhiyun 			break;
453*4882a593Smuzhiyun 		}
454*4882a593Smuzhiyun 
455*4882a593Smuzhiyun 		/*
456*4882a593Smuzhiyun 		 * If the error is not PIPE_ERROR_AGAIN, or if we are in
457*4882a593Smuzhiyun 		 * non-blocking mode, just return the error code.
458*4882a593Smuzhiyun 		 */
459*4882a593Smuzhiyun 		if (status != PIPE_ERROR_AGAIN ||
460*4882a593Smuzhiyun 			(filp->f_flags & O_NONBLOCK) != 0) {
461*4882a593Smuzhiyun 			ret = goldfish_pipe_error_convert(status);
462*4882a593Smuzhiyun 			break;
463*4882a593Smuzhiyun 		}
464*4882a593Smuzhiyun 
465*4882a593Smuzhiyun 		status = wait_for_host_signal(pipe, is_write);
466*4882a593Smuzhiyun 		if (status < 0)
467*4882a593Smuzhiyun 			return status;
468*4882a593Smuzhiyun 	}
469*4882a593Smuzhiyun 
470*4882a593Smuzhiyun 	if (count > 0)
471*4882a593Smuzhiyun 		return count;
472*4882a593Smuzhiyun 	return ret;
473*4882a593Smuzhiyun }
474*4882a593Smuzhiyun 
goldfish_pipe_read(struct file * filp,char __user * buffer,size_t bufflen,loff_t * ppos)475*4882a593Smuzhiyun static ssize_t goldfish_pipe_read(struct file *filp, char __user *buffer,
476*4882a593Smuzhiyun 				  size_t bufflen, loff_t *ppos)
477*4882a593Smuzhiyun {
478*4882a593Smuzhiyun 	return goldfish_pipe_read_write(filp, buffer, bufflen,
479*4882a593Smuzhiyun 					/* is_write */ 0);
480*4882a593Smuzhiyun }
481*4882a593Smuzhiyun 
goldfish_pipe_write(struct file * filp,const char __user * buffer,size_t bufflen,loff_t * ppos)482*4882a593Smuzhiyun static ssize_t goldfish_pipe_write(struct file *filp,
483*4882a593Smuzhiyun 				   const char __user *buffer, size_t bufflen,
484*4882a593Smuzhiyun 				   loff_t *ppos)
485*4882a593Smuzhiyun {
486*4882a593Smuzhiyun 	/* cast away the const */
487*4882a593Smuzhiyun 	char __user *no_const_buffer = (char __user *)buffer;
488*4882a593Smuzhiyun 
489*4882a593Smuzhiyun 	return goldfish_pipe_read_write(filp, no_const_buffer, bufflen,
490*4882a593Smuzhiyun 					/* is_write */ 1);
491*4882a593Smuzhiyun }
492*4882a593Smuzhiyun 
goldfish_pipe_poll(struct file * filp,poll_table * wait)493*4882a593Smuzhiyun static __poll_t goldfish_pipe_poll(struct file *filp, poll_table *wait)
494*4882a593Smuzhiyun {
495*4882a593Smuzhiyun 	struct goldfish_pipe *pipe = filp->private_data;
496*4882a593Smuzhiyun 	__poll_t mask = 0;
497*4882a593Smuzhiyun 	int status;
498*4882a593Smuzhiyun 
499*4882a593Smuzhiyun 	poll_wait(filp, &pipe->wake_queue, wait);
500*4882a593Smuzhiyun 
501*4882a593Smuzhiyun 	status = goldfish_pipe_cmd(pipe, PIPE_CMD_POLL);
502*4882a593Smuzhiyun 	if (status < 0)
503*4882a593Smuzhiyun 		return -ERESTARTSYS;
504*4882a593Smuzhiyun 
505*4882a593Smuzhiyun 	if (status & PIPE_POLL_IN)
506*4882a593Smuzhiyun 		mask |= EPOLLIN | EPOLLRDNORM;
507*4882a593Smuzhiyun 	if (status & PIPE_POLL_OUT)
508*4882a593Smuzhiyun 		mask |= EPOLLOUT | EPOLLWRNORM;
509*4882a593Smuzhiyun 	if (status & PIPE_POLL_HUP)
510*4882a593Smuzhiyun 		mask |= EPOLLHUP;
511*4882a593Smuzhiyun 	if (test_bit(BIT_CLOSED_ON_HOST, &pipe->flags))
512*4882a593Smuzhiyun 		mask |= EPOLLERR;
513*4882a593Smuzhiyun 
514*4882a593Smuzhiyun 	return mask;
515*4882a593Smuzhiyun }
516*4882a593Smuzhiyun 
signalled_pipes_add_locked(struct goldfish_pipe_dev * dev,u32 id,u32 flags)517*4882a593Smuzhiyun static void signalled_pipes_add_locked(struct goldfish_pipe_dev *dev,
518*4882a593Smuzhiyun 				       u32 id, u32 flags)
519*4882a593Smuzhiyun {
520*4882a593Smuzhiyun 	struct goldfish_pipe *pipe;
521*4882a593Smuzhiyun 
522*4882a593Smuzhiyun 	if (WARN_ON(id >= dev->pipes_capacity))
523*4882a593Smuzhiyun 		return;
524*4882a593Smuzhiyun 
525*4882a593Smuzhiyun 	pipe = dev->pipes[id];
526*4882a593Smuzhiyun 	if (!pipe)
527*4882a593Smuzhiyun 		return;
528*4882a593Smuzhiyun 	pipe->signalled_flags |= flags;
529*4882a593Smuzhiyun 
530*4882a593Smuzhiyun 	if (pipe->prev_signalled || pipe->next_signalled ||
531*4882a593Smuzhiyun 		dev->first_signalled_pipe == pipe)
532*4882a593Smuzhiyun 		return;	/* already in the list */
533*4882a593Smuzhiyun 	pipe->next_signalled = dev->first_signalled_pipe;
534*4882a593Smuzhiyun 	if (dev->first_signalled_pipe)
535*4882a593Smuzhiyun 		dev->first_signalled_pipe->prev_signalled = pipe;
536*4882a593Smuzhiyun 	dev->first_signalled_pipe = pipe;
537*4882a593Smuzhiyun }
538*4882a593Smuzhiyun 
signalled_pipes_remove_locked(struct goldfish_pipe_dev * dev,struct goldfish_pipe * pipe)539*4882a593Smuzhiyun static void signalled_pipes_remove_locked(struct goldfish_pipe_dev *dev,
540*4882a593Smuzhiyun 					  struct goldfish_pipe *pipe)
541*4882a593Smuzhiyun {
542*4882a593Smuzhiyun 	if (pipe->prev_signalled)
543*4882a593Smuzhiyun 		pipe->prev_signalled->next_signalled = pipe->next_signalled;
544*4882a593Smuzhiyun 	if (pipe->next_signalled)
545*4882a593Smuzhiyun 		pipe->next_signalled->prev_signalled = pipe->prev_signalled;
546*4882a593Smuzhiyun 	if (pipe == dev->first_signalled_pipe)
547*4882a593Smuzhiyun 		dev->first_signalled_pipe = pipe->next_signalled;
548*4882a593Smuzhiyun 	pipe->prev_signalled = NULL;
549*4882a593Smuzhiyun 	pipe->next_signalled = NULL;
550*4882a593Smuzhiyun }
551*4882a593Smuzhiyun 
signalled_pipes_pop_front(struct goldfish_pipe_dev * dev,int * wakes)552*4882a593Smuzhiyun static struct goldfish_pipe *signalled_pipes_pop_front(
553*4882a593Smuzhiyun 		struct goldfish_pipe_dev *dev, int *wakes)
554*4882a593Smuzhiyun {
555*4882a593Smuzhiyun 	struct goldfish_pipe *pipe;
556*4882a593Smuzhiyun 	unsigned long flags;
557*4882a593Smuzhiyun 
558*4882a593Smuzhiyun 	spin_lock_irqsave(&dev->lock, flags);
559*4882a593Smuzhiyun 
560*4882a593Smuzhiyun 	pipe = dev->first_signalled_pipe;
561*4882a593Smuzhiyun 	if (pipe) {
562*4882a593Smuzhiyun 		*wakes = pipe->signalled_flags;
563*4882a593Smuzhiyun 		pipe->signalled_flags = 0;
564*4882a593Smuzhiyun 		/*
565*4882a593Smuzhiyun 		 * This is an optimized version of
566*4882a593Smuzhiyun 		 * signalled_pipes_remove_locked()
567*4882a593Smuzhiyun 		 * - We want to make it as fast as possible to
568*4882a593Smuzhiyun 		 * wake the sleeping pipe operations faster.
569*4882a593Smuzhiyun 		 */
570*4882a593Smuzhiyun 		dev->first_signalled_pipe = pipe->next_signalled;
571*4882a593Smuzhiyun 		if (dev->first_signalled_pipe)
572*4882a593Smuzhiyun 			dev->first_signalled_pipe->prev_signalled = NULL;
573*4882a593Smuzhiyun 		pipe->next_signalled = NULL;
574*4882a593Smuzhiyun 	}
575*4882a593Smuzhiyun 
576*4882a593Smuzhiyun 	spin_unlock_irqrestore(&dev->lock, flags);
577*4882a593Smuzhiyun 	return pipe;
578*4882a593Smuzhiyun }
579*4882a593Smuzhiyun 
goldfish_interrupt_task(unsigned long dev_addr)580*4882a593Smuzhiyun static void goldfish_interrupt_task(unsigned long dev_addr)
581*4882a593Smuzhiyun {
582*4882a593Smuzhiyun 	/* Iterate over the signalled pipes and wake them one by one */
583*4882a593Smuzhiyun 	struct goldfish_pipe_dev *dev = (struct goldfish_pipe_dev *)dev_addr;
584*4882a593Smuzhiyun 	struct goldfish_pipe *pipe;
585*4882a593Smuzhiyun 	int wakes;
586*4882a593Smuzhiyun 
587*4882a593Smuzhiyun 	while ((pipe = signalled_pipes_pop_front(dev, &wakes)) != NULL) {
588*4882a593Smuzhiyun 		if (wakes & PIPE_WAKE_CLOSED) {
589*4882a593Smuzhiyun 			pipe->flags = 1 << BIT_CLOSED_ON_HOST;
590*4882a593Smuzhiyun 		} else {
591*4882a593Smuzhiyun 			if (wakes & PIPE_WAKE_READ)
592*4882a593Smuzhiyun 				clear_bit(BIT_WAKE_ON_READ, &pipe->flags);
593*4882a593Smuzhiyun 			if (wakes & PIPE_WAKE_WRITE)
594*4882a593Smuzhiyun 				clear_bit(BIT_WAKE_ON_WRITE, &pipe->flags);
595*4882a593Smuzhiyun 		}
596*4882a593Smuzhiyun 		/*
597*4882a593Smuzhiyun 		 * wake_up_interruptible() implies a write barrier, so don't
598*4882a593Smuzhiyun 		 * explicitly add another one here.
599*4882a593Smuzhiyun 		 */
600*4882a593Smuzhiyun 		wake_up_interruptible(&pipe->wake_queue);
601*4882a593Smuzhiyun 	}
602*4882a593Smuzhiyun }
603*4882a593Smuzhiyun 
604*4882a593Smuzhiyun static void goldfish_pipe_device_deinit(struct platform_device *pdev,
605*4882a593Smuzhiyun 					struct goldfish_pipe_dev *dev);
606*4882a593Smuzhiyun 
607*4882a593Smuzhiyun /*
608*4882a593Smuzhiyun  * The general idea of the interrupt handling:
609*4882a593Smuzhiyun  *
610*4882a593Smuzhiyun  *  1. device raises an interrupt if there's at least one signalled pipe
611*4882a593Smuzhiyun  *  2. IRQ handler reads the signalled pipes and their count from the device
612*4882a593Smuzhiyun  *  3. device writes them into a shared buffer and returns the count
613*4882a593Smuzhiyun  *      it only resets the IRQ if it has returned all signalled pipes,
614*4882a593Smuzhiyun  *      otherwise it leaves it raised, so IRQ handler will be called
615*4882a593Smuzhiyun  *      again for the next chunk
616*4882a593Smuzhiyun  *  4. IRQ handler adds all returned pipes to the device's signalled pipes list
617*4882a593Smuzhiyun  *  5. IRQ handler launches a tasklet to process the signalled pipes from the
618*4882a593Smuzhiyun  *      list in a separate context
619*4882a593Smuzhiyun  */
goldfish_pipe_interrupt(int irq,void * dev_id)620*4882a593Smuzhiyun static irqreturn_t goldfish_pipe_interrupt(int irq, void *dev_id)
621*4882a593Smuzhiyun {
622*4882a593Smuzhiyun 	u32 count;
623*4882a593Smuzhiyun 	u32 i;
624*4882a593Smuzhiyun 	unsigned long flags;
625*4882a593Smuzhiyun 	struct goldfish_pipe_dev *dev = dev_id;
626*4882a593Smuzhiyun 
627*4882a593Smuzhiyun 	if (dev->magic != &goldfish_pipe_device_deinit)
628*4882a593Smuzhiyun 		return IRQ_NONE;
629*4882a593Smuzhiyun 
630*4882a593Smuzhiyun 	/* Request the signalled pipes from the device */
631*4882a593Smuzhiyun 	spin_lock_irqsave(&dev->lock, flags);
632*4882a593Smuzhiyun 
633*4882a593Smuzhiyun 	count = readl(dev->base + PIPE_REG_GET_SIGNALLED);
634*4882a593Smuzhiyun 	if (count == 0) {
635*4882a593Smuzhiyun 		spin_unlock_irqrestore(&dev->lock, flags);
636*4882a593Smuzhiyun 		return IRQ_NONE;
637*4882a593Smuzhiyun 	}
638*4882a593Smuzhiyun 	if (count > MAX_SIGNALLED_PIPES)
639*4882a593Smuzhiyun 		count = MAX_SIGNALLED_PIPES;
640*4882a593Smuzhiyun 
641*4882a593Smuzhiyun 	for (i = 0; i < count; ++i)
642*4882a593Smuzhiyun 		signalled_pipes_add_locked(dev,
643*4882a593Smuzhiyun 			dev->buffers->signalled_pipe_buffers[i].id,
644*4882a593Smuzhiyun 			dev->buffers->signalled_pipe_buffers[i].flags);
645*4882a593Smuzhiyun 
646*4882a593Smuzhiyun 	spin_unlock_irqrestore(&dev->lock, flags);
647*4882a593Smuzhiyun 
648*4882a593Smuzhiyun 	tasklet_schedule(&dev->irq_tasklet);
649*4882a593Smuzhiyun 	return IRQ_HANDLED;
650*4882a593Smuzhiyun }
651*4882a593Smuzhiyun 
get_free_pipe_id_locked(struct goldfish_pipe_dev * dev)652*4882a593Smuzhiyun static int get_free_pipe_id_locked(struct goldfish_pipe_dev *dev)
653*4882a593Smuzhiyun {
654*4882a593Smuzhiyun 	int id;
655*4882a593Smuzhiyun 
656*4882a593Smuzhiyun 	for (id = 0; id < dev->pipes_capacity; ++id)
657*4882a593Smuzhiyun 		if (!dev->pipes[id])
658*4882a593Smuzhiyun 			return id;
659*4882a593Smuzhiyun 
660*4882a593Smuzhiyun 	{
661*4882a593Smuzhiyun 		/* Reallocate the array.
662*4882a593Smuzhiyun 		 * Since get_free_pipe_id_locked runs with interrupts disabled,
663*4882a593Smuzhiyun 		 * we don't want to make calls that could lead to sleep.
664*4882a593Smuzhiyun 		 */
665*4882a593Smuzhiyun 		u32 new_capacity = 2 * dev->pipes_capacity;
666*4882a593Smuzhiyun 		struct goldfish_pipe **pipes =
667*4882a593Smuzhiyun 			kcalloc(new_capacity, sizeof(*pipes), GFP_ATOMIC);
668*4882a593Smuzhiyun 		if (!pipes)
669*4882a593Smuzhiyun 			return -ENOMEM;
670*4882a593Smuzhiyun 		memcpy(pipes, dev->pipes, sizeof(*pipes) * dev->pipes_capacity);
671*4882a593Smuzhiyun 		kfree(dev->pipes);
672*4882a593Smuzhiyun 		dev->pipes = pipes;
673*4882a593Smuzhiyun 		id = dev->pipes_capacity;
674*4882a593Smuzhiyun 		dev->pipes_capacity = new_capacity;
675*4882a593Smuzhiyun 	}
676*4882a593Smuzhiyun 	return id;
677*4882a593Smuzhiyun }
678*4882a593Smuzhiyun 
679*4882a593Smuzhiyun /* A helper function to get the instance of goldfish_pipe_dev from file */
to_goldfish_pipe_dev(struct file * file)680*4882a593Smuzhiyun static struct goldfish_pipe_dev *to_goldfish_pipe_dev(struct file *file)
681*4882a593Smuzhiyun {
682*4882a593Smuzhiyun 	struct miscdevice *miscdev = file->private_data;
683*4882a593Smuzhiyun 
684*4882a593Smuzhiyun 	return container_of(miscdev, struct goldfish_pipe_dev, miscdev);
685*4882a593Smuzhiyun }
686*4882a593Smuzhiyun 
687*4882a593Smuzhiyun /**
688*4882a593Smuzhiyun  *	goldfish_pipe_open - open a channel to the AVD
689*4882a593Smuzhiyun  *	@inode: inode of device
690*4882a593Smuzhiyun  *	@file: file struct of opener
691*4882a593Smuzhiyun  *
692*4882a593Smuzhiyun  *	Create a new pipe link between the emulator and the use application.
693*4882a593Smuzhiyun  *	Each new request produces a new pipe.
694*4882a593Smuzhiyun  *
695*4882a593Smuzhiyun  *	Note: we use the pipe ID as a mux. All goldfish emulations are 32bit
696*4882a593Smuzhiyun  *	right now so this is fine. A move to 64bit will need this addressing
697*4882a593Smuzhiyun  */
goldfish_pipe_open(struct inode * inode,struct file * file)698*4882a593Smuzhiyun static int goldfish_pipe_open(struct inode *inode, struct file *file)
699*4882a593Smuzhiyun {
700*4882a593Smuzhiyun 	struct goldfish_pipe_dev *dev = to_goldfish_pipe_dev(file);
701*4882a593Smuzhiyun 	unsigned long flags;
702*4882a593Smuzhiyun 	int id;
703*4882a593Smuzhiyun 	int status;
704*4882a593Smuzhiyun 
705*4882a593Smuzhiyun 	/* Allocate new pipe kernel object */
706*4882a593Smuzhiyun 	struct goldfish_pipe *pipe = kzalloc(sizeof(*pipe), GFP_KERNEL);
707*4882a593Smuzhiyun 
708*4882a593Smuzhiyun 	if (!pipe)
709*4882a593Smuzhiyun 		return -ENOMEM;
710*4882a593Smuzhiyun 
711*4882a593Smuzhiyun 	pipe->dev = dev;
712*4882a593Smuzhiyun 	mutex_init(&pipe->lock);
713*4882a593Smuzhiyun 	init_waitqueue_head(&pipe->wake_queue);
714*4882a593Smuzhiyun 
715*4882a593Smuzhiyun 	/*
716*4882a593Smuzhiyun 	 * Command buffer needs to be allocated on its own page to make sure
717*4882a593Smuzhiyun 	 * it is physically contiguous in host's address space.
718*4882a593Smuzhiyun 	 */
719*4882a593Smuzhiyun 	BUILD_BUG_ON(sizeof(struct goldfish_pipe_command) > PAGE_SIZE);
720*4882a593Smuzhiyun 	pipe->command_buffer =
721*4882a593Smuzhiyun 		(struct goldfish_pipe_command *)__get_free_page(GFP_KERNEL);
722*4882a593Smuzhiyun 	if (!pipe->command_buffer) {
723*4882a593Smuzhiyun 		status = -ENOMEM;
724*4882a593Smuzhiyun 		goto err_pipe;
725*4882a593Smuzhiyun 	}
726*4882a593Smuzhiyun 
727*4882a593Smuzhiyun 	spin_lock_irqsave(&dev->lock, flags);
728*4882a593Smuzhiyun 
729*4882a593Smuzhiyun 	id = get_free_pipe_id_locked(dev);
730*4882a593Smuzhiyun 	if (id < 0) {
731*4882a593Smuzhiyun 		status = id;
732*4882a593Smuzhiyun 		goto err_id_locked;
733*4882a593Smuzhiyun 	}
734*4882a593Smuzhiyun 
735*4882a593Smuzhiyun 	dev->pipes[id] = pipe;
736*4882a593Smuzhiyun 	pipe->id = id;
737*4882a593Smuzhiyun 	pipe->command_buffer->id = id;
738*4882a593Smuzhiyun 
739*4882a593Smuzhiyun 	/* Now tell the emulator we're opening a new pipe. */
740*4882a593Smuzhiyun 	dev->buffers->open_command_params.rw_params_max_count =
741*4882a593Smuzhiyun 			MAX_BUFFERS_PER_COMMAND;
742*4882a593Smuzhiyun 	dev->buffers->open_command_params.command_buffer_ptr =
743*4882a593Smuzhiyun 			(u64)(unsigned long)__pa(pipe->command_buffer);
744*4882a593Smuzhiyun 	status = goldfish_pipe_cmd_locked(pipe, PIPE_CMD_OPEN);
745*4882a593Smuzhiyun 	spin_unlock_irqrestore(&dev->lock, flags);
746*4882a593Smuzhiyun 	if (status < 0)
747*4882a593Smuzhiyun 		goto err_cmd;
748*4882a593Smuzhiyun 	/* All is done, save the pipe into the file's private data field */
749*4882a593Smuzhiyun 	file->private_data = pipe;
750*4882a593Smuzhiyun 	return 0;
751*4882a593Smuzhiyun 
752*4882a593Smuzhiyun err_cmd:
753*4882a593Smuzhiyun 	spin_lock_irqsave(&dev->lock, flags);
754*4882a593Smuzhiyun 	dev->pipes[id] = NULL;
755*4882a593Smuzhiyun err_id_locked:
756*4882a593Smuzhiyun 	spin_unlock_irqrestore(&dev->lock, flags);
757*4882a593Smuzhiyun 	free_page((unsigned long)pipe->command_buffer);
758*4882a593Smuzhiyun err_pipe:
759*4882a593Smuzhiyun 	kfree(pipe);
760*4882a593Smuzhiyun 	return status;
761*4882a593Smuzhiyun }
762*4882a593Smuzhiyun 
goldfish_pipe_release(struct inode * inode,struct file * filp)763*4882a593Smuzhiyun static int goldfish_pipe_release(struct inode *inode, struct file *filp)
764*4882a593Smuzhiyun {
765*4882a593Smuzhiyun 	unsigned long flags;
766*4882a593Smuzhiyun 	struct goldfish_pipe *pipe = filp->private_data;
767*4882a593Smuzhiyun 	struct goldfish_pipe_dev *dev = pipe->dev;
768*4882a593Smuzhiyun 
769*4882a593Smuzhiyun 	/* The guest is closing the channel, so tell the emulator right now */
770*4882a593Smuzhiyun 	goldfish_pipe_cmd(pipe, PIPE_CMD_CLOSE);
771*4882a593Smuzhiyun 
772*4882a593Smuzhiyun 	spin_lock_irqsave(&dev->lock, flags);
773*4882a593Smuzhiyun 	dev->pipes[pipe->id] = NULL;
774*4882a593Smuzhiyun 	signalled_pipes_remove_locked(dev, pipe);
775*4882a593Smuzhiyun 	spin_unlock_irqrestore(&dev->lock, flags);
776*4882a593Smuzhiyun 
777*4882a593Smuzhiyun 	filp->private_data = NULL;
778*4882a593Smuzhiyun 	free_page((unsigned long)pipe->command_buffer);
779*4882a593Smuzhiyun 	kfree(pipe);
780*4882a593Smuzhiyun 	return 0;
781*4882a593Smuzhiyun }
782*4882a593Smuzhiyun 
783*4882a593Smuzhiyun static const struct file_operations goldfish_pipe_fops = {
784*4882a593Smuzhiyun 	.owner = THIS_MODULE,
785*4882a593Smuzhiyun 	.read = goldfish_pipe_read,
786*4882a593Smuzhiyun 	.write = goldfish_pipe_write,
787*4882a593Smuzhiyun 	.poll = goldfish_pipe_poll,
788*4882a593Smuzhiyun 	.open = goldfish_pipe_open,
789*4882a593Smuzhiyun 	.release = goldfish_pipe_release,
790*4882a593Smuzhiyun };
791*4882a593Smuzhiyun 
init_miscdevice(struct miscdevice * miscdev)792*4882a593Smuzhiyun static void init_miscdevice(struct miscdevice *miscdev)
793*4882a593Smuzhiyun {
794*4882a593Smuzhiyun 	memset(miscdev, 0, sizeof(*miscdev));
795*4882a593Smuzhiyun 
796*4882a593Smuzhiyun 	miscdev->minor = MISC_DYNAMIC_MINOR;
797*4882a593Smuzhiyun 	miscdev->name = "goldfish_pipe";
798*4882a593Smuzhiyun 	miscdev->fops = &goldfish_pipe_fops;
799*4882a593Smuzhiyun }
800*4882a593Smuzhiyun 
write_pa_addr(void * addr,void __iomem * portl,void __iomem * porth)801*4882a593Smuzhiyun static void write_pa_addr(void *addr, void __iomem *portl, void __iomem *porth)
802*4882a593Smuzhiyun {
803*4882a593Smuzhiyun 	const unsigned long paddr = __pa(addr);
804*4882a593Smuzhiyun 
805*4882a593Smuzhiyun 	writel(upper_32_bits(paddr), porth);
806*4882a593Smuzhiyun 	writel(lower_32_bits(paddr), portl);
807*4882a593Smuzhiyun }
808*4882a593Smuzhiyun 
goldfish_pipe_device_init(struct platform_device * pdev,struct goldfish_pipe_dev * dev)809*4882a593Smuzhiyun static int goldfish_pipe_device_init(struct platform_device *pdev,
810*4882a593Smuzhiyun 				     struct goldfish_pipe_dev *dev)
811*4882a593Smuzhiyun {
812*4882a593Smuzhiyun 	int err;
813*4882a593Smuzhiyun 
814*4882a593Smuzhiyun 	tasklet_init(&dev->irq_tasklet, &goldfish_interrupt_task,
815*4882a593Smuzhiyun 		     (unsigned long)dev);
816*4882a593Smuzhiyun 
817*4882a593Smuzhiyun 	err = devm_request_irq(&pdev->dev, dev->irq,
818*4882a593Smuzhiyun 			       goldfish_pipe_interrupt,
819*4882a593Smuzhiyun 			       IRQF_SHARED, "goldfish_pipe", dev);
820*4882a593Smuzhiyun 	if (err) {
821*4882a593Smuzhiyun 		dev_err(&pdev->dev, "unable to allocate IRQ for v2\n");
822*4882a593Smuzhiyun 		return err;
823*4882a593Smuzhiyun 	}
824*4882a593Smuzhiyun 
825*4882a593Smuzhiyun 	init_miscdevice(&dev->miscdev);
826*4882a593Smuzhiyun 	err = misc_register(&dev->miscdev);
827*4882a593Smuzhiyun 	if (err) {
828*4882a593Smuzhiyun 		dev_err(&pdev->dev, "unable to register v2 device\n");
829*4882a593Smuzhiyun 		return err;
830*4882a593Smuzhiyun 	}
831*4882a593Smuzhiyun 
832*4882a593Smuzhiyun 	dev->pdev_dev = &pdev->dev;
833*4882a593Smuzhiyun 	dev->first_signalled_pipe = NULL;
834*4882a593Smuzhiyun 	dev->pipes_capacity = INITIAL_PIPES_CAPACITY;
835*4882a593Smuzhiyun 	dev->pipes = kcalloc(dev->pipes_capacity, sizeof(*dev->pipes),
836*4882a593Smuzhiyun 			     GFP_KERNEL);
837*4882a593Smuzhiyun 	if (!dev->pipes) {
838*4882a593Smuzhiyun 		misc_deregister(&dev->miscdev);
839*4882a593Smuzhiyun 		return -ENOMEM;
840*4882a593Smuzhiyun 	}
841*4882a593Smuzhiyun 
842*4882a593Smuzhiyun 	/*
843*4882a593Smuzhiyun 	 * We're going to pass two buffers, open_command_params and
844*4882a593Smuzhiyun 	 * signalled_pipe_buffers, to the host. This means each of those buffers
845*4882a593Smuzhiyun 	 * needs to be contained in a single physical page. The easiest choice
846*4882a593Smuzhiyun 	 * is to just allocate a page and place the buffers in it.
847*4882a593Smuzhiyun 	 */
848*4882a593Smuzhiyun 	BUILD_BUG_ON(sizeof(struct goldfish_pipe_dev_buffers) > PAGE_SIZE);
849*4882a593Smuzhiyun 	dev->buffers = (struct goldfish_pipe_dev_buffers *)
850*4882a593Smuzhiyun 		__get_free_page(GFP_KERNEL);
851*4882a593Smuzhiyun 	if (!dev->buffers) {
852*4882a593Smuzhiyun 		kfree(dev->pipes);
853*4882a593Smuzhiyun 		misc_deregister(&dev->miscdev);
854*4882a593Smuzhiyun 		return -ENOMEM;
855*4882a593Smuzhiyun 	}
856*4882a593Smuzhiyun 
857*4882a593Smuzhiyun 	/* Send the buffer addresses to the host */
858*4882a593Smuzhiyun 	write_pa_addr(&dev->buffers->signalled_pipe_buffers,
859*4882a593Smuzhiyun 		      dev->base + PIPE_REG_SIGNAL_BUFFER,
860*4882a593Smuzhiyun 		      dev->base + PIPE_REG_SIGNAL_BUFFER_HIGH);
861*4882a593Smuzhiyun 
862*4882a593Smuzhiyun 	writel(MAX_SIGNALLED_PIPES,
863*4882a593Smuzhiyun 	       dev->base + PIPE_REG_SIGNAL_BUFFER_COUNT);
864*4882a593Smuzhiyun 
865*4882a593Smuzhiyun 	write_pa_addr(&dev->buffers->open_command_params,
866*4882a593Smuzhiyun 		      dev->base + PIPE_REG_OPEN_BUFFER,
867*4882a593Smuzhiyun 		      dev->base + PIPE_REG_OPEN_BUFFER_HIGH);
868*4882a593Smuzhiyun 
869*4882a593Smuzhiyun 	platform_set_drvdata(pdev, dev);
870*4882a593Smuzhiyun 	return 0;
871*4882a593Smuzhiyun }
872*4882a593Smuzhiyun 
goldfish_pipe_device_deinit(struct platform_device * pdev,struct goldfish_pipe_dev * dev)873*4882a593Smuzhiyun static void goldfish_pipe_device_deinit(struct platform_device *pdev,
874*4882a593Smuzhiyun 					struct goldfish_pipe_dev *dev)
875*4882a593Smuzhiyun {
876*4882a593Smuzhiyun 	misc_deregister(&dev->miscdev);
877*4882a593Smuzhiyun 	tasklet_kill(&dev->irq_tasklet);
878*4882a593Smuzhiyun 	kfree(dev->pipes);
879*4882a593Smuzhiyun 	free_page((unsigned long)dev->buffers);
880*4882a593Smuzhiyun }
881*4882a593Smuzhiyun 
goldfish_pipe_probe(struct platform_device * pdev)882*4882a593Smuzhiyun static int goldfish_pipe_probe(struct platform_device *pdev)
883*4882a593Smuzhiyun {
884*4882a593Smuzhiyun 	struct resource *r;
885*4882a593Smuzhiyun 	struct goldfish_pipe_dev *dev;
886*4882a593Smuzhiyun 
887*4882a593Smuzhiyun 	dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
888*4882a593Smuzhiyun 	if (!dev)
889*4882a593Smuzhiyun 		return -ENOMEM;
890*4882a593Smuzhiyun 
891*4882a593Smuzhiyun 	dev->magic = &goldfish_pipe_device_deinit;
892*4882a593Smuzhiyun 	spin_lock_init(&dev->lock);
893*4882a593Smuzhiyun 
894*4882a593Smuzhiyun 	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
895*4882a593Smuzhiyun 	if (!r || resource_size(r) < PAGE_SIZE) {
896*4882a593Smuzhiyun 		dev_err(&pdev->dev, "can't allocate i/o page\n");
897*4882a593Smuzhiyun 		return -EINVAL;
898*4882a593Smuzhiyun 	}
899*4882a593Smuzhiyun 	dev->base = devm_ioremap(&pdev->dev, r->start, PAGE_SIZE);
900*4882a593Smuzhiyun 	if (!dev->base) {
901*4882a593Smuzhiyun 		dev_err(&pdev->dev, "ioremap failed\n");
902*4882a593Smuzhiyun 		return -EINVAL;
903*4882a593Smuzhiyun 	}
904*4882a593Smuzhiyun 
905*4882a593Smuzhiyun 	r = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
906*4882a593Smuzhiyun 	if (!r)
907*4882a593Smuzhiyun 		return -EINVAL;
908*4882a593Smuzhiyun 
909*4882a593Smuzhiyun 	dev->irq = r->start;
910*4882a593Smuzhiyun 
911*4882a593Smuzhiyun 	/*
912*4882a593Smuzhiyun 	 * Exchange the versions with the host device
913*4882a593Smuzhiyun 	 *
914*4882a593Smuzhiyun 	 * Note: v1 driver used to not report its version, so we write it before
915*4882a593Smuzhiyun 	 *  reading device version back: this allows the host implementation to
916*4882a593Smuzhiyun 	 *  detect the old driver (if there was no version write before read).
917*4882a593Smuzhiyun 	 */
918*4882a593Smuzhiyun 	writel(PIPE_DRIVER_VERSION, dev->base + PIPE_REG_VERSION);
919*4882a593Smuzhiyun 	dev->version = readl(dev->base + PIPE_REG_VERSION);
920*4882a593Smuzhiyun 	if (WARN_ON(dev->version < PIPE_CURRENT_DEVICE_VERSION))
921*4882a593Smuzhiyun 		return -EINVAL;
922*4882a593Smuzhiyun 
923*4882a593Smuzhiyun 	return goldfish_pipe_device_init(pdev, dev);
924*4882a593Smuzhiyun }
925*4882a593Smuzhiyun 
goldfish_pipe_remove(struct platform_device * pdev)926*4882a593Smuzhiyun static int goldfish_pipe_remove(struct platform_device *pdev)
927*4882a593Smuzhiyun {
928*4882a593Smuzhiyun 	struct goldfish_pipe_dev *dev = platform_get_drvdata(pdev);
929*4882a593Smuzhiyun 
930*4882a593Smuzhiyun 	goldfish_pipe_device_deinit(pdev, dev);
931*4882a593Smuzhiyun 	return 0;
932*4882a593Smuzhiyun }
933*4882a593Smuzhiyun 
934*4882a593Smuzhiyun static const struct acpi_device_id goldfish_pipe_acpi_match[] = {
935*4882a593Smuzhiyun 	{ "GFSH0003", 0 },
936*4882a593Smuzhiyun 	{ },
937*4882a593Smuzhiyun };
938*4882a593Smuzhiyun MODULE_DEVICE_TABLE(acpi, goldfish_pipe_acpi_match);
939*4882a593Smuzhiyun 
940*4882a593Smuzhiyun static const struct of_device_id goldfish_pipe_of_match[] = {
941*4882a593Smuzhiyun 	{ .compatible = "google,android-pipe", },
942*4882a593Smuzhiyun 	{},
943*4882a593Smuzhiyun };
944*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, goldfish_pipe_of_match);
945*4882a593Smuzhiyun 
946*4882a593Smuzhiyun static struct platform_driver goldfish_pipe_driver = {
947*4882a593Smuzhiyun 	.probe = goldfish_pipe_probe,
948*4882a593Smuzhiyun 	.remove = goldfish_pipe_remove,
949*4882a593Smuzhiyun 	.driver = {
950*4882a593Smuzhiyun 		.name = "goldfish_pipe",
951*4882a593Smuzhiyun 		.of_match_table = goldfish_pipe_of_match,
952*4882a593Smuzhiyun 		.acpi_match_table = ACPI_PTR(goldfish_pipe_acpi_match),
953*4882a593Smuzhiyun 	}
954*4882a593Smuzhiyun };
955*4882a593Smuzhiyun 
956*4882a593Smuzhiyun module_platform_driver(goldfish_pipe_driver);
957*4882a593Smuzhiyun MODULE_AUTHOR("David Turner <digit@google.com>");
958*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
959