1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun // SPI interface for ChromeOS Embedded Controller
3*4882a593Smuzhiyun //
4*4882a593Smuzhiyun // Copyright (C) 2012 Google, Inc
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include <linux/delay.h>
7*4882a593Smuzhiyun #include <linux/kernel.h>
8*4882a593Smuzhiyun #include <linux/module.h>
9*4882a593Smuzhiyun #include <linux/of.h>
10*4882a593Smuzhiyun #include <linux/platform_data/cros_ec_commands.h>
11*4882a593Smuzhiyun #include <linux/platform_data/cros_ec_proto.h>
12*4882a593Smuzhiyun #include <linux/platform_device.h>
13*4882a593Smuzhiyun #include <linux/slab.h>
14*4882a593Smuzhiyun #include <linux/spi/spi.h>
15*4882a593Smuzhiyun #include <uapi/linux/sched/types.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #include "cros_ec.h"
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun /* The header byte, which follows the preamble */
20*4882a593Smuzhiyun #define EC_MSG_HEADER 0xec
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun /*
23*4882a593Smuzhiyun * Number of EC preamble bytes we read at a time. Since it takes
24*4882a593Smuzhiyun * about 400-500us for the EC to respond there is not a lot of
25*4882a593Smuzhiyun * point in tuning this. If the EC could respond faster then
26*4882a593Smuzhiyun * we could increase this so that might expect the preamble and
27*4882a593Smuzhiyun * message to occur in a single transaction. However, the maximum
28*4882a593Smuzhiyun * SPI transfer size is 256 bytes, so at 5MHz we need a response
29*4882a593Smuzhiyun * time of perhaps <320us (200 bytes / 1600 bits).
30*4882a593Smuzhiyun */
31*4882a593Smuzhiyun #define EC_MSG_PREAMBLE_COUNT 32
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun /*
34*4882a593Smuzhiyun * Allow for a long time for the EC to respond. We support i2c
35*4882a593Smuzhiyun * tunneling and support fairly long messages for the tunnel (249
36*4882a593Smuzhiyun * bytes long at the moment). If we're talking to a 100 kHz device
37*4882a593Smuzhiyun * on the other end and need to transfer ~256 bytes, then we need:
38*4882a593Smuzhiyun * 10 us/bit * ~10 bits/byte * ~256 bytes = ~25ms
39*4882a593Smuzhiyun *
40*4882a593Smuzhiyun * We'll wait 8 times that to handle clock stretching and other
41*4882a593Smuzhiyun * paranoia. Note that some battery gas gauge ICs claim to have a
42*4882a593Smuzhiyun * clock stretch of 144ms in rare situations. That's incentive for
43*4882a593Smuzhiyun * not directly passing i2c through, but it's too late for that for
44*4882a593Smuzhiyun * existing hardware.
45*4882a593Smuzhiyun *
46*4882a593Smuzhiyun * It's pretty unlikely that we'll really see a 249 byte tunnel in
47*4882a593Smuzhiyun * anything other than testing. If this was more common we might
48*4882a593Smuzhiyun * consider having slow commands like this require a GET_STATUS
49*4882a593Smuzhiyun * wait loop. The 'flash write' command would be another candidate
50*4882a593Smuzhiyun * for this, clocking in at 2-3ms.
51*4882a593Smuzhiyun */
52*4882a593Smuzhiyun #define EC_MSG_DEADLINE_MS 200
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun /*
55*4882a593Smuzhiyun * Time between raising the SPI chip select (for the end of a
56*4882a593Smuzhiyun * transaction) and dropping it again (for the next transaction).
57*4882a593Smuzhiyun * If we go too fast, the EC will miss the transaction. We know that we
58*4882a593Smuzhiyun * need at least 70 us with the 16 MHz STM32 EC, so go with 200 us to be
59*4882a593Smuzhiyun * safe.
60*4882a593Smuzhiyun */
61*4882a593Smuzhiyun #define EC_SPI_RECOVERY_TIME_NS (200 * 1000)
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun /**
64*4882a593Smuzhiyun * struct cros_ec_spi - information about a SPI-connected EC
65*4882a593Smuzhiyun *
66*4882a593Smuzhiyun * @spi: SPI device we are connected to
67*4882a593Smuzhiyun * @last_transfer_ns: time that we last finished a transfer.
68*4882a593Smuzhiyun * @start_of_msg_delay: used to set the delay_usecs on the spi_transfer that
69*4882a593Smuzhiyun * is sent when we want to turn on CS at the start of a transaction.
70*4882a593Smuzhiyun * @end_of_msg_delay: used to set the delay_usecs on the spi_transfer that
71*4882a593Smuzhiyun * is sent when we want to turn off CS at the end of a transaction.
72*4882a593Smuzhiyun * @high_pri_worker: Used to schedule high priority work.
73*4882a593Smuzhiyun */
74*4882a593Smuzhiyun struct cros_ec_spi {
75*4882a593Smuzhiyun struct spi_device *spi;
76*4882a593Smuzhiyun s64 last_transfer_ns;
77*4882a593Smuzhiyun unsigned int start_of_msg_delay;
78*4882a593Smuzhiyun unsigned int end_of_msg_delay;
79*4882a593Smuzhiyun struct kthread_worker *high_pri_worker;
80*4882a593Smuzhiyun };
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun typedef int (*cros_ec_xfer_fn_t) (struct cros_ec_device *ec_dev,
83*4882a593Smuzhiyun struct cros_ec_command *ec_msg);
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun /**
86*4882a593Smuzhiyun * struct cros_ec_xfer_work_params - params for our high priority workers
87*4882a593Smuzhiyun *
88*4882a593Smuzhiyun * @work: The work_struct needed to queue work
89*4882a593Smuzhiyun * @fn: The function to use to transfer
90*4882a593Smuzhiyun * @ec_dev: ChromeOS EC device
91*4882a593Smuzhiyun * @ec_msg: Message to transfer
92*4882a593Smuzhiyun * @ret: The return value of the function
93*4882a593Smuzhiyun */
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun struct cros_ec_xfer_work_params {
96*4882a593Smuzhiyun struct kthread_work work;
97*4882a593Smuzhiyun cros_ec_xfer_fn_t fn;
98*4882a593Smuzhiyun struct cros_ec_device *ec_dev;
99*4882a593Smuzhiyun struct cros_ec_command *ec_msg;
100*4882a593Smuzhiyun int ret;
101*4882a593Smuzhiyun };
102*4882a593Smuzhiyun
debug_packet(struct device * dev,const char * name,u8 * ptr,int len)103*4882a593Smuzhiyun static void debug_packet(struct device *dev, const char *name, u8 *ptr,
104*4882a593Smuzhiyun int len)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun #ifdef DEBUG
107*4882a593Smuzhiyun int i;
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun dev_dbg(dev, "%s: ", name);
110*4882a593Smuzhiyun for (i = 0; i < len; i++)
111*4882a593Smuzhiyun pr_cont(" %02x", ptr[i]);
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun pr_cont("\n");
114*4882a593Smuzhiyun #endif
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
terminate_request(struct cros_ec_device * ec_dev)117*4882a593Smuzhiyun static int terminate_request(struct cros_ec_device *ec_dev)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun struct cros_ec_spi *ec_spi = ec_dev->priv;
120*4882a593Smuzhiyun struct spi_message msg;
121*4882a593Smuzhiyun struct spi_transfer trans;
122*4882a593Smuzhiyun int ret;
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun /*
125*4882a593Smuzhiyun * Turn off CS, possibly adding a delay to ensure the rising edge
126*4882a593Smuzhiyun * doesn't come too soon after the end of the data.
127*4882a593Smuzhiyun */
128*4882a593Smuzhiyun spi_message_init(&msg);
129*4882a593Smuzhiyun memset(&trans, 0, sizeof(trans));
130*4882a593Smuzhiyun trans.delay.value = ec_spi->end_of_msg_delay;
131*4882a593Smuzhiyun trans.delay.unit = SPI_DELAY_UNIT_USECS;
132*4882a593Smuzhiyun spi_message_add_tail(&trans, &msg);
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun ret = spi_sync_locked(ec_spi->spi, &msg);
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun /* Reset end-of-response timer */
137*4882a593Smuzhiyun ec_spi->last_transfer_ns = ktime_get_ns();
138*4882a593Smuzhiyun if (ret < 0) {
139*4882a593Smuzhiyun dev_err(ec_dev->dev,
140*4882a593Smuzhiyun "cs-deassert spi transfer failed: %d\n",
141*4882a593Smuzhiyun ret);
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun return ret;
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun /**
148*4882a593Smuzhiyun * receive_n_bytes - receive n bytes from the EC.
149*4882a593Smuzhiyun *
150*4882a593Smuzhiyun * Assumes buf is a pointer into the ec_dev->din buffer
151*4882a593Smuzhiyun *
152*4882a593Smuzhiyun * @ec_dev: ChromeOS EC device.
153*4882a593Smuzhiyun * @buf: Pointer to the buffer receiving the data.
154*4882a593Smuzhiyun * @n: Number of bytes received.
155*4882a593Smuzhiyun */
receive_n_bytes(struct cros_ec_device * ec_dev,u8 * buf,int n)156*4882a593Smuzhiyun static int receive_n_bytes(struct cros_ec_device *ec_dev, u8 *buf, int n)
157*4882a593Smuzhiyun {
158*4882a593Smuzhiyun struct cros_ec_spi *ec_spi = ec_dev->priv;
159*4882a593Smuzhiyun struct spi_transfer trans;
160*4882a593Smuzhiyun struct spi_message msg;
161*4882a593Smuzhiyun int ret;
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun BUG_ON(buf - ec_dev->din + n > ec_dev->din_size);
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun memset(&trans, 0, sizeof(trans));
166*4882a593Smuzhiyun trans.cs_change = 1;
167*4882a593Smuzhiyun trans.rx_buf = buf;
168*4882a593Smuzhiyun trans.len = n;
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun spi_message_init(&msg);
171*4882a593Smuzhiyun spi_message_add_tail(&trans, &msg);
172*4882a593Smuzhiyun ret = spi_sync_locked(ec_spi->spi, &msg);
173*4882a593Smuzhiyun if (ret < 0)
174*4882a593Smuzhiyun dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun return ret;
177*4882a593Smuzhiyun }
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun /**
180*4882a593Smuzhiyun * cros_ec_spi_receive_packet - Receive a packet from the EC.
181*4882a593Smuzhiyun *
182*4882a593Smuzhiyun * This function has two phases: reading the preamble bytes (since if we read
183*4882a593Smuzhiyun * data from the EC before it is ready to send, we just get preamble) and
184*4882a593Smuzhiyun * reading the actual message.
185*4882a593Smuzhiyun *
186*4882a593Smuzhiyun * The received data is placed into ec_dev->din.
187*4882a593Smuzhiyun *
188*4882a593Smuzhiyun * @ec_dev: ChromeOS EC device
189*4882a593Smuzhiyun * @need_len: Number of message bytes we need to read
190*4882a593Smuzhiyun */
cros_ec_spi_receive_packet(struct cros_ec_device * ec_dev,int need_len)191*4882a593Smuzhiyun static int cros_ec_spi_receive_packet(struct cros_ec_device *ec_dev,
192*4882a593Smuzhiyun int need_len)
193*4882a593Smuzhiyun {
194*4882a593Smuzhiyun struct ec_host_response *response;
195*4882a593Smuzhiyun u8 *ptr, *end;
196*4882a593Smuzhiyun int ret;
197*4882a593Smuzhiyun unsigned long deadline;
198*4882a593Smuzhiyun int todo;
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun BUG_ON(ec_dev->din_size < EC_MSG_PREAMBLE_COUNT);
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun /* Receive data until we see the header byte */
203*4882a593Smuzhiyun deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS);
204*4882a593Smuzhiyun while (true) {
205*4882a593Smuzhiyun unsigned long start_jiffies = jiffies;
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun ret = receive_n_bytes(ec_dev,
208*4882a593Smuzhiyun ec_dev->din,
209*4882a593Smuzhiyun EC_MSG_PREAMBLE_COUNT);
210*4882a593Smuzhiyun if (ret < 0)
211*4882a593Smuzhiyun return ret;
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun ptr = ec_dev->din;
214*4882a593Smuzhiyun for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) {
215*4882a593Smuzhiyun if (*ptr == EC_SPI_FRAME_START) {
216*4882a593Smuzhiyun dev_dbg(ec_dev->dev, "msg found at %zd\n",
217*4882a593Smuzhiyun ptr - ec_dev->din);
218*4882a593Smuzhiyun break;
219*4882a593Smuzhiyun }
220*4882a593Smuzhiyun }
221*4882a593Smuzhiyun if (ptr != end)
222*4882a593Smuzhiyun break;
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun /*
225*4882a593Smuzhiyun * Use the time at the start of the loop as a timeout. This
226*4882a593Smuzhiyun * gives us one last shot at getting the transfer and is useful
227*4882a593Smuzhiyun * in case we got context switched out for a while.
228*4882a593Smuzhiyun */
229*4882a593Smuzhiyun if (time_after(start_jiffies, deadline)) {
230*4882a593Smuzhiyun dev_warn(ec_dev->dev, "EC failed to respond in time\n");
231*4882a593Smuzhiyun return -ETIMEDOUT;
232*4882a593Smuzhiyun }
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun /*
236*4882a593Smuzhiyun * ptr now points to the header byte. Copy any valid data to the
237*4882a593Smuzhiyun * start of our buffer
238*4882a593Smuzhiyun */
239*4882a593Smuzhiyun todo = end - ++ptr;
240*4882a593Smuzhiyun BUG_ON(todo < 0 || todo > ec_dev->din_size);
241*4882a593Smuzhiyun todo = min(todo, need_len);
242*4882a593Smuzhiyun memmove(ec_dev->din, ptr, todo);
243*4882a593Smuzhiyun ptr = ec_dev->din + todo;
244*4882a593Smuzhiyun dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n",
245*4882a593Smuzhiyun need_len, todo);
246*4882a593Smuzhiyun need_len -= todo;
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun /* If the entire response struct wasn't read, get the rest of it. */
249*4882a593Smuzhiyun if (todo < sizeof(*response)) {
250*4882a593Smuzhiyun ret = receive_n_bytes(ec_dev, ptr, sizeof(*response) - todo);
251*4882a593Smuzhiyun if (ret < 0)
252*4882a593Smuzhiyun return -EBADMSG;
253*4882a593Smuzhiyun ptr += (sizeof(*response) - todo);
254*4882a593Smuzhiyun todo = sizeof(*response);
255*4882a593Smuzhiyun }
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun response = (struct ec_host_response *)ec_dev->din;
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun /* Abort if data_len is too large. */
260*4882a593Smuzhiyun if (response->data_len > ec_dev->din_size)
261*4882a593Smuzhiyun return -EMSGSIZE;
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun /* Receive data until we have it all */
264*4882a593Smuzhiyun while (need_len > 0) {
265*4882a593Smuzhiyun /*
266*4882a593Smuzhiyun * We can't support transfers larger than the SPI FIFO size
267*4882a593Smuzhiyun * unless we have DMA. We don't have DMA on the ISP SPI ports
268*4882a593Smuzhiyun * for Exynos. We need a way of asking SPI driver for
269*4882a593Smuzhiyun * maximum-supported transfer size.
270*4882a593Smuzhiyun */
271*4882a593Smuzhiyun todo = min(need_len, 256);
272*4882a593Smuzhiyun dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n",
273*4882a593Smuzhiyun todo, need_len, ptr - ec_dev->din);
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun ret = receive_n_bytes(ec_dev, ptr, todo);
276*4882a593Smuzhiyun if (ret < 0)
277*4882a593Smuzhiyun return ret;
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun ptr += todo;
280*4882a593Smuzhiyun need_len -= todo;
281*4882a593Smuzhiyun }
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din);
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun return 0;
286*4882a593Smuzhiyun }
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun /**
289*4882a593Smuzhiyun * cros_ec_spi_receive_response - Receive a response from the EC.
290*4882a593Smuzhiyun *
291*4882a593Smuzhiyun * This function has two phases: reading the preamble bytes (since if we read
292*4882a593Smuzhiyun * data from the EC before it is ready to send, we just get preamble) and
293*4882a593Smuzhiyun * reading the actual message.
294*4882a593Smuzhiyun *
295*4882a593Smuzhiyun * The received data is placed into ec_dev->din.
296*4882a593Smuzhiyun *
297*4882a593Smuzhiyun * @ec_dev: ChromeOS EC device
298*4882a593Smuzhiyun * @need_len: Number of message bytes we need to read
299*4882a593Smuzhiyun */
cros_ec_spi_receive_response(struct cros_ec_device * ec_dev,int need_len)300*4882a593Smuzhiyun static int cros_ec_spi_receive_response(struct cros_ec_device *ec_dev,
301*4882a593Smuzhiyun int need_len)
302*4882a593Smuzhiyun {
303*4882a593Smuzhiyun u8 *ptr, *end;
304*4882a593Smuzhiyun int ret;
305*4882a593Smuzhiyun unsigned long deadline;
306*4882a593Smuzhiyun int todo;
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun BUG_ON(ec_dev->din_size < EC_MSG_PREAMBLE_COUNT);
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun /* Receive data until we see the header byte */
311*4882a593Smuzhiyun deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS);
312*4882a593Smuzhiyun while (true) {
313*4882a593Smuzhiyun unsigned long start_jiffies = jiffies;
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun ret = receive_n_bytes(ec_dev,
316*4882a593Smuzhiyun ec_dev->din,
317*4882a593Smuzhiyun EC_MSG_PREAMBLE_COUNT);
318*4882a593Smuzhiyun if (ret < 0)
319*4882a593Smuzhiyun return ret;
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun ptr = ec_dev->din;
322*4882a593Smuzhiyun for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) {
323*4882a593Smuzhiyun if (*ptr == EC_SPI_FRAME_START) {
324*4882a593Smuzhiyun dev_dbg(ec_dev->dev, "msg found at %zd\n",
325*4882a593Smuzhiyun ptr - ec_dev->din);
326*4882a593Smuzhiyun break;
327*4882a593Smuzhiyun }
328*4882a593Smuzhiyun }
329*4882a593Smuzhiyun if (ptr != end)
330*4882a593Smuzhiyun break;
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun /*
333*4882a593Smuzhiyun * Use the time at the start of the loop as a timeout. This
334*4882a593Smuzhiyun * gives us one last shot at getting the transfer and is useful
335*4882a593Smuzhiyun * in case we got context switched out for a while.
336*4882a593Smuzhiyun */
337*4882a593Smuzhiyun if (time_after(start_jiffies, deadline)) {
338*4882a593Smuzhiyun dev_warn(ec_dev->dev, "EC failed to respond in time\n");
339*4882a593Smuzhiyun return -ETIMEDOUT;
340*4882a593Smuzhiyun }
341*4882a593Smuzhiyun }
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun /*
344*4882a593Smuzhiyun * ptr now points to the header byte. Copy any valid data to the
345*4882a593Smuzhiyun * start of our buffer
346*4882a593Smuzhiyun */
347*4882a593Smuzhiyun todo = end - ++ptr;
348*4882a593Smuzhiyun BUG_ON(todo < 0 || todo > ec_dev->din_size);
349*4882a593Smuzhiyun todo = min(todo, need_len);
350*4882a593Smuzhiyun memmove(ec_dev->din, ptr, todo);
351*4882a593Smuzhiyun ptr = ec_dev->din + todo;
352*4882a593Smuzhiyun dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n",
353*4882a593Smuzhiyun need_len, todo);
354*4882a593Smuzhiyun need_len -= todo;
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun /* Receive data until we have it all */
357*4882a593Smuzhiyun while (need_len > 0) {
358*4882a593Smuzhiyun /*
359*4882a593Smuzhiyun * We can't support transfers larger than the SPI FIFO size
360*4882a593Smuzhiyun * unless we have DMA. We don't have DMA on the ISP SPI ports
361*4882a593Smuzhiyun * for Exynos. We need a way of asking SPI driver for
362*4882a593Smuzhiyun * maximum-supported transfer size.
363*4882a593Smuzhiyun */
364*4882a593Smuzhiyun todo = min(need_len, 256);
365*4882a593Smuzhiyun dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n",
366*4882a593Smuzhiyun todo, need_len, ptr - ec_dev->din);
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun ret = receive_n_bytes(ec_dev, ptr, todo);
369*4882a593Smuzhiyun if (ret < 0)
370*4882a593Smuzhiyun return ret;
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun debug_packet(ec_dev->dev, "interim", ptr, todo);
373*4882a593Smuzhiyun ptr += todo;
374*4882a593Smuzhiyun need_len -= todo;
375*4882a593Smuzhiyun }
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din);
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun return 0;
380*4882a593Smuzhiyun }
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun /**
383*4882a593Smuzhiyun * do_cros_ec_pkt_xfer_spi - Transfer a packet over SPI and receive the reply
384*4882a593Smuzhiyun *
385*4882a593Smuzhiyun * @ec_dev: ChromeOS EC device
386*4882a593Smuzhiyun * @ec_msg: Message to transfer
387*4882a593Smuzhiyun */
do_cros_ec_pkt_xfer_spi(struct cros_ec_device * ec_dev,struct cros_ec_command * ec_msg)388*4882a593Smuzhiyun static int do_cros_ec_pkt_xfer_spi(struct cros_ec_device *ec_dev,
389*4882a593Smuzhiyun struct cros_ec_command *ec_msg)
390*4882a593Smuzhiyun {
391*4882a593Smuzhiyun struct ec_host_response *response;
392*4882a593Smuzhiyun struct cros_ec_spi *ec_spi = ec_dev->priv;
393*4882a593Smuzhiyun struct spi_transfer trans, trans_delay;
394*4882a593Smuzhiyun struct spi_message msg;
395*4882a593Smuzhiyun int i, len;
396*4882a593Smuzhiyun u8 *ptr;
397*4882a593Smuzhiyun u8 *rx_buf;
398*4882a593Smuzhiyun u8 sum;
399*4882a593Smuzhiyun u8 rx_byte;
400*4882a593Smuzhiyun int ret = 0, final_ret;
401*4882a593Smuzhiyun unsigned long delay;
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun len = cros_ec_prepare_tx(ec_dev, ec_msg);
404*4882a593Smuzhiyun dev_dbg(ec_dev->dev, "prepared, len=%d\n", len);
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun /* If it's too soon to do another transaction, wait */
407*4882a593Smuzhiyun delay = ktime_get_ns() - ec_spi->last_transfer_ns;
408*4882a593Smuzhiyun if (delay < EC_SPI_RECOVERY_TIME_NS)
409*4882a593Smuzhiyun ndelay(EC_SPI_RECOVERY_TIME_NS - delay);
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun rx_buf = kzalloc(len, GFP_KERNEL);
412*4882a593Smuzhiyun if (!rx_buf)
413*4882a593Smuzhiyun return -ENOMEM;
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun spi_bus_lock(ec_spi->spi->master);
416*4882a593Smuzhiyun
417*4882a593Smuzhiyun /*
418*4882a593Smuzhiyun * Leave a gap between CS assertion and clocking of data to allow the
419*4882a593Smuzhiyun * EC time to wakeup.
420*4882a593Smuzhiyun */
421*4882a593Smuzhiyun spi_message_init(&msg);
422*4882a593Smuzhiyun if (ec_spi->start_of_msg_delay) {
423*4882a593Smuzhiyun memset(&trans_delay, 0, sizeof(trans_delay));
424*4882a593Smuzhiyun trans_delay.delay.value = ec_spi->start_of_msg_delay;
425*4882a593Smuzhiyun trans_delay.delay.unit = SPI_DELAY_UNIT_USECS;
426*4882a593Smuzhiyun spi_message_add_tail(&trans_delay, &msg);
427*4882a593Smuzhiyun }
428*4882a593Smuzhiyun
429*4882a593Smuzhiyun /* Transmit phase - send our message */
430*4882a593Smuzhiyun memset(&trans, 0, sizeof(trans));
431*4882a593Smuzhiyun trans.tx_buf = ec_dev->dout;
432*4882a593Smuzhiyun trans.rx_buf = rx_buf;
433*4882a593Smuzhiyun trans.len = len;
434*4882a593Smuzhiyun trans.cs_change = 1;
435*4882a593Smuzhiyun spi_message_add_tail(&trans, &msg);
436*4882a593Smuzhiyun ret = spi_sync_locked(ec_spi->spi, &msg);
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun /* Get the response */
439*4882a593Smuzhiyun if (!ret) {
440*4882a593Smuzhiyun /* Verify that EC can process command */
441*4882a593Smuzhiyun for (i = 0; i < len; i++) {
442*4882a593Smuzhiyun rx_byte = rx_buf[i];
443*4882a593Smuzhiyun /*
444*4882a593Smuzhiyun * Seeing the PAST_END, RX_BAD_DATA, or NOT_READY
445*4882a593Smuzhiyun * markers are all signs that the EC didn't fully
446*4882a593Smuzhiyun * receive our command. e.g., if the EC is flashing
447*4882a593Smuzhiyun * itself, it can't respond to any commands and instead
448*4882a593Smuzhiyun * clocks out EC_SPI_PAST_END from its SPI hardware
449*4882a593Smuzhiyun * buffer. Similar occurrences can happen if the AP is
450*4882a593Smuzhiyun * too slow to clock out data after asserting CS -- the
451*4882a593Smuzhiyun * EC will abort and fill its buffer with
452*4882a593Smuzhiyun * EC_SPI_RX_BAD_DATA.
453*4882a593Smuzhiyun *
454*4882a593Smuzhiyun * In all cases, these errors should be safe to retry.
455*4882a593Smuzhiyun * Report -EAGAIN and let the caller decide what to do
456*4882a593Smuzhiyun * about that.
457*4882a593Smuzhiyun */
458*4882a593Smuzhiyun if (rx_byte == EC_SPI_PAST_END ||
459*4882a593Smuzhiyun rx_byte == EC_SPI_RX_BAD_DATA ||
460*4882a593Smuzhiyun rx_byte == EC_SPI_NOT_READY) {
461*4882a593Smuzhiyun ret = -EAGAIN;
462*4882a593Smuzhiyun break;
463*4882a593Smuzhiyun }
464*4882a593Smuzhiyun }
465*4882a593Smuzhiyun }
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun if (!ret)
468*4882a593Smuzhiyun ret = cros_ec_spi_receive_packet(ec_dev,
469*4882a593Smuzhiyun ec_msg->insize + sizeof(*response));
470*4882a593Smuzhiyun else if (ret != -EAGAIN)
471*4882a593Smuzhiyun dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
472*4882a593Smuzhiyun
473*4882a593Smuzhiyun final_ret = terminate_request(ec_dev);
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun spi_bus_unlock(ec_spi->spi->master);
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun if (!ret)
478*4882a593Smuzhiyun ret = final_ret;
479*4882a593Smuzhiyun if (ret < 0)
480*4882a593Smuzhiyun goto exit;
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun ptr = ec_dev->din;
483*4882a593Smuzhiyun
484*4882a593Smuzhiyun /* check response error code */
485*4882a593Smuzhiyun response = (struct ec_host_response *)ptr;
486*4882a593Smuzhiyun ec_msg->result = response->result;
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun ret = cros_ec_check_result(ec_dev, ec_msg);
489*4882a593Smuzhiyun if (ret)
490*4882a593Smuzhiyun goto exit;
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun len = response->data_len;
493*4882a593Smuzhiyun sum = 0;
494*4882a593Smuzhiyun if (len > ec_msg->insize) {
495*4882a593Smuzhiyun dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)",
496*4882a593Smuzhiyun len, ec_msg->insize);
497*4882a593Smuzhiyun ret = -EMSGSIZE;
498*4882a593Smuzhiyun goto exit;
499*4882a593Smuzhiyun }
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun for (i = 0; i < sizeof(*response); i++)
502*4882a593Smuzhiyun sum += ptr[i];
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun /* copy response packet payload and compute checksum */
505*4882a593Smuzhiyun memcpy(ec_msg->data, ptr + sizeof(*response), len);
506*4882a593Smuzhiyun for (i = 0; i < len; i++)
507*4882a593Smuzhiyun sum += ec_msg->data[i];
508*4882a593Smuzhiyun
509*4882a593Smuzhiyun if (sum) {
510*4882a593Smuzhiyun dev_err(ec_dev->dev,
511*4882a593Smuzhiyun "bad packet checksum, calculated %x\n",
512*4882a593Smuzhiyun sum);
513*4882a593Smuzhiyun ret = -EBADMSG;
514*4882a593Smuzhiyun goto exit;
515*4882a593Smuzhiyun }
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun ret = len;
518*4882a593Smuzhiyun exit:
519*4882a593Smuzhiyun kfree(rx_buf);
520*4882a593Smuzhiyun if (ec_msg->command == EC_CMD_REBOOT_EC)
521*4882a593Smuzhiyun msleep(EC_REBOOT_DELAY_MS);
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun return ret;
524*4882a593Smuzhiyun }
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun /**
527*4882a593Smuzhiyun * do_cros_ec_cmd_xfer_spi - Transfer a message over SPI and receive the reply
528*4882a593Smuzhiyun *
529*4882a593Smuzhiyun * @ec_dev: ChromeOS EC device
530*4882a593Smuzhiyun * @ec_msg: Message to transfer
531*4882a593Smuzhiyun */
do_cros_ec_cmd_xfer_spi(struct cros_ec_device * ec_dev,struct cros_ec_command * ec_msg)532*4882a593Smuzhiyun static int do_cros_ec_cmd_xfer_spi(struct cros_ec_device *ec_dev,
533*4882a593Smuzhiyun struct cros_ec_command *ec_msg)
534*4882a593Smuzhiyun {
535*4882a593Smuzhiyun struct cros_ec_spi *ec_spi = ec_dev->priv;
536*4882a593Smuzhiyun struct spi_transfer trans;
537*4882a593Smuzhiyun struct spi_message msg;
538*4882a593Smuzhiyun int i, len;
539*4882a593Smuzhiyun u8 *ptr;
540*4882a593Smuzhiyun u8 *rx_buf;
541*4882a593Smuzhiyun u8 rx_byte;
542*4882a593Smuzhiyun int sum;
543*4882a593Smuzhiyun int ret = 0, final_ret;
544*4882a593Smuzhiyun unsigned long delay;
545*4882a593Smuzhiyun
546*4882a593Smuzhiyun len = cros_ec_prepare_tx(ec_dev, ec_msg);
547*4882a593Smuzhiyun dev_dbg(ec_dev->dev, "prepared, len=%d\n", len);
548*4882a593Smuzhiyun
549*4882a593Smuzhiyun /* If it's too soon to do another transaction, wait */
550*4882a593Smuzhiyun delay = ktime_get_ns() - ec_spi->last_transfer_ns;
551*4882a593Smuzhiyun if (delay < EC_SPI_RECOVERY_TIME_NS)
552*4882a593Smuzhiyun ndelay(EC_SPI_RECOVERY_TIME_NS - delay);
553*4882a593Smuzhiyun
554*4882a593Smuzhiyun rx_buf = kzalloc(len, GFP_KERNEL);
555*4882a593Smuzhiyun if (!rx_buf)
556*4882a593Smuzhiyun return -ENOMEM;
557*4882a593Smuzhiyun
558*4882a593Smuzhiyun spi_bus_lock(ec_spi->spi->master);
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun /* Transmit phase - send our message */
561*4882a593Smuzhiyun debug_packet(ec_dev->dev, "out", ec_dev->dout, len);
562*4882a593Smuzhiyun memset(&trans, 0, sizeof(trans));
563*4882a593Smuzhiyun trans.tx_buf = ec_dev->dout;
564*4882a593Smuzhiyun trans.rx_buf = rx_buf;
565*4882a593Smuzhiyun trans.len = len;
566*4882a593Smuzhiyun trans.cs_change = 1;
567*4882a593Smuzhiyun spi_message_init(&msg);
568*4882a593Smuzhiyun spi_message_add_tail(&trans, &msg);
569*4882a593Smuzhiyun ret = spi_sync_locked(ec_spi->spi, &msg);
570*4882a593Smuzhiyun
571*4882a593Smuzhiyun /* Get the response */
572*4882a593Smuzhiyun if (!ret) {
573*4882a593Smuzhiyun /* Verify that EC can process command */
574*4882a593Smuzhiyun for (i = 0; i < len; i++) {
575*4882a593Smuzhiyun rx_byte = rx_buf[i];
576*4882a593Smuzhiyun /* See comments in cros_ec_pkt_xfer_spi() */
577*4882a593Smuzhiyun if (rx_byte == EC_SPI_PAST_END ||
578*4882a593Smuzhiyun rx_byte == EC_SPI_RX_BAD_DATA ||
579*4882a593Smuzhiyun rx_byte == EC_SPI_NOT_READY) {
580*4882a593Smuzhiyun ret = -EAGAIN;
581*4882a593Smuzhiyun break;
582*4882a593Smuzhiyun }
583*4882a593Smuzhiyun }
584*4882a593Smuzhiyun }
585*4882a593Smuzhiyun
586*4882a593Smuzhiyun if (!ret)
587*4882a593Smuzhiyun ret = cros_ec_spi_receive_response(ec_dev,
588*4882a593Smuzhiyun ec_msg->insize + EC_MSG_TX_PROTO_BYTES);
589*4882a593Smuzhiyun else if (ret != -EAGAIN)
590*4882a593Smuzhiyun dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
591*4882a593Smuzhiyun
592*4882a593Smuzhiyun final_ret = terminate_request(ec_dev);
593*4882a593Smuzhiyun
594*4882a593Smuzhiyun spi_bus_unlock(ec_spi->spi->master);
595*4882a593Smuzhiyun
596*4882a593Smuzhiyun if (!ret)
597*4882a593Smuzhiyun ret = final_ret;
598*4882a593Smuzhiyun if (ret < 0)
599*4882a593Smuzhiyun goto exit;
600*4882a593Smuzhiyun
601*4882a593Smuzhiyun ptr = ec_dev->din;
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun /* check response error code */
604*4882a593Smuzhiyun ec_msg->result = ptr[0];
605*4882a593Smuzhiyun ret = cros_ec_check_result(ec_dev, ec_msg);
606*4882a593Smuzhiyun if (ret)
607*4882a593Smuzhiyun goto exit;
608*4882a593Smuzhiyun
609*4882a593Smuzhiyun len = ptr[1];
610*4882a593Smuzhiyun sum = ptr[0] + ptr[1];
611*4882a593Smuzhiyun if (len > ec_msg->insize) {
612*4882a593Smuzhiyun dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)",
613*4882a593Smuzhiyun len, ec_msg->insize);
614*4882a593Smuzhiyun ret = -ENOSPC;
615*4882a593Smuzhiyun goto exit;
616*4882a593Smuzhiyun }
617*4882a593Smuzhiyun
618*4882a593Smuzhiyun /* copy response packet payload and compute checksum */
619*4882a593Smuzhiyun for (i = 0; i < len; i++) {
620*4882a593Smuzhiyun sum += ptr[i + 2];
621*4882a593Smuzhiyun if (ec_msg->insize)
622*4882a593Smuzhiyun ec_msg->data[i] = ptr[i + 2];
623*4882a593Smuzhiyun }
624*4882a593Smuzhiyun sum &= 0xff;
625*4882a593Smuzhiyun
626*4882a593Smuzhiyun debug_packet(ec_dev->dev, "in", ptr, len + 3);
627*4882a593Smuzhiyun
628*4882a593Smuzhiyun if (sum != ptr[len + 2]) {
629*4882a593Smuzhiyun dev_err(ec_dev->dev,
630*4882a593Smuzhiyun "bad packet checksum, expected %02x, got %02x\n",
631*4882a593Smuzhiyun sum, ptr[len + 2]);
632*4882a593Smuzhiyun ret = -EBADMSG;
633*4882a593Smuzhiyun goto exit;
634*4882a593Smuzhiyun }
635*4882a593Smuzhiyun
636*4882a593Smuzhiyun ret = len;
637*4882a593Smuzhiyun exit:
638*4882a593Smuzhiyun kfree(rx_buf);
639*4882a593Smuzhiyun if (ec_msg->command == EC_CMD_REBOOT_EC)
640*4882a593Smuzhiyun msleep(EC_REBOOT_DELAY_MS);
641*4882a593Smuzhiyun
642*4882a593Smuzhiyun return ret;
643*4882a593Smuzhiyun }
644*4882a593Smuzhiyun
cros_ec_xfer_high_pri_work(struct kthread_work * work)645*4882a593Smuzhiyun static void cros_ec_xfer_high_pri_work(struct kthread_work *work)
646*4882a593Smuzhiyun {
647*4882a593Smuzhiyun struct cros_ec_xfer_work_params *params;
648*4882a593Smuzhiyun
649*4882a593Smuzhiyun params = container_of(work, struct cros_ec_xfer_work_params, work);
650*4882a593Smuzhiyun params->ret = params->fn(params->ec_dev, params->ec_msg);
651*4882a593Smuzhiyun }
652*4882a593Smuzhiyun
cros_ec_xfer_high_pri(struct cros_ec_device * ec_dev,struct cros_ec_command * ec_msg,cros_ec_xfer_fn_t fn)653*4882a593Smuzhiyun static int cros_ec_xfer_high_pri(struct cros_ec_device *ec_dev,
654*4882a593Smuzhiyun struct cros_ec_command *ec_msg,
655*4882a593Smuzhiyun cros_ec_xfer_fn_t fn)
656*4882a593Smuzhiyun {
657*4882a593Smuzhiyun struct cros_ec_spi *ec_spi = ec_dev->priv;
658*4882a593Smuzhiyun struct cros_ec_xfer_work_params params = {
659*4882a593Smuzhiyun .work = KTHREAD_WORK_INIT(params.work,
660*4882a593Smuzhiyun cros_ec_xfer_high_pri_work),
661*4882a593Smuzhiyun .ec_dev = ec_dev,
662*4882a593Smuzhiyun .ec_msg = ec_msg,
663*4882a593Smuzhiyun .fn = fn,
664*4882a593Smuzhiyun };
665*4882a593Smuzhiyun
666*4882a593Smuzhiyun /*
667*4882a593Smuzhiyun * This looks a bit ridiculous. Why do the work on a
668*4882a593Smuzhiyun * different thread if we're just going to block waiting for
669*4882a593Smuzhiyun * the thread to finish? The key here is that the thread is
670*4882a593Smuzhiyun * running at high priority but the calling context might not
671*4882a593Smuzhiyun * be. We need to be at high priority to avoid getting
672*4882a593Smuzhiyun * context switched out for too long and the EC giving up on
673*4882a593Smuzhiyun * the transfer.
674*4882a593Smuzhiyun */
675*4882a593Smuzhiyun kthread_queue_work(ec_spi->high_pri_worker, ¶ms.work);
676*4882a593Smuzhiyun kthread_flush_work(¶ms.work);
677*4882a593Smuzhiyun
678*4882a593Smuzhiyun return params.ret;
679*4882a593Smuzhiyun }
680*4882a593Smuzhiyun
cros_ec_pkt_xfer_spi(struct cros_ec_device * ec_dev,struct cros_ec_command * ec_msg)681*4882a593Smuzhiyun static int cros_ec_pkt_xfer_spi(struct cros_ec_device *ec_dev,
682*4882a593Smuzhiyun struct cros_ec_command *ec_msg)
683*4882a593Smuzhiyun {
684*4882a593Smuzhiyun return cros_ec_xfer_high_pri(ec_dev, ec_msg, do_cros_ec_pkt_xfer_spi);
685*4882a593Smuzhiyun }
686*4882a593Smuzhiyun
cros_ec_cmd_xfer_spi(struct cros_ec_device * ec_dev,struct cros_ec_command * ec_msg)687*4882a593Smuzhiyun static int cros_ec_cmd_xfer_spi(struct cros_ec_device *ec_dev,
688*4882a593Smuzhiyun struct cros_ec_command *ec_msg)
689*4882a593Smuzhiyun {
690*4882a593Smuzhiyun return cros_ec_xfer_high_pri(ec_dev, ec_msg, do_cros_ec_cmd_xfer_spi);
691*4882a593Smuzhiyun }
692*4882a593Smuzhiyun
cros_ec_spi_dt_probe(struct cros_ec_spi * ec_spi,struct device * dev)693*4882a593Smuzhiyun static void cros_ec_spi_dt_probe(struct cros_ec_spi *ec_spi, struct device *dev)
694*4882a593Smuzhiyun {
695*4882a593Smuzhiyun struct device_node *np = dev->of_node;
696*4882a593Smuzhiyun u32 val;
697*4882a593Smuzhiyun int ret;
698*4882a593Smuzhiyun
699*4882a593Smuzhiyun ret = of_property_read_u32(np, "google,cros-ec-spi-pre-delay", &val);
700*4882a593Smuzhiyun if (!ret)
701*4882a593Smuzhiyun ec_spi->start_of_msg_delay = val;
702*4882a593Smuzhiyun
703*4882a593Smuzhiyun ret = of_property_read_u32(np, "google,cros-ec-spi-msg-delay", &val);
704*4882a593Smuzhiyun if (!ret)
705*4882a593Smuzhiyun ec_spi->end_of_msg_delay = val;
706*4882a593Smuzhiyun }
707*4882a593Smuzhiyun
cros_ec_spi_high_pri_release(void * worker)708*4882a593Smuzhiyun static void cros_ec_spi_high_pri_release(void *worker)
709*4882a593Smuzhiyun {
710*4882a593Smuzhiyun kthread_destroy_worker(worker);
711*4882a593Smuzhiyun }
712*4882a593Smuzhiyun
cros_ec_spi_devm_high_pri_alloc(struct device * dev,struct cros_ec_spi * ec_spi)713*4882a593Smuzhiyun static int cros_ec_spi_devm_high_pri_alloc(struct device *dev,
714*4882a593Smuzhiyun struct cros_ec_spi *ec_spi)
715*4882a593Smuzhiyun {
716*4882a593Smuzhiyun int err;
717*4882a593Smuzhiyun
718*4882a593Smuzhiyun ec_spi->high_pri_worker =
719*4882a593Smuzhiyun kthread_create_worker(0, "cros_ec_spi_high_pri");
720*4882a593Smuzhiyun
721*4882a593Smuzhiyun if (IS_ERR(ec_spi->high_pri_worker)) {
722*4882a593Smuzhiyun err = PTR_ERR(ec_spi->high_pri_worker);
723*4882a593Smuzhiyun dev_err(dev, "Can't create cros_ec high pri worker: %d\n", err);
724*4882a593Smuzhiyun return err;
725*4882a593Smuzhiyun }
726*4882a593Smuzhiyun
727*4882a593Smuzhiyun err = devm_add_action_or_reset(dev, cros_ec_spi_high_pri_release,
728*4882a593Smuzhiyun ec_spi->high_pri_worker);
729*4882a593Smuzhiyun if (err)
730*4882a593Smuzhiyun return err;
731*4882a593Smuzhiyun
732*4882a593Smuzhiyun sched_set_fifo(ec_spi->high_pri_worker->task);
733*4882a593Smuzhiyun
734*4882a593Smuzhiyun return 0;
735*4882a593Smuzhiyun }
736*4882a593Smuzhiyun
cros_ec_spi_probe(struct spi_device * spi)737*4882a593Smuzhiyun static int cros_ec_spi_probe(struct spi_device *spi)
738*4882a593Smuzhiyun {
739*4882a593Smuzhiyun struct device *dev = &spi->dev;
740*4882a593Smuzhiyun struct cros_ec_device *ec_dev;
741*4882a593Smuzhiyun struct cros_ec_spi *ec_spi;
742*4882a593Smuzhiyun int err;
743*4882a593Smuzhiyun
744*4882a593Smuzhiyun spi->bits_per_word = 8;
745*4882a593Smuzhiyun spi->rt = true;
746*4882a593Smuzhiyun err = spi_setup(spi);
747*4882a593Smuzhiyun if (err < 0)
748*4882a593Smuzhiyun return err;
749*4882a593Smuzhiyun
750*4882a593Smuzhiyun ec_spi = devm_kzalloc(dev, sizeof(*ec_spi), GFP_KERNEL);
751*4882a593Smuzhiyun if (ec_spi == NULL)
752*4882a593Smuzhiyun return -ENOMEM;
753*4882a593Smuzhiyun ec_spi->spi = spi;
754*4882a593Smuzhiyun ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL);
755*4882a593Smuzhiyun if (!ec_dev)
756*4882a593Smuzhiyun return -ENOMEM;
757*4882a593Smuzhiyun
758*4882a593Smuzhiyun /* Check for any DT properties */
759*4882a593Smuzhiyun cros_ec_spi_dt_probe(ec_spi, dev);
760*4882a593Smuzhiyun
761*4882a593Smuzhiyun spi_set_drvdata(spi, ec_dev);
762*4882a593Smuzhiyun ec_dev->dev = dev;
763*4882a593Smuzhiyun ec_dev->priv = ec_spi;
764*4882a593Smuzhiyun ec_dev->irq = spi->irq;
765*4882a593Smuzhiyun ec_dev->cmd_xfer = cros_ec_cmd_xfer_spi;
766*4882a593Smuzhiyun ec_dev->pkt_xfer = cros_ec_pkt_xfer_spi;
767*4882a593Smuzhiyun ec_dev->phys_name = dev_name(&ec_spi->spi->dev);
768*4882a593Smuzhiyun ec_dev->din_size = EC_MSG_PREAMBLE_COUNT +
769*4882a593Smuzhiyun sizeof(struct ec_host_response) +
770*4882a593Smuzhiyun sizeof(struct ec_response_get_protocol_info);
771*4882a593Smuzhiyun ec_dev->dout_size = sizeof(struct ec_host_request);
772*4882a593Smuzhiyun
773*4882a593Smuzhiyun ec_spi->last_transfer_ns = ktime_get_ns();
774*4882a593Smuzhiyun
775*4882a593Smuzhiyun err = cros_ec_spi_devm_high_pri_alloc(dev, ec_spi);
776*4882a593Smuzhiyun if (err)
777*4882a593Smuzhiyun return err;
778*4882a593Smuzhiyun
779*4882a593Smuzhiyun err = cros_ec_register(ec_dev);
780*4882a593Smuzhiyun if (err) {
781*4882a593Smuzhiyun dev_err(dev, "cannot register EC\n");
782*4882a593Smuzhiyun return err;
783*4882a593Smuzhiyun }
784*4882a593Smuzhiyun
785*4882a593Smuzhiyun device_init_wakeup(&spi->dev, true);
786*4882a593Smuzhiyun
787*4882a593Smuzhiyun return 0;
788*4882a593Smuzhiyun }
789*4882a593Smuzhiyun
cros_ec_spi_remove(struct spi_device * spi)790*4882a593Smuzhiyun static int cros_ec_spi_remove(struct spi_device *spi)
791*4882a593Smuzhiyun {
792*4882a593Smuzhiyun struct cros_ec_device *ec_dev = spi_get_drvdata(spi);
793*4882a593Smuzhiyun
794*4882a593Smuzhiyun return cros_ec_unregister(ec_dev);
795*4882a593Smuzhiyun }
796*4882a593Smuzhiyun
797*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
cros_ec_spi_suspend(struct device * dev)798*4882a593Smuzhiyun static int cros_ec_spi_suspend(struct device *dev)
799*4882a593Smuzhiyun {
800*4882a593Smuzhiyun struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
801*4882a593Smuzhiyun
802*4882a593Smuzhiyun return cros_ec_suspend(ec_dev);
803*4882a593Smuzhiyun }
804*4882a593Smuzhiyun
cros_ec_spi_resume(struct device * dev)805*4882a593Smuzhiyun static int cros_ec_spi_resume(struct device *dev)
806*4882a593Smuzhiyun {
807*4882a593Smuzhiyun struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
808*4882a593Smuzhiyun
809*4882a593Smuzhiyun return cros_ec_resume(ec_dev);
810*4882a593Smuzhiyun }
811*4882a593Smuzhiyun #endif
812*4882a593Smuzhiyun
813*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(cros_ec_spi_pm_ops, cros_ec_spi_suspend,
814*4882a593Smuzhiyun cros_ec_spi_resume);
815*4882a593Smuzhiyun
816*4882a593Smuzhiyun static const struct of_device_id cros_ec_spi_of_match[] = {
817*4882a593Smuzhiyun { .compatible = "google,cros-ec-spi", },
818*4882a593Smuzhiyun { /* sentinel */ },
819*4882a593Smuzhiyun };
820*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, cros_ec_spi_of_match);
821*4882a593Smuzhiyun
822*4882a593Smuzhiyun static const struct spi_device_id cros_ec_spi_id[] = {
823*4882a593Smuzhiyun { "cros-ec-spi", 0 },
824*4882a593Smuzhiyun { }
825*4882a593Smuzhiyun };
826*4882a593Smuzhiyun MODULE_DEVICE_TABLE(spi, cros_ec_spi_id);
827*4882a593Smuzhiyun
828*4882a593Smuzhiyun static struct spi_driver cros_ec_driver_spi = {
829*4882a593Smuzhiyun .driver = {
830*4882a593Smuzhiyun .name = "cros-ec-spi",
831*4882a593Smuzhiyun .of_match_table = cros_ec_spi_of_match,
832*4882a593Smuzhiyun .pm = &cros_ec_spi_pm_ops,
833*4882a593Smuzhiyun },
834*4882a593Smuzhiyun .probe = cros_ec_spi_probe,
835*4882a593Smuzhiyun .remove = cros_ec_spi_remove,
836*4882a593Smuzhiyun .id_table = cros_ec_spi_id,
837*4882a593Smuzhiyun };
838*4882a593Smuzhiyun
839*4882a593Smuzhiyun module_spi_driver(cros_ec_driver_spi);
840*4882a593Smuzhiyun
841*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
842*4882a593Smuzhiyun MODULE_DESCRIPTION("SPI interface for ChromeOS Embedded Controller");
843