1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Pinctrl driver for the Wondermedia SoC's 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 2013 Tony Prisk <linux@prisktech.co.nz> 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #include <linux/gpio/driver.h> 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun /* VT8500 has no enable register in the extgpio bank. */ 11*4882a593Smuzhiyun #define NO_REG 0xFFFF 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #define WMT_PINCTRL_BANK(__en, __dir, __dout, __din, __pen, __pcfg) \ 14*4882a593Smuzhiyun { \ 15*4882a593Smuzhiyun .reg_en = __en, \ 16*4882a593Smuzhiyun .reg_dir = __dir, \ 17*4882a593Smuzhiyun .reg_data_out = __dout, \ 18*4882a593Smuzhiyun .reg_data_in = __din, \ 19*4882a593Smuzhiyun .reg_pull_en = __pen, \ 20*4882a593Smuzhiyun .reg_pull_cfg = __pcfg, \ 21*4882a593Smuzhiyun } 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun /* Encode/decode the bank/bit pairs into a pin value */ 24*4882a593Smuzhiyun #define WMT_PIN(__bank, __offset) ((__bank << 5) | __offset) 25*4882a593Smuzhiyun #define WMT_BANK_FROM_PIN(__pin) (__pin >> 5) 26*4882a593Smuzhiyun #define WMT_BIT_FROM_PIN(__pin) (__pin & 0x1f) 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun #define WMT_GROUP(__name, __data) \ 29*4882a593Smuzhiyun { \ 30*4882a593Smuzhiyun .name = __name, \ 31*4882a593Smuzhiyun .pins = __data, \ 32*4882a593Smuzhiyun .npins = ARRAY_SIZE(__data), \ 33*4882a593Smuzhiyun } 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun struct wmt_pinctrl_bank_registers { 36*4882a593Smuzhiyun u32 reg_en; 37*4882a593Smuzhiyun u32 reg_dir; 38*4882a593Smuzhiyun u32 reg_data_out; 39*4882a593Smuzhiyun u32 reg_data_in; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun u32 reg_pull_en; 42*4882a593Smuzhiyun u32 reg_pull_cfg; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun struct wmt_pinctrl_group { 46*4882a593Smuzhiyun const char *name; 47*4882a593Smuzhiyun const unsigned int *pins; 48*4882a593Smuzhiyun const unsigned npins; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun struct wmt_pinctrl_data { 52*4882a593Smuzhiyun struct device *dev; 53*4882a593Smuzhiyun struct pinctrl_dev *pctl_dev; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun /* must be initialized before calling wmt_pinctrl_probe */ 56*4882a593Smuzhiyun void __iomem *base; 57*4882a593Smuzhiyun const struct wmt_pinctrl_bank_registers *banks; 58*4882a593Smuzhiyun const struct pinctrl_pin_desc *pins; 59*4882a593Smuzhiyun const char * const *groups; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun u32 nbanks; 62*4882a593Smuzhiyun u32 npins; 63*4882a593Smuzhiyun u32 ngroups; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun struct gpio_chip gpio_chip; 66*4882a593Smuzhiyun struct pinctrl_gpio_range gpio_range; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun int wmt_pinctrl_probe(struct platform_device *pdev, 70*4882a593Smuzhiyun struct wmt_pinctrl_data *data); 71