xref: /OK3568_Linux_fs/kernel/drivers/pinctrl/vt8500/pinctrl-wm8850.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Pinctrl data for Wondermedia WM8850 SoC
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) 2013 Tony Prisk <linux@prisktech.co.nz>
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/io.h>
9*4882a593Smuzhiyun #include <linux/init.h>
10*4882a593Smuzhiyun #include <linux/pinctrl/pinctrl.h>
11*4882a593Smuzhiyun #include <linux/platform_device.h>
12*4882a593Smuzhiyun #include <linux/slab.h>
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include "pinctrl-wmt.h"
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun /*
17*4882a593Smuzhiyun  * Describe the register offsets within the GPIO memory space
18*4882a593Smuzhiyun  * The dedicated external GPIO's should always be listed in bank 0
19*4882a593Smuzhiyun  * so they are exported in the 0..31 range which is what users
20*4882a593Smuzhiyun  * expect.
21*4882a593Smuzhiyun  *
22*4882a593Smuzhiyun  * Do not reorder these banks as it will change the pin numbering
23*4882a593Smuzhiyun  */
24*4882a593Smuzhiyun static const struct wmt_pinctrl_bank_registers wm8850_banks[] = {
25*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x40, 0x80, 0xC0, 0x00, 0x480, 0x4C0),		/* 0 */
26*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x44, 0x84, 0xC4, 0x04, 0x484, 0x4C4),		/* 1 */
27*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x48, 0x88, 0xC8, 0x08, 0x488, 0x4C8),		/* 2 */
28*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x4C, 0x8C, 0xCC, 0x0C, 0x48C, 0x4CC),		/* 3 */
29*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x50, 0x90, 0xD0, 0x10, 0x490, 0x4D0),		/* 4 */
30*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x54, 0x94, 0xD4, 0x14, 0x494, 0x4D4),		/* 5 */
31*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x58, 0x98, 0xD8, 0x18, 0x498, 0x4D8),		/* 6 */
32*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x5C, 0x9C, 0xDC, 0x1C, 0x49C, 0x4DC),		/* 7 */
33*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x60, 0xA0, 0xE0, 0x20, 0x4A0, 0x4E0),		/* 8 */
34*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x70, 0xB0, 0xF0, 0x30, 0x4B0, 0x4F0),		/* 9 */
35*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x7C, 0xBC, 0xDC, 0x3C, 0x4BC, 0x4FC),		/* 10 */
36*4882a593Smuzhiyun };
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun /* Please keep sorted by bank/bit */
39*4882a593Smuzhiyun #define WMT_PIN_EXTGPIO0	WMT_PIN(0, 0)
40*4882a593Smuzhiyun #define WMT_PIN_EXTGPIO1	WMT_PIN(0, 1)
41*4882a593Smuzhiyun #define WMT_PIN_EXTGPIO2	WMT_PIN(0, 2)
42*4882a593Smuzhiyun #define WMT_PIN_EXTGPIO3	WMT_PIN(0, 3)
43*4882a593Smuzhiyun #define WMT_PIN_EXTGPIO4	WMT_PIN(0, 4)
44*4882a593Smuzhiyun #define WMT_PIN_EXTGPIO5	WMT_PIN(0, 5)
45*4882a593Smuzhiyun #define WMT_PIN_EXTGPIO6	WMT_PIN(0, 6)
46*4882a593Smuzhiyun #define WMT_PIN_EXTGPIO7	WMT_PIN(0, 7)
47*4882a593Smuzhiyun #define WMT_PIN_WAKEUP0		WMT_PIN(0, 16)
48*4882a593Smuzhiyun #define WMT_PIN_WAKEUP1		WMT_PIN(0, 17)
49*4882a593Smuzhiyun #define WMT_PIN_WAKEUP2		WMT_PIN(0, 18)
50*4882a593Smuzhiyun #define WMT_PIN_WAKEUP3		WMT_PIN(0, 19)
51*4882a593Smuzhiyun #define WMT_PIN_SUSGPIO0	WMT_PIN(0, 21)
52*4882a593Smuzhiyun #define WMT_PIN_SUSGPIO1	WMT_PIN(0, 22)
53*4882a593Smuzhiyun #define WMT_PIN_SD0CD		WMT_PIN(0, 28)
54*4882a593Smuzhiyun #define WMT_PIN_VDOUT0		WMT_PIN(1, 0)
55*4882a593Smuzhiyun #define WMT_PIN_VDOUT1		WMT_PIN(1, 1)
56*4882a593Smuzhiyun #define WMT_PIN_VDOUT2		WMT_PIN(1, 2)
57*4882a593Smuzhiyun #define WMT_PIN_VDOUT3		WMT_PIN(1, 3)
58*4882a593Smuzhiyun #define WMT_PIN_VDOUT4		WMT_PIN(1, 4)
59*4882a593Smuzhiyun #define WMT_PIN_VDOUT5		WMT_PIN(1, 5)
60*4882a593Smuzhiyun #define WMT_PIN_VDOUT6		WMT_PIN(1, 6)
61*4882a593Smuzhiyun #define WMT_PIN_VDOUT7		WMT_PIN(1, 7)
62*4882a593Smuzhiyun #define WMT_PIN_VDOUT8		WMT_PIN(1, 8)
63*4882a593Smuzhiyun #define WMT_PIN_VDOUT9		WMT_PIN(1, 9)
64*4882a593Smuzhiyun #define WMT_PIN_VDOUT10		WMT_PIN(1, 10)
65*4882a593Smuzhiyun #define WMT_PIN_VDOUT11		WMT_PIN(1, 11)
66*4882a593Smuzhiyun #define WMT_PIN_VDOUT12		WMT_PIN(1, 12)
67*4882a593Smuzhiyun #define WMT_PIN_VDOUT13		WMT_PIN(1, 13)
68*4882a593Smuzhiyun #define WMT_PIN_VDOUT14		WMT_PIN(1, 14)
69*4882a593Smuzhiyun #define WMT_PIN_VDOUT15		WMT_PIN(1, 15)
70*4882a593Smuzhiyun #define WMT_PIN_VDOUT16		WMT_PIN(1, 16)
71*4882a593Smuzhiyun #define WMT_PIN_VDOUT17		WMT_PIN(1, 17)
72*4882a593Smuzhiyun #define WMT_PIN_VDOUT18		WMT_PIN(1, 18)
73*4882a593Smuzhiyun #define WMT_PIN_VDOUT19		WMT_PIN(1, 19)
74*4882a593Smuzhiyun #define WMT_PIN_VDOUT20		WMT_PIN(1, 20)
75*4882a593Smuzhiyun #define WMT_PIN_VDOUT21		WMT_PIN(1, 21)
76*4882a593Smuzhiyun #define WMT_PIN_VDOUT22		WMT_PIN(1, 22)
77*4882a593Smuzhiyun #define WMT_PIN_VDOUT23		WMT_PIN(1, 23)
78*4882a593Smuzhiyun #define WMT_PIN_VDIN0		WMT_PIN(2, 0)
79*4882a593Smuzhiyun #define WMT_PIN_VDIN1		WMT_PIN(2, 1)
80*4882a593Smuzhiyun #define WMT_PIN_VDIN2		WMT_PIN(2, 2)
81*4882a593Smuzhiyun #define WMT_PIN_VDIN3		WMT_PIN(2, 3)
82*4882a593Smuzhiyun #define WMT_PIN_VDIN4		WMT_PIN(2, 4)
83*4882a593Smuzhiyun #define WMT_PIN_VDIN5		WMT_PIN(2, 5)
84*4882a593Smuzhiyun #define WMT_PIN_VDIN6		WMT_PIN(2, 6)
85*4882a593Smuzhiyun #define WMT_PIN_VDIN7		WMT_PIN(2, 7)
86*4882a593Smuzhiyun #define WMT_PIN_SPI0_MOSI	WMT_PIN(2, 24)
87*4882a593Smuzhiyun #define WMT_PIN_SPI0_MISO	WMT_PIN(2, 25)
88*4882a593Smuzhiyun #define WMT_PIN_SPI0_SS		WMT_PIN(2, 26)
89*4882a593Smuzhiyun #define WMT_PIN_SPI0_CLK	WMT_PIN(2, 27)
90*4882a593Smuzhiyun #define WMT_PIN_SPI0_SSB	WMT_PIN(2, 28)
91*4882a593Smuzhiyun #define WMT_PIN_SD0CLK		WMT_PIN(3, 17)
92*4882a593Smuzhiyun #define WMT_PIN_SD0CMD		WMT_PIN(3, 18)
93*4882a593Smuzhiyun #define WMT_PIN_SD0WP		WMT_PIN(3, 19)
94*4882a593Smuzhiyun #define WMT_PIN_SD0DATA0	WMT_PIN(3, 20)
95*4882a593Smuzhiyun #define WMT_PIN_SD0DATA1	WMT_PIN(3, 21)
96*4882a593Smuzhiyun #define WMT_PIN_SD0DATA2	WMT_PIN(3, 22)
97*4882a593Smuzhiyun #define WMT_PIN_SD0DATA3	WMT_PIN(3, 23)
98*4882a593Smuzhiyun #define WMT_PIN_SD1DATA0	WMT_PIN(3, 24)
99*4882a593Smuzhiyun #define WMT_PIN_SD1DATA1	WMT_PIN(3, 25)
100*4882a593Smuzhiyun #define WMT_PIN_SD1DATA2	WMT_PIN(3, 26)
101*4882a593Smuzhiyun #define WMT_PIN_SD1DATA3	WMT_PIN(3, 27)
102*4882a593Smuzhiyun #define WMT_PIN_SD1DATA4	WMT_PIN(3, 28)
103*4882a593Smuzhiyun #define WMT_PIN_SD1DATA5	WMT_PIN(3, 29)
104*4882a593Smuzhiyun #define WMT_PIN_SD1DATA6	WMT_PIN(3, 30)
105*4882a593Smuzhiyun #define WMT_PIN_SD1DATA7	WMT_PIN(3, 31)
106*4882a593Smuzhiyun #define WMT_PIN_I2C0_SCL	WMT_PIN(5, 8)
107*4882a593Smuzhiyun #define WMT_PIN_I2C0_SDA	WMT_PIN(5, 9)
108*4882a593Smuzhiyun #define WMT_PIN_I2C1_SCL	WMT_PIN(5, 10)
109*4882a593Smuzhiyun #define WMT_PIN_I2C1_SDA	WMT_PIN(5, 11)
110*4882a593Smuzhiyun #define WMT_PIN_I2C2_SCL	WMT_PIN(5, 12)
111*4882a593Smuzhiyun #define WMT_PIN_I2C2_SDA	WMT_PIN(5, 13)
112*4882a593Smuzhiyun #define WMT_PIN_UART0_RTS	WMT_PIN(5, 16)
113*4882a593Smuzhiyun #define WMT_PIN_UART0_TXD	WMT_PIN(5, 17)
114*4882a593Smuzhiyun #define WMT_PIN_UART0_CTS	WMT_PIN(5, 18)
115*4882a593Smuzhiyun #define WMT_PIN_UART0_RXD	WMT_PIN(5, 19)
116*4882a593Smuzhiyun #define WMT_PIN_UART1_RTS	WMT_PIN(5, 20)
117*4882a593Smuzhiyun #define WMT_PIN_UART1_TXD	WMT_PIN(5, 21)
118*4882a593Smuzhiyun #define WMT_PIN_UART1_CTS	WMT_PIN(5, 22)
119*4882a593Smuzhiyun #define WMT_PIN_UART1_RXD	WMT_PIN(5, 23)
120*4882a593Smuzhiyun #define WMT_PIN_UART2_RTS	WMT_PIN(5, 24)
121*4882a593Smuzhiyun #define WMT_PIN_UART2_TXD	WMT_PIN(5, 25)
122*4882a593Smuzhiyun #define WMT_PIN_UART2_CTS	WMT_PIN(5, 26)
123*4882a593Smuzhiyun #define WMT_PIN_UART2_RXD	WMT_PIN(5, 27)
124*4882a593Smuzhiyun #define WMT_PIN_SD2WP		WMT_PIN(6, 3)
125*4882a593Smuzhiyun #define WMT_PIN_SD2CMD		WMT_PIN(6, 6)
126*4882a593Smuzhiyun #define WMT_PIN_SD2CLK		WMT_PIN(6, 7)
127*4882a593Smuzhiyun #define WMT_PIN_SD2PWR		WMT_PIN(6, 9)
128*4882a593Smuzhiyun #define WMT_PIN_SD1CLK		WMT_PIN(7, 0)
129*4882a593Smuzhiyun #define WMT_PIN_SD1CMD		WMT_PIN(7, 1)
130*4882a593Smuzhiyun #define WMT_PIN_SD1PWR		WMT_PIN(7, 10)
131*4882a593Smuzhiyun #define WMT_PIN_SD1WP		WMT_PIN(7, 11)
132*4882a593Smuzhiyun #define WMT_PIN_SD1CD		WMT_PIN(7, 12)
133*4882a593Smuzhiyun #define WMT_PIN_PWMOUT1		WMT_PIN(7, 26)
134*4882a593Smuzhiyun #define WMT_PIN_PWMOUT0		WMT_PIN(7, 27)
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun static const struct pinctrl_pin_desc wm8850_pins[] = {
137*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_EXTGPIO0, "extgpio0"),
138*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_EXTGPIO1, "extgpio1"),
139*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_EXTGPIO2, "extgpio2"),
140*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_EXTGPIO3, "extgpio3"),
141*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_EXTGPIO4, "extgpio4"),
142*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_EXTGPIO5, "extgpio5"),
143*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_EXTGPIO6, "extgpio6"),
144*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_EXTGPIO7, "extgpio7"),
145*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_WAKEUP0, "wakeup0"),
146*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_WAKEUP1, "wakeup1"),
147*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_WAKEUP2, "wakeup2"),
148*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_WAKEUP3, "wakeup3"),
149*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SUSGPIO0, "susgpio0"),
150*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SUSGPIO1, "susgpio1"),
151*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD0CD, "sd0_cd"),
152*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT0, "vdout0"),
153*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT1, "vdout1"),
154*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT2, "vdout2"),
155*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT3, "vdout3"),
156*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT4, "vdout4"),
157*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT5, "vdout5"),
158*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT6, "vdout6"),
159*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT7, "vdout7"),
160*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT8, "vdout8"),
161*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT9, "vdout9"),
162*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT10, "vdout10"),
163*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT11, "vdout11"),
164*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT12, "vdout12"),
165*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT13, "vdout13"),
166*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT14, "vdout14"),
167*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT15, "vdout15"),
168*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT16, "vdout16"),
169*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT17, "vdout17"),
170*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT18, "vdout18"),
171*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT19, "vdout19"),
172*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT20, "vdout20"),
173*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT21, "vdout21"),
174*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT22, "vdout22"),
175*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT23, "vdout23"),
176*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDIN0, "vdin0"),
177*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDIN1, "vdin1"),
178*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDIN2, "vdin2"),
179*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDIN3, "vdin3"),
180*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDIN4, "vdin4"),
181*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDIN5, "vdin5"),
182*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDIN6, "vdin6"),
183*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDIN7, "vdin7"),
184*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SPI0_MOSI, "spi0_mosi"),
185*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SPI0_MISO, "spi0_miso"),
186*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SPI0_SS, "spi0_ss"),
187*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SPI0_CLK, "spi0_clk"),
188*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SPI0_SSB, "spi0_ssb"),
189*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD0CLK, "sd0_clk"),
190*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD0CMD, "sd0_cmd"),
191*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD0WP, "sd0_wp"),
192*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD0DATA0, "sd0_data0"),
193*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD0DATA1, "sd0_data1"),
194*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD0DATA2, "sd0_data2"),
195*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD0DATA3, "sd0_data3"),
196*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD1DATA0, "sd1_data0"),
197*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD1DATA1, "sd1_data1"),
198*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD1DATA2, "sd1_data2"),
199*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD1DATA3, "sd1_data3"),
200*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD1DATA4, "sd1_data4"),
201*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD1DATA5, "sd1_data5"),
202*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD1DATA6, "sd1_data6"),
203*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD1DATA7, "sd1_data7"),
204*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_I2C0_SCL, "i2c0_scl"),
205*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_I2C0_SDA, "i2c0_sda"),
206*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_I2C1_SCL, "i2c1_scl"),
207*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_I2C1_SDA, "i2c1_sda"),
208*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_I2C2_SCL, "i2c2_scl"),
209*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_I2C2_SDA, "i2c2_sda"),
210*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART0_RTS, "uart0_rts"),
211*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART0_TXD, "uart0_txd"),
212*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART0_CTS, "uart0_cts"),
213*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART0_RXD, "uart0_rxd"),
214*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART1_RTS, "uart1_rts"),
215*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART1_TXD, "uart1_txd"),
216*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART1_CTS, "uart1_cts"),
217*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART1_RXD, "uart1_rxd"),
218*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART2_RTS, "uart2_rts"),
219*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART2_TXD, "uart2_txd"),
220*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART2_CTS, "uart2_cts"),
221*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART2_RXD, "uart2_rxd"),
222*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD2WP, "sd2_wp"),
223*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD2CMD, "sd2_cmd"),
224*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD2CLK, "sd2_clk"),
225*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD2PWR, "sd2_pwr"),
226*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD1CLK, "sd1_clk"),
227*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD1CMD, "sd1_cmd"),
228*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD1PWR, "sd1_pwr"),
229*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD1WP, "sd1_wp"),
230*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD1CD, "sd1_cd"),
231*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_PWMOUT1, "pwmout1"),
232*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_PWMOUT0, "pwmout0"),
233*4882a593Smuzhiyun };
234*4882a593Smuzhiyun 
235*4882a593Smuzhiyun /* Order of these names must match the above list */
236*4882a593Smuzhiyun static const char * const wm8850_groups[] = {
237*4882a593Smuzhiyun 	"extgpio0",
238*4882a593Smuzhiyun 	"extgpio1",
239*4882a593Smuzhiyun 	"extgpio2",
240*4882a593Smuzhiyun 	"extgpio3",
241*4882a593Smuzhiyun 	"extgpio4",
242*4882a593Smuzhiyun 	"extgpio5",
243*4882a593Smuzhiyun 	"extgpio6",
244*4882a593Smuzhiyun 	"extgpio7",
245*4882a593Smuzhiyun 	"wakeup0",
246*4882a593Smuzhiyun 	"wakeup1",
247*4882a593Smuzhiyun 	"wakeup2",
248*4882a593Smuzhiyun 	"wakeup3",
249*4882a593Smuzhiyun 	"susgpio0",
250*4882a593Smuzhiyun 	"susgpio1",
251*4882a593Smuzhiyun 	"sd0_cd",
252*4882a593Smuzhiyun 	"vdout0",
253*4882a593Smuzhiyun 	"vdout1",
254*4882a593Smuzhiyun 	"vdout2",
255*4882a593Smuzhiyun 	"vdout3",
256*4882a593Smuzhiyun 	"vdout4",
257*4882a593Smuzhiyun 	"vdout5",
258*4882a593Smuzhiyun 	"vdout6",
259*4882a593Smuzhiyun 	"vdout7",
260*4882a593Smuzhiyun 	"vdout8",
261*4882a593Smuzhiyun 	"vdout9",
262*4882a593Smuzhiyun 	"vdout10",
263*4882a593Smuzhiyun 	"vdout11",
264*4882a593Smuzhiyun 	"vdout12",
265*4882a593Smuzhiyun 	"vdout13",
266*4882a593Smuzhiyun 	"vdout14",
267*4882a593Smuzhiyun 	"vdout15",
268*4882a593Smuzhiyun 	"vdout16",
269*4882a593Smuzhiyun 	"vdout17",
270*4882a593Smuzhiyun 	"vdout18",
271*4882a593Smuzhiyun 	"vdout19",
272*4882a593Smuzhiyun 	"vdout20",
273*4882a593Smuzhiyun 	"vdout21",
274*4882a593Smuzhiyun 	"vdout22",
275*4882a593Smuzhiyun 	"vdout23",
276*4882a593Smuzhiyun 	"vdin0",
277*4882a593Smuzhiyun 	"vdin1",
278*4882a593Smuzhiyun 	"vdin2",
279*4882a593Smuzhiyun 	"vdin3",
280*4882a593Smuzhiyun 	"vdin4",
281*4882a593Smuzhiyun 	"vdin5",
282*4882a593Smuzhiyun 	"vdin6",
283*4882a593Smuzhiyun 	"vdin7",
284*4882a593Smuzhiyun 	"spi0_mosi",
285*4882a593Smuzhiyun 	"spi0_miso",
286*4882a593Smuzhiyun 	"spi0_ss",
287*4882a593Smuzhiyun 	"spi0_clk",
288*4882a593Smuzhiyun 	"spi0_ssb",
289*4882a593Smuzhiyun 	"sd0_clk",
290*4882a593Smuzhiyun 	"sd0_cmd",
291*4882a593Smuzhiyun 	"sd0_wp",
292*4882a593Smuzhiyun 	"sd0_data0",
293*4882a593Smuzhiyun 	"sd0_data1",
294*4882a593Smuzhiyun 	"sd0_data2",
295*4882a593Smuzhiyun 	"sd0_data3",
296*4882a593Smuzhiyun 	"sd1_data0",
297*4882a593Smuzhiyun 	"sd1_data1",
298*4882a593Smuzhiyun 	"sd1_data2",
299*4882a593Smuzhiyun 	"sd1_data3",
300*4882a593Smuzhiyun 	"sd1_data4",
301*4882a593Smuzhiyun 	"sd1_data5",
302*4882a593Smuzhiyun 	"sd1_data6",
303*4882a593Smuzhiyun 	"sd1_data7",
304*4882a593Smuzhiyun 	"i2c0_scl",
305*4882a593Smuzhiyun 	"i2c0_sda",
306*4882a593Smuzhiyun 	"i2c1_scl",
307*4882a593Smuzhiyun 	"i2c1_sda",
308*4882a593Smuzhiyun 	"i2c2_scl",
309*4882a593Smuzhiyun 	"i2c2_sda",
310*4882a593Smuzhiyun 	"uart0_rts",
311*4882a593Smuzhiyun 	"uart0_txd",
312*4882a593Smuzhiyun 	"uart0_cts",
313*4882a593Smuzhiyun 	"uart0_rxd",
314*4882a593Smuzhiyun 	"uart1_rts",
315*4882a593Smuzhiyun 	"uart1_txd",
316*4882a593Smuzhiyun 	"uart1_cts",
317*4882a593Smuzhiyun 	"uart1_rxd",
318*4882a593Smuzhiyun 	"uart2_rts",
319*4882a593Smuzhiyun 	"uart2_txd",
320*4882a593Smuzhiyun 	"uart2_cts",
321*4882a593Smuzhiyun 	"uart2_rxd",
322*4882a593Smuzhiyun 	"sd2_wp",
323*4882a593Smuzhiyun 	"sd2_cmd",
324*4882a593Smuzhiyun 	"sd2_clk",
325*4882a593Smuzhiyun 	"sd2_pwr",
326*4882a593Smuzhiyun 	"sd1_clk",
327*4882a593Smuzhiyun 	"sd1_cmd",
328*4882a593Smuzhiyun 	"sd1_pwr",
329*4882a593Smuzhiyun 	"sd1_wp",
330*4882a593Smuzhiyun 	"sd1_cd",
331*4882a593Smuzhiyun 	"pwmout1",
332*4882a593Smuzhiyun 	"pwmout0",
333*4882a593Smuzhiyun };
334*4882a593Smuzhiyun 
wm8850_pinctrl_probe(struct platform_device * pdev)335*4882a593Smuzhiyun static int wm8850_pinctrl_probe(struct platform_device *pdev)
336*4882a593Smuzhiyun {
337*4882a593Smuzhiyun 	struct wmt_pinctrl_data *data;
338*4882a593Smuzhiyun 
339*4882a593Smuzhiyun 	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
340*4882a593Smuzhiyun 	if (!data)
341*4882a593Smuzhiyun 		return -ENOMEM;
342*4882a593Smuzhiyun 
343*4882a593Smuzhiyun 	data->banks = wm8850_banks;
344*4882a593Smuzhiyun 	data->nbanks = ARRAY_SIZE(wm8850_banks);
345*4882a593Smuzhiyun 	data->pins = wm8850_pins;
346*4882a593Smuzhiyun 	data->npins = ARRAY_SIZE(wm8850_pins);
347*4882a593Smuzhiyun 	data->groups = wm8850_groups;
348*4882a593Smuzhiyun 	data->ngroups = ARRAY_SIZE(wm8850_groups);
349*4882a593Smuzhiyun 
350*4882a593Smuzhiyun 	return wmt_pinctrl_probe(pdev, data);
351*4882a593Smuzhiyun }
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun static const struct of_device_id wmt_pinctrl_of_match[] = {
354*4882a593Smuzhiyun 	{ .compatible = "wm,wm8850-pinctrl" },
355*4882a593Smuzhiyun 	{ /* sentinel */ },
356*4882a593Smuzhiyun };
357*4882a593Smuzhiyun 
358*4882a593Smuzhiyun static struct platform_driver wmt_pinctrl_driver = {
359*4882a593Smuzhiyun 	.probe	= wm8850_pinctrl_probe,
360*4882a593Smuzhiyun 	.driver = {
361*4882a593Smuzhiyun 		.name	= "pinctrl-wm8850",
362*4882a593Smuzhiyun 		.of_match_table	= wmt_pinctrl_of_match,
363*4882a593Smuzhiyun 		.suppress_bind_attrs = true,
364*4882a593Smuzhiyun 	},
365*4882a593Smuzhiyun };
366*4882a593Smuzhiyun builtin_platform_driver(wmt_pinctrl_driver);
367