xref: /OK3568_Linux_fs/kernel/drivers/pinctrl/vt8500/pinctrl-wm8505.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Pinctrl data for Wondermedia WM8505 SoC
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) 2013 Tony Prisk <linux@prisktech.co.nz>
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/io.h>
9*4882a593Smuzhiyun #include <linux/init.h>
10*4882a593Smuzhiyun #include <linux/pinctrl/pinctrl.h>
11*4882a593Smuzhiyun #include <linux/platform_device.h>
12*4882a593Smuzhiyun #include <linux/slab.h>
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include "pinctrl-wmt.h"
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun /*
17*4882a593Smuzhiyun  * Describe the register offsets within the GPIO memory space
18*4882a593Smuzhiyun  * The dedicated external GPIO's should always be listed in bank 0
19*4882a593Smuzhiyun  * so they are exported in the 0..31 range which is what users
20*4882a593Smuzhiyun  * expect.
21*4882a593Smuzhiyun  *
22*4882a593Smuzhiyun  * Do not reorder these banks as it will change the pin numbering
23*4882a593Smuzhiyun  */
24*4882a593Smuzhiyun static const struct wmt_pinctrl_bank_registers wm8505_banks[] = {
25*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x64, 0x8C, 0xB4, 0xDC, NO_REG, NO_REG),	/* 0 */
26*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x40, 0x68, 0x90, 0xB8, NO_REG, NO_REG),	/* 1 */
27*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x44, 0x6C, 0x94, 0xBC, NO_REG, NO_REG),	/* 2 */
28*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x48, 0x70, 0x98, 0xC0, NO_REG, NO_REG),	/* 3 */
29*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x4C, 0x74, 0x9C, 0xC4, NO_REG, NO_REG),	/* 4 */
30*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x50, 0x78, 0xA0, 0xC8, NO_REG, NO_REG),	/* 5 */
31*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x54, 0x7C, 0xA4, 0xD0, NO_REG, NO_REG),	/* 6 */
32*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x58, 0x80, 0xA8, 0xD4, NO_REG, NO_REG),	/* 7 */
33*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x5C, 0x84, 0xAC, 0xD8, NO_REG, NO_REG),	/* 8 */
34*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x60, 0x88, 0xB0, 0xDC, NO_REG, NO_REG),	/* 9 */
35*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x500, 0x504, 0x508, 0x50C, NO_REG, NO_REG),	/* 10 */
36*4882a593Smuzhiyun };
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun /* Please keep sorted by bank/bit */
39*4882a593Smuzhiyun #define WMT_PIN_EXTGPIO0	WMT_PIN(0, 0)
40*4882a593Smuzhiyun #define WMT_PIN_EXTGPIO1	WMT_PIN(0, 1)
41*4882a593Smuzhiyun #define WMT_PIN_EXTGPIO2	WMT_PIN(0, 2)
42*4882a593Smuzhiyun #define WMT_PIN_EXTGPIO3	WMT_PIN(0, 3)
43*4882a593Smuzhiyun #define WMT_PIN_EXTGPIO4	WMT_PIN(0, 4)
44*4882a593Smuzhiyun #define WMT_PIN_EXTGPIO5	WMT_PIN(0, 5)
45*4882a593Smuzhiyun #define WMT_PIN_EXTGPIO6	WMT_PIN(0, 6)
46*4882a593Smuzhiyun #define WMT_PIN_EXTGPIO7	WMT_PIN(0, 7)
47*4882a593Smuzhiyun #define WMT_PIN_WAKEUP0		WMT_PIN(0, 16)
48*4882a593Smuzhiyun #define WMT_PIN_WAKEUP1		WMT_PIN(0, 17)
49*4882a593Smuzhiyun #define WMT_PIN_WAKEUP2		WMT_PIN(0, 18)
50*4882a593Smuzhiyun #define WMT_PIN_WAKEUP3		WMT_PIN(0, 19)
51*4882a593Smuzhiyun #define WMT_PIN_SUSGPIO0	WMT_PIN(0, 21)
52*4882a593Smuzhiyun #define WMT_PIN_SDDATA0		WMT_PIN(1, 0)
53*4882a593Smuzhiyun #define WMT_PIN_SDDATA1		WMT_PIN(1, 1)
54*4882a593Smuzhiyun #define WMT_PIN_SDDATA2		WMT_PIN(1, 2)
55*4882a593Smuzhiyun #define WMT_PIN_SDDATA3		WMT_PIN(1, 3)
56*4882a593Smuzhiyun #define WMT_PIN_MMCDATA0	WMT_PIN(1, 4)
57*4882a593Smuzhiyun #define WMT_PIN_MMCDATA1	WMT_PIN(1, 5)
58*4882a593Smuzhiyun #define WMT_PIN_MMCDATA2	WMT_PIN(1, 6)
59*4882a593Smuzhiyun #define WMT_PIN_MMCDATA3	WMT_PIN(1, 7)
60*4882a593Smuzhiyun #define WMT_PIN_VDIN0		WMT_PIN(2, 0)
61*4882a593Smuzhiyun #define WMT_PIN_VDIN1		WMT_PIN(2, 1)
62*4882a593Smuzhiyun #define WMT_PIN_VDIN2		WMT_PIN(2, 2)
63*4882a593Smuzhiyun #define WMT_PIN_VDIN3		WMT_PIN(2, 3)
64*4882a593Smuzhiyun #define WMT_PIN_VDIN4		WMT_PIN(2, 4)
65*4882a593Smuzhiyun #define WMT_PIN_VDIN5		WMT_PIN(2, 5)
66*4882a593Smuzhiyun #define WMT_PIN_VDIN6		WMT_PIN(2, 6)
67*4882a593Smuzhiyun #define WMT_PIN_VDIN7		WMT_PIN(2, 7)
68*4882a593Smuzhiyun #define WMT_PIN_VDOUT0		WMT_PIN(2, 8)
69*4882a593Smuzhiyun #define WMT_PIN_VDOUT1		WMT_PIN(2, 9)
70*4882a593Smuzhiyun #define WMT_PIN_VDOUT2		WMT_PIN(2, 10)
71*4882a593Smuzhiyun #define WMT_PIN_VDOUT3		WMT_PIN(2, 11)
72*4882a593Smuzhiyun #define WMT_PIN_VDOUT4		WMT_PIN(2, 12)
73*4882a593Smuzhiyun #define WMT_PIN_VDOUT5		WMT_PIN(2, 13)
74*4882a593Smuzhiyun #define WMT_PIN_VDOUT6		WMT_PIN(2, 14)
75*4882a593Smuzhiyun #define WMT_PIN_VDOUT7		WMT_PIN(2, 15)
76*4882a593Smuzhiyun #define WMT_PIN_VDOUT8		WMT_PIN(2, 16)
77*4882a593Smuzhiyun #define WMT_PIN_VDOUT9		WMT_PIN(2, 17)
78*4882a593Smuzhiyun #define WMT_PIN_VDOUT10		WMT_PIN(2, 18)
79*4882a593Smuzhiyun #define WMT_PIN_VDOUT11		WMT_PIN(2, 19)
80*4882a593Smuzhiyun #define WMT_PIN_VDOUT12		WMT_PIN(2, 20)
81*4882a593Smuzhiyun #define WMT_PIN_VDOUT13		WMT_PIN(2, 21)
82*4882a593Smuzhiyun #define WMT_PIN_VDOUT14		WMT_PIN(2, 22)
83*4882a593Smuzhiyun #define WMT_PIN_VDOUT15		WMT_PIN(2, 23)
84*4882a593Smuzhiyun #define WMT_PIN_VDOUT16		WMT_PIN(2, 24)
85*4882a593Smuzhiyun #define WMT_PIN_VDOUT17		WMT_PIN(2, 25)
86*4882a593Smuzhiyun #define WMT_PIN_VDOUT18		WMT_PIN(2, 26)
87*4882a593Smuzhiyun #define WMT_PIN_VDOUT19		WMT_PIN(2, 27)
88*4882a593Smuzhiyun #define WMT_PIN_VDOUT20		WMT_PIN(2, 28)
89*4882a593Smuzhiyun #define WMT_PIN_VDOUT21		WMT_PIN(2, 29)
90*4882a593Smuzhiyun #define WMT_PIN_VDOUT22		WMT_PIN(2, 30)
91*4882a593Smuzhiyun #define WMT_PIN_VDOUT23		WMT_PIN(2, 31)
92*4882a593Smuzhiyun #define WMT_PIN_VHSYNC		WMT_PIN(3, 0)
93*4882a593Smuzhiyun #define WMT_PIN_VVSYNC		WMT_PIN(3, 1)
94*4882a593Smuzhiyun #define WMT_PIN_VGAHSYNC	WMT_PIN(3, 2)
95*4882a593Smuzhiyun #define WMT_PIN_VGAVSYNC	WMT_PIN(3, 3)
96*4882a593Smuzhiyun #define WMT_PIN_VDHSYNC		WMT_PIN(3, 4)
97*4882a593Smuzhiyun #define WMT_PIN_VDVSYNC		WMT_PIN(3, 5)
98*4882a593Smuzhiyun #define WMT_PIN_NORD0		WMT_PIN(4, 0)
99*4882a593Smuzhiyun #define WMT_PIN_NORD1		WMT_PIN(4, 1)
100*4882a593Smuzhiyun #define WMT_PIN_NORD2		WMT_PIN(4, 2)
101*4882a593Smuzhiyun #define WMT_PIN_NORD3		WMT_PIN(4, 3)
102*4882a593Smuzhiyun #define WMT_PIN_NORD4		WMT_PIN(4, 4)
103*4882a593Smuzhiyun #define WMT_PIN_NORD5		WMT_PIN(4, 5)
104*4882a593Smuzhiyun #define WMT_PIN_NORD6		WMT_PIN(4, 6)
105*4882a593Smuzhiyun #define WMT_PIN_NORD7		WMT_PIN(4, 7)
106*4882a593Smuzhiyun #define WMT_PIN_NORD8		WMT_PIN(4, 8)
107*4882a593Smuzhiyun #define WMT_PIN_NORD9		WMT_PIN(4, 9)
108*4882a593Smuzhiyun #define WMT_PIN_NORD10		WMT_PIN(4, 10)
109*4882a593Smuzhiyun #define WMT_PIN_NORD11		WMT_PIN(4, 11)
110*4882a593Smuzhiyun #define WMT_PIN_NORD12		WMT_PIN(4, 12)
111*4882a593Smuzhiyun #define WMT_PIN_NORD13		WMT_PIN(4, 13)
112*4882a593Smuzhiyun #define WMT_PIN_NORD14		WMT_PIN(4, 14)
113*4882a593Smuzhiyun #define WMT_PIN_NORD15		WMT_PIN(4, 15)
114*4882a593Smuzhiyun #define WMT_PIN_NORA0		WMT_PIN(5, 0)
115*4882a593Smuzhiyun #define WMT_PIN_NORA1		WMT_PIN(5, 1)
116*4882a593Smuzhiyun #define WMT_PIN_NORA2		WMT_PIN(5, 2)
117*4882a593Smuzhiyun #define WMT_PIN_NORA3		WMT_PIN(5, 3)
118*4882a593Smuzhiyun #define WMT_PIN_NORA4		WMT_PIN(5, 4)
119*4882a593Smuzhiyun #define WMT_PIN_NORA5		WMT_PIN(5, 5)
120*4882a593Smuzhiyun #define WMT_PIN_NORA6		WMT_PIN(5, 6)
121*4882a593Smuzhiyun #define WMT_PIN_NORA7		WMT_PIN(5, 7)
122*4882a593Smuzhiyun #define WMT_PIN_NORA8		WMT_PIN(5, 8)
123*4882a593Smuzhiyun #define WMT_PIN_NORA9		WMT_PIN(5, 9)
124*4882a593Smuzhiyun #define WMT_PIN_NORA10		WMT_PIN(5, 10)
125*4882a593Smuzhiyun #define WMT_PIN_NORA11		WMT_PIN(5, 11)
126*4882a593Smuzhiyun #define WMT_PIN_NORA12		WMT_PIN(5, 12)
127*4882a593Smuzhiyun #define WMT_PIN_NORA13		WMT_PIN(5, 13)
128*4882a593Smuzhiyun #define WMT_PIN_NORA14		WMT_PIN(5, 14)
129*4882a593Smuzhiyun #define WMT_PIN_NORA15		WMT_PIN(5, 15)
130*4882a593Smuzhiyun #define WMT_PIN_NORA16		WMT_PIN(5, 16)
131*4882a593Smuzhiyun #define WMT_PIN_NORA17		WMT_PIN(5, 17)
132*4882a593Smuzhiyun #define WMT_PIN_NORA18		WMT_PIN(5, 18)
133*4882a593Smuzhiyun #define WMT_PIN_NORA19		WMT_PIN(5, 19)
134*4882a593Smuzhiyun #define WMT_PIN_NORA20		WMT_PIN(5, 20)
135*4882a593Smuzhiyun #define WMT_PIN_NORA21		WMT_PIN(5, 21)
136*4882a593Smuzhiyun #define WMT_PIN_NORA22		WMT_PIN(5, 22)
137*4882a593Smuzhiyun #define WMT_PIN_NORA23		WMT_PIN(5, 23)
138*4882a593Smuzhiyun #define WMT_PIN_NORA24		WMT_PIN(5, 24)
139*4882a593Smuzhiyun #define WMT_PIN_AC97SDI		WMT_PIN(6, 0)
140*4882a593Smuzhiyun #define WMT_PIN_AC97SYNC	WMT_PIN(6, 1)
141*4882a593Smuzhiyun #define WMT_PIN_AC97SDO		WMT_PIN(6, 2)
142*4882a593Smuzhiyun #define WMT_PIN_AC97BCLK	WMT_PIN(6, 3)
143*4882a593Smuzhiyun #define WMT_PIN_AC97RST		WMT_PIN(6, 4)
144*4882a593Smuzhiyun #define WMT_PIN_SFDO		WMT_PIN(7, 0)
145*4882a593Smuzhiyun #define WMT_PIN_SFCS0		WMT_PIN(7, 1)
146*4882a593Smuzhiyun #define WMT_PIN_SFCS1		WMT_PIN(7, 2)
147*4882a593Smuzhiyun #define WMT_PIN_SFCLK		WMT_PIN(7, 3)
148*4882a593Smuzhiyun #define WMT_PIN_SFDI		WMT_PIN(7, 4)
149*4882a593Smuzhiyun #define WMT_PIN_SPI0CLK		WMT_PIN(8, 0)
150*4882a593Smuzhiyun #define WMT_PIN_SPI0MISO	WMT_PIN(8, 1)
151*4882a593Smuzhiyun #define WMT_PIN_SPI0MOSI	WMT_PIN(8, 2)
152*4882a593Smuzhiyun #define WMT_PIN_SPI0SS		WMT_PIN(8, 3)
153*4882a593Smuzhiyun #define WMT_PIN_SPI1CLK		WMT_PIN(8, 4)
154*4882a593Smuzhiyun #define WMT_PIN_SPI1MISO	WMT_PIN(8, 5)
155*4882a593Smuzhiyun #define WMT_PIN_SPI1MOSI	WMT_PIN(8, 6)
156*4882a593Smuzhiyun #define WMT_PIN_SPI1SS		WMT_PIN(8, 7)
157*4882a593Smuzhiyun #define WMT_PIN_SPI2CLK		WMT_PIN(8, 8)
158*4882a593Smuzhiyun #define WMT_PIN_SPI2MISO	WMT_PIN(8, 9)
159*4882a593Smuzhiyun #define WMT_PIN_SPI2MOSI	WMT_PIN(8, 10)
160*4882a593Smuzhiyun #define WMT_PIN_SPI2SS		WMT_PIN(8, 11)
161*4882a593Smuzhiyun #define WMT_PIN_UART0_RTS	WMT_PIN(9, 0)
162*4882a593Smuzhiyun #define WMT_PIN_UART0_TXD	WMT_PIN(9, 1)
163*4882a593Smuzhiyun #define WMT_PIN_UART0_CTS	WMT_PIN(9, 2)
164*4882a593Smuzhiyun #define WMT_PIN_UART0_RXD	WMT_PIN(9, 3)
165*4882a593Smuzhiyun #define WMT_PIN_UART1_RTS	WMT_PIN(9, 4)
166*4882a593Smuzhiyun #define WMT_PIN_UART1_TXD	WMT_PIN(9, 5)
167*4882a593Smuzhiyun #define WMT_PIN_UART1_CTS	WMT_PIN(9, 6)
168*4882a593Smuzhiyun #define WMT_PIN_UART1_RXD	WMT_PIN(9, 7)
169*4882a593Smuzhiyun #define WMT_PIN_UART2_RTS	WMT_PIN(9, 8)
170*4882a593Smuzhiyun #define WMT_PIN_UART2_TXD	WMT_PIN(9, 9)
171*4882a593Smuzhiyun #define WMT_PIN_UART2_CTS	WMT_PIN(9, 10)
172*4882a593Smuzhiyun #define WMT_PIN_UART2_RXD	WMT_PIN(9, 11)
173*4882a593Smuzhiyun #define WMT_PIN_UART3_RTS	WMT_PIN(9, 12)
174*4882a593Smuzhiyun #define WMT_PIN_UART3_TXD	WMT_PIN(9, 13)
175*4882a593Smuzhiyun #define WMT_PIN_UART3_CTS	WMT_PIN(9, 14)
176*4882a593Smuzhiyun #define WMT_PIN_UART3_RXD	WMT_PIN(9, 15)
177*4882a593Smuzhiyun #define WMT_PIN_I2C0SCL		WMT_PIN(10, 0)
178*4882a593Smuzhiyun #define WMT_PIN_I2C0SDA		WMT_PIN(10, 1)
179*4882a593Smuzhiyun #define WMT_PIN_I2C1SCL		WMT_PIN(10, 2)
180*4882a593Smuzhiyun #define WMT_PIN_I2C1SDA		WMT_PIN(10, 3)
181*4882a593Smuzhiyun #define WMT_PIN_I2C2SCL		WMT_PIN(10, 4)
182*4882a593Smuzhiyun #define WMT_PIN_I2C2SDA		WMT_PIN(10, 5)
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun static const struct pinctrl_pin_desc wm8505_pins[] = {
185*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_EXTGPIO0, "extgpio0"),
186*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_EXTGPIO1, "extgpio1"),
187*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_EXTGPIO2, "extgpio2"),
188*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_EXTGPIO3, "extgpio3"),
189*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_EXTGPIO4, "extgpio4"),
190*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_EXTGPIO5, "extgpio5"),
191*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_EXTGPIO6, "extgpio6"),
192*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_EXTGPIO7, "extgpio7"),
193*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_WAKEUP0, "wakeup0"),
194*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_WAKEUP1, "wakeup1"),
195*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_WAKEUP2, "wakeup2"),
196*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_WAKEUP3, "wakeup3"),
197*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SUSGPIO0, "susgpio0"),
198*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SDDATA0, "sd_data0"),
199*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SDDATA1, "sd_data1"),
200*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SDDATA2, "sd_data2"),
201*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SDDATA3, "sd_data3"),
202*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MMCDATA0, "mmc_data0"),
203*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MMCDATA1, "mmc_data1"),
204*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MMCDATA2, "mmc_data2"),
205*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MMCDATA3, "mmc_data3"),
206*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDIN0, "vdin0"),
207*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDIN1, "vdin1"),
208*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDIN2, "vdin2"),
209*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDIN3, "vdin3"),
210*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDIN4, "vdin4"),
211*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDIN5, "vdin5"),
212*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDIN6, "vdin6"),
213*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDIN7, "vdin7"),
214*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT0, "vdout0"),
215*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT1, "vdout1"),
216*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT2, "vdout2"),
217*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT3, "vdout3"),
218*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT4, "vdout4"),
219*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT5, "vdout5"),
220*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT6, "vdout6"),
221*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT7, "vdout7"),
222*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT8, "vdout8"),
223*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT9, "vdout9"),
224*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT10, "vdout10"),
225*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT11, "vdout11"),
226*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT12, "vdout12"),
227*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT13, "vdout13"),
228*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT14, "vdout14"),
229*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT15, "vdout15"),
230*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT16, "vdout16"),
231*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT17, "vdout17"),
232*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT18, "vdout18"),
233*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT19, "vdout19"),
234*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT20, "vdout20"),
235*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT21, "vdout21"),
236*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT22, "vdout22"),
237*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT23, "vdout23"),
238*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VHSYNC, "v_hsync"),
239*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VVSYNC, "v_vsync"),
240*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VGAHSYNC, "vga_hsync"),
241*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VGAVSYNC, "vga_vsync"),
242*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDHSYNC, "vd_hsync"),
243*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDVSYNC, "vd_vsync"),
244*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORD0, "nor_d0"),
245*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORD1, "nor_d1"),
246*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORD2, "nor_d2"),
247*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORD3, "nor_d3"),
248*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORD4, "nor_d4"),
249*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORD5, "nor_d5"),
250*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORD6, "nor_d6"),
251*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORD7, "nor_d7"),
252*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORD8, "nor_d8"),
253*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORD9, "nor_d9"),
254*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORD10, "nor_d10"),
255*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORD11, "nor_d11"),
256*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORD12, "nor_d12"),
257*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORD13, "nor_d13"),
258*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORD14, "nor_d14"),
259*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORD15, "nor_d15"),
260*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORA0, "nor_a0"),
261*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORA1, "nor_a1"),
262*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORA2, "nor_a2"),
263*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORA3, "nor_a3"),
264*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORA4, "nor_a4"),
265*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORA5, "nor_a5"),
266*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORA6, "nor_a6"),
267*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORA7, "nor_a7"),
268*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORA8, "nor_a8"),
269*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORA9, "nor_a9"),
270*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORA10, "nor_a10"),
271*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORA11, "nor_a11"),
272*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORA12, "nor_a12"),
273*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORA13, "nor_a13"),
274*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORA14, "nor_a14"),
275*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORA15, "nor_a15"),
276*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORA16, "nor_a16"),
277*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORA17, "nor_a17"),
278*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORA18, "nor_a18"),
279*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORA19, "nor_a19"),
280*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORA20, "nor_a20"),
281*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORA21, "nor_a21"),
282*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORA22, "nor_a22"),
283*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORA23, "nor_a23"),
284*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NORA24, "nor_a24"),
285*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_AC97SDI, "ac97_sdi"),
286*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_AC97SYNC, "ac97_sync"),
287*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_AC97SDO, "ac97_sdo"),
288*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_AC97BCLK, "ac97_bclk"),
289*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_AC97RST, "ac97_rst"),
290*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SFDO, "sf_do"),
291*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SFCS0, "sf_cs0"),
292*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SFCS1, "sf_cs1"),
293*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SFCLK, "sf_clk"),
294*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SFDI, "sf_di"),
295*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SPI0CLK, "spi0_clk"),
296*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SPI0MISO, "spi0_miso"),
297*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SPI0MOSI, "spi0_mosi"),
298*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SPI0SS, "spi0_ss"),
299*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SPI1CLK, "spi1_clk"),
300*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SPI1MISO, "spi1_miso"),
301*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SPI1MOSI, "spi1_mosi"),
302*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SPI1SS, "spi1_ss"),
303*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SPI2CLK, "spi2_clk"),
304*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SPI2MISO, "spi2_miso"),
305*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SPI2MOSI, "spi2_mosi"),
306*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SPI2SS, "spi2_ss"),
307*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART0_RTS, "uart0_rts"),
308*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART0_TXD, "uart0_txd"),
309*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART0_CTS, "uart0_cts"),
310*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART0_RXD, "uart0_rxd"),
311*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART1_RTS, "uart1_rts"),
312*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART1_TXD, "uart1_txd"),
313*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART1_CTS, "uart1_cts"),
314*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART1_RXD, "uart1_rxd"),
315*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART2_RTS, "uart2_rts"),
316*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART2_TXD, "uart2_txd"),
317*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART2_CTS, "uart2_cts"),
318*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART2_RXD, "uart2_rxd"),
319*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART3_RTS, "uart3_rts"),
320*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART3_TXD, "uart3_txd"),
321*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART3_CTS, "uart3_cts"),
322*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART3_RXD, "uart3_rxd"),
323*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_I2C0SCL, "i2c0_scl"),
324*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_I2C0SDA, "i2c0_sda"),
325*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_I2C1SCL, "i2c1_scl"),
326*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_I2C1SDA, "i2c1_sda"),
327*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_I2C2SCL, "i2c2_scl"),
328*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_I2C2SDA, "i2c2_sda"),
329*4882a593Smuzhiyun };
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun /* Order of these names must match the above list */
332*4882a593Smuzhiyun static const char * const wm8505_groups[] = {
333*4882a593Smuzhiyun 	"extgpio0",
334*4882a593Smuzhiyun 	"extgpio1",
335*4882a593Smuzhiyun 	"extgpio2",
336*4882a593Smuzhiyun 	"extgpio3",
337*4882a593Smuzhiyun 	"extgpio4",
338*4882a593Smuzhiyun 	"extgpio5",
339*4882a593Smuzhiyun 	"extgpio6",
340*4882a593Smuzhiyun 	"extgpio7",
341*4882a593Smuzhiyun 	"wakeup0",
342*4882a593Smuzhiyun 	"wakeup1",
343*4882a593Smuzhiyun 	"wakeup2",
344*4882a593Smuzhiyun 	"wakeup3",
345*4882a593Smuzhiyun 	"susgpio0",
346*4882a593Smuzhiyun 	"sd_data0",
347*4882a593Smuzhiyun 	"sd_data1",
348*4882a593Smuzhiyun 	"sd_data2",
349*4882a593Smuzhiyun 	"sd_data3",
350*4882a593Smuzhiyun 	"mmc_data0",
351*4882a593Smuzhiyun 	"mmc_data1",
352*4882a593Smuzhiyun 	"mmc_data2",
353*4882a593Smuzhiyun 	"mmc_data3",
354*4882a593Smuzhiyun 	"vdin0",
355*4882a593Smuzhiyun 	"vdin1",
356*4882a593Smuzhiyun 	"vdin2",
357*4882a593Smuzhiyun 	"vdin3",
358*4882a593Smuzhiyun 	"vdin4",
359*4882a593Smuzhiyun 	"vdin5",
360*4882a593Smuzhiyun 	"vdin6",
361*4882a593Smuzhiyun 	"vdin7",
362*4882a593Smuzhiyun 	"vdout0",
363*4882a593Smuzhiyun 	"vdout1",
364*4882a593Smuzhiyun 	"vdout2",
365*4882a593Smuzhiyun 	"vdout3",
366*4882a593Smuzhiyun 	"vdout4",
367*4882a593Smuzhiyun 	"vdout5",
368*4882a593Smuzhiyun 	"vdout6",
369*4882a593Smuzhiyun 	"vdout7",
370*4882a593Smuzhiyun 	"vdout8",
371*4882a593Smuzhiyun 	"vdout9",
372*4882a593Smuzhiyun 	"vdout10",
373*4882a593Smuzhiyun 	"vdout11",
374*4882a593Smuzhiyun 	"vdout12",
375*4882a593Smuzhiyun 	"vdout13",
376*4882a593Smuzhiyun 	"vdout14",
377*4882a593Smuzhiyun 	"vdout15",
378*4882a593Smuzhiyun 	"vdout16",
379*4882a593Smuzhiyun 	"vdout17",
380*4882a593Smuzhiyun 	"vdout18",
381*4882a593Smuzhiyun 	"vdout19",
382*4882a593Smuzhiyun 	"vdout20",
383*4882a593Smuzhiyun 	"vdout21",
384*4882a593Smuzhiyun 	"vdout22",
385*4882a593Smuzhiyun 	"vdout23",
386*4882a593Smuzhiyun 	"v_hsync",
387*4882a593Smuzhiyun 	"v_vsync",
388*4882a593Smuzhiyun 	"vga_hsync",
389*4882a593Smuzhiyun 	"vga_vsync",
390*4882a593Smuzhiyun 	"vd_hsync",
391*4882a593Smuzhiyun 	"vd_vsync",
392*4882a593Smuzhiyun 	"nor_d0",
393*4882a593Smuzhiyun 	"nor_d1",
394*4882a593Smuzhiyun 	"nor_d2",
395*4882a593Smuzhiyun 	"nor_d3",
396*4882a593Smuzhiyun 	"nor_d4",
397*4882a593Smuzhiyun 	"nor_d5",
398*4882a593Smuzhiyun 	"nor_d6",
399*4882a593Smuzhiyun 	"nor_d7",
400*4882a593Smuzhiyun 	"nor_d8",
401*4882a593Smuzhiyun 	"nor_d9",
402*4882a593Smuzhiyun 	"nor_d10",
403*4882a593Smuzhiyun 	"nor_d11",
404*4882a593Smuzhiyun 	"nor_d12",
405*4882a593Smuzhiyun 	"nor_d13",
406*4882a593Smuzhiyun 	"nor_d14",
407*4882a593Smuzhiyun 	"nor_d15",
408*4882a593Smuzhiyun 	"nor_a0",
409*4882a593Smuzhiyun 	"nor_a1",
410*4882a593Smuzhiyun 	"nor_a2",
411*4882a593Smuzhiyun 	"nor_a3",
412*4882a593Smuzhiyun 	"nor_a4",
413*4882a593Smuzhiyun 	"nor_a5",
414*4882a593Smuzhiyun 	"nor_a6",
415*4882a593Smuzhiyun 	"nor_a7",
416*4882a593Smuzhiyun 	"nor_a8",
417*4882a593Smuzhiyun 	"nor_a9",
418*4882a593Smuzhiyun 	"nor_a10",
419*4882a593Smuzhiyun 	"nor_a11",
420*4882a593Smuzhiyun 	"nor_a12",
421*4882a593Smuzhiyun 	"nor_a13",
422*4882a593Smuzhiyun 	"nor_a14",
423*4882a593Smuzhiyun 	"nor_a15",
424*4882a593Smuzhiyun 	"nor_a16",
425*4882a593Smuzhiyun 	"nor_a17",
426*4882a593Smuzhiyun 	"nor_a18",
427*4882a593Smuzhiyun 	"nor_a19",
428*4882a593Smuzhiyun 	"nor_a20",
429*4882a593Smuzhiyun 	"nor_a21",
430*4882a593Smuzhiyun 	"nor_a22",
431*4882a593Smuzhiyun 	"nor_a23",
432*4882a593Smuzhiyun 	"nor_a24",
433*4882a593Smuzhiyun 	"ac97_sdi",
434*4882a593Smuzhiyun 	"ac97_sync",
435*4882a593Smuzhiyun 	"ac97_sdo",
436*4882a593Smuzhiyun 	"ac97_bclk",
437*4882a593Smuzhiyun 	"ac97_rst",
438*4882a593Smuzhiyun 	"sf_do",
439*4882a593Smuzhiyun 	"sf_cs0",
440*4882a593Smuzhiyun 	"sf_cs1",
441*4882a593Smuzhiyun 	"sf_clk",
442*4882a593Smuzhiyun 	"sf_di",
443*4882a593Smuzhiyun 	"spi0_clk",
444*4882a593Smuzhiyun 	"spi0_miso",
445*4882a593Smuzhiyun 	"spi0_mosi",
446*4882a593Smuzhiyun 	"spi0_ss",
447*4882a593Smuzhiyun 	"spi1_clk",
448*4882a593Smuzhiyun 	"spi1_miso",
449*4882a593Smuzhiyun 	"spi1_mosi",
450*4882a593Smuzhiyun 	"spi1_ss",
451*4882a593Smuzhiyun 	"spi2_clk",
452*4882a593Smuzhiyun 	"spi2_miso",
453*4882a593Smuzhiyun 	"spi2_mosi",
454*4882a593Smuzhiyun 	"spi2_ss",
455*4882a593Smuzhiyun 	"uart0_rts",
456*4882a593Smuzhiyun 	"uart0_txd",
457*4882a593Smuzhiyun 	"uart0_cts",
458*4882a593Smuzhiyun 	"uart0_rxd",
459*4882a593Smuzhiyun 	"uart1_rts",
460*4882a593Smuzhiyun 	"uart1_txd",
461*4882a593Smuzhiyun 	"uart1_cts",
462*4882a593Smuzhiyun 	"uart1_rxd",
463*4882a593Smuzhiyun 	"uart2_rts",
464*4882a593Smuzhiyun 	"uart2_txd",
465*4882a593Smuzhiyun 	"uart2_cts",
466*4882a593Smuzhiyun 	"uart2_rxd",
467*4882a593Smuzhiyun 	"uart3_rts",
468*4882a593Smuzhiyun 	"uart3_txd",
469*4882a593Smuzhiyun 	"uart3_cts",
470*4882a593Smuzhiyun 	"uart3_rxd",
471*4882a593Smuzhiyun 	"i2c0_scl",
472*4882a593Smuzhiyun 	"i2c0_sda",
473*4882a593Smuzhiyun 	"i2c1_scl",
474*4882a593Smuzhiyun 	"i2c1_sda",
475*4882a593Smuzhiyun 	"i2c2_scl",
476*4882a593Smuzhiyun 	"i2c2_sda",
477*4882a593Smuzhiyun };
478*4882a593Smuzhiyun 
wm8505_pinctrl_probe(struct platform_device * pdev)479*4882a593Smuzhiyun static int wm8505_pinctrl_probe(struct platform_device *pdev)
480*4882a593Smuzhiyun {
481*4882a593Smuzhiyun 	struct wmt_pinctrl_data *data;
482*4882a593Smuzhiyun 
483*4882a593Smuzhiyun 	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
484*4882a593Smuzhiyun 	if (!data)
485*4882a593Smuzhiyun 		return -ENOMEM;
486*4882a593Smuzhiyun 
487*4882a593Smuzhiyun 	data->banks = wm8505_banks;
488*4882a593Smuzhiyun 	data->nbanks = ARRAY_SIZE(wm8505_banks);
489*4882a593Smuzhiyun 	data->pins = wm8505_pins;
490*4882a593Smuzhiyun 	data->npins = ARRAY_SIZE(wm8505_pins);
491*4882a593Smuzhiyun 	data->groups = wm8505_groups;
492*4882a593Smuzhiyun 	data->ngroups = ARRAY_SIZE(wm8505_groups);
493*4882a593Smuzhiyun 
494*4882a593Smuzhiyun 	return wmt_pinctrl_probe(pdev, data);
495*4882a593Smuzhiyun }
496*4882a593Smuzhiyun 
497*4882a593Smuzhiyun static const struct of_device_id wmt_pinctrl_of_match[] = {
498*4882a593Smuzhiyun 	{ .compatible = "wm,wm8505-pinctrl" },
499*4882a593Smuzhiyun 	{ /* sentinel */ },
500*4882a593Smuzhiyun };
501*4882a593Smuzhiyun 
502*4882a593Smuzhiyun static struct platform_driver wmt_pinctrl_driver = {
503*4882a593Smuzhiyun 	.probe	= wm8505_pinctrl_probe,
504*4882a593Smuzhiyun 	.driver = {
505*4882a593Smuzhiyun 		.name	= "pinctrl-wm8505",
506*4882a593Smuzhiyun 		.of_match_table	= wmt_pinctrl_of_match,
507*4882a593Smuzhiyun 		.suppress_bind_attrs = true,
508*4882a593Smuzhiyun 	},
509*4882a593Smuzhiyun };
510*4882a593Smuzhiyun builtin_platform_driver(wmt_pinctrl_driver);
511