xref: /OK3568_Linux_fs/kernel/drivers/pinctrl/vt8500/pinctrl-vt8500.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Pinctrl data for VIA VT8500 SoC
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) 2013 Tony Prisk <linux@prisktech.co.nz>
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/io.h>
9*4882a593Smuzhiyun #include <linux/init.h>
10*4882a593Smuzhiyun #include <linux/pinctrl/pinctrl.h>
11*4882a593Smuzhiyun #include <linux/platform_device.h>
12*4882a593Smuzhiyun #include <linux/slab.h>
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include "pinctrl-wmt.h"
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun /*
17*4882a593Smuzhiyun  * Describe the register offsets within the GPIO memory space
18*4882a593Smuzhiyun  * The dedicated external GPIO's should always be listed in bank 0
19*4882a593Smuzhiyun  * so they are exported in the 0..31 range which is what users
20*4882a593Smuzhiyun  * expect.
21*4882a593Smuzhiyun  *
22*4882a593Smuzhiyun  * Do not reorder these banks as it will change the pin numbering
23*4882a593Smuzhiyun  */
24*4882a593Smuzhiyun static const struct wmt_pinctrl_bank_registers vt8500_banks[] = {
25*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(NO_REG, 0x3C, 0x5C, 0x7C, NO_REG, NO_REG),	/* 0 */
26*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x00, 0x20, 0x40, 0x60, NO_REG, NO_REG),	/* 1 */
27*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x04, 0x24, 0x44, 0x64, NO_REG, NO_REG),	/* 2 */
28*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x08, 0x28, 0x48, 0x68, NO_REG, NO_REG),	/* 3 */
29*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x0C, 0x2C, 0x4C, 0x6C, NO_REG, NO_REG),	/* 4 */
30*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x10, 0x30, 0x50, 0x70, NO_REG, NO_REG),	/* 5 */
31*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x14, 0x34, 0x54, 0x74, NO_REG, NO_REG),	/* 6 */
32*4882a593Smuzhiyun };
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun /* Please keep sorted by bank/bit */
35*4882a593Smuzhiyun #define WMT_PIN_EXTGPIO0	WMT_PIN(0, 0)
36*4882a593Smuzhiyun #define WMT_PIN_EXTGPIO1	WMT_PIN(0, 1)
37*4882a593Smuzhiyun #define WMT_PIN_EXTGPIO2	WMT_PIN(0, 2)
38*4882a593Smuzhiyun #define WMT_PIN_EXTGPIO3	WMT_PIN(0, 3)
39*4882a593Smuzhiyun #define WMT_PIN_EXTGPIO4	WMT_PIN(0, 4)
40*4882a593Smuzhiyun #define WMT_PIN_EXTGPIO5	WMT_PIN(0, 5)
41*4882a593Smuzhiyun #define WMT_PIN_EXTGPIO6	WMT_PIN(0, 6)
42*4882a593Smuzhiyun #define WMT_PIN_EXTGPIO7	WMT_PIN(0, 7)
43*4882a593Smuzhiyun #define WMT_PIN_EXTGPIO8	WMT_PIN(0, 8)
44*4882a593Smuzhiyun #define WMT_PIN_UART0RTS	WMT_PIN(1, 0)
45*4882a593Smuzhiyun #define WMT_PIN_UART0TXD	WMT_PIN(1, 1)
46*4882a593Smuzhiyun #define WMT_PIN_UART0CTS	WMT_PIN(1, 2)
47*4882a593Smuzhiyun #define WMT_PIN_UART0RXD	WMT_PIN(1, 3)
48*4882a593Smuzhiyun #define WMT_PIN_UART1RTS	WMT_PIN(1, 4)
49*4882a593Smuzhiyun #define WMT_PIN_UART1TXD	WMT_PIN(1, 5)
50*4882a593Smuzhiyun #define WMT_PIN_UART1CTS	WMT_PIN(1, 6)
51*4882a593Smuzhiyun #define WMT_PIN_UART1RXD	WMT_PIN(1, 7)
52*4882a593Smuzhiyun #define WMT_PIN_SPI0CLK		WMT_PIN(1, 8)
53*4882a593Smuzhiyun #define WMT_PIN_SPI0SS		WMT_PIN(1, 9)
54*4882a593Smuzhiyun #define WMT_PIN_SPI0MISO	WMT_PIN(1, 10)
55*4882a593Smuzhiyun #define WMT_PIN_SPI0MOSI	WMT_PIN(1, 11)
56*4882a593Smuzhiyun #define WMT_PIN_SPI1CLK		WMT_PIN(1, 12)
57*4882a593Smuzhiyun #define WMT_PIN_SPI1SS		WMT_PIN(1, 13)
58*4882a593Smuzhiyun #define WMT_PIN_SPI1MISO	WMT_PIN(1, 14)
59*4882a593Smuzhiyun #define WMT_PIN_SPI1MOSI	WMT_PIN(1, 15)
60*4882a593Smuzhiyun #define WMT_PIN_SPI2CLK		WMT_PIN(1, 16)
61*4882a593Smuzhiyun #define WMT_PIN_SPI2SS		WMT_PIN(1, 17)
62*4882a593Smuzhiyun #define WMT_PIN_SPI2MISO	WMT_PIN(1, 18)
63*4882a593Smuzhiyun #define WMT_PIN_SPI2MOSI	WMT_PIN(1, 19)
64*4882a593Smuzhiyun #define WMT_PIN_SDDATA0		WMT_PIN(2, 0)
65*4882a593Smuzhiyun #define WMT_PIN_SDDATA1		WMT_PIN(2, 1)
66*4882a593Smuzhiyun #define WMT_PIN_SDDATA2		WMT_PIN(2, 2)
67*4882a593Smuzhiyun #define WMT_PIN_SDDATA3		WMT_PIN(2, 3)
68*4882a593Smuzhiyun #define WMT_PIN_MMCDATA0	WMT_PIN(2, 4)
69*4882a593Smuzhiyun #define WMT_PIN_MMCDATA1	WMT_PIN(2, 5)
70*4882a593Smuzhiyun #define WMT_PIN_MMCDATA2	WMT_PIN(2, 6)
71*4882a593Smuzhiyun #define WMT_PIN_MMCDATA3	WMT_PIN(2, 7)
72*4882a593Smuzhiyun #define WMT_PIN_SDCLK		WMT_PIN(2, 8)
73*4882a593Smuzhiyun #define WMT_PIN_SDWP		WMT_PIN(2, 9)
74*4882a593Smuzhiyun #define WMT_PIN_SDCMD		WMT_PIN(2, 10)
75*4882a593Smuzhiyun #define WMT_PIN_MSDATA0		WMT_PIN(2, 16)
76*4882a593Smuzhiyun #define WMT_PIN_MSDATA1		WMT_PIN(2, 17)
77*4882a593Smuzhiyun #define WMT_PIN_MSDATA2		WMT_PIN(2, 18)
78*4882a593Smuzhiyun #define WMT_PIN_MSDATA3		WMT_PIN(2, 19)
79*4882a593Smuzhiyun #define WMT_PIN_MSCLK		WMT_PIN(2, 20)
80*4882a593Smuzhiyun #define WMT_PIN_MSBS		WMT_PIN(2, 21)
81*4882a593Smuzhiyun #define WMT_PIN_MSINS		WMT_PIN(2, 22)
82*4882a593Smuzhiyun #define WMT_PIN_I2C0SCL		WMT_PIN(2, 24)
83*4882a593Smuzhiyun #define WMT_PIN_I2C0SDA		WMT_PIN(2, 25)
84*4882a593Smuzhiyun #define WMT_PIN_I2C1SCL		WMT_PIN(2, 26)
85*4882a593Smuzhiyun #define WMT_PIN_I2C1SDA		WMT_PIN(2, 27)
86*4882a593Smuzhiyun #define WMT_PIN_MII0RXD0	WMT_PIN(3, 0)
87*4882a593Smuzhiyun #define WMT_PIN_MII0RXD1	WMT_PIN(3, 1)
88*4882a593Smuzhiyun #define WMT_PIN_MII0RXD2	WMT_PIN(3, 2)
89*4882a593Smuzhiyun #define WMT_PIN_MII0RXD3	WMT_PIN(3, 3)
90*4882a593Smuzhiyun #define WMT_PIN_MII0RXCLK	WMT_PIN(3, 4)
91*4882a593Smuzhiyun #define WMT_PIN_MII0RXDV	WMT_PIN(3, 5)
92*4882a593Smuzhiyun #define WMT_PIN_MII0RXERR	WMT_PIN(3, 6)
93*4882a593Smuzhiyun #define WMT_PIN_MII0PHYRST	WMT_PIN(3, 7)
94*4882a593Smuzhiyun #define WMT_PIN_MII0TXD0	WMT_PIN(3, 8)
95*4882a593Smuzhiyun #define WMT_PIN_MII0TXD1	WMT_PIN(3, 9)
96*4882a593Smuzhiyun #define WMT_PIN_MII0TXD2	WMT_PIN(3, 10)
97*4882a593Smuzhiyun #define WMT_PIN_MII0TXD3	WMT_PIN(3, 11)
98*4882a593Smuzhiyun #define WMT_PIN_MII0TXCLK	WMT_PIN(3, 12)
99*4882a593Smuzhiyun #define WMT_PIN_MII0TXEN	WMT_PIN(3, 13)
100*4882a593Smuzhiyun #define WMT_PIN_MII0TXERR	WMT_PIN(3, 14)
101*4882a593Smuzhiyun #define WMT_PIN_MII0PHYPD	WMT_PIN(3, 15)
102*4882a593Smuzhiyun #define WMT_PIN_MII0COL		WMT_PIN(3, 16)
103*4882a593Smuzhiyun #define WMT_PIN_MII0CRS		WMT_PIN(3, 17)
104*4882a593Smuzhiyun #define WMT_PIN_MII0MDIO	WMT_PIN(3, 18)
105*4882a593Smuzhiyun #define WMT_PIN_MII0MDC		WMT_PIN(3, 19)
106*4882a593Smuzhiyun #define WMT_PIN_SEECS		WMT_PIN(3, 20)
107*4882a593Smuzhiyun #define WMT_PIN_SEECK		WMT_PIN(3, 21)
108*4882a593Smuzhiyun #define WMT_PIN_SEEDI		WMT_PIN(3, 22)
109*4882a593Smuzhiyun #define WMT_PIN_SEEDO		WMT_PIN(3, 23)
110*4882a593Smuzhiyun #define WMT_PIN_IDEDREQ0	WMT_PIN(3, 24)
111*4882a593Smuzhiyun #define WMT_PIN_IDEDREQ1	WMT_PIN(3, 25)
112*4882a593Smuzhiyun #define WMT_PIN_IDEIOW		WMT_PIN(3, 26)
113*4882a593Smuzhiyun #define WMT_PIN_IDEIOR		WMT_PIN(3, 27)
114*4882a593Smuzhiyun #define WMT_PIN_IDEDACK		WMT_PIN(3, 28)
115*4882a593Smuzhiyun #define WMT_PIN_IDEIORDY	WMT_PIN(3, 29)
116*4882a593Smuzhiyun #define WMT_PIN_IDEINTRQ	WMT_PIN(3, 30)
117*4882a593Smuzhiyun #define WMT_PIN_VDIN0		WMT_PIN(4, 0)
118*4882a593Smuzhiyun #define WMT_PIN_VDIN1		WMT_PIN(4, 1)
119*4882a593Smuzhiyun #define WMT_PIN_VDIN2		WMT_PIN(4, 2)
120*4882a593Smuzhiyun #define WMT_PIN_VDIN3		WMT_PIN(4, 3)
121*4882a593Smuzhiyun #define WMT_PIN_VDIN4		WMT_PIN(4, 4)
122*4882a593Smuzhiyun #define WMT_PIN_VDIN5		WMT_PIN(4, 5)
123*4882a593Smuzhiyun #define WMT_PIN_VDIN6		WMT_PIN(4, 6)
124*4882a593Smuzhiyun #define WMT_PIN_VDIN7		WMT_PIN(4, 7)
125*4882a593Smuzhiyun #define WMT_PIN_VDOUT0		WMT_PIN(4, 8)
126*4882a593Smuzhiyun #define WMT_PIN_VDOUT1		WMT_PIN(4, 9)
127*4882a593Smuzhiyun #define WMT_PIN_VDOUT2		WMT_PIN(4, 10)
128*4882a593Smuzhiyun #define WMT_PIN_VDOUT3		WMT_PIN(4, 11)
129*4882a593Smuzhiyun #define WMT_PIN_VDOUT4		WMT_PIN(4, 12)
130*4882a593Smuzhiyun #define WMT_PIN_VDOUT5		WMT_PIN(4, 13)
131*4882a593Smuzhiyun #define WMT_PIN_NANDCLE0	WMT_PIN(4, 14)
132*4882a593Smuzhiyun #define WMT_PIN_NANDCLE1	WMT_PIN(4, 15)
133*4882a593Smuzhiyun #define WMT_PIN_VDOUT6_7	WMT_PIN(4, 16)
134*4882a593Smuzhiyun #define WMT_PIN_VHSYNC		WMT_PIN(4, 17)
135*4882a593Smuzhiyun #define WMT_PIN_VVSYNC		WMT_PIN(4, 18)
136*4882a593Smuzhiyun #define WMT_PIN_TSDIN0		WMT_PIN(5, 8)
137*4882a593Smuzhiyun #define WMT_PIN_TSDIN1		WMT_PIN(5, 9)
138*4882a593Smuzhiyun #define WMT_PIN_TSDIN2		WMT_PIN(5, 10)
139*4882a593Smuzhiyun #define WMT_PIN_TSDIN3		WMT_PIN(5, 11)
140*4882a593Smuzhiyun #define WMT_PIN_TSDIN4		WMT_PIN(5, 12)
141*4882a593Smuzhiyun #define WMT_PIN_TSDIN5		WMT_PIN(5, 13)
142*4882a593Smuzhiyun #define WMT_PIN_TSDIN6		WMT_PIN(5, 14)
143*4882a593Smuzhiyun #define WMT_PIN_TSDIN7		WMT_PIN(5, 15)
144*4882a593Smuzhiyun #define WMT_PIN_TSSYNC		WMT_PIN(5, 16)
145*4882a593Smuzhiyun #define WMT_PIN_TSVALID		WMT_PIN(5, 17)
146*4882a593Smuzhiyun #define WMT_PIN_TSCLK		WMT_PIN(5, 18)
147*4882a593Smuzhiyun #define WMT_PIN_LCDD0		WMT_PIN(6, 0)
148*4882a593Smuzhiyun #define WMT_PIN_LCDD1		WMT_PIN(6, 1)
149*4882a593Smuzhiyun #define WMT_PIN_LCDD2		WMT_PIN(6, 2)
150*4882a593Smuzhiyun #define WMT_PIN_LCDD3		WMT_PIN(6, 3)
151*4882a593Smuzhiyun #define WMT_PIN_LCDD4		WMT_PIN(6, 4)
152*4882a593Smuzhiyun #define WMT_PIN_LCDD5		WMT_PIN(6, 5)
153*4882a593Smuzhiyun #define WMT_PIN_LCDD6		WMT_PIN(6, 6)
154*4882a593Smuzhiyun #define WMT_PIN_LCDD7		WMT_PIN(6, 7)
155*4882a593Smuzhiyun #define WMT_PIN_LCDD8		WMT_PIN(6, 8)
156*4882a593Smuzhiyun #define WMT_PIN_LCDD9		WMT_PIN(6, 9)
157*4882a593Smuzhiyun #define WMT_PIN_LCDD10		WMT_PIN(6, 10)
158*4882a593Smuzhiyun #define WMT_PIN_LCDD11		WMT_PIN(6, 11)
159*4882a593Smuzhiyun #define WMT_PIN_LCDD12		WMT_PIN(6, 12)
160*4882a593Smuzhiyun #define WMT_PIN_LCDD13		WMT_PIN(6, 13)
161*4882a593Smuzhiyun #define WMT_PIN_LCDD14		WMT_PIN(6, 14)
162*4882a593Smuzhiyun #define WMT_PIN_LCDD15		WMT_PIN(6, 15)
163*4882a593Smuzhiyun #define WMT_PIN_LCDD16		WMT_PIN(6, 16)
164*4882a593Smuzhiyun #define WMT_PIN_LCDD17		WMT_PIN(6, 17)
165*4882a593Smuzhiyun #define WMT_PIN_LCDCLK		WMT_PIN(6, 18)
166*4882a593Smuzhiyun #define WMT_PIN_LCDDEN		WMT_PIN(6, 19)
167*4882a593Smuzhiyun #define WMT_PIN_LCDLINE		WMT_PIN(6, 20)
168*4882a593Smuzhiyun #define WMT_PIN_LCDFRM		WMT_PIN(6, 21)
169*4882a593Smuzhiyun #define WMT_PIN_LCDBIAS		WMT_PIN(6, 22)
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun static const struct pinctrl_pin_desc vt8500_pins[] = {
172*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_EXTGPIO0, "extgpio0"),
173*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_EXTGPIO1, "extgpio1"),
174*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_EXTGPIO2, "extgpio2"),
175*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_EXTGPIO3, "extgpio3"),
176*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_EXTGPIO4, "extgpio4"),
177*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_EXTGPIO5, "extgpio5"),
178*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_EXTGPIO6, "extgpio6"),
179*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_EXTGPIO7, "extgpio7"),
180*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_EXTGPIO8, "extgpio8"),
181*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART0RTS, "uart0_rts"),
182*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART0TXD, "uart0_txd"),
183*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART0CTS, "uart0_cts"),
184*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART0RXD, "uart0_rxd"),
185*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART1RTS, "uart1_rts"),
186*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART1TXD, "uart1_txd"),
187*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART1CTS, "uart1_cts"),
188*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART1RXD, "uart1_rxd"),
189*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SPI0CLK, "spi0_clk"),
190*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SPI0SS, "spi0_ss"),
191*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SPI0MISO, "spi0_miso"),
192*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SPI0MOSI, "spi0_mosi"),
193*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SPI1CLK, "spi1_clk"),
194*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SPI1SS, "spi1_ss"),
195*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SPI1MISO, "spi1_miso"),
196*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SPI1MOSI, "spi1_mosi"),
197*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SPI2CLK, "spi2_clk"),
198*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SPI2SS, "spi2_ss"),
199*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SPI2MISO, "spi2_miso"),
200*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SPI2MOSI, "spi2_mosi"),
201*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SDDATA0, "sd_data0"),
202*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SDDATA1, "sd_data1"),
203*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SDDATA2, "sd_data2"),
204*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SDDATA3, "sd_data3"),
205*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MMCDATA0, "mmc_data0"),
206*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MMCDATA1, "mmc_data1"),
207*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MMCDATA2, "mmc_data2"),
208*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MMCDATA3, "mmc_data3"),
209*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SDCLK, "sd_clk"),
210*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SDWP, "sd_wp"),
211*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SDCMD, "sd_cmd"),
212*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MSDATA0, "ms_data0"),
213*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MSDATA1, "ms_data1"),
214*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MSDATA2, "ms_data2"),
215*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MSDATA3, "ms_data3"),
216*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MSCLK, "ms_clk"),
217*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MSBS, "ms_bs"),
218*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MSINS, "ms_ins"),
219*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_I2C0SCL, "i2c0_scl"),
220*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_I2C0SDA, "i2c0_sda"),
221*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_I2C1SCL, "i2c1_scl"),
222*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_I2C1SDA, "i2c1_sda"),
223*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MII0RXD0, "mii0_rxd0"),
224*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MII0RXD1, "mii0_rxd1"),
225*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MII0RXD2, "mii0_rxd2"),
226*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MII0RXD3, "mii0_rxd3"),
227*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MII0RXCLK, "mii0_rxclk"),
228*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MII0RXDV, "mii0_rxdv"),
229*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MII0RXERR, "mii0_rxerr"),
230*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MII0PHYRST, "mii0_phyrst"),
231*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MII0TXD0, "mii0_txd0"),
232*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MII0TXD1, "mii0_txd1"),
233*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MII0TXD2, "mii0_txd2"),
234*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MII0TXD3, "mii0_txd3"),
235*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MII0TXCLK, "mii0_txclk"),
236*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MII0TXEN, "mii0_txen"),
237*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MII0TXERR, "mii0_txerr"),
238*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MII0PHYPD, "mii0_phypd"),
239*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MII0COL, "mii0_col"),
240*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MII0CRS, "mii0_crs"),
241*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MII0MDIO, "mii0_mdio"),
242*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_MII0MDC, "mii0_mdc"),
243*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SEECS, "see_cs"),
244*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SEECK, "see_ck"),
245*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SEEDI, "see_di"),
246*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SEEDO, "see_do"),
247*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_IDEDREQ0, "ide_dreq0"),
248*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_IDEDREQ1, "ide_dreq1"),
249*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_IDEIOW, "ide_iow"),
250*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_IDEIOR, "ide_ior"),
251*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_IDEDACK, "ide_dack"),
252*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_IDEIORDY, "ide_iordy"),
253*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_IDEINTRQ, "ide_intrq"),
254*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDIN0, "vdin0"),
255*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDIN1, "vdin1"),
256*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDIN2, "vdin2"),
257*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDIN3, "vdin3"),
258*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDIN4, "vdin4"),
259*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDIN5, "vdin5"),
260*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDIN6, "vdin6"),
261*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDIN7, "vdin7"),
262*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT0, "vdout0"),
263*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT1, "vdout1"),
264*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT2, "vdout2"),
265*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT3, "vdout3"),
266*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT4, "vdout4"),
267*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT5, "vdout5"),
268*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NANDCLE0, "nand_cle0"),
269*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_NANDCLE1, "nand_cle1"),
270*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT6_7, "vdout6_7"),
271*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VHSYNC, "vhsync"),
272*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VVSYNC, "vvsync"),
273*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_TSDIN0, "tsdin0"),
274*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_TSDIN1, "tsdin1"),
275*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_TSDIN2, "tsdin2"),
276*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_TSDIN3, "tsdin3"),
277*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_TSDIN4, "tsdin4"),
278*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_TSDIN5, "tsdin5"),
279*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_TSDIN6, "tsdin6"),
280*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_TSDIN7, "tsdin7"),
281*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_TSSYNC, "tssync"),
282*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_TSVALID, "tsvalid"),
283*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_TSCLK, "tsclk"),
284*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_LCDD0, "lcd_d0"),
285*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_LCDD1, "lcd_d1"),
286*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_LCDD2, "lcd_d2"),
287*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_LCDD3, "lcd_d3"),
288*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_LCDD4, "lcd_d4"),
289*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_LCDD5, "lcd_d5"),
290*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_LCDD6, "lcd_d6"),
291*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_LCDD7, "lcd_d7"),
292*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_LCDD8, "lcd_d8"),
293*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_LCDD9, "lcd_d9"),
294*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_LCDD10, "lcd_d10"),
295*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_LCDD11, "lcd_d11"),
296*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_LCDD12, "lcd_d12"),
297*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_LCDD13, "lcd_d13"),
298*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_LCDD14, "lcd_d14"),
299*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_LCDD15, "lcd_d15"),
300*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_LCDD16, "lcd_d16"),
301*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_LCDD17, "lcd_d17"),
302*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_LCDCLK, "lcd_clk"),
303*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_LCDDEN, "lcd_den"),
304*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_LCDLINE, "lcd_line"),
305*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_LCDFRM, "lcd_frm"),
306*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_LCDBIAS, "lcd_bias"),
307*4882a593Smuzhiyun };
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun /* Order of these names must match the above list */
310*4882a593Smuzhiyun static const char * const vt8500_groups[] = {
311*4882a593Smuzhiyun 	"extgpio0",
312*4882a593Smuzhiyun 	"extgpio1",
313*4882a593Smuzhiyun 	"extgpio2",
314*4882a593Smuzhiyun 	"extgpio3",
315*4882a593Smuzhiyun 	"extgpio4",
316*4882a593Smuzhiyun 	"extgpio5",
317*4882a593Smuzhiyun 	"extgpio6",
318*4882a593Smuzhiyun 	"extgpio7",
319*4882a593Smuzhiyun 	"extgpio8",
320*4882a593Smuzhiyun 	"uart0_rts",
321*4882a593Smuzhiyun 	"uart0_txd",
322*4882a593Smuzhiyun 	"uart0_cts",
323*4882a593Smuzhiyun 	"uart0_rxd",
324*4882a593Smuzhiyun 	"uart1_rts",
325*4882a593Smuzhiyun 	"uart1_txd",
326*4882a593Smuzhiyun 	"uart1_cts",
327*4882a593Smuzhiyun 	"uart1_rxd",
328*4882a593Smuzhiyun 	"spi0_clk",
329*4882a593Smuzhiyun 	"spi0_ss",
330*4882a593Smuzhiyun 	"spi0_miso",
331*4882a593Smuzhiyun 	"spi0_mosi",
332*4882a593Smuzhiyun 	"spi1_clk",
333*4882a593Smuzhiyun 	"spi1_ss",
334*4882a593Smuzhiyun 	"spi1_miso",
335*4882a593Smuzhiyun 	"spi1_mosi",
336*4882a593Smuzhiyun 	"spi2_clk",
337*4882a593Smuzhiyun 	"spi2_ss",
338*4882a593Smuzhiyun 	"spi2_miso",
339*4882a593Smuzhiyun 	"spi2_mosi",
340*4882a593Smuzhiyun 	"sd_data0",
341*4882a593Smuzhiyun 	"sd_data1",
342*4882a593Smuzhiyun 	"sd_data2",
343*4882a593Smuzhiyun 	"sd_data3",
344*4882a593Smuzhiyun 	"mmc_data0",
345*4882a593Smuzhiyun 	"mmc_data1",
346*4882a593Smuzhiyun 	"mmc_data2",
347*4882a593Smuzhiyun 	"mmc_data3",
348*4882a593Smuzhiyun 	"sd_clk",
349*4882a593Smuzhiyun 	"sd_wp",
350*4882a593Smuzhiyun 	"sd_cmd",
351*4882a593Smuzhiyun 	"ms_data0",
352*4882a593Smuzhiyun 	"ms_data1",
353*4882a593Smuzhiyun 	"ms_data2",
354*4882a593Smuzhiyun 	"ms_data3",
355*4882a593Smuzhiyun 	"ms_clk",
356*4882a593Smuzhiyun 	"ms_bs",
357*4882a593Smuzhiyun 	"ms_ins",
358*4882a593Smuzhiyun 	"i2c0_scl",
359*4882a593Smuzhiyun 	"i2c0_sda",
360*4882a593Smuzhiyun 	"i2c1_scl",
361*4882a593Smuzhiyun 	"i2c1_sda",
362*4882a593Smuzhiyun 	"mii0_rxd0",
363*4882a593Smuzhiyun 	"mii0_rxd1",
364*4882a593Smuzhiyun 	"mii0_rxd2",
365*4882a593Smuzhiyun 	"mii0_rxd3",
366*4882a593Smuzhiyun 	"mii0_rxclk",
367*4882a593Smuzhiyun 	"mii0_rxdv",
368*4882a593Smuzhiyun 	"mii0_rxerr",
369*4882a593Smuzhiyun 	"mii0_phyrst",
370*4882a593Smuzhiyun 	"mii0_txd0",
371*4882a593Smuzhiyun 	"mii0_txd1",
372*4882a593Smuzhiyun 	"mii0_txd2",
373*4882a593Smuzhiyun 	"mii0_txd3",
374*4882a593Smuzhiyun 	"mii0_txclk",
375*4882a593Smuzhiyun 	"mii0_txen",
376*4882a593Smuzhiyun 	"mii0_txerr",
377*4882a593Smuzhiyun 	"mii0_phypd",
378*4882a593Smuzhiyun 	"mii0_col",
379*4882a593Smuzhiyun 	"mii0_crs",
380*4882a593Smuzhiyun 	"mii0_mdio",
381*4882a593Smuzhiyun 	"mii0_mdc",
382*4882a593Smuzhiyun 	"see_cs",
383*4882a593Smuzhiyun 	"see_ck",
384*4882a593Smuzhiyun 	"see_di",
385*4882a593Smuzhiyun 	"see_do",
386*4882a593Smuzhiyun 	"ide_dreq0",
387*4882a593Smuzhiyun 	"ide_dreq1",
388*4882a593Smuzhiyun 	"ide_iow",
389*4882a593Smuzhiyun 	"ide_ior",
390*4882a593Smuzhiyun 	"ide_dack",
391*4882a593Smuzhiyun 	"ide_iordy",
392*4882a593Smuzhiyun 	"ide_intrq",
393*4882a593Smuzhiyun 	"vdin0",
394*4882a593Smuzhiyun 	"vdin1",
395*4882a593Smuzhiyun 	"vdin2",
396*4882a593Smuzhiyun 	"vdin3",
397*4882a593Smuzhiyun 	"vdin4",
398*4882a593Smuzhiyun 	"vdin5",
399*4882a593Smuzhiyun 	"vdin6",
400*4882a593Smuzhiyun 	"vdin7",
401*4882a593Smuzhiyun 	"vdout0",
402*4882a593Smuzhiyun 	"vdout1",
403*4882a593Smuzhiyun 	"vdout2",
404*4882a593Smuzhiyun 	"vdout3",
405*4882a593Smuzhiyun 	"vdout4",
406*4882a593Smuzhiyun 	"vdout5",
407*4882a593Smuzhiyun 	"nand_cle0",
408*4882a593Smuzhiyun 	"nand_cle1",
409*4882a593Smuzhiyun 	"vdout6_7",
410*4882a593Smuzhiyun 	"vhsync",
411*4882a593Smuzhiyun 	"vvsync",
412*4882a593Smuzhiyun 	"tsdin0",
413*4882a593Smuzhiyun 	"tsdin1",
414*4882a593Smuzhiyun 	"tsdin2",
415*4882a593Smuzhiyun 	"tsdin3",
416*4882a593Smuzhiyun 	"tsdin4",
417*4882a593Smuzhiyun 	"tsdin5",
418*4882a593Smuzhiyun 	"tsdin6",
419*4882a593Smuzhiyun 	"tsdin7",
420*4882a593Smuzhiyun 	"tssync",
421*4882a593Smuzhiyun 	"tsvalid",
422*4882a593Smuzhiyun 	"tsclk",
423*4882a593Smuzhiyun 	"lcd_d0",
424*4882a593Smuzhiyun 	"lcd_d1",
425*4882a593Smuzhiyun 	"lcd_d2",
426*4882a593Smuzhiyun 	"lcd_d3",
427*4882a593Smuzhiyun 	"lcd_d4",
428*4882a593Smuzhiyun 	"lcd_d5",
429*4882a593Smuzhiyun 	"lcd_d6",
430*4882a593Smuzhiyun 	"lcd_d7",
431*4882a593Smuzhiyun 	"lcd_d8",
432*4882a593Smuzhiyun 	"lcd_d9",
433*4882a593Smuzhiyun 	"lcd_d10",
434*4882a593Smuzhiyun 	"lcd_d11",
435*4882a593Smuzhiyun 	"lcd_d12",
436*4882a593Smuzhiyun 	"lcd_d13",
437*4882a593Smuzhiyun 	"lcd_d14",
438*4882a593Smuzhiyun 	"lcd_d15",
439*4882a593Smuzhiyun 	"lcd_d16",
440*4882a593Smuzhiyun 	"lcd_d17",
441*4882a593Smuzhiyun 	"lcd_clk",
442*4882a593Smuzhiyun 	"lcd_den",
443*4882a593Smuzhiyun 	"lcd_line",
444*4882a593Smuzhiyun 	"lcd_frm",
445*4882a593Smuzhiyun 	"lcd_bias",
446*4882a593Smuzhiyun };
447*4882a593Smuzhiyun 
vt8500_pinctrl_probe(struct platform_device * pdev)448*4882a593Smuzhiyun static int vt8500_pinctrl_probe(struct platform_device *pdev)
449*4882a593Smuzhiyun {
450*4882a593Smuzhiyun 	struct wmt_pinctrl_data *data;
451*4882a593Smuzhiyun 
452*4882a593Smuzhiyun 	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
453*4882a593Smuzhiyun 	if (!data)
454*4882a593Smuzhiyun 		return -ENOMEM;
455*4882a593Smuzhiyun 
456*4882a593Smuzhiyun 	data->banks = vt8500_banks;
457*4882a593Smuzhiyun 	data->nbanks = ARRAY_SIZE(vt8500_banks);
458*4882a593Smuzhiyun 	data->pins = vt8500_pins;
459*4882a593Smuzhiyun 	data->npins = ARRAY_SIZE(vt8500_pins);
460*4882a593Smuzhiyun 	data->groups = vt8500_groups;
461*4882a593Smuzhiyun 	data->ngroups = ARRAY_SIZE(vt8500_groups);
462*4882a593Smuzhiyun 
463*4882a593Smuzhiyun 	return wmt_pinctrl_probe(pdev, data);
464*4882a593Smuzhiyun }
465*4882a593Smuzhiyun 
466*4882a593Smuzhiyun static const struct of_device_id wmt_pinctrl_of_match[] = {
467*4882a593Smuzhiyun 	{ .compatible = "via,vt8500-pinctrl" },
468*4882a593Smuzhiyun 	{ /* sentinel */ },
469*4882a593Smuzhiyun };
470*4882a593Smuzhiyun 
471*4882a593Smuzhiyun static struct platform_driver wmt_pinctrl_driver = {
472*4882a593Smuzhiyun 	.probe	= vt8500_pinctrl_probe,
473*4882a593Smuzhiyun 	.driver = {
474*4882a593Smuzhiyun 		.name	= "pinctrl-vt8500",
475*4882a593Smuzhiyun 		.of_match_table	= wmt_pinctrl_of_match,
476*4882a593Smuzhiyun 		.suppress_bind_attrs = true,
477*4882a593Smuzhiyun 	},
478*4882a593Smuzhiyun };
479*4882a593Smuzhiyun builtin_platform_driver(wmt_pinctrl_driver);
480