xref: /OK3568_Linux_fs/kernel/drivers/pinctrl/visconti/pinctrl-common.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (c) 2020 TOSHIBA CORPORATION
4*4882a593Smuzhiyun  * Copyright (c) 2020 Toshiba Electronic Devices & Storage Corporation
5*4882a593Smuzhiyun  * Copyright (c) 2020 Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #ifndef __VISCONTI_PINCTRL_COMMON_H__
9*4882a593Smuzhiyun #define __VISCONTI_PINCTRL_COMMON_H__
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun struct pinctrl_pin_desc;
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun /* PIN */
14*4882a593Smuzhiyun #define VISCONTI_PINS(pins_name, ...)  \
15*4882a593Smuzhiyun 	static const unsigned int pins_name ## _pins[] = { __VA_ARGS__ }
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun struct visconti_desc_pin {
18*4882a593Smuzhiyun 	struct pinctrl_pin_desc pin;
19*4882a593Smuzhiyun 	unsigned int dsel_offset;
20*4882a593Smuzhiyun 	unsigned int dsel_shift;
21*4882a593Smuzhiyun 	unsigned int pude_offset;
22*4882a593Smuzhiyun 	unsigned int pudsel_offset;
23*4882a593Smuzhiyun 	unsigned int pud_shift;
24*4882a593Smuzhiyun };
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #define VISCONTI_PIN(_pin, dsel, d_sh, pude, pudsel, p_sh)	\
27*4882a593Smuzhiyun {								\
28*4882a593Smuzhiyun 	.pin = _pin,						\
29*4882a593Smuzhiyun 	.dsel_offset = dsel,					\
30*4882a593Smuzhiyun 	.dsel_shift = d_sh,					\
31*4882a593Smuzhiyun 	.pude_offset = pude,					\
32*4882a593Smuzhiyun 	.pudsel_offset = pudsel,				\
33*4882a593Smuzhiyun 	.pud_shift = p_sh,					\
34*4882a593Smuzhiyun }
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun /* Group */
37*4882a593Smuzhiyun #define VISCONTI_GROUPS(groups_name, ...)	\
38*4882a593Smuzhiyun 	static const char * const groups_name ## _grps[] = { __VA_ARGS__ }
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun struct visconti_mux {
41*4882a593Smuzhiyun 	unsigned int offset;
42*4882a593Smuzhiyun 	unsigned int mask;
43*4882a593Smuzhiyun 	unsigned int val;
44*4882a593Smuzhiyun };
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun struct visconti_pin_group {
47*4882a593Smuzhiyun 	const char *name;
48*4882a593Smuzhiyun 	const unsigned int *pins;
49*4882a593Smuzhiyun 	unsigned int nr_pins;
50*4882a593Smuzhiyun 	struct visconti_mux mux;
51*4882a593Smuzhiyun };
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun #define VISCONTI_PIN_GROUP(group_name, off, msk, v)	\
54*4882a593Smuzhiyun {							\
55*4882a593Smuzhiyun 	.name = __stringify(group_name) "_grp",		\
56*4882a593Smuzhiyun 	.pins = group_name ## _pins,			\
57*4882a593Smuzhiyun 	.nr_pins = ARRAY_SIZE(group_name ## _pins),	\
58*4882a593Smuzhiyun 	.mux = {					\
59*4882a593Smuzhiyun 		.offset = off,				\
60*4882a593Smuzhiyun 		.mask = msk,				\
61*4882a593Smuzhiyun 		.val = v,				\
62*4882a593Smuzhiyun 	}						\
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun /* MUX */
66*4882a593Smuzhiyun struct visconti_pin_function {
67*4882a593Smuzhiyun 	const char *name;
68*4882a593Smuzhiyun 	const char * const *groups;
69*4882a593Smuzhiyun 	unsigned int nr_groups;
70*4882a593Smuzhiyun };
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun #define VISCONTI_PIN_FUNCTION(func)		\
73*4882a593Smuzhiyun {						\
74*4882a593Smuzhiyun 	.name = #func,				\
75*4882a593Smuzhiyun 	.groups = func ## _grps,		\
76*4882a593Smuzhiyun 	.nr_groups = ARRAY_SIZE(func ## _grps),	\
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun /* chip dependent data */
80*4882a593Smuzhiyun struct visconti_pinctrl_devdata {
81*4882a593Smuzhiyun 	const struct visconti_desc_pin *pins;
82*4882a593Smuzhiyun 	unsigned int nr_pins;
83*4882a593Smuzhiyun 	const struct visconti_pin_group *groups;
84*4882a593Smuzhiyun 	unsigned int nr_groups;
85*4882a593Smuzhiyun 	const struct visconti_pin_function *functions;
86*4882a593Smuzhiyun 	unsigned int nr_functions;
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 	const struct visconti_mux *gpio_mux;
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun 	void (*unlock)(void __iomem *base);
91*4882a593Smuzhiyun };
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun int visconti_pinctrl_probe(struct platform_device *pdev,
94*4882a593Smuzhiyun 			   const struct visconti_pinctrl_devdata *devdata);
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun #endif /* __VISCONTI_PINCTRL_COMMON_H__ */
97