xref: /OK3568_Linux_fs/kernel/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t-r.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Allwinner A83T SoCs special pins pinctrl driver.
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Copyright (C) 2017 Chen-Yu Tsai
5*4882a593Smuzhiyun  * Chen-Yu Tsai <wens@csie.org>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Based on pinctrl-sun50i-a64-r.c
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * Copyright (C) 2016 Icenowy Zheng
10*4882a593Smuzhiyun  * Icenowy Zheng <icenowy@aosc.xyz>
11*4882a593Smuzhiyun  *
12*4882a593Smuzhiyun  * Copyright (C) 2014 Chen-Yu Tsai
13*4882a593Smuzhiyun  * Chen-Yu Tsai <wens@csie.org>
14*4882a593Smuzhiyun  *
15*4882a593Smuzhiyun  * Copyright (C) 2014 Boris Brezillon
16*4882a593Smuzhiyun  * Boris Brezillon <boris.brezillon@free-electrons.com>
17*4882a593Smuzhiyun  *
18*4882a593Smuzhiyun  * Copyright (C) 2014 Maxime Ripard
19*4882a593Smuzhiyun  * Maxime Ripard <maxime.ripard@free-electrons.com>
20*4882a593Smuzhiyun  *
21*4882a593Smuzhiyun  * This file is licensed under the terms of the GNU General Public
22*4882a593Smuzhiyun  * License version 2.  This program is licensed "as is" without any
23*4882a593Smuzhiyun  * warranty of any kind, whether express or implied.
24*4882a593Smuzhiyun  */
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #include <linux/of.h>
27*4882a593Smuzhiyun #include <linux/of_device.h>
28*4882a593Smuzhiyun #include <linux/pinctrl/pinctrl.h>
29*4882a593Smuzhiyun #include <linux/platform_device.h>
30*4882a593Smuzhiyun #include <linux/reset.h>
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #include "pinctrl-sunxi.h"
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun static const struct sunxi_desc_pin sun8i_a83t_r_pins[] = {
35*4882a593Smuzhiyun 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0),
36*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x0, "gpio_in"),
37*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x1, "gpio_out"),
38*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x2, "s_rsb"),		/* SCK */
39*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x3, "s_i2c"),		/* SCK */
40*4882a593Smuzhiyun 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)),	/* PL_EINT0 */
41*4882a593Smuzhiyun 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1),
42*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x0, "gpio_in"),
43*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x1, "gpio_out"),
44*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x2, "s_rsb"),		/* SDA */
45*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x3, "s_i2c"),		/* SDA */
46*4882a593Smuzhiyun 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)),	/* PL_EINT1 */
47*4882a593Smuzhiyun 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2),
48*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x0, "gpio_in"),
49*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x1, "gpio_out"),
50*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x2, "s_uart"),	/* TX */
51*4882a593Smuzhiyun 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)),	/* PL_EINT2 */
52*4882a593Smuzhiyun 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3),
53*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x0, "gpio_in"),
54*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x1, "gpio_out"),
55*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x2, "s_uart"),	/* RX */
56*4882a593Smuzhiyun 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)),	/* PL_EINT3 */
57*4882a593Smuzhiyun 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4),
58*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x0, "gpio_in"),
59*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x1, "gpio_out"),
60*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x2, "s_jtag"),	/* MS */
61*4882a593Smuzhiyun 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)),	/* PL_EINT4 */
62*4882a593Smuzhiyun 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5),
63*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x0, "gpio_in"),
64*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x1, "gpio_out"),
65*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x2, "s_jtag"),	/* CK */
66*4882a593Smuzhiyun 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)),	/* PL_EINT5 */
67*4882a593Smuzhiyun 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6),
68*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x0, "gpio_in"),
69*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x1, "gpio_out"),
70*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x2, "s_jtag"),	/* DO */
71*4882a593Smuzhiyun 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)),	/* PL_EINT6 */
72*4882a593Smuzhiyun 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7),
73*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x0, "gpio_in"),
74*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x1, "gpio_out"),
75*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x2, "s_jtag"),	/* DI */
76*4882a593Smuzhiyun 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)),	/* PL_EINT7 */
77*4882a593Smuzhiyun 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8),
78*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x0, "gpio_in"),
79*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x1, "gpio_out"),
80*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x2, "s_i2c"),		/* SCK */
81*4882a593Smuzhiyun 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)),	/* PL_EINT8 */
82*4882a593Smuzhiyun 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 9),
83*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x0, "gpio_in"),
84*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x1, "gpio_out"),
85*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x2, "s_i2c"),		/* SDA */
86*4882a593Smuzhiyun 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)),	/* PL_EINT9 */
87*4882a593Smuzhiyun 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 10),
88*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x0, "gpio_in"),
89*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x1, "gpio_out"),
90*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x2, "s_pwm"),
91*4882a593Smuzhiyun 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)),	/* PL_EINT10 */
92*4882a593Smuzhiyun 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 11),
93*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x0, "gpio_in"),
94*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x1, "gpio_out"),
95*4882a593Smuzhiyun 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)),	/* PL_EINT11 */
96*4882a593Smuzhiyun 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 12),
97*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x0, "gpio_in"),
98*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x1, "gpio_out"),
99*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x2, "s_cir_rx"),
100*4882a593Smuzhiyun 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 12)),	/* PL_EINT12 */
101*4882a593Smuzhiyun };
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun static const struct sunxi_pinctrl_desc sun8i_a83t_r_pinctrl_data = {
104*4882a593Smuzhiyun 	.pins = sun8i_a83t_r_pins,
105*4882a593Smuzhiyun 	.npins = ARRAY_SIZE(sun8i_a83t_r_pins),
106*4882a593Smuzhiyun 	.pin_base = PL_BASE,
107*4882a593Smuzhiyun 	.irq_banks = 1,
108*4882a593Smuzhiyun };
109*4882a593Smuzhiyun 
sun8i_a83t_r_pinctrl_probe(struct platform_device * pdev)110*4882a593Smuzhiyun static int sun8i_a83t_r_pinctrl_probe(struct platform_device *pdev)
111*4882a593Smuzhiyun {
112*4882a593Smuzhiyun 	return sunxi_pinctrl_init(pdev,
113*4882a593Smuzhiyun 				  &sun8i_a83t_r_pinctrl_data);
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun static const struct of_device_id sun8i_a83t_r_pinctrl_match[] = {
117*4882a593Smuzhiyun 	{ .compatible = "allwinner,sun8i-a83t-r-pinctrl", },
118*4882a593Smuzhiyun 	{}
119*4882a593Smuzhiyun };
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun static struct platform_driver sun8i_a83t_r_pinctrl_driver = {
122*4882a593Smuzhiyun 	.probe	= sun8i_a83t_r_pinctrl_probe,
123*4882a593Smuzhiyun 	.driver	= {
124*4882a593Smuzhiyun 		.name		= "sun8i-a83t-r-pinctrl",
125*4882a593Smuzhiyun 		.of_match_table	= sun8i_a83t_r_pinctrl_match,
126*4882a593Smuzhiyun 	},
127*4882a593Smuzhiyun };
128*4882a593Smuzhiyun builtin_platform_driver(sun8i_a83t_r_pinctrl_driver);
129