xref: /OK3568_Linux_fs/kernel/drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Allwinner A23 SoCs special pins pinctrl driver.
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Copyright (C) 2014 Chen-Yu Tsai
5*4882a593Smuzhiyun  * Chen-Yu Tsai <wens@csie.org>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Copyright (C) 2014 Boris Brezillon
8*4882a593Smuzhiyun  * Boris Brezillon <boris.brezillon@free-electrons.com>
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  * Copyright (C) 2014 Maxime Ripard
11*4882a593Smuzhiyun  * Maxime Ripard <maxime.ripard@free-electrons.com>
12*4882a593Smuzhiyun  *
13*4882a593Smuzhiyun  * This file is licensed under the terms of the GNU General Public
14*4882a593Smuzhiyun  * License version 2.  This program is licensed "as is" without any
15*4882a593Smuzhiyun  * warranty of any kind, whether express or implied.
16*4882a593Smuzhiyun  */
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #include <linux/init.h>
19*4882a593Smuzhiyun #include <linux/platform_device.h>
20*4882a593Smuzhiyun #include <linux/of.h>
21*4882a593Smuzhiyun #include <linux/of_device.h>
22*4882a593Smuzhiyun #include <linux/pinctrl/pinctrl.h>
23*4882a593Smuzhiyun #include <linux/reset.h>
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #include "pinctrl-sunxi.h"
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun static const struct sunxi_desc_pin sun8i_a23_r_pins[] = {
28*4882a593Smuzhiyun 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0),
29*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x0, "gpio_in"),
30*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x1, "gpio_out"),
31*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x2, "s_rsb"),		/* SCK */
32*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x3, "s_i2c"),		/* SCK */
33*4882a593Smuzhiyun 		  SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 0)),	/* PL_EINT0 */
34*4882a593Smuzhiyun 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1),
35*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x0, "gpio_in"),
36*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x1, "gpio_out"),
37*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x2, "s_rsb"),		/* SDA */
38*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x3, "s_i2c"),		/* SDA */
39*4882a593Smuzhiyun 		  SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 1)),	/* PL_EINT1 */
40*4882a593Smuzhiyun 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2),
41*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x0, "gpio_in"),
42*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x1, "gpio_out"),
43*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x2, "s_uart"),	/* TX */
44*4882a593Smuzhiyun 		  SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 2)),	/* PL_EINT2 */
45*4882a593Smuzhiyun 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3),
46*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x0, "gpio_in"),
47*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x1, "gpio_out"),
48*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x2, "s_uart"),	/* RX */
49*4882a593Smuzhiyun 		  SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 3)),	/* PL_EINT3 */
50*4882a593Smuzhiyun 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4),
51*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x0, "gpio_in"),
52*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x1, "gpio_out"),
53*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x3, "s_jtag"),	/* MS */
54*4882a593Smuzhiyun 		  SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 4)),	/* PL_EINT4 */
55*4882a593Smuzhiyun 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5),
56*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x0, "gpio_in"),
57*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x1, "gpio_out"),
58*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x3, "s_jtag"),	/* CK */
59*4882a593Smuzhiyun 		  SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 5)),	/* PL_EINT5 */
60*4882a593Smuzhiyun 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6),
61*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x0, "gpio_in"),
62*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x1, "gpio_out"),
63*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x3, "s_jtag"),	/* DO */
64*4882a593Smuzhiyun 		  SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 6)),	/* PL_EINT6 */
65*4882a593Smuzhiyun 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7),
66*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x0, "gpio_in"),
67*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x1, "gpio_out"),
68*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x3, "s_jtag"),	/* DI */
69*4882a593Smuzhiyun 		  SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 7)),	/* PL_EINT7 */
70*4882a593Smuzhiyun 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8),
71*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x0, "gpio_in"),
72*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x1, "gpio_out"),
73*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x2, "s_twi"),		/* SCK */
74*4882a593Smuzhiyun 		  SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 8)),	/* PL_EINT8 */
75*4882a593Smuzhiyun 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 9),
76*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x0, "gpio_in"),
77*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x1, "gpio_out"),
78*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x2, "s_twi"),		/* SDA */
79*4882a593Smuzhiyun 		  SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 9)),	/* PL_EINT9 */
80*4882a593Smuzhiyun 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 10),
81*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x0, "gpio_in"),
82*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x1, "gpio_out"),
83*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x2, "s_pwm"),
84*4882a593Smuzhiyun 		  SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 10)),	/* PL_EINT10 */
85*4882a593Smuzhiyun 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 11),
86*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x0, "gpio_in"),
87*4882a593Smuzhiyun 		  SUNXI_FUNCTION(0x1, "gpio_out"),
88*4882a593Smuzhiyun 		  SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 11)),	/* PL_EINT11 */
89*4882a593Smuzhiyun };
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun static const struct sunxi_pinctrl_desc sun8i_a23_r_pinctrl_data = {
92*4882a593Smuzhiyun 	.pins = sun8i_a23_r_pins,
93*4882a593Smuzhiyun 	.npins = ARRAY_SIZE(sun8i_a23_r_pins),
94*4882a593Smuzhiyun 	.pin_base = PL_BASE,
95*4882a593Smuzhiyun 	.irq_banks = 1,
96*4882a593Smuzhiyun 	.disable_strict_mode = true,
97*4882a593Smuzhiyun };
98*4882a593Smuzhiyun 
sun8i_a23_r_pinctrl_probe(struct platform_device * pdev)99*4882a593Smuzhiyun static int sun8i_a23_r_pinctrl_probe(struct platform_device *pdev)
100*4882a593Smuzhiyun {
101*4882a593Smuzhiyun 	struct reset_control *rstc;
102*4882a593Smuzhiyun 	int ret;
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 	rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL);
105*4882a593Smuzhiyun 	if (IS_ERR(rstc)) {
106*4882a593Smuzhiyun 		ret = PTR_ERR(rstc);
107*4882a593Smuzhiyun 		if (ret == -EPROBE_DEFER)
108*4882a593Smuzhiyun 			return ret;
109*4882a593Smuzhiyun 		dev_err(&pdev->dev, "Reset controller missing err=%d\n", ret);
110*4882a593Smuzhiyun 		return ret;
111*4882a593Smuzhiyun 	}
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 	ret = reset_control_deassert(rstc);
114*4882a593Smuzhiyun 	if (ret)
115*4882a593Smuzhiyun 		return ret;
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun 	ret = sunxi_pinctrl_init(pdev,
118*4882a593Smuzhiyun 				 &sun8i_a23_r_pinctrl_data);
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	if (ret)
121*4882a593Smuzhiyun 		reset_control_assert(rstc);
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	return ret;
124*4882a593Smuzhiyun }
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun static const struct of_device_id sun8i_a23_r_pinctrl_match[] = {
127*4882a593Smuzhiyun 	{ .compatible = "allwinner,sun8i-a23-r-pinctrl", },
128*4882a593Smuzhiyun 	{}
129*4882a593Smuzhiyun };
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun static struct platform_driver sun8i_a23_r_pinctrl_driver = {
132*4882a593Smuzhiyun 	.probe	= sun8i_a23_r_pinctrl_probe,
133*4882a593Smuzhiyun 	.driver	= {
134*4882a593Smuzhiyun 		.name		= "sun8i-a23-r-pinctrl",
135*4882a593Smuzhiyun 		.of_match_table	= sun8i_a23_r_pinctrl_match,
136*4882a593Smuzhiyun 	},
137*4882a593Smuzhiyun };
138*4882a593Smuzhiyun builtin_platform_driver(sun8i_a23_r_pinctrl_driver);
139