1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Allwinner H6 R_PIO pin controller driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Based on pinctrl-sun6i-a31-r.c, which is:
8*4882a593Smuzhiyun * Copyright (C) 2014 Boris Brezillon
9*4882a593Smuzhiyun * Boris Brezillon <boris.brezillon@free-electrons.com>
10*4882a593Smuzhiyun * Copyright (C) 2014 Maxime Ripard
11*4882a593Smuzhiyun * Maxime Ripard <maxime.ripard@free-electrons.com>
12*4882a593Smuzhiyun */
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #include <linux/init.h>
15*4882a593Smuzhiyun #include <linux/platform_device.h>
16*4882a593Smuzhiyun #include <linux/of.h>
17*4882a593Smuzhiyun #include <linux/of_device.h>
18*4882a593Smuzhiyun #include <linux/pinctrl/pinctrl.h>
19*4882a593Smuzhiyun #include <linux/reset.h>
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #include "pinctrl-sunxi.h"
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun static const struct sunxi_desc_pin sun50i_h6_r_pins[] = {
24*4882a593Smuzhiyun SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0),
25*4882a593Smuzhiyun SUNXI_FUNCTION(0x0, "gpio_in"),
26*4882a593Smuzhiyun SUNXI_FUNCTION(0x1, "gpio_out"),
27*4882a593Smuzhiyun SUNXI_FUNCTION(0x3, "s_i2c"), /* SCK */
28*4882a593Smuzhiyun SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)), /* PL_EINT0 */
29*4882a593Smuzhiyun SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1),
30*4882a593Smuzhiyun SUNXI_FUNCTION(0x0, "gpio_in"),
31*4882a593Smuzhiyun SUNXI_FUNCTION(0x1, "gpio_out"),
32*4882a593Smuzhiyun SUNXI_FUNCTION(0x3, "s_i2c"), /* SDA */
33*4882a593Smuzhiyun SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)), /* PL_EINT1 */
34*4882a593Smuzhiyun SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2),
35*4882a593Smuzhiyun SUNXI_FUNCTION(0x0, "gpio_in"),
36*4882a593Smuzhiyun SUNXI_FUNCTION(0x1, "gpio_out"),
37*4882a593Smuzhiyun SUNXI_FUNCTION(0x2, "s_uart"), /* TX */
38*4882a593Smuzhiyun SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)), /* PL_EINT2 */
39*4882a593Smuzhiyun SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3),
40*4882a593Smuzhiyun SUNXI_FUNCTION(0x0, "gpio_in"),
41*4882a593Smuzhiyun SUNXI_FUNCTION(0x1, "gpio_out"),
42*4882a593Smuzhiyun SUNXI_FUNCTION(0x2, "s_uart"), /* RX */
43*4882a593Smuzhiyun SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)), /* PL_EINT3 */
44*4882a593Smuzhiyun SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4),
45*4882a593Smuzhiyun SUNXI_FUNCTION(0x0, "gpio_in"),
46*4882a593Smuzhiyun SUNXI_FUNCTION(0x1, "gpio_out"),
47*4882a593Smuzhiyun SUNXI_FUNCTION(0x2, "s_jtag"), /* MS */
48*4882a593Smuzhiyun SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)), /* PL_EINT4 */
49*4882a593Smuzhiyun SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5),
50*4882a593Smuzhiyun SUNXI_FUNCTION(0x0, "gpio_in"),
51*4882a593Smuzhiyun SUNXI_FUNCTION(0x1, "gpio_out"),
52*4882a593Smuzhiyun SUNXI_FUNCTION(0x2, "s_jtag"), /* CK */
53*4882a593Smuzhiyun SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)), /* PL_EINT5 */
54*4882a593Smuzhiyun SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6),
55*4882a593Smuzhiyun SUNXI_FUNCTION(0x0, "gpio_in"),
56*4882a593Smuzhiyun SUNXI_FUNCTION(0x1, "gpio_out"),
57*4882a593Smuzhiyun SUNXI_FUNCTION(0x2, "s_jtag"), /* DO */
58*4882a593Smuzhiyun SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)), /* PL_EINT6 */
59*4882a593Smuzhiyun SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7),
60*4882a593Smuzhiyun SUNXI_FUNCTION(0x0, "gpio_in"),
61*4882a593Smuzhiyun SUNXI_FUNCTION(0x1, "gpio_out"),
62*4882a593Smuzhiyun SUNXI_FUNCTION(0x2, "s_jtag"), /* DI */
63*4882a593Smuzhiyun SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)), /* PL_EINT7 */
64*4882a593Smuzhiyun SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8),
65*4882a593Smuzhiyun SUNXI_FUNCTION(0x0, "gpio_in"),
66*4882a593Smuzhiyun SUNXI_FUNCTION(0x1, "gpio_out"),
67*4882a593Smuzhiyun SUNXI_FUNCTION(0x2, "s_pwm"),
68*4882a593Smuzhiyun SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)), /* PL_EINT8 */
69*4882a593Smuzhiyun SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 9),
70*4882a593Smuzhiyun SUNXI_FUNCTION(0x0, "gpio_in"),
71*4882a593Smuzhiyun SUNXI_FUNCTION(0x1, "gpio_out"),
72*4882a593Smuzhiyun SUNXI_FUNCTION(0x2, "s_cir_rx"),
73*4882a593Smuzhiyun SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)), /* PL_EINT9 */
74*4882a593Smuzhiyun SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 10),
75*4882a593Smuzhiyun SUNXI_FUNCTION(0x0, "gpio_in"),
76*4882a593Smuzhiyun SUNXI_FUNCTION(0x1, "gpio_out"),
77*4882a593Smuzhiyun SUNXI_FUNCTION(0x2, "s_w1"),
78*4882a593Smuzhiyun SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)), /* PL_EINT10 */
79*4882a593Smuzhiyun /* Hole */
80*4882a593Smuzhiyun SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 0),
81*4882a593Smuzhiyun SUNXI_FUNCTION(0x0, "gpio_in"),
82*4882a593Smuzhiyun SUNXI_FUNCTION(0x1, "gpio_out"),
83*4882a593Smuzhiyun SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 0)), /* PM_EINT0 */
84*4882a593Smuzhiyun SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 1),
85*4882a593Smuzhiyun SUNXI_FUNCTION(0x0, "gpio_in"),
86*4882a593Smuzhiyun SUNXI_FUNCTION(0x1, "gpio_out"),
87*4882a593Smuzhiyun SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 1)), /* PM_EINT1 */
88*4882a593Smuzhiyun SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 2),
89*4882a593Smuzhiyun SUNXI_FUNCTION(0x0, "gpio_in"),
90*4882a593Smuzhiyun SUNXI_FUNCTION(0x1, "gpio_out"),
91*4882a593Smuzhiyun SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 2), /* PM_EINT2 */
92*4882a593Smuzhiyun SUNXI_FUNCTION(0x3, "1wire")),
93*4882a593Smuzhiyun SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 3),
94*4882a593Smuzhiyun SUNXI_FUNCTION(0x0, "gpio_in"),
95*4882a593Smuzhiyun SUNXI_FUNCTION(0x1, "gpio_out"),
96*4882a593Smuzhiyun SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 3)), /* PM_EINT3 */
97*4882a593Smuzhiyun SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 4),
98*4882a593Smuzhiyun SUNXI_FUNCTION(0x0, "gpio_in"),
99*4882a593Smuzhiyun SUNXI_FUNCTION(0x1, "gpio_out"),
100*4882a593Smuzhiyun SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 4)), /* PM_EINT4 */
101*4882a593Smuzhiyun };
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun static const struct sunxi_pinctrl_desc sun50i_h6_r_pinctrl_data = {
104*4882a593Smuzhiyun .pins = sun50i_h6_r_pins,
105*4882a593Smuzhiyun .npins = ARRAY_SIZE(sun50i_h6_r_pins),
106*4882a593Smuzhiyun .pin_base = PL_BASE,
107*4882a593Smuzhiyun .irq_banks = 2,
108*4882a593Smuzhiyun .io_bias_cfg_variant = BIAS_VOLTAGE_PIO_POW_MODE_SEL,
109*4882a593Smuzhiyun };
110*4882a593Smuzhiyun
sun50i_h6_r_pinctrl_probe(struct platform_device * pdev)111*4882a593Smuzhiyun static int sun50i_h6_r_pinctrl_probe(struct platform_device *pdev)
112*4882a593Smuzhiyun {
113*4882a593Smuzhiyun return sunxi_pinctrl_init(pdev,
114*4882a593Smuzhiyun &sun50i_h6_r_pinctrl_data);
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun static const struct of_device_id sun50i_h6_r_pinctrl_match[] = {
118*4882a593Smuzhiyun { .compatible = "allwinner,sun50i-h6-r-pinctrl", },
119*4882a593Smuzhiyun {}
120*4882a593Smuzhiyun };
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun static struct platform_driver sun50i_h6_r_pinctrl_driver = {
123*4882a593Smuzhiyun .probe = sun50i_h6_r_pinctrl_probe,
124*4882a593Smuzhiyun .driver = {
125*4882a593Smuzhiyun .name = "sun50i-h6-r-pinctrl",
126*4882a593Smuzhiyun .of_match_table = sun50i_h6_r_pinctrl_match,
127*4882a593Smuzhiyun },
128*4882a593Smuzhiyun };
129*4882a593Smuzhiyun builtin_platform_driver(sun50i_h6_r_pinctrl_driver);
130