1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Driver header file for pin controller driver 4*4882a593Smuzhiyun * Copyright (C) 2017 Spreadtrum - http://www.spreadtrum.com 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef __PINCTRL_SPRD_H__ 8*4882a593Smuzhiyun #define __PINCTRL_SPRD_H__ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun struct platform_device; 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #define NUM_OFFSET (20) 13*4882a593Smuzhiyun #define TYPE_OFFSET (16) 14*4882a593Smuzhiyun #define BIT_OFFSET (8) 15*4882a593Smuzhiyun #define WIDTH_OFFSET (4) 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #define SPRD_PIN_INFO(num, type, offset, width, reg) \ 18*4882a593Smuzhiyun (((num) & 0xFFF) << NUM_OFFSET | \ 19*4882a593Smuzhiyun ((type) & 0xF) << TYPE_OFFSET | \ 20*4882a593Smuzhiyun ((offset) & 0xFF) << BIT_OFFSET | \ 21*4882a593Smuzhiyun ((width) & 0xF) << WIDTH_OFFSET | \ 22*4882a593Smuzhiyun ((reg) & 0xF)) 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun #define SPRD_PINCTRL_PIN(pin) SPRD_PINCTRL_PIN_DATA(pin, #pin) 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #define SPRD_PINCTRL_PIN_DATA(a, b) \ 27*4882a593Smuzhiyun { \ 28*4882a593Smuzhiyun .name = b, \ 29*4882a593Smuzhiyun .num = (((a) >> NUM_OFFSET) & 0xfff), \ 30*4882a593Smuzhiyun .type = (((a) >> TYPE_OFFSET) & 0xf), \ 31*4882a593Smuzhiyun .bit_offset = (((a) >> BIT_OFFSET) & 0xff), \ 32*4882a593Smuzhiyun .bit_width = ((a) >> WIDTH_OFFSET & 0xf), \ 33*4882a593Smuzhiyun .reg = ((a) & 0xf) \ 34*4882a593Smuzhiyun } 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun enum pin_type { 37*4882a593Smuzhiyun GLOBAL_CTRL_PIN, 38*4882a593Smuzhiyun COMMON_PIN, 39*4882a593Smuzhiyun MISC_PIN, 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun struct sprd_pins_info { 43*4882a593Smuzhiyun const char *name; 44*4882a593Smuzhiyun unsigned int num; 45*4882a593Smuzhiyun enum pin_type type; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun /* for global control pins configuration */ 48*4882a593Smuzhiyun unsigned long bit_offset; 49*4882a593Smuzhiyun unsigned long bit_width; 50*4882a593Smuzhiyun unsigned int reg; 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun int sprd_pinctrl_core_probe(struct platform_device *pdev, 54*4882a593Smuzhiyun struct sprd_pins_info *sprd_soc_pin_info, 55*4882a593Smuzhiyun int pins_cnt); 56*4882a593Smuzhiyun int sprd_pinctrl_remove(struct platform_device *pdev); 57*4882a593Smuzhiyun void sprd_pinctrl_shutdown(struct platform_device *pdev); 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun #endif /* __PINCTRL_SPRD_H__ */ 60