1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * SH7203 Pinmux 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2008 Magnus Damm 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #include <linux/kernel.h> 9*4882a593Smuzhiyun #include <linux/gpio.h> 10*4882a593Smuzhiyun #include <cpu/sh7203.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #include "sh_pfc.h" 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun enum { 15*4882a593Smuzhiyun PINMUX_RESERVED = 0, 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun PINMUX_DATA_BEGIN, 18*4882a593Smuzhiyun PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA, 19*4882a593Smuzhiyun PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA, 20*4882a593Smuzhiyun PB12_DATA, 21*4882a593Smuzhiyun PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA, 22*4882a593Smuzhiyun PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA, 23*4882a593Smuzhiyun PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA, 24*4882a593Smuzhiyun PC14_DATA, PC13_DATA, PC12_DATA, 25*4882a593Smuzhiyun PC11_DATA, PC10_DATA, PC9_DATA, PC8_DATA, 26*4882a593Smuzhiyun PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA, 27*4882a593Smuzhiyun PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA, 28*4882a593Smuzhiyun PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA, 29*4882a593Smuzhiyun PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA, 30*4882a593Smuzhiyun PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA, 31*4882a593Smuzhiyun PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA, 32*4882a593Smuzhiyun PE15_DATA, PE14_DATA, PE13_DATA, PE12_DATA, 33*4882a593Smuzhiyun PE11_DATA, PE10_DATA, PE9_DATA, PE8_DATA, 34*4882a593Smuzhiyun PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA, 35*4882a593Smuzhiyun PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA, 36*4882a593Smuzhiyun PF30_DATA, PF29_DATA, PF28_DATA, 37*4882a593Smuzhiyun PF27_DATA, PF26_DATA, PF25_DATA, PF24_DATA, 38*4882a593Smuzhiyun PF23_DATA, PF22_DATA, PF21_DATA, PF20_DATA, 39*4882a593Smuzhiyun PF19_DATA, PF18_DATA, PF17_DATA, PF16_DATA, 40*4882a593Smuzhiyun PF15_DATA, PF14_DATA, PF13_DATA, PF12_DATA, 41*4882a593Smuzhiyun PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA, 42*4882a593Smuzhiyun PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA, 43*4882a593Smuzhiyun PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA, 44*4882a593Smuzhiyun PINMUX_DATA_END, 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun PINMUX_INPUT_BEGIN, 47*4882a593Smuzhiyun FORCE_IN, 48*4882a593Smuzhiyun PA7_IN, PA6_IN, PA5_IN, PA4_IN, 49*4882a593Smuzhiyun PA3_IN, PA2_IN, PA1_IN, PA0_IN, 50*4882a593Smuzhiyun PB11_IN, PB10_IN, PB9_IN, PB8_IN, 51*4882a593Smuzhiyun PC14_IN, PC13_IN, PC12_IN, 52*4882a593Smuzhiyun PC11_IN, PC10_IN, PC9_IN, PC8_IN, 53*4882a593Smuzhiyun PC7_IN, PC6_IN, PC5_IN, PC4_IN, 54*4882a593Smuzhiyun PC3_IN, PC2_IN, PC1_IN, PC0_IN, 55*4882a593Smuzhiyun PD15_IN, PD14_IN, PD13_IN, PD12_IN, 56*4882a593Smuzhiyun PD11_IN, PD10_IN, PD9_IN, PD8_IN, 57*4882a593Smuzhiyun PD7_IN, PD6_IN, PD5_IN, PD4_IN, 58*4882a593Smuzhiyun PD3_IN, PD2_IN, PD1_IN, PD0_IN, 59*4882a593Smuzhiyun PE15_IN, PE14_IN, PE13_IN, PE12_IN, 60*4882a593Smuzhiyun PE11_IN, PE10_IN, PE9_IN, PE8_IN, 61*4882a593Smuzhiyun PE7_IN, PE6_IN, PE5_IN, PE4_IN, 62*4882a593Smuzhiyun PE3_IN, PE2_IN, PE1_IN, PE0_IN, 63*4882a593Smuzhiyun PF30_IN, PF29_IN, PF28_IN, 64*4882a593Smuzhiyun PF27_IN, PF26_IN, PF25_IN, PF24_IN, 65*4882a593Smuzhiyun PF23_IN, PF22_IN, PF21_IN, PF20_IN, 66*4882a593Smuzhiyun PF19_IN, PF18_IN, PF17_IN, PF16_IN, 67*4882a593Smuzhiyun PF15_IN, PF14_IN, PF13_IN, PF12_IN, 68*4882a593Smuzhiyun PF11_IN, PF10_IN, PF9_IN, PF8_IN, 69*4882a593Smuzhiyun PF7_IN, PF6_IN, PF5_IN, PF4_IN, 70*4882a593Smuzhiyun PF3_IN, PF2_IN, PF1_IN, PF0_IN, 71*4882a593Smuzhiyun PINMUX_INPUT_END, 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun PINMUX_OUTPUT_BEGIN, 74*4882a593Smuzhiyun FORCE_OUT, 75*4882a593Smuzhiyun PB11_OUT, PB10_OUT, PB9_OUT, PB8_OUT, 76*4882a593Smuzhiyun PC14_OUT, PC13_OUT, PC12_OUT, 77*4882a593Smuzhiyun PC11_OUT, PC10_OUT, PC9_OUT, PC8_OUT, 78*4882a593Smuzhiyun PC7_OUT, PC6_OUT, PC5_OUT, PC4_OUT, 79*4882a593Smuzhiyun PC3_OUT, PC2_OUT, PC1_OUT, PC0_OUT, 80*4882a593Smuzhiyun PD15_OUT, PD14_OUT, PD13_OUT, PD12_OUT, 81*4882a593Smuzhiyun PD11_OUT, PD10_OUT, PD9_OUT, PD8_OUT, 82*4882a593Smuzhiyun PD7_OUT, PD6_OUT, PD5_OUT, PD4_OUT, 83*4882a593Smuzhiyun PD3_OUT, PD2_OUT, PD1_OUT, PD0_OUT, 84*4882a593Smuzhiyun PE15_OUT, PE14_OUT, PE13_OUT, PE12_OUT, 85*4882a593Smuzhiyun PE11_OUT, PE10_OUT, PE9_OUT, PE8_OUT, 86*4882a593Smuzhiyun PE7_OUT, PE6_OUT, PE5_OUT, PE4_OUT, 87*4882a593Smuzhiyun PE3_OUT, PE2_OUT, PE1_OUT, PE0_OUT, 88*4882a593Smuzhiyun PF30_OUT, PF29_OUT, PF28_OUT, 89*4882a593Smuzhiyun PF27_OUT, PF26_OUT, PF25_OUT, PF24_OUT, 90*4882a593Smuzhiyun PF23_OUT, PF22_OUT, PF21_OUT, PF20_OUT, 91*4882a593Smuzhiyun PF19_OUT, PF18_OUT, PF17_OUT, PF16_OUT, 92*4882a593Smuzhiyun PF15_OUT, PF14_OUT, PF13_OUT, PF12_OUT, 93*4882a593Smuzhiyun PF11_OUT, PF10_OUT, PF9_OUT, PF8_OUT, 94*4882a593Smuzhiyun PF7_OUT, PF6_OUT, PF5_OUT, PF4_OUT, 95*4882a593Smuzhiyun PF3_OUT, PF2_OUT, PF1_OUT, PF0_OUT, 96*4882a593Smuzhiyun PINMUX_OUTPUT_END, 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun PINMUX_FUNCTION_BEGIN, 99*4882a593Smuzhiyun PB11_IOR_IN, PB11_IOR_OUT, 100*4882a593Smuzhiyun PB10_IOR_IN, PB10_IOR_OUT, 101*4882a593Smuzhiyun PB9_IOR_IN, PB9_IOR_OUT, 102*4882a593Smuzhiyun PB8_IOR_IN, PB8_IOR_OUT, 103*4882a593Smuzhiyun PB12MD_00, PB12MD_01, PB12MD_10, PB12MD_11, 104*4882a593Smuzhiyun PB11MD_0, PB11MD_1, 105*4882a593Smuzhiyun PB10MD_0, PB10MD_1, 106*4882a593Smuzhiyun PB9MD_00, PB9MD_01, PB9MD_10, 107*4882a593Smuzhiyun PB8MD_00, PB8MD_01, PB8MD_10, 108*4882a593Smuzhiyun PB7MD_00, PB7MD_01, PB7MD_10, PB7MD_11, 109*4882a593Smuzhiyun PB6MD_00, PB6MD_01, PB6MD_10, PB6MD_11, 110*4882a593Smuzhiyun PB5MD_00, PB5MD_01, PB5MD_10, PB5MD_11, 111*4882a593Smuzhiyun PB4MD_00, PB4MD_01, PB4MD_10, PB4MD_11, 112*4882a593Smuzhiyun PB3MD_00, PB3MD_01, PB3MD_10, PB3MD_11, 113*4882a593Smuzhiyun PB2MD_00, PB2MD_01, PB2MD_10, PB2MD_11, 114*4882a593Smuzhiyun PB1MD_00, PB1MD_01, PB1MD_10, PB1MD_11, 115*4882a593Smuzhiyun PB0MD_00, PB0MD_01, PB0MD_10, PB0MD_11, 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun PB12IRQ_00, PB12IRQ_01, PB12IRQ_10, 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun PC14MD_0, PC14MD_1, 120*4882a593Smuzhiyun PC13MD_0, PC13MD_1, 121*4882a593Smuzhiyun PC12MD_0, PC12MD_1, 122*4882a593Smuzhiyun PC11MD_00, PC11MD_01, PC11MD_10, 123*4882a593Smuzhiyun PC10MD_00, PC10MD_01, PC10MD_10, 124*4882a593Smuzhiyun PC9MD_0, PC9MD_1, 125*4882a593Smuzhiyun PC8MD_0, PC8MD_1, 126*4882a593Smuzhiyun PC7MD_0, PC7MD_1, 127*4882a593Smuzhiyun PC6MD_0, PC6MD_1, 128*4882a593Smuzhiyun PC5MD_0, PC5MD_1, 129*4882a593Smuzhiyun PC4MD_0, PC4MD_1, 130*4882a593Smuzhiyun PC3MD_0, PC3MD_1, 131*4882a593Smuzhiyun PC2MD_0, PC2MD_1, 132*4882a593Smuzhiyun PC1MD_0, PC1MD_1, 133*4882a593Smuzhiyun PC0MD_00, PC0MD_01, PC0MD_10, 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun PD15MD_000, PD15MD_001, PD15MD_010, PD15MD_100, PD15MD_101, 136*4882a593Smuzhiyun PD14MD_000, PD14MD_001, PD14MD_010, PD14MD_101, 137*4882a593Smuzhiyun PD13MD_000, PD13MD_001, PD13MD_010, PD13MD_100, PD13MD_101, 138*4882a593Smuzhiyun PD12MD_000, PD12MD_001, PD12MD_010, PD12MD_100, PD12MD_101, 139*4882a593Smuzhiyun PD11MD_000, PD11MD_001, PD11MD_010, PD11MD_100, PD11MD_101, 140*4882a593Smuzhiyun PD10MD_000, PD10MD_001, PD10MD_010, PD10MD_100, PD10MD_101, 141*4882a593Smuzhiyun PD9MD_000, PD9MD_001, PD9MD_010, PD9MD_100, PD9MD_101, 142*4882a593Smuzhiyun PD8MD_000, PD8MD_001, PD8MD_010, PD8MD_100, PD8MD_101, 143*4882a593Smuzhiyun PD7MD_000, PD7MD_001, PD7MD_010, PD7MD_011, PD7MD_100, PD7MD_101, 144*4882a593Smuzhiyun PD6MD_000, PD6MD_001, PD6MD_010, PD6MD_011, PD6MD_100, PD6MD_101, 145*4882a593Smuzhiyun PD5MD_000, PD5MD_001, PD5MD_010, PD5MD_011, PD5MD_100, PD5MD_101, 146*4882a593Smuzhiyun PD4MD_000, PD4MD_001, PD4MD_010, PD4MD_011, PD4MD_100, PD4MD_101, 147*4882a593Smuzhiyun PD3MD_000, PD3MD_001, PD3MD_010, PD3MD_011, PD3MD_100, PD3MD_101, 148*4882a593Smuzhiyun PD2MD_000, PD2MD_001, PD2MD_010, PD2MD_011, PD2MD_100, PD2MD_101, 149*4882a593Smuzhiyun PD1MD_000, PD1MD_001, PD1MD_010, PD1MD_011, PD1MD_100, PD1MD_101, 150*4882a593Smuzhiyun PD0MD_000, PD0MD_001, PD0MD_010, PD0MD_011, PD0MD_100, PD0MD_101, 151*4882a593Smuzhiyun 152*4882a593Smuzhiyun PE15MD_00, PE15MD_01, PE15MD_11, 153*4882a593Smuzhiyun PE14MD_00, PE14MD_01, PE14MD_11, 154*4882a593Smuzhiyun PE13MD_00, PE13MD_11, 155*4882a593Smuzhiyun PE12MD_00, PE12MD_11, 156*4882a593Smuzhiyun PE11MD_000, PE11MD_001, PE11MD_010, PE11MD_100, 157*4882a593Smuzhiyun PE10MD_000, PE10MD_001, PE10MD_010, PE10MD_100, 158*4882a593Smuzhiyun PE9MD_00, PE9MD_01, PE9MD_10, PE9MD_11, 159*4882a593Smuzhiyun PE8MD_00, PE8MD_01, PE8MD_10, PE8MD_11, 160*4882a593Smuzhiyun PE7MD_000, PE7MD_001, PE7MD_010, PE7MD_011, PE7MD_100, 161*4882a593Smuzhiyun PE6MD_000, PE6MD_001, PE6MD_010, PE6MD_011, PE6MD_100, 162*4882a593Smuzhiyun PE5MD_000, PE5MD_001, PE5MD_010, PE5MD_011, PE5MD_100, 163*4882a593Smuzhiyun PE4MD_000, PE4MD_001, PE4MD_010, PE4MD_011, PE4MD_100, 164*4882a593Smuzhiyun PE3MD_00, PE3MD_01, PE3MD_11, 165*4882a593Smuzhiyun PE2MD_00, PE2MD_01, PE2MD_11, 166*4882a593Smuzhiyun PE1MD_00, PE1MD_01, PE1MD_10, PE1MD_11, 167*4882a593Smuzhiyun PE0MD_000, PE0MD_001, PE0MD_011, PE0MD_100, 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun PF30MD_0, PF30MD_1, 170*4882a593Smuzhiyun PF29MD_0, PF29MD_1, 171*4882a593Smuzhiyun PF28MD_0, PF28MD_1, 172*4882a593Smuzhiyun PF27MD_0, PF27MD_1, 173*4882a593Smuzhiyun PF26MD_0, PF26MD_1, 174*4882a593Smuzhiyun PF25MD_0, PF25MD_1, 175*4882a593Smuzhiyun PF24MD_0, PF24MD_1, 176*4882a593Smuzhiyun PF23MD_00, PF23MD_01, PF23MD_10, 177*4882a593Smuzhiyun PF22MD_00, PF22MD_01, PF22MD_10, 178*4882a593Smuzhiyun PF21MD_00, PF21MD_01, PF21MD_10, 179*4882a593Smuzhiyun PF20MD_00, PF20MD_01, PF20MD_10, 180*4882a593Smuzhiyun PF19MD_00, PF19MD_01, PF19MD_10, 181*4882a593Smuzhiyun PF18MD_00, PF18MD_01, PF18MD_10, 182*4882a593Smuzhiyun PF17MD_00, PF17MD_01, PF17MD_10, 183*4882a593Smuzhiyun PF16MD_00, PF16MD_01, PF16MD_10, 184*4882a593Smuzhiyun PF15MD_00, PF15MD_01, PF15MD_10, 185*4882a593Smuzhiyun PF14MD_00, PF14MD_01, PF14MD_10, 186*4882a593Smuzhiyun PF13MD_00, PF13MD_01, PF13MD_10, 187*4882a593Smuzhiyun PF12MD_00, PF12MD_01, PF12MD_10, 188*4882a593Smuzhiyun PF11MD_00, PF11MD_01, PF11MD_10, 189*4882a593Smuzhiyun PF10MD_00, PF10MD_01, PF10MD_10, 190*4882a593Smuzhiyun PF9MD_00, PF9MD_01, PF9MD_10, 191*4882a593Smuzhiyun PF8MD_00, PF8MD_01, PF8MD_10, 192*4882a593Smuzhiyun PF7MD_00, PF7MD_01, PF7MD_10, PF7MD_11, 193*4882a593Smuzhiyun PF6MD_00, PF6MD_01, PF6MD_10, PF6MD_11, 194*4882a593Smuzhiyun PF5MD_00, PF5MD_01, PF5MD_10, PF5MD_11, 195*4882a593Smuzhiyun PF4MD_00, PF4MD_01, PF4MD_10, PF4MD_11, 196*4882a593Smuzhiyun PF3MD_00, PF3MD_01, PF3MD_10, PF3MD_11, 197*4882a593Smuzhiyun PF2MD_00, PF2MD_01, PF2MD_10, PF2MD_11, 198*4882a593Smuzhiyun PF1MD_00, PF1MD_01, PF1MD_10, PF1MD_11, 199*4882a593Smuzhiyun PF0MD_00, PF0MD_01, PF0MD_10, PF0MD_11, 200*4882a593Smuzhiyun PINMUX_FUNCTION_END, 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun PINMUX_MARK_BEGIN, 203*4882a593Smuzhiyun PINT7_PB_MARK, PINT6_PB_MARK, PINT5_PB_MARK, PINT4_PB_MARK, 204*4882a593Smuzhiyun PINT3_PB_MARK, PINT2_PB_MARK, PINT1_PB_MARK, PINT0_PB_MARK, 205*4882a593Smuzhiyun PINT7_PD_MARK, PINT6_PD_MARK, PINT5_PD_MARK, PINT4_PD_MARK, 206*4882a593Smuzhiyun PINT3_PD_MARK, PINT2_PD_MARK, PINT1_PD_MARK, PINT0_PD_MARK, 207*4882a593Smuzhiyun IRQ7_PB_MARK, IRQ6_PB_MARK, IRQ5_PB_MARK, IRQ4_PB_MARK, 208*4882a593Smuzhiyun IRQ3_PB_MARK, IRQ2_PB_MARK, IRQ1_PB_MARK, IRQ0_PB_MARK, 209*4882a593Smuzhiyun IRQ7_PD_MARK, IRQ6_PD_MARK, IRQ5_PD_MARK, IRQ4_PD_MARK, 210*4882a593Smuzhiyun IRQ3_PD_MARK, IRQ2_PD_MARK, IRQ1_PD_MARK, IRQ0_PD_MARK, 211*4882a593Smuzhiyun IRQ7_PE_MARK, IRQ6_PE_MARK, IRQ5_PE_MARK, IRQ4_PE_MARK, 212*4882a593Smuzhiyun IRQ3_PE_MARK, IRQ2_PE_MARK, IRQ1_PE_MARK, IRQ0_PE_MARK, 213*4882a593Smuzhiyun WDTOVF_MARK, IRQOUT_MARK, REFOUT_MARK, IRQOUT_REFOUT_MARK, 214*4882a593Smuzhiyun UBCTRG_MARK, 215*4882a593Smuzhiyun CTX1_MARK, CRX1_MARK, CTX0_MARK, CTX0_CTX1_MARK, 216*4882a593Smuzhiyun CRX0_MARK, CRX0_CRX1_MARK, 217*4882a593Smuzhiyun SDA3_MARK, SCL3_MARK, 218*4882a593Smuzhiyun SDA2_MARK, SCL2_MARK, 219*4882a593Smuzhiyun SDA1_MARK, SCL1_MARK, 220*4882a593Smuzhiyun SDA0_MARK, SCL0_MARK, 221*4882a593Smuzhiyun TEND0_PD_MARK, TEND0_PE_MARK, DACK0_PD_MARK, DACK0_PE_MARK, 222*4882a593Smuzhiyun DREQ0_PD_MARK, DREQ0_PE_MARK, TEND1_PD_MARK, TEND1_PE_MARK, 223*4882a593Smuzhiyun DACK1_PD_MARK, DACK1_PE_MARK, DREQ1_PD_MARK, DREQ1_PE_MARK, 224*4882a593Smuzhiyun DACK2_MARK, DREQ2_MARK, DACK3_MARK, DREQ3_MARK, 225*4882a593Smuzhiyun ADTRG_PD_MARK, ADTRG_PE_MARK, 226*4882a593Smuzhiyun D31_MARK, D30_MARK, D29_MARK, D28_MARK, 227*4882a593Smuzhiyun D27_MARK, D26_MARK, D25_MARK, D24_MARK, 228*4882a593Smuzhiyun D23_MARK, D22_MARK, D21_MARK, D20_MARK, 229*4882a593Smuzhiyun D19_MARK, D18_MARK, D17_MARK, D16_MARK, 230*4882a593Smuzhiyun A25_MARK, A24_MARK, A23_MARK, A22_MARK, 231*4882a593Smuzhiyun A21_MARK, CS4_MARK, MRES_MARK, BS_MARK, 232*4882a593Smuzhiyun IOIS16_MARK, CS1_MARK, CS6_CE1B_MARK, CE2B_MARK, 233*4882a593Smuzhiyun CS5_CE1A_MARK, CE2A_MARK, FRAME_MARK, WAIT_MARK, 234*4882a593Smuzhiyun RDWR_MARK, CKE_MARK, CASU_MARK, BREQ_MARK, 235*4882a593Smuzhiyun RASU_MARK, BACK_MARK, CASL_MARK, RASL_MARK, 236*4882a593Smuzhiyun WE3_DQMUU_AH_ICIO_WR_MARK, WE2_DQMUL_ICIORD_MARK, 237*4882a593Smuzhiyun WE1_DQMLU_WE_MARK, WE0_DQMLL_MARK, 238*4882a593Smuzhiyun CS3_MARK, CS2_MARK, A1_MARK, A0_MARK, CS7_MARK, 239*4882a593Smuzhiyun TIOC4D_MARK, TIOC4C_MARK, TIOC4B_MARK, TIOC4A_MARK, 240*4882a593Smuzhiyun TIOC3D_MARK, TIOC3C_MARK, TIOC3B_MARK, TIOC3A_MARK, 241*4882a593Smuzhiyun TIOC2B_MARK, TIOC1B_MARK, TIOC2A_MARK, TIOC1A_MARK, 242*4882a593Smuzhiyun TIOC0D_MARK, TIOC0C_MARK, TIOC0B_MARK, TIOC0A_MARK, 243*4882a593Smuzhiyun TCLKD_PD_MARK, TCLKC_PD_MARK, TCLKB_PD_MARK, TCLKA_PD_MARK, 244*4882a593Smuzhiyun TCLKD_PF_MARK, TCLKC_PF_MARK, TCLKB_PF_MARK, TCLKA_PF_MARK, 245*4882a593Smuzhiyun SCS0_PD_MARK, SSO0_PD_MARK, SSI0_PD_MARK, SSCK0_PD_MARK, 246*4882a593Smuzhiyun SCS0_PF_MARK, SSO0_PF_MARK, SSI0_PF_MARK, SSCK0_PF_MARK, 247*4882a593Smuzhiyun SCS1_PD_MARK, SSO1_PD_MARK, SSI1_PD_MARK, SSCK1_PD_MARK, 248*4882a593Smuzhiyun SCS1_PF_MARK, SSO1_PF_MARK, SSI1_PF_MARK, SSCK1_PF_MARK, 249*4882a593Smuzhiyun TXD0_MARK, RXD0_MARK, SCK0_MARK, 250*4882a593Smuzhiyun TXD1_MARK, RXD1_MARK, SCK1_MARK, 251*4882a593Smuzhiyun TXD2_MARK, RXD2_MARK, SCK2_MARK, 252*4882a593Smuzhiyun RTS3_MARK, CTS3_MARK, TXD3_MARK, 253*4882a593Smuzhiyun RXD3_MARK, SCK3_MARK, 254*4882a593Smuzhiyun AUDIO_CLK_MARK, 255*4882a593Smuzhiyun SSIDATA3_MARK, SSIWS3_MARK, SSISCK3_MARK, 256*4882a593Smuzhiyun SSIDATA2_MARK, SSIWS2_MARK, SSISCK2_MARK, 257*4882a593Smuzhiyun SSIDATA1_MARK, SSIWS1_MARK, SSISCK1_MARK, 258*4882a593Smuzhiyun SSIDATA0_MARK, SSIWS0_MARK, SSISCK0_MARK, 259*4882a593Smuzhiyun FCE_MARK, FRB_MARK, 260*4882a593Smuzhiyun NAF7_MARK, NAF6_MARK, NAF5_MARK, NAF4_MARK, 261*4882a593Smuzhiyun NAF3_MARK, NAF2_MARK, NAF1_MARK, NAF0_MARK, 262*4882a593Smuzhiyun FSC_MARK, FOE_MARK, FCDE_MARK, FWE_MARK, 263*4882a593Smuzhiyun LCD_VEPWC_MARK, LCD_VCPWC_MARK, LCD_CLK_MARK, LCD_FLM_MARK, 264*4882a593Smuzhiyun LCD_M_DISP_MARK, LCD_CL2_MARK, LCD_CL1_MARK, LCD_DON_MARK, 265*4882a593Smuzhiyun LCD_DATA15_MARK, LCD_DATA14_MARK, LCD_DATA13_MARK, LCD_DATA12_MARK, 266*4882a593Smuzhiyun LCD_DATA11_MARK, LCD_DATA10_MARK, LCD_DATA9_MARK, LCD_DATA8_MARK, 267*4882a593Smuzhiyun LCD_DATA7_MARK, LCD_DATA6_MARK, LCD_DATA5_MARK, LCD_DATA4_MARK, 268*4882a593Smuzhiyun LCD_DATA3_MARK, LCD_DATA2_MARK, LCD_DATA1_MARK, LCD_DATA0_MARK, 269*4882a593Smuzhiyun PINMUX_MARK_END, 270*4882a593Smuzhiyun }; 271*4882a593Smuzhiyun 272*4882a593Smuzhiyun static const u16 pinmux_data[] = { 273*4882a593Smuzhiyun /* PA */ 274*4882a593Smuzhiyun PINMUX_DATA(PA7_DATA, PA7_IN), 275*4882a593Smuzhiyun PINMUX_DATA(PA6_DATA, PA6_IN), 276*4882a593Smuzhiyun PINMUX_DATA(PA5_DATA, PA5_IN), 277*4882a593Smuzhiyun PINMUX_DATA(PA4_DATA, PA4_IN), 278*4882a593Smuzhiyun PINMUX_DATA(PA3_DATA, PA3_IN), 279*4882a593Smuzhiyun PINMUX_DATA(PA2_DATA, PA2_IN), 280*4882a593Smuzhiyun PINMUX_DATA(PA1_DATA, PA1_IN), 281*4882a593Smuzhiyun PINMUX_DATA(PA0_DATA, PA0_IN), 282*4882a593Smuzhiyun 283*4882a593Smuzhiyun /* PB */ 284*4882a593Smuzhiyun PINMUX_DATA(PB12_DATA, PB12MD_00, FORCE_OUT), 285*4882a593Smuzhiyun PINMUX_DATA(WDTOVF_MARK, PB12MD_01), 286*4882a593Smuzhiyun PINMUX_DATA(IRQOUT_MARK, PB12MD_10, PB12IRQ_00), 287*4882a593Smuzhiyun PINMUX_DATA(REFOUT_MARK, PB12MD_10, PB12IRQ_01), 288*4882a593Smuzhiyun PINMUX_DATA(IRQOUT_REFOUT_MARK, PB12MD_10, PB12IRQ_10), 289*4882a593Smuzhiyun PINMUX_DATA(UBCTRG_MARK, PB12MD_11), 290*4882a593Smuzhiyun 291*4882a593Smuzhiyun PINMUX_DATA(PB11_DATA, PB11MD_0, PB11_IN, PB11_OUT), 292*4882a593Smuzhiyun PINMUX_DATA(CTX1_MARK, PB11MD_1), 293*4882a593Smuzhiyun 294*4882a593Smuzhiyun PINMUX_DATA(PB10_DATA, PB10MD_0, PB10_IN, PB10_OUT), 295*4882a593Smuzhiyun PINMUX_DATA(CRX1_MARK, PB10MD_1), 296*4882a593Smuzhiyun 297*4882a593Smuzhiyun PINMUX_DATA(PB9_DATA, PB9MD_00, PB9_IN, PB9_OUT), 298*4882a593Smuzhiyun PINMUX_DATA(CTX0_MARK, PB9MD_01), 299*4882a593Smuzhiyun PINMUX_DATA(CTX0_CTX1_MARK, PB9MD_10), 300*4882a593Smuzhiyun 301*4882a593Smuzhiyun PINMUX_DATA(PB8_DATA, PB8MD_00, PB8_IN, PB8_OUT), 302*4882a593Smuzhiyun PINMUX_DATA(CRX0_MARK, PB8MD_01), 303*4882a593Smuzhiyun PINMUX_DATA(CRX0_CRX1_MARK, PB8MD_10), 304*4882a593Smuzhiyun 305*4882a593Smuzhiyun PINMUX_DATA(PB7_DATA, PB7MD_00, FORCE_IN), 306*4882a593Smuzhiyun PINMUX_DATA(SDA3_MARK, PB7MD_01), 307*4882a593Smuzhiyun PINMUX_DATA(PINT7_PB_MARK, PB7MD_10), 308*4882a593Smuzhiyun PINMUX_DATA(IRQ7_PB_MARK, PB7MD_11), 309*4882a593Smuzhiyun 310*4882a593Smuzhiyun PINMUX_DATA(PB6_DATA, PB6MD_00, FORCE_IN), 311*4882a593Smuzhiyun PINMUX_DATA(SCL3_MARK, PB6MD_01), 312*4882a593Smuzhiyun PINMUX_DATA(PINT6_PB_MARK, PB6MD_10), 313*4882a593Smuzhiyun PINMUX_DATA(IRQ6_PB_MARK, PB6MD_11), 314*4882a593Smuzhiyun 315*4882a593Smuzhiyun PINMUX_DATA(PB5_DATA, PB5MD_00, FORCE_IN), 316*4882a593Smuzhiyun PINMUX_DATA(SDA2_MARK, PB6MD_01), 317*4882a593Smuzhiyun PINMUX_DATA(PINT5_PB_MARK, PB6MD_10), 318*4882a593Smuzhiyun PINMUX_DATA(IRQ5_PB_MARK, PB6MD_11), 319*4882a593Smuzhiyun 320*4882a593Smuzhiyun PINMUX_DATA(PB4_DATA, PB4MD_00, FORCE_IN), 321*4882a593Smuzhiyun PINMUX_DATA(SCL2_MARK, PB4MD_01), 322*4882a593Smuzhiyun PINMUX_DATA(PINT4_PB_MARK, PB4MD_10), 323*4882a593Smuzhiyun PINMUX_DATA(IRQ4_PB_MARK, PB4MD_11), 324*4882a593Smuzhiyun 325*4882a593Smuzhiyun PINMUX_DATA(PB3_DATA, PB3MD_00, FORCE_IN), 326*4882a593Smuzhiyun PINMUX_DATA(SDA1_MARK, PB3MD_01), 327*4882a593Smuzhiyun PINMUX_DATA(PINT3_PB_MARK, PB3MD_10), 328*4882a593Smuzhiyun PINMUX_DATA(IRQ3_PB_MARK, PB3MD_11), 329*4882a593Smuzhiyun 330*4882a593Smuzhiyun PINMUX_DATA(PB2_DATA, PB2MD_00, FORCE_IN), 331*4882a593Smuzhiyun PINMUX_DATA(SCL1_MARK, PB2MD_01), 332*4882a593Smuzhiyun PINMUX_DATA(PINT2_PB_MARK, PB2MD_10), 333*4882a593Smuzhiyun PINMUX_DATA(IRQ2_PB_MARK, PB2MD_11), 334*4882a593Smuzhiyun 335*4882a593Smuzhiyun PINMUX_DATA(PB1_DATA, PB1MD_00, FORCE_IN), 336*4882a593Smuzhiyun PINMUX_DATA(SDA0_MARK, PB1MD_01), 337*4882a593Smuzhiyun PINMUX_DATA(PINT1_PB_MARK, PB1MD_10), 338*4882a593Smuzhiyun PINMUX_DATA(IRQ1_PB_MARK, PB1MD_11), 339*4882a593Smuzhiyun 340*4882a593Smuzhiyun PINMUX_DATA(PB0_DATA, PB0MD_00, FORCE_IN), 341*4882a593Smuzhiyun PINMUX_DATA(SCL0_MARK, PB0MD_01), 342*4882a593Smuzhiyun PINMUX_DATA(PINT0_PB_MARK, PB0MD_10), 343*4882a593Smuzhiyun PINMUX_DATA(IRQ0_PB_MARK, PB0MD_11), 344*4882a593Smuzhiyun 345*4882a593Smuzhiyun /* PC */ 346*4882a593Smuzhiyun PINMUX_DATA(PC14_DATA, PC14MD_0, PC14_IN, PC14_OUT), 347*4882a593Smuzhiyun PINMUX_DATA(WAIT_MARK, PC14MD_1), 348*4882a593Smuzhiyun 349*4882a593Smuzhiyun PINMUX_DATA(PC13_DATA, PC13MD_0, PC13_IN, PC13_OUT), 350*4882a593Smuzhiyun PINMUX_DATA(RDWR_MARK, PC13MD_1), 351*4882a593Smuzhiyun 352*4882a593Smuzhiyun PINMUX_DATA(PC12_DATA, PC12MD_0, PC12_IN, PC12_OUT), 353*4882a593Smuzhiyun PINMUX_DATA(CKE_MARK, PC12MD_1), 354*4882a593Smuzhiyun 355*4882a593Smuzhiyun PINMUX_DATA(PC11_DATA, PC11MD_00, PC11_IN, PC11_OUT), 356*4882a593Smuzhiyun PINMUX_DATA(CASU_MARK, PC11MD_01), 357*4882a593Smuzhiyun PINMUX_DATA(BREQ_MARK, PC11MD_10), 358*4882a593Smuzhiyun 359*4882a593Smuzhiyun PINMUX_DATA(PC10_DATA, PC10MD_00, PC10_IN, PC10_OUT), 360*4882a593Smuzhiyun PINMUX_DATA(RASU_MARK, PC10MD_01), 361*4882a593Smuzhiyun PINMUX_DATA(BACK_MARK, PC10MD_10), 362*4882a593Smuzhiyun 363*4882a593Smuzhiyun PINMUX_DATA(PC9_DATA, PC9MD_0, PC9_IN, PC9_OUT), 364*4882a593Smuzhiyun PINMUX_DATA(CASL_MARK, PC9MD_1), 365*4882a593Smuzhiyun 366*4882a593Smuzhiyun PINMUX_DATA(PC8_DATA, PC8MD_0, PC8_IN, PC8_OUT), 367*4882a593Smuzhiyun PINMUX_DATA(RASL_MARK, PC8MD_1), 368*4882a593Smuzhiyun 369*4882a593Smuzhiyun PINMUX_DATA(PC7_DATA, PC7MD_0, PC7_IN, PC7_OUT), 370*4882a593Smuzhiyun PINMUX_DATA(WE3_DQMUU_AH_ICIO_WR_MARK, PC7MD_1), 371*4882a593Smuzhiyun 372*4882a593Smuzhiyun PINMUX_DATA(PC6_DATA, PC6MD_0, PC6_IN, PC6_OUT), 373*4882a593Smuzhiyun PINMUX_DATA(WE2_DQMUL_ICIORD_MARK, PC6MD_1), 374*4882a593Smuzhiyun 375*4882a593Smuzhiyun PINMUX_DATA(PC5_DATA, PC5MD_0, PC5_IN, PC5_OUT), 376*4882a593Smuzhiyun PINMUX_DATA(WE1_DQMLU_WE_MARK, PC5MD_1), 377*4882a593Smuzhiyun 378*4882a593Smuzhiyun PINMUX_DATA(PC4_DATA, PC4MD_0, PC4_IN, PC4_OUT), 379*4882a593Smuzhiyun PINMUX_DATA(WE0_DQMLL_MARK, PC4MD_1), 380*4882a593Smuzhiyun 381*4882a593Smuzhiyun PINMUX_DATA(PC3_DATA, PC3MD_0, PC3_IN, PC3_OUT), 382*4882a593Smuzhiyun PINMUX_DATA(CS3_MARK, PC3MD_1), 383*4882a593Smuzhiyun 384*4882a593Smuzhiyun PINMUX_DATA(PC2_DATA, PC2MD_0, PC2_IN, PC2_OUT), 385*4882a593Smuzhiyun PINMUX_DATA(CS2_MARK, PC2MD_1), 386*4882a593Smuzhiyun 387*4882a593Smuzhiyun PINMUX_DATA(PC1_DATA, PC1MD_0, PC1_IN, PC1_OUT), 388*4882a593Smuzhiyun PINMUX_DATA(A1_MARK, PC1MD_1), 389*4882a593Smuzhiyun 390*4882a593Smuzhiyun PINMUX_DATA(PC0_DATA, PC0MD_00, PC0_IN, PC0_OUT), 391*4882a593Smuzhiyun PINMUX_DATA(A0_MARK, PC0MD_01), 392*4882a593Smuzhiyun PINMUX_DATA(CS7_MARK, PC0MD_10), 393*4882a593Smuzhiyun 394*4882a593Smuzhiyun /* PD */ 395*4882a593Smuzhiyun PINMUX_DATA(PD15_DATA, PD15MD_000, PD15_IN, PD15_OUT), 396*4882a593Smuzhiyun PINMUX_DATA(D31_MARK, PD15MD_001), 397*4882a593Smuzhiyun PINMUX_DATA(PINT7_PD_MARK, PD15MD_010), 398*4882a593Smuzhiyun PINMUX_DATA(ADTRG_PD_MARK, PD15MD_100), 399*4882a593Smuzhiyun PINMUX_DATA(TIOC4D_MARK, PD15MD_101), 400*4882a593Smuzhiyun 401*4882a593Smuzhiyun PINMUX_DATA(PD14_DATA, PD14MD_000, PD14_IN, PD14_OUT), 402*4882a593Smuzhiyun PINMUX_DATA(D30_MARK, PD14MD_001), 403*4882a593Smuzhiyun PINMUX_DATA(PINT6_PD_MARK, PD14MD_010), 404*4882a593Smuzhiyun PINMUX_DATA(TIOC4C_MARK, PD14MD_101), 405*4882a593Smuzhiyun 406*4882a593Smuzhiyun PINMUX_DATA(PD13_DATA, PD13MD_000, PD13_IN, PD13_OUT), 407*4882a593Smuzhiyun PINMUX_DATA(D29_MARK, PD13MD_001), 408*4882a593Smuzhiyun PINMUX_DATA(PINT5_PD_MARK, PD13MD_010), 409*4882a593Smuzhiyun PINMUX_DATA(TEND1_PD_MARK, PD13MD_100), 410*4882a593Smuzhiyun PINMUX_DATA(TIOC4B_MARK, PD13MD_101), 411*4882a593Smuzhiyun 412*4882a593Smuzhiyun PINMUX_DATA(PD12_DATA, PD12MD_000, PD12_IN, PD12_OUT), 413*4882a593Smuzhiyun PINMUX_DATA(D28_MARK, PD12MD_001), 414*4882a593Smuzhiyun PINMUX_DATA(PINT4_PD_MARK, PD12MD_010), 415*4882a593Smuzhiyun PINMUX_DATA(DACK1_PD_MARK, PD12MD_100), 416*4882a593Smuzhiyun PINMUX_DATA(TIOC4A_MARK, PD12MD_101), 417*4882a593Smuzhiyun 418*4882a593Smuzhiyun PINMUX_DATA(PD11_DATA, PD11MD_000, PD11_IN, PD11_OUT), 419*4882a593Smuzhiyun PINMUX_DATA(D27_MARK, PD11MD_001), 420*4882a593Smuzhiyun PINMUX_DATA(PINT3_PD_MARK, PD11MD_010), 421*4882a593Smuzhiyun PINMUX_DATA(DREQ1_PD_MARK, PD11MD_100), 422*4882a593Smuzhiyun PINMUX_DATA(TIOC3D_MARK, PD11MD_101), 423*4882a593Smuzhiyun 424*4882a593Smuzhiyun PINMUX_DATA(PD10_DATA, PD10MD_000, PD10_IN, PD10_OUT), 425*4882a593Smuzhiyun PINMUX_DATA(D26_MARK, PD10MD_001), 426*4882a593Smuzhiyun PINMUX_DATA(PINT2_PD_MARK, PD10MD_010), 427*4882a593Smuzhiyun PINMUX_DATA(TEND0_PD_MARK, PD10MD_100), 428*4882a593Smuzhiyun PINMUX_DATA(TIOC3C_MARK, PD10MD_101), 429*4882a593Smuzhiyun 430*4882a593Smuzhiyun PINMUX_DATA(PD9_DATA, PD9MD_000, PD9_IN, PD9_OUT), 431*4882a593Smuzhiyun PINMUX_DATA(D25_MARK, PD9MD_001), 432*4882a593Smuzhiyun PINMUX_DATA(PINT1_PD_MARK, PD9MD_010), 433*4882a593Smuzhiyun PINMUX_DATA(DACK0_PD_MARK, PD9MD_100), 434*4882a593Smuzhiyun PINMUX_DATA(TIOC3B_MARK, PD9MD_101), 435*4882a593Smuzhiyun 436*4882a593Smuzhiyun PINMUX_DATA(PD8_DATA, PD8MD_000, PD8_IN, PD8_OUT), 437*4882a593Smuzhiyun PINMUX_DATA(D24_MARK, PD8MD_001), 438*4882a593Smuzhiyun PINMUX_DATA(PINT0_PD_MARK, PD8MD_010), 439*4882a593Smuzhiyun PINMUX_DATA(DREQ0_PD_MARK, PD8MD_100), 440*4882a593Smuzhiyun PINMUX_DATA(TIOC3A_MARK, PD8MD_101), 441*4882a593Smuzhiyun 442*4882a593Smuzhiyun PINMUX_DATA(PD7_DATA, PD7MD_000, PD7_IN, PD7_OUT), 443*4882a593Smuzhiyun PINMUX_DATA(D23_MARK, PD7MD_001), 444*4882a593Smuzhiyun PINMUX_DATA(IRQ7_PD_MARK, PD7MD_010), 445*4882a593Smuzhiyun PINMUX_DATA(SCS1_PD_MARK, PD7MD_011), 446*4882a593Smuzhiyun PINMUX_DATA(TCLKD_PD_MARK, PD7MD_100), 447*4882a593Smuzhiyun PINMUX_DATA(TIOC2B_MARK, PD7MD_101), 448*4882a593Smuzhiyun 449*4882a593Smuzhiyun PINMUX_DATA(PD6_DATA, PD6MD_000, PD6_IN, PD6_OUT), 450*4882a593Smuzhiyun PINMUX_DATA(D22_MARK, PD6MD_001), 451*4882a593Smuzhiyun PINMUX_DATA(IRQ6_PD_MARK, PD6MD_010), 452*4882a593Smuzhiyun PINMUX_DATA(SSO1_PD_MARK, PD6MD_011), 453*4882a593Smuzhiyun PINMUX_DATA(TCLKC_PD_MARK, PD6MD_100), 454*4882a593Smuzhiyun PINMUX_DATA(TIOC2A_MARK, PD6MD_101), 455*4882a593Smuzhiyun 456*4882a593Smuzhiyun PINMUX_DATA(PD5_DATA, PD5MD_000, PD5_IN, PD5_OUT), 457*4882a593Smuzhiyun PINMUX_DATA(D21_MARK, PD5MD_001), 458*4882a593Smuzhiyun PINMUX_DATA(IRQ5_PD_MARK, PD5MD_010), 459*4882a593Smuzhiyun PINMUX_DATA(SSI1_PD_MARK, PD5MD_011), 460*4882a593Smuzhiyun PINMUX_DATA(TCLKB_PD_MARK, PD5MD_100), 461*4882a593Smuzhiyun PINMUX_DATA(TIOC1B_MARK, PD5MD_101), 462*4882a593Smuzhiyun 463*4882a593Smuzhiyun PINMUX_DATA(PD4_DATA, PD4MD_000, PD4_IN, PD4_OUT), 464*4882a593Smuzhiyun PINMUX_DATA(D20_MARK, PD4MD_001), 465*4882a593Smuzhiyun PINMUX_DATA(IRQ4_PD_MARK, PD4MD_010), 466*4882a593Smuzhiyun PINMUX_DATA(SSCK1_PD_MARK, PD4MD_011), 467*4882a593Smuzhiyun PINMUX_DATA(TCLKA_PD_MARK, PD4MD_100), 468*4882a593Smuzhiyun PINMUX_DATA(TIOC1A_MARK, PD4MD_101), 469*4882a593Smuzhiyun 470*4882a593Smuzhiyun PINMUX_DATA(PD3_DATA, PD3MD_000, PD3_IN, PD3_OUT), 471*4882a593Smuzhiyun PINMUX_DATA(D19_MARK, PD3MD_001), 472*4882a593Smuzhiyun PINMUX_DATA(IRQ3_PD_MARK, PD3MD_010), 473*4882a593Smuzhiyun PINMUX_DATA(SCS0_PD_MARK, PD3MD_011), 474*4882a593Smuzhiyun PINMUX_DATA(DACK3_MARK, PD3MD_100), 475*4882a593Smuzhiyun PINMUX_DATA(TIOC0D_MARK, PD3MD_101), 476*4882a593Smuzhiyun 477*4882a593Smuzhiyun PINMUX_DATA(PD2_DATA, PD2MD_000, PD2_IN, PD2_OUT), 478*4882a593Smuzhiyun PINMUX_DATA(D18_MARK, PD2MD_001), 479*4882a593Smuzhiyun PINMUX_DATA(IRQ2_PD_MARK, PD2MD_010), 480*4882a593Smuzhiyun PINMUX_DATA(SSO0_PD_MARK, PD2MD_011), 481*4882a593Smuzhiyun PINMUX_DATA(DREQ3_MARK, PD2MD_100), 482*4882a593Smuzhiyun PINMUX_DATA(TIOC0C_MARK, PD2MD_101), 483*4882a593Smuzhiyun 484*4882a593Smuzhiyun PINMUX_DATA(PD1_DATA, PD1MD_000, PD1_IN, PD1_OUT), 485*4882a593Smuzhiyun PINMUX_DATA(D17_MARK, PD1MD_001), 486*4882a593Smuzhiyun PINMUX_DATA(IRQ1_PD_MARK, PD1MD_010), 487*4882a593Smuzhiyun PINMUX_DATA(SSI0_PD_MARK, PD1MD_011), 488*4882a593Smuzhiyun PINMUX_DATA(DACK2_MARK, PD1MD_100), 489*4882a593Smuzhiyun PINMUX_DATA(TIOC0B_MARK, PD1MD_101), 490*4882a593Smuzhiyun 491*4882a593Smuzhiyun PINMUX_DATA(PD0_DATA, PD0MD_000, PD0_IN, PD0_OUT), 492*4882a593Smuzhiyun PINMUX_DATA(D16_MARK, PD0MD_001), 493*4882a593Smuzhiyun PINMUX_DATA(IRQ0_PD_MARK, PD0MD_010), 494*4882a593Smuzhiyun PINMUX_DATA(SSCK0_PD_MARK, PD0MD_011), 495*4882a593Smuzhiyun PINMUX_DATA(DREQ2_MARK, PD0MD_100), 496*4882a593Smuzhiyun PINMUX_DATA(TIOC0A_MARK, PD0MD_101), 497*4882a593Smuzhiyun 498*4882a593Smuzhiyun /* PE */ 499*4882a593Smuzhiyun PINMUX_DATA(PE15_DATA, PE15MD_00, PE15_IN, PE15_OUT), 500*4882a593Smuzhiyun PINMUX_DATA(IOIS16_MARK, PE15MD_01), 501*4882a593Smuzhiyun PINMUX_DATA(RTS3_MARK, PE15MD_11), 502*4882a593Smuzhiyun 503*4882a593Smuzhiyun PINMUX_DATA(PE14_DATA, PE14MD_00, PE14_IN, PE14_OUT), 504*4882a593Smuzhiyun PINMUX_DATA(CS1_MARK, PE14MD_01), 505*4882a593Smuzhiyun PINMUX_DATA(CTS3_MARK, PE14MD_11), 506*4882a593Smuzhiyun 507*4882a593Smuzhiyun PINMUX_DATA(PE13_DATA, PE13MD_00, PE13_IN, PE13_OUT), 508*4882a593Smuzhiyun PINMUX_DATA(TXD3_MARK, PE13MD_11), 509*4882a593Smuzhiyun 510*4882a593Smuzhiyun PINMUX_DATA(PE12_DATA, PE12MD_00, PE12_IN, PE12_OUT), 511*4882a593Smuzhiyun PINMUX_DATA(RXD3_MARK, PE12MD_11), 512*4882a593Smuzhiyun 513*4882a593Smuzhiyun PINMUX_DATA(PE11_DATA, PE11MD_000, PE11_IN, PE11_OUT), 514*4882a593Smuzhiyun PINMUX_DATA(CS6_CE1B_MARK, PE11MD_001), 515*4882a593Smuzhiyun PINMUX_DATA(IRQ7_PE_MARK, PE11MD_010), 516*4882a593Smuzhiyun PINMUX_DATA(TEND1_PE_MARK, PE11MD_100), 517*4882a593Smuzhiyun 518*4882a593Smuzhiyun PINMUX_DATA(PE10_DATA, PE10MD_000, PE10_IN, PE10_OUT), 519*4882a593Smuzhiyun PINMUX_DATA(CE2B_MARK, PE10MD_001), 520*4882a593Smuzhiyun PINMUX_DATA(IRQ6_PE_MARK, PE10MD_010), 521*4882a593Smuzhiyun PINMUX_DATA(TEND0_PE_MARK, PE10MD_100), 522*4882a593Smuzhiyun 523*4882a593Smuzhiyun PINMUX_DATA(PE9_DATA, PE9MD_00, PE9_IN, PE9_OUT), 524*4882a593Smuzhiyun PINMUX_DATA(CS5_CE1A_MARK, PE9MD_01), 525*4882a593Smuzhiyun PINMUX_DATA(IRQ5_PE_MARK, PE9MD_10), 526*4882a593Smuzhiyun PINMUX_DATA(SCK3_MARK, PE9MD_11), 527*4882a593Smuzhiyun 528*4882a593Smuzhiyun PINMUX_DATA(PE8_DATA, PE8MD_00, PE8_IN, PE8_OUT), 529*4882a593Smuzhiyun PINMUX_DATA(CE2A_MARK, PE8MD_01), 530*4882a593Smuzhiyun PINMUX_DATA(IRQ4_PE_MARK, PE8MD_10), 531*4882a593Smuzhiyun PINMUX_DATA(SCK2_MARK, PE8MD_11), 532*4882a593Smuzhiyun 533*4882a593Smuzhiyun PINMUX_DATA(PE7_DATA, PE7MD_000, PE7_IN, PE7_OUT), 534*4882a593Smuzhiyun PINMUX_DATA(FRAME_MARK, PE7MD_001), 535*4882a593Smuzhiyun PINMUX_DATA(IRQ3_PE_MARK, PE7MD_010), 536*4882a593Smuzhiyun PINMUX_DATA(TXD2_MARK, PE7MD_011), 537*4882a593Smuzhiyun PINMUX_DATA(DACK1_PE_MARK, PE7MD_100), 538*4882a593Smuzhiyun 539*4882a593Smuzhiyun PINMUX_DATA(PE6_DATA, PE6MD_000, PE6_IN, PE6_OUT), 540*4882a593Smuzhiyun PINMUX_DATA(A25_MARK, PE6MD_001), 541*4882a593Smuzhiyun PINMUX_DATA(IRQ2_PE_MARK, PE6MD_010), 542*4882a593Smuzhiyun PINMUX_DATA(RXD2_MARK, PE6MD_011), 543*4882a593Smuzhiyun PINMUX_DATA(DREQ1_PE_MARK, PE6MD_100), 544*4882a593Smuzhiyun 545*4882a593Smuzhiyun PINMUX_DATA(PE5_DATA, PE5MD_000, PE5_IN, PE5_OUT), 546*4882a593Smuzhiyun PINMUX_DATA(A24_MARK, PE5MD_001), 547*4882a593Smuzhiyun PINMUX_DATA(IRQ1_PE_MARK, PE5MD_010), 548*4882a593Smuzhiyun PINMUX_DATA(TXD1_MARK, PE5MD_011), 549*4882a593Smuzhiyun PINMUX_DATA(DACK0_PE_MARK, PE5MD_100), 550*4882a593Smuzhiyun 551*4882a593Smuzhiyun PINMUX_DATA(PE4_DATA, PE4MD_000, PE4_IN, PE4_OUT), 552*4882a593Smuzhiyun PINMUX_DATA(A23_MARK, PE4MD_001), 553*4882a593Smuzhiyun PINMUX_DATA(IRQ0_PE_MARK, PE4MD_010), 554*4882a593Smuzhiyun PINMUX_DATA(RXD1_MARK, PE4MD_011), 555*4882a593Smuzhiyun PINMUX_DATA(DREQ0_PE_MARK, PE4MD_100), 556*4882a593Smuzhiyun 557*4882a593Smuzhiyun PINMUX_DATA(PE3_DATA, PE3MD_00, PE3_IN, PE3_OUT), 558*4882a593Smuzhiyun PINMUX_DATA(A22_MARK, PE3MD_01), 559*4882a593Smuzhiyun PINMUX_DATA(SCK1_MARK, PE3MD_11), 560*4882a593Smuzhiyun 561*4882a593Smuzhiyun PINMUX_DATA(PE2_DATA, PE2MD_00, PE2_IN, PE2_OUT), 562*4882a593Smuzhiyun PINMUX_DATA(A21_MARK, PE2MD_01), 563*4882a593Smuzhiyun PINMUX_DATA(SCK0_MARK, PE2MD_11), 564*4882a593Smuzhiyun 565*4882a593Smuzhiyun PINMUX_DATA(PE1_DATA, PE1MD_00, PE1_IN, PE1_OUT), 566*4882a593Smuzhiyun PINMUX_DATA(CS4_MARK, PE1MD_01), 567*4882a593Smuzhiyun PINMUX_DATA(MRES_MARK, PE1MD_10), 568*4882a593Smuzhiyun PINMUX_DATA(TXD0_MARK, PE1MD_11), 569*4882a593Smuzhiyun 570*4882a593Smuzhiyun PINMUX_DATA(PE0_DATA, PE0MD_000, PE0_IN, PE0_OUT), 571*4882a593Smuzhiyun PINMUX_DATA(BS_MARK, PE0MD_001), 572*4882a593Smuzhiyun PINMUX_DATA(RXD0_MARK, PE0MD_011), 573*4882a593Smuzhiyun PINMUX_DATA(ADTRG_PE_MARK, PE0MD_100), 574*4882a593Smuzhiyun 575*4882a593Smuzhiyun /* PF */ 576*4882a593Smuzhiyun PINMUX_DATA(PF30_DATA, PF30MD_0, PF30_IN, PF30_OUT), 577*4882a593Smuzhiyun PINMUX_DATA(AUDIO_CLK_MARK, PF30MD_1), 578*4882a593Smuzhiyun 579*4882a593Smuzhiyun PINMUX_DATA(PF29_DATA, PF29MD_0, PF29_IN, PF29_OUT), 580*4882a593Smuzhiyun PINMUX_DATA(SSIDATA3_MARK, PF29MD_1), 581*4882a593Smuzhiyun 582*4882a593Smuzhiyun PINMUX_DATA(PF28_DATA, PF28MD_0, PF28_IN, PF28_OUT), 583*4882a593Smuzhiyun PINMUX_DATA(SSIWS3_MARK, PF28MD_1), 584*4882a593Smuzhiyun 585*4882a593Smuzhiyun PINMUX_DATA(PF27_DATA, PF27MD_0, PF27_IN, PF27_OUT), 586*4882a593Smuzhiyun PINMUX_DATA(SSISCK3_MARK, PF27MD_1), 587*4882a593Smuzhiyun 588*4882a593Smuzhiyun PINMUX_DATA(PF26_DATA, PF26MD_0, PF26_IN, PF26_OUT), 589*4882a593Smuzhiyun PINMUX_DATA(SSIDATA2_MARK, PF26MD_1), 590*4882a593Smuzhiyun 591*4882a593Smuzhiyun PINMUX_DATA(PF25_DATA, PF25MD_0, PF25_IN, PF25_OUT), 592*4882a593Smuzhiyun PINMUX_DATA(SSIWS2_MARK, PF25MD_1), 593*4882a593Smuzhiyun 594*4882a593Smuzhiyun PINMUX_DATA(PF24_DATA, PF24MD_0, PF24_IN, PF24_OUT), 595*4882a593Smuzhiyun PINMUX_DATA(SSISCK2_MARK, PF24MD_1), 596*4882a593Smuzhiyun 597*4882a593Smuzhiyun PINMUX_DATA(PF23_DATA, PF23MD_00, PF23_IN, PF23_OUT), 598*4882a593Smuzhiyun PINMUX_DATA(SSIDATA1_MARK, PF23MD_01), 599*4882a593Smuzhiyun PINMUX_DATA(LCD_VEPWC_MARK, PF23MD_10), 600*4882a593Smuzhiyun 601*4882a593Smuzhiyun PINMUX_DATA(PF22_DATA, PF22MD_00, PF22_IN, PF22_OUT), 602*4882a593Smuzhiyun PINMUX_DATA(SSIWS1_MARK, PF22MD_01), 603*4882a593Smuzhiyun PINMUX_DATA(LCD_VCPWC_MARK, PF22MD_10), 604*4882a593Smuzhiyun 605*4882a593Smuzhiyun PINMUX_DATA(PF21_DATA, PF21MD_00, PF21_IN, PF21_OUT), 606*4882a593Smuzhiyun PINMUX_DATA(SSISCK1_MARK, PF21MD_01), 607*4882a593Smuzhiyun PINMUX_DATA(LCD_CLK_MARK, PF21MD_10), 608*4882a593Smuzhiyun 609*4882a593Smuzhiyun PINMUX_DATA(PF20_DATA, PF20MD_00, PF20_IN, PF20_OUT), 610*4882a593Smuzhiyun PINMUX_DATA(SSIDATA0_MARK, PF20MD_01), 611*4882a593Smuzhiyun PINMUX_DATA(LCD_FLM_MARK, PF20MD_10), 612*4882a593Smuzhiyun 613*4882a593Smuzhiyun PINMUX_DATA(PF19_DATA, PF19MD_00, PF19_IN, PF19_OUT), 614*4882a593Smuzhiyun PINMUX_DATA(SSIWS0_MARK, PF19MD_01), 615*4882a593Smuzhiyun PINMUX_DATA(LCD_M_DISP_MARK, PF19MD_10), 616*4882a593Smuzhiyun 617*4882a593Smuzhiyun PINMUX_DATA(PF18_DATA, PF18MD_00, PF18_IN, PF18_OUT), 618*4882a593Smuzhiyun PINMUX_DATA(SSISCK0_MARK, PF18MD_01), 619*4882a593Smuzhiyun PINMUX_DATA(LCD_CL2_MARK, PF18MD_10), 620*4882a593Smuzhiyun 621*4882a593Smuzhiyun PINMUX_DATA(PF17_DATA, PF17MD_00, PF17_IN, PF17_OUT), 622*4882a593Smuzhiyun PINMUX_DATA(FCE_MARK, PF17MD_01), 623*4882a593Smuzhiyun PINMUX_DATA(LCD_CL1_MARK, PF17MD_10), 624*4882a593Smuzhiyun 625*4882a593Smuzhiyun PINMUX_DATA(PF16_DATA, PF16MD_00, PF16_IN, PF16_OUT), 626*4882a593Smuzhiyun PINMUX_DATA(FRB_MARK, PF16MD_01), 627*4882a593Smuzhiyun PINMUX_DATA(LCD_DON_MARK, PF16MD_10), 628*4882a593Smuzhiyun 629*4882a593Smuzhiyun PINMUX_DATA(PF15_DATA, PF15MD_00, PF15_IN, PF15_OUT), 630*4882a593Smuzhiyun PINMUX_DATA(NAF7_MARK, PF15MD_01), 631*4882a593Smuzhiyun PINMUX_DATA(LCD_DATA15_MARK, PF15MD_10), 632*4882a593Smuzhiyun 633*4882a593Smuzhiyun PINMUX_DATA(PF14_DATA, PF14MD_00, PF14_IN, PF14_OUT), 634*4882a593Smuzhiyun PINMUX_DATA(NAF6_MARK, PF14MD_01), 635*4882a593Smuzhiyun PINMUX_DATA(LCD_DATA14_MARK, PF14MD_10), 636*4882a593Smuzhiyun 637*4882a593Smuzhiyun PINMUX_DATA(PF13_DATA, PF13MD_00, PF13_IN, PF13_OUT), 638*4882a593Smuzhiyun PINMUX_DATA(NAF5_MARK, PF13MD_01), 639*4882a593Smuzhiyun PINMUX_DATA(LCD_DATA13_MARK, PF13MD_10), 640*4882a593Smuzhiyun 641*4882a593Smuzhiyun PINMUX_DATA(PF12_DATA, PF12MD_00, PF12_IN, PF12_OUT), 642*4882a593Smuzhiyun PINMUX_DATA(NAF4_MARK, PF12MD_01), 643*4882a593Smuzhiyun PINMUX_DATA(LCD_DATA12_MARK, PF12MD_10), 644*4882a593Smuzhiyun 645*4882a593Smuzhiyun PINMUX_DATA(PF11_DATA, PF11MD_00, PF11_IN, PF11_OUT), 646*4882a593Smuzhiyun PINMUX_DATA(NAF3_MARK, PF11MD_01), 647*4882a593Smuzhiyun PINMUX_DATA(LCD_DATA11_MARK, PF11MD_10), 648*4882a593Smuzhiyun 649*4882a593Smuzhiyun PINMUX_DATA(PF10_DATA, PF10MD_00, PF10_IN, PF10_OUT), 650*4882a593Smuzhiyun PINMUX_DATA(NAF2_MARK, PF10MD_01), 651*4882a593Smuzhiyun PINMUX_DATA(LCD_DATA10_MARK, PF10MD_10), 652*4882a593Smuzhiyun 653*4882a593Smuzhiyun PINMUX_DATA(PF9_DATA, PF9MD_00, PF9_IN, PF9_OUT), 654*4882a593Smuzhiyun PINMUX_DATA(NAF1_MARK, PF9MD_01), 655*4882a593Smuzhiyun PINMUX_DATA(LCD_DATA9_MARK, PF9MD_10), 656*4882a593Smuzhiyun 657*4882a593Smuzhiyun PINMUX_DATA(PF8_DATA, PF8MD_00, PF8_IN, PF8_OUT), 658*4882a593Smuzhiyun PINMUX_DATA(NAF0_MARK, PF8MD_01), 659*4882a593Smuzhiyun PINMUX_DATA(LCD_DATA8_MARK, PF8MD_10), 660*4882a593Smuzhiyun 661*4882a593Smuzhiyun PINMUX_DATA(PF7_DATA, PF7MD_00, PF7_IN, PF7_OUT), 662*4882a593Smuzhiyun PINMUX_DATA(FSC_MARK, PF7MD_01), 663*4882a593Smuzhiyun PINMUX_DATA(LCD_DATA7_MARK, PF7MD_10), 664*4882a593Smuzhiyun PINMUX_DATA(SCS1_PF_MARK, PF7MD_11), 665*4882a593Smuzhiyun 666*4882a593Smuzhiyun PINMUX_DATA(PF6_DATA, PF6MD_00, PF6_IN, PF6_OUT), 667*4882a593Smuzhiyun PINMUX_DATA(FOE_MARK, PF6MD_01), 668*4882a593Smuzhiyun PINMUX_DATA(LCD_DATA6_MARK, PF6MD_10), 669*4882a593Smuzhiyun PINMUX_DATA(SSO1_PF_MARK, PF6MD_11), 670*4882a593Smuzhiyun 671*4882a593Smuzhiyun PINMUX_DATA(PF5_DATA, PF5MD_00, PF5_IN, PF5_OUT), 672*4882a593Smuzhiyun PINMUX_DATA(FCDE_MARK, PF5MD_01), 673*4882a593Smuzhiyun PINMUX_DATA(LCD_DATA5_MARK, PF5MD_10), 674*4882a593Smuzhiyun PINMUX_DATA(SSI1_PF_MARK, PF5MD_11), 675*4882a593Smuzhiyun 676*4882a593Smuzhiyun PINMUX_DATA(PF4_DATA, PF4MD_00, PF4_IN, PF4_OUT), 677*4882a593Smuzhiyun PINMUX_DATA(FWE_MARK, PF4MD_01), 678*4882a593Smuzhiyun PINMUX_DATA(LCD_DATA4_MARK, PF4MD_10), 679*4882a593Smuzhiyun PINMUX_DATA(SSCK1_PF_MARK, PF4MD_11), 680*4882a593Smuzhiyun 681*4882a593Smuzhiyun PINMUX_DATA(PF3_DATA, PF3MD_00, PF3_IN, PF3_OUT), 682*4882a593Smuzhiyun PINMUX_DATA(TCLKD_PF_MARK, PF3MD_01), 683*4882a593Smuzhiyun PINMUX_DATA(LCD_DATA3_MARK, PF3MD_10), 684*4882a593Smuzhiyun PINMUX_DATA(SCS0_PF_MARK, PF3MD_11), 685*4882a593Smuzhiyun 686*4882a593Smuzhiyun PINMUX_DATA(PF2_DATA, PF2MD_00, PF2_IN, PF2_OUT), 687*4882a593Smuzhiyun PINMUX_DATA(TCLKC_PF_MARK, PF2MD_01), 688*4882a593Smuzhiyun PINMUX_DATA(LCD_DATA2_MARK, PF2MD_10), 689*4882a593Smuzhiyun PINMUX_DATA(SSO0_PF_MARK, PF2MD_11), 690*4882a593Smuzhiyun 691*4882a593Smuzhiyun PINMUX_DATA(PF1_DATA, PF1MD_00, PF1_IN, PF1_OUT), 692*4882a593Smuzhiyun PINMUX_DATA(TCLKB_PF_MARK, PF1MD_01), 693*4882a593Smuzhiyun PINMUX_DATA(LCD_DATA1_MARK, PF1MD_10), 694*4882a593Smuzhiyun PINMUX_DATA(SSI0_PF_MARK, PF1MD_11), 695*4882a593Smuzhiyun 696*4882a593Smuzhiyun PINMUX_DATA(PF0_DATA, PF0MD_00, PF0_IN, PF0_OUT), 697*4882a593Smuzhiyun PINMUX_DATA(TCLKA_PF_MARK, PF0MD_01), 698*4882a593Smuzhiyun PINMUX_DATA(LCD_DATA0_MARK, PF0MD_10), 699*4882a593Smuzhiyun PINMUX_DATA(SSCK0_PF_MARK, PF0MD_11), 700*4882a593Smuzhiyun }; 701*4882a593Smuzhiyun 702*4882a593Smuzhiyun static const struct sh_pfc_pin pinmux_pins[] = { 703*4882a593Smuzhiyun /* PA */ 704*4882a593Smuzhiyun PINMUX_GPIO(PA7), 705*4882a593Smuzhiyun PINMUX_GPIO(PA6), 706*4882a593Smuzhiyun PINMUX_GPIO(PA5), 707*4882a593Smuzhiyun PINMUX_GPIO(PA4), 708*4882a593Smuzhiyun PINMUX_GPIO(PA3), 709*4882a593Smuzhiyun PINMUX_GPIO(PA2), 710*4882a593Smuzhiyun PINMUX_GPIO(PA1), 711*4882a593Smuzhiyun PINMUX_GPIO(PA0), 712*4882a593Smuzhiyun 713*4882a593Smuzhiyun /* PB */ 714*4882a593Smuzhiyun PINMUX_GPIO(PB12), 715*4882a593Smuzhiyun PINMUX_GPIO(PB11), 716*4882a593Smuzhiyun PINMUX_GPIO(PB10), 717*4882a593Smuzhiyun PINMUX_GPIO(PB9), 718*4882a593Smuzhiyun PINMUX_GPIO(PB8), 719*4882a593Smuzhiyun PINMUX_GPIO(PB7), 720*4882a593Smuzhiyun PINMUX_GPIO(PB6), 721*4882a593Smuzhiyun PINMUX_GPIO(PB5), 722*4882a593Smuzhiyun PINMUX_GPIO(PB4), 723*4882a593Smuzhiyun PINMUX_GPIO(PB3), 724*4882a593Smuzhiyun PINMUX_GPIO(PB2), 725*4882a593Smuzhiyun PINMUX_GPIO(PB1), 726*4882a593Smuzhiyun PINMUX_GPIO(PB0), 727*4882a593Smuzhiyun 728*4882a593Smuzhiyun /* PC */ 729*4882a593Smuzhiyun PINMUX_GPIO(PC14), 730*4882a593Smuzhiyun PINMUX_GPIO(PC13), 731*4882a593Smuzhiyun PINMUX_GPIO(PC12), 732*4882a593Smuzhiyun PINMUX_GPIO(PC11), 733*4882a593Smuzhiyun PINMUX_GPIO(PC10), 734*4882a593Smuzhiyun PINMUX_GPIO(PC9), 735*4882a593Smuzhiyun PINMUX_GPIO(PC8), 736*4882a593Smuzhiyun PINMUX_GPIO(PC7), 737*4882a593Smuzhiyun PINMUX_GPIO(PC6), 738*4882a593Smuzhiyun PINMUX_GPIO(PC5), 739*4882a593Smuzhiyun PINMUX_GPIO(PC4), 740*4882a593Smuzhiyun PINMUX_GPIO(PC3), 741*4882a593Smuzhiyun PINMUX_GPIO(PC2), 742*4882a593Smuzhiyun PINMUX_GPIO(PC1), 743*4882a593Smuzhiyun PINMUX_GPIO(PC0), 744*4882a593Smuzhiyun 745*4882a593Smuzhiyun /* PD */ 746*4882a593Smuzhiyun PINMUX_GPIO(PD15), 747*4882a593Smuzhiyun PINMUX_GPIO(PD14), 748*4882a593Smuzhiyun PINMUX_GPIO(PD13), 749*4882a593Smuzhiyun PINMUX_GPIO(PD12), 750*4882a593Smuzhiyun PINMUX_GPIO(PD11), 751*4882a593Smuzhiyun PINMUX_GPIO(PD10), 752*4882a593Smuzhiyun PINMUX_GPIO(PD9), 753*4882a593Smuzhiyun PINMUX_GPIO(PD8), 754*4882a593Smuzhiyun PINMUX_GPIO(PD7), 755*4882a593Smuzhiyun PINMUX_GPIO(PD6), 756*4882a593Smuzhiyun PINMUX_GPIO(PD5), 757*4882a593Smuzhiyun PINMUX_GPIO(PD4), 758*4882a593Smuzhiyun PINMUX_GPIO(PD3), 759*4882a593Smuzhiyun PINMUX_GPIO(PD2), 760*4882a593Smuzhiyun PINMUX_GPIO(PD1), 761*4882a593Smuzhiyun PINMUX_GPIO(PD0), 762*4882a593Smuzhiyun 763*4882a593Smuzhiyun /* PE */ 764*4882a593Smuzhiyun PINMUX_GPIO(PE15), 765*4882a593Smuzhiyun PINMUX_GPIO(PE14), 766*4882a593Smuzhiyun PINMUX_GPIO(PE13), 767*4882a593Smuzhiyun PINMUX_GPIO(PE12), 768*4882a593Smuzhiyun PINMUX_GPIO(PE11), 769*4882a593Smuzhiyun PINMUX_GPIO(PE10), 770*4882a593Smuzhiyun PINMUX_GPIO(PE9), 771*4882a593Smuzhiyun PINMUX_GPIO(PE8), 772*4882a593Smuzhiyun PINMUX_GPIO(PE7), 773*4882a593Smuzhiyun PINMUX_GPIO(PE6), 774*4882a593Smuzhiyun PINMUX_GPIO(PE5), 775*4882a593Smuzhiyun PINMUX_GPIO(PE4), 776*4882a593Smuzhiyun PINMUX_GPIO(PE3), 777*4882a593Smuzhiyun PINMUX_GPIO(PE2), 778*4882a593Smuzhiyun PINMUX_GPIO(PE1), 779*4882a593Smuzhiyun PINMUX_GPIO(PE0), 780*4882a593Smuzhiyun 781*4882a593Smuzhiyun /* PF */ 782*4882a593Smuzhiyun PINMUX_GPIO(PF30), 783*4882a593Smuzhiyun PINMUX_GPIO(PF29), 784*4882a593Smuzhiyun PINMUX_GPIO(PF28), 785*4882a593Smuzhiyun PINMUX_GPIO(PF27), 786*4882a593Smuzhiyun PINMUX_GPIO(PF26), 787*4882a593Smuzhiyun PINMUX_GPIO(PF25), 788*4882a593Smuzhiyun PINMUX_GPIO(PF24), 789*4882a593Smuzhiyun PINMUX_GPIO(PF23), 790*4882a593Smuzhiyun PINMUX_GPIO(PF22), 791*4882a593Smuzhiyun PINMUX_GPIO(PF21), 792*4882a593Smuzhiyun PINMUX_GPIO(PF20), 793*4882a593Smuzhiyun PINMUX_GPIO(PF19), 794*4882a593Smuzhiyun PINMUX_GPIO(PF18), 795*4882a593Smuzhiyun PINMUX_GPIO(PF17), 796*4882a593Smuzhiyun PINMUX_GPIO(PF16), 797*4882a593Smuzhiyun PINMUX_GPIO(PF15), 798*4882a593Smuzhiyun PINMUX_GPIO(PF14), 799*4882a593Smuzhiyun PINMUX_GPIO(PF13), 800*4882a593Smuzhiyun PINMUX_GPIO(PF12), 801*4882a593Smuzhiyun PINMUX_GPIO(PF11), 802*4882a593Smuzhiyun PINMUX_GPIO(PF10), 803*4882a593Smuzhiyun PINMUX_GPIO(PF9), 804*4882a593Smuzhiyun PINMUX_GPIO(PF8), 805*4882a593Smuzhiyun PINMUX_GPIO(PF7), 806*4882a593Smuzhiyun PINMUX_GPIO(PF6), 807*4882a593Smuzhiyun PINMUX_GPIO(PF5), 808*4882a593Smuzhiyun PINMUX_GPIO(PF4), 809*4882a593Smuzhiyun PINMUX_GPIO(PF3), 810*4882a593Smuzhiyun PINMUX_GPIO(PF2), 811*4882a593Smuzhiyun PINMUX_GPIO(PF1), 812*4882a593Smuzhiyun PINMUX_GPIO(PF0), 813*4882a593Smuzhiyun }; 814*4882a593Smuzhiyun 815*4882a593Smuzhiyun #define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins) 816*4882a593Smuzhiyun 817*4882a593Smuzhiyun static const struct pinmux_func pinmux_func_gpios[] = { 818*4882a593Smuzhiyun /* INTC */ 819*4882a593Smuzhiyun GPIO_FN(PINT7_PB), 820*4882a593Smuzhiyun GPIO_FN(PINT6_PB), 821*4882a593Smuzhiyun GPIO_FN(PINT5_PB), 822*4882a593Smuzhiyun GPIO_FN(PINT4_PB), 823*4882a593Smuzhiyun GPIO_FN(PINT3_PB), 824*4882a593Smuzhiyun GPIO_FN(PINT2_PB), 825*4882a593Smuzhiyun GPIO_FN(PINT1_PB), 826*4882a593Smuzhiyun GPIO_FN(PINT0_PB), 827*4882a593Smuzhiyun GPIO_FN(PINT7_PD), 828*4882a593Smuzhiyun GPIO_FN(PINT6_PD), 829*4882a593Smuzhiyun GPIO_FN(PINT5_PD), 830*4882a593Smuzhiyun GPIO_FN(PINT4_PD), 831*4882a593Smuzhiyun GPIO_FN(PINT3_PD), 832*4882a593Smuzhiyun GPIO_FN(PINT2_PD), 833*4882a593Smuzhiyun GPIO_FN(PINT1_PD), 834*4882a593Smuzhiyun GPIO_FN(PINT0_PD), 835*4882a593Smuzhiyun GPIO_FN(IRQ7_PB), 836*4882a593Smuzhiyun GPIO_FN(IRQ6_PB), 837*4882a593Smuzhiyun GPIO_FN(IRQ5_PB), 838*4882a593Smuzhiyun GPIO_FN(IRQ4_PB), 839*4882a593Smuzhiyun GPIO_FN(IRQ3_PB), 840*4882a593Smuzhiyun GPIO_FN(IRQ2_PB), 841*4882a593Smuzhiyun GPIO_FN(IRQ1_PB), 842*4882a593Smuzhiyun GPIO_FN(IRQ0_PB), 843*4882a593Smuzhiyun GPIO_FN(IRQ7_PD), 844*4882a593Smuzhiyun GPIO_FN(IRQ6_PD), 845*4882a593Smuzhiyun GPIO_FN(IRQ5_PD), 846*4882a593Smuzhiyun GPIO_FN(IRQ4_PD), 847*4882a593Smuzhiyun GPIO_FN(IRQ3_PD), 848*4882a593Smuzhiyun GPIO_FN(IRQ2_PD), 849*4882a593Smuzhiyun GPIO_FN(IRQ1_PD), 850*4882a593Smuzhiyun GPIO_FN(IRQ0_PD), 851*4882a593Smuzhiyun GPIO_FN(IRQ7_PE), 852*4882a593Smuzhiyun GPIO_FN(IRQ6_PE), 853*4882a593Smuzhiyun GPIO_FN(IRQ5_PE), 854*4882a593Smuzhiyun GPIO_FN(IRQ4_PE), 855*4882a593Smuzhiyun GPIO_FN(IRQ3_PE), 856*4882a593Smuzhiyun GPIO_FN(IRQ2_PE), 857*4882a593Smuzhiyun GPIO_FN(IRQ1_PE), 858*4882a593Smuzhiyun GPIO_FN(IRQ0_PE), 859*4882a593Smuzhiyun 860*4882a593Smuzhiyun GPIO_FN(WDTOVF), 861*4882a593Smuzhiyun GPIO_FN(IRQOUT), 862*4882a593Smuzhiyun GPIO_FN(REFOUT), 863*4882a593Smuzhiyun GPIO_FN(IRQOUT_REFOUT), 864*4882a593Smuzhiyun GPIO_FN(UBCTRG), 865*4882a593Smuzhiyun 866*4882a593Smuzhiyun /* CAN */ 867*4882a593Smuzhiyun GPIO_FN(CTX1), 868*4882a593Smuzhiyun GPIO_FN(CRX1), 869*4882a593Smuzhiyun GPIO_FN(CTX0), 870*4882a593Smuzhiyun GPIO_FN(CTX0_CTX1), 871*4882a593Smuzhiyun GPIO_FN(CRX0), 872*4882a593Smuzhiyun GPIO_FN(CRX0_CRX1), 873*4882a593Smuzhiyun 874*4882a593Smuzhiyun /* IIC3 */ 875*4882a593Smuzhiyun GPIO_FN(SDA3), 876*4882a593Smuzhiyun GPIO_FN(SCL3), 877*4882a593Smuzhiyun GPIO_FN(SDA2), 878*4882a593Smuzhiyun GPIO_FN(SCL2), 879*4882a593Smuzhiyun GPIO_FN(SDA1), 880*4882a593Smuzhiyun GPIO_FN(SCL1), 881*4882a593Smuzhiyun GPIO_FN(SDA0), 882*4882a593Smuzhiyun GPIO_FN(SCL0), 883*4882a593Smuzhiyun 884*4882a593Smuzhiyun /* DMAC */ 885*4882a593Smuzhiyun GPIO_FN(TEND0_PD), 886*4882a593Smuzhiyun GPIO_FN(TEND0_PE), 887*4882a593Smuzhiyun GPIO_FN(DACK0_PD), 888*4882a593Smuzhiyun GPIO_FN(DACK0_PE), 889*4882a593Smuzhiyun GPIO_FN(DREQ0_PD), 890*4882a593Smuzhiyun GPIO_FN(DREQ0_PE), 891*4882a593Smuzhiyun GPIO_FN(TEND1_PD), 892*4882a593Smuzhiyun GPIO_FN(TEND1_PE), 893*4882a593Smuzhiyun GPIO_FN(DACK1_PD), 894*4882a593Smuzhiyun GPIO_FN(DACK1_PE), 895*4882a593Smuzhiyun GPIO_FN(DREQ1_PD), 896*4882a593Smuzhiyun GPIO_FN(DREQ1_PE), 897*4882a593Smuzhiyun GPIO_FN(DACK2), 898*4882a593Smuzhiyun GPIO_FN(DREQ2), 899*4882a593Smuzhiyun GPIO_FN(DACK3), 900*4882a593Smuzhiyun GPIO_FN(DREQ3), 901*4882a593Smuzhiyun 902*4882a593Smuzhiyun /* ADC */ 903*4882a593Smuzhiyun GPIO_FN(ADTRG_PD), 904*4882a593Smuzhiyun GPIO_FN(ADTRG_PE), 905*4882a593Smuzhiyun 906*4882a593Smuzhiyun /* BSC */ 907*4882a593Smuzhiyun GPIO_FN(D31), 908*4882a593Smuzhiyun GPIO_FN(D30), 909*4882a593Smuzhiyun GPIO_FN(D29), 910*4882a593Smuzhiyun GPIO_FN(D28), 911*4882a593Smuzhiyun GPIO_FN(D27), 912*4882a593Smuzhiyun GPIO_FN(D26), 913*4882a593Smuzhiyun GPIO_FN(D25), 914*4882a593Smuzhiyun GPIO_FN(D24), 915*4882a593Smuzhiyun GPIO_FN(D23), 916*4882a593Smuzhiyun GPIO_FN(D22), 917*4882a593Smuzhiyun GPIO_FN(D21), 918*4882a593Smuzhiyun GPIO_FN(D20), 919*4882a593Smuzhiyun GPIO_FN(D19), 920*4882a593Smuzhiyun GPIO_FN(D18), 921*4882a593Smuzhiyun GPIO_FN(D17), 922*4882a593Smuzhiyun GPIO_FN(D16), 923*4882a593Smuzhiyun GPIO_FN(A25), 924*4882a593Smuzhiyun GPIO_FN(A24), 925*4882a593Smuzhiyun GPIO_FN(A23), 926*4882a593Smuzhiyun GPIO_FN(A22), 927*4882a593Smuzhiyun GPIO_FN(A21), 928*4882a593Smuzhiyun GPIO_FN(CS4), 929*4882a593Smuzhiyun GPIO_FN(MRES), 930*4882a593Smuzhiyun GPIO_FN(BS), 931*4882a593Smuzhiyun GPIO_FN(IOIS16), 932*4882a593Smuzhiyun GPIO_FN(CS1), 933*4882a593Smuzhiyun GPIO_FN(CS6_CE1B), 934*4882a593Smuzhiyun GPIO_FN(CE2B), 935*4882a593Smuzhiyun GPIO_FN(CS5_CE1A), 936*4882a593Smuzhiyun GPIO_FN(CE2A), 937*4882a593Smuzhiyun GPIO_FN(FRAME), 938*4882a593Smuzhiyun GPIO_FN(WAIT), 939*4882a593Smuzhiyun GPIO_FN(RDWR), 940*4882a593Smuzhiyun GPIO_FN(CKE), 941*4882a593Smuzhiyun GPIO_FN(CASU), 942*4882a593Smuzhiyun GPIO_FN(BREQ), 943*4882a593Smuzhiyun GPIO_FN(RASU), 944*4882a593Smuzhiyun GPIO_FN(BACK), 945*4882a593Smuzhiyun GPIO_FN(CASL), 946*4882a593Smuzhiyun GPIO_FN(RASL), 947*4882a593Smuzhiyun GPIO_FN(WE3_DQMUU_AH_ICIO_WR), 948*4882a593Smuzhiyun GPIO_FN(WE2_DQMUL_ICIORD), 949*4882a593Smuzhiyun GPIO_FN(WE1_DQMLU_WE), 950*4882a593Smuzhiyun GPIO_FN(WE0_DQMLL), 951*4882a593Smuzhiyun GPIO_FN(CS3), 952*4882a593Smuzhiyun GPIO_FN(CS2), 953*4882a593Smuzhiyun GPIO_FN(A1), 954*4882a593Smuzhiyun GPIO_FN(A0), 955*4882a593Smuzhiyun GPIO_FN(CS7), 956*4882a593Smuzhiyun 957*4882a593Smuzhiyun /* TMU */ 958*4882a593Smuzhiyun GPIO_FN(TIOC4D), 959*4882a593Smuzhiyun GPIO_FN(TIOC4C), 960*4882a593Smuzhiyun GPIO_FN(TIOC4B), 961*4882a593Smuzhiyun GPIO_FN(TIOC4A), 962*4882a593Smuzhiyun GPIO_FN(TIOC3D), 963*4882a593Smuzhiyun GPIO_FN(TIOC3C), 964*4882a593Smuzhiyun GPIO_FN(TIOC3B), 965*4882a593Smuzhiyun GPIO_FN(TIOC3A), 966*4882a593Smuzhiyun GPIO_FN(TIOC2B), 967*4882a593Smuzhiyun GPIO_FN(TIOC1B), 968*4882a593Smuzhiyun GPIO_FN(TIOC2A), 969*4882a593Smuzhiyun GPIO_FN(TIOC1A), 970*4882a593Smuzhiyun GPIO_FN(TIOC0D), 971*4882a593Smuzhiyun GPIO_FN(TIOC0C), 972*4882a593Smuzhiyun GPIO_FN(TIOC0B), 973*4882a593Smuzhiyun GPIO_FN(TIOC0A), 974*4882a593Smuzhiyun GPIO_FN(TCLKD_PD), 975*4882a593Smuzhiyun GPIO_FN(TCLKC_PD), 976*4882a593Smuzhiyun GPIO_FN(TCLKB_PD), 977*4882a593Smuzhiyun GPIO_FN(TCLKA_PD), 978*4882a593Smuzhiyun GPIO_FN(TCLKD_PF), 979*4882a593Smuzhiyun GPIO_FN(TCLKC_PF), 980*4882a593Smuzhiyun GPIO_FN(TCLKB_PF), 981*4882a593Smuzhiyun GPIO_FN(TCLKA_PF), 982*4882a593Smuzhiyun 983*4882a593Smuzhiyun /* SSU */ 984*4882a593Smuzhiyun GPIO_FN(SCS0_PD), 985*4882a593Smuzhiyun GPIO_FN(SSO0_PD), 986*4882a593Smuzhiyun GPIO_FN(SSI0_PD), 987*4882a593Smuzhiyun GPIO_FN(SSCK0_PD), 988*4882a593Smuzhiyun GPIO_FN(SCS0_PF), 989*4882a593Smuzhiyun GPIO_FN(SSO0_PF), 990*4882a593Smuzhiyun GPIO_FN(SSI0_PF), 991*4882a593Smuzhiyun GPIO_FN(SSCK0_PF), 992*4882a593Smuzhiyun GPIO_FN(SCS1_PD), 993*4882a593Smuzhiyun GPIO_FN(SSO1_PD), 994*4882a593Smuzhiyun GPIO_FN(SSI1_PD), 995*4882a593Smuzhiyun GPIO_FN(SSCK1_PD), 996*4882a593Smuzhiyun GPIO_FN(SCS1_PF), 997*4882a593Smuzhiyun GPIO_FN(SSO1_PF), 998*4882a593Smuzhiyun GPIO_FN(SSI1_PF), 999*4882a593Smuzhiyun GPIO_FN(SSCK1_PF), 1000*4882a593Smuzhiyun 1001*4882a593Smuzhiyun /* SCIF */ 1002*4882a593Smuzhiyun GPIO_FN(TXD0), 1003*4882a593Smuzhiyun GPIO_FN(RXD0), 1004*4882a593Smuzhiyun GPIO_FN(SCK0), 1005*4882a593Smuzhiyun GPIO_FN(TXD1), 1006*4882a593Smuzhiyun GPIO_FN(RXD1), 1007*4882a593Smuzhiyun GPIO_FN(SCK1), 1008*4882a593Smuzhiyun GPIO_FN(TXD2), 1009*4882a593Smuzhiyun GPIO_FN(RXD2), 1010*4882a593Smuzhiyun GPIO_FN(SCK2), 1011*4882a593Smuzhiyun GPIO_FN(RTS3), 1012*4882a593Smuzhiyun GPIO_FN(CTS3), 1013*4882a593Smuzhiyun GPIO_FN(TXD3), 1014*4882a593Smuzhiyun GPIO_FN(RXD3), 1015*4882a593Smuzhiyun GPIO_FN(SCK3), 1016*4882a593Smuzhiyun 1017*4882a593Smuzhiyun /* SSI */ 1018*4882a593Smuzhiyun GPIO_FN(AUDIO_CLK), 1019*4882a593Smuzhiyun GPIO_FN(SSIDATA3), 1020*4882a593Smuzhiyun GPIO_FN(SSIWS3), 1021*4882a593Smuzhiyun GPIO_FN(SSISCK3), 1022*4882a593Smuzhiyun GPIO_FN(SSIDATA2), 1023*4882a593Smuzhiyun GPIO_FN(SSIWS2), 1024*4882a593Smuzhiyun GPIO_FN(SSISCK2), 1025*4882a593Smuzhiyun GPIO_FN(SSIDATA1), 1026*4882a593Smuzhiyun GPIO_FN(SSIWS1), 1027*4882a593Smuzhiyun GPIO_FN(SSISCK1), 1028*4882a593Smuzhiyun GPIO_FN(SSIDATA0), 1029*4882a593Smuzhiyun GPIO_FN(SSIWS0), 1030*4882a593Smuzhiyun GPIO_FN(SSISCK0), 1031*4882a593Smuzhiyun 1032*4882a593Smuzhiyun /* FLCTL */ 1033*4882a593Smuzhiyun GPIO_FN(FCE), 1034*4882a593Smuzhiyun GPIO_FN(FRB), 1035*4882a593Smuzhiyun GPIO_FN(NAF7), 1036*4882a593Smuzhiyun GPIO_FN(NAF6), 1037*4882a593Smuzhiyun GPIO_FN(NAF5), 1038*4882a593Smuzhiyun GPIO_FN(NAF4), 1039*4882a593Smuzhiyun GPIO_FN(NAF3), 1040*4882a593Smuzhiyun GPIO_FN(NAF2), 1041*4882a593Smuzhiyun GPIO_FN(NAF1), 1042*4882a593Smuzhiyun GPIO_FN(NAF0), 1043*4882a593Smuzhiyun GPIO_FN(FSC), 1044*4882a593Smuzhiyun GPIO_FN(FOE), 1045*4882a593Smuzhiyun GPIO_FN(FCDE), 1046*4882a593Smuzhiyun GPIO_FN(FWE), 1047*4882a593Smuzhiyun 1048*4882a593Smuzhiyun /* LCDC */ 1049*4882a593Smuzhiyun GPIO_FN(LCD_VEPWC), 1050*4882a593Smuzhiyun GPIO_FN(LCD_VCPWC), 1051*4882a593Smuzhiyun GPIO_FN(LCD_CLK), 1052*4882a593Smuzhiyun GPIO_FN(LCD_FLM), 1053*4882a593Smuzhiyun GPIO_FN(LCD_M_DISP), 1054*4882a593Smuzhiyun GPIO_FN(LCD_CL2), 1055*4882a593Smuzhiyun GPIO_FN(LCD_CL1), 1056*4882a593Smuzhiyun GPIO_FN(LCD_DON), 1057*4882a593Smuzhiyun GPIO_FN(LCD_DATA15), 1058*4882a593Smuzhiyun GPIO_FN(LCD_DATA14), 1059*4882a593Smuzhiyun GPIO_FN(LCD_DATA13), 1060*4882a593Smuzhiyun GPIO_FN(LCD_DATA12), 1061*4882a593Smuzhiyun GPIO_FN(LCD_DATA11), 1062*4882a593Smuzhiyun GPIO_FN(LCD_DATA10), 1063*4882a593Smuzhiyun GPIO_FN(LCD_DATA9), 1064*4882a593Smuzhiyun GPIO_FN(LCD_DATA8), 1065*4882a593Smuzhiyun GPIO_FN(LCD_DATA7), 1066*4882a593Smuzhiyun GPIO_FN(LCD_DATA6), 1067*4882a593Smuzhiyun GPIO_FN(LCD_DATA5), 1068*4882a593Smuzhiyun GPIO_FN(LCD_DATA4), 1069*4882a593Smuzhiyun GPIO_FN(LCD_DATA3), 1070*4882a593Smuzhiyun GPIO_FN(LCD_DATA2), 1071*4882a593Smuzhiyun GPIO_FN(LCD_DATA1), 1072*4882a593Smuzhiyun GPIO_FN(LCD_DATA0), 1073*4882a593Smuzhiyun }; 1074*4882a593Smuzhiyun 1075*4882a593Smuzhiyun static const struct pinmux_cfg_reg pinmux_config_regs[] = { 1076*4882a593Smuzhiyun { PINMUX_CFG_REG("PBIORL", 0xfffe3886, 16, 1, GROUP( 1077*4882a593Smuzhiyun 0, 0, 1078*4882a593Smuzhiyun 0, 0, 1079*4882a593Smuzhiyun 0, 0, 1080*4882a593Smuzhiyun 0, 0, 1081*4882a593Smuzhiyun PB11_IN, PB11_OUT, 1082*4882a593Smuzhiyun PB10_IN, PB10_OUT, 1083*4882a593Smuzhiyun PB9_IN, PB9_OUT, 1084*4882a593Smuzhiyun PB8_IN, PB8_OUT, 1085*4882a593Smuzhiyun 0, 0, 1086*4882a593Smuzhiyun 0, 0, 1087*4882a593Smuzhiyun 0, 0, 1088*4882a593Smuzhiyun 0, 0, 1089*4882a593Smuzhiyun 0, 0, 1090*4882a593Smuzhiyun 0, 0, 1091*4882a593Smuzhiyun 0, 0, 1092*4882a593Smuzhiyun 0, 0 )) 1093*4882a593Smuzhiyun }, 1094*4882a593Smuzhiyun { PINMUX_CFG_REG("PBCRL4", 0xfffe3890, 16, 4, GROUP( 1095*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1096*4882a593Smuzhiyun 1097*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1098*4882a593Smuzhiyun 1099*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1100*4882a593Smuzhiyun 1101*4882a593Smuzhiyun PB12MD_00, PB12MD_01, PB12MD_10, PB12MD_11, 1102*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1103*4882a593Smuzhiyun }, 1104*4882a593Smuzhiyun { PINMUX_CFG_REG("PBCRL3", 0xfffe3892, 16, 4, GROUP( 1105*4882a593Smuzhiyun PB11MD_0, PB11MD_1, 1106*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1107*4882a593Smuzhiyun 1108*4882a593Smuzhiyun PB10MD_0, PB10MD_1, 1109*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1110*4882a593Smuzhiyun 1111*4882a593Smuzhiyun PB9MD_00, PB9MD_01, PB9MD_10, 0, 1112*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1113*4882a593Smuzhiyun 1114*4882a593Smuzhiyun PB8MD_00, PB8MD_01, PB8MD_10, 0, 1115*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1116*4882a593Smuzhiyun }, 1117*4882a593Smuzhiyun { PINMUX_CFG_REG("PBCRL2", 0xfffe3894, 16, 4, GROUP( 1118*4882a593Smuzhiyun PB7MD_00, PB7MD_01, PB7MD_10, PB7MD_11, 1119*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1120*4882a593Smuzhiyun 1121*4882a593Smuzhiyun PB6MD_00, PB6MD_01, PB6MD_10, PB6MD_11, 1122*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1123*4882a593Smuzhiyun 1124*4882a593Smuzhiyun PB5MD_00, PB5MD_01, PB5MD_10, PB5MD_11, 1125*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1126*4882a593Smuzhiyun 1127*4882a593Smuzhiyun PB4MD_00, PB4MD_01, PB4MD_10, PB4MD_11, 1128*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1129*4882a593Smuzhiyun }, 1130*4882a593Smuzhiyun { PINMUX_CFG_REG("PBCRL1", 0xfffe3896, 16, 4, GROUP( 1131*4882a593Smuzhiyun PB3MD_00, PB3MD_01, PB3MD_10, PB3MD_11, 1132*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1133*4882a593Smuzhiyun 1134*4882a593Smuzhiyun PB2MD_00, PB2MD_01, PB2MD_10, PB2MD_11, 1135*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1136*4882a593Smuzhiyun 1137*4882a593Smuzhiyun PB1MD_00, PB1MD_01, PB1MD_10, PB1MD_11, 1138*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1139*4882a593Smuzhiyun 1140*4882a593Smuzhiyun PB0MD_00, PB0MD_01, PB0MD_10, PB0MD_11, 1141*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1142*4882a593Smuzhiyun }, 1143*4882a593Smuzhiyun { PINMUX_CFG_REG("IFCR", 0xfffe38a2, 16, 4, GROUP( 1144*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1145*4882a593Smuzhiyun 1146*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1147*4882a593Smuzhiyun 1148*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1149*4882a593Smuzhiyun 1150*4882a593Smuzhiyun PB12IRQ_00, PB12IRQ_01, PB12IRQ_10, 0, 1151*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1152*4882a593Smuzhiyun }, 1153*4882a593Smuzhiyun { PINMUX_CFG_REG("PCIORL", 0xfffe3906, 16, 1, GROUP( 1154*4882a593Smuzhiyun 0, 0, 1155*4882a593Smuzhiyun PC14_IN, PC14_OUT, 1156*4882a593Smuzhiyun PC13_IN, PC13_OUT, 1157*4882a593Smuzhiyun PC12_IN, PC12_OUT, 1158*4882a593Smuzhiyun PC11_IN, PC11_OUT, 1159*4882a593Smuzhiyun PC10_IN, PC10_OUT, 1160*4882a593Smuzhiyun PC9_IN, PC9_OUT, 1161*4882a593Smuzhiyun PC8_IN, PC8_OUT, 1162*4882a593Smuzhiyun PC7_IN, PC7_OUT, 1163*4882a593Smuzhiyun PC6_IN, PC6_OUT, 1164*4882a593Smuzhiyun PC5_IN, PC5_OUT, 1165*4882a593Smuzhiyun PC4_IN, PC4_OUT, 1166*4882a593Smuzhiyun PC3_IN, PC3_OUT, 1167*4882a593Smuzhiyun PC2_IN, PC2_OUT, 1168*4882a593Smuzhiyun PC1_IN, PC1_OUT, 1169*4882a593Smuzhiyun PC0_IN, PC0_OUT )) 1170*4882a593Smuzhiyun }, 1171*4882a593Smuzhiyun { PINMUX_CFG_REG("PCCRL4", 0xfffe3910, 16, 4, GROUP( 1172*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1173*4882a593Smuzhiyun 1174*4882a593Smuzhiyun PC14MD_0, PC14MD_1, 1175*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1176*4882a593Smuzhiyun 1177*4882a593Smuzhiyun PC13MD_0, PC13MD_1, 1178*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1179*4882a593Smuzhiyun 1180*4882a593Smuzhiyun PC12MD_0, PC12MD_1, 1181*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1182*4882a593Smuzhiyun }, 1183*4882a593Smuzhiyun { PINMUX_CFG_REG("PCCRL3", 0xfffe3912, 16, 4, GROUP( 1184*4882a593Smuzhiyun PC11MD_00, PC11MD_01, PC11MD_10, 0, 1185*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1186*4882a593Smuzhiyun 1187*4882a593Smuzhiyun PC10MD_00, PC10MD_01, PC10MD_10, 0, 1188*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1189*4882a593Smuzhiyun 1190*4882a593Smuzhiyun PC9MD_0, PC9MD_1, 1191*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1192*4882a593Smuzhiyun 1193*4882a593Smuzhiyun PC8MD_0, PC8MD_1, 1194*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1195*4882a593Smuzhiyun }, 1196*4882a593Smuzhiyun { PINMUX_CFG_REG("PCCRL2", 0xfffe3914, 16, 4, GROUP( 1197*4882a593Smuzhiyun PC7MD_0, PC7MD_1, 1198*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1199*4882a593Smuzhiyun 1200*4882a593Smuzhiyun PC6MD_0, PC6MD_1, 1201*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1202*4882a593Smuzhiyun 1203*4882a593Smuzhiyun PC5MD_0, PC5MD_1, 1204*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1205*4882a593Smuzhiyun 1206*4882a593Smuzhiyun PC4MD_0, PC4MD_1, 1207*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1208*4882a593Smuzhiyun }, 1209*4882a593Smuzhiyun { PINMUX_CFG_REG("PCCRL1", 0xfffe3916, 16, 4, GROUP( 1210*4882a593Smuzhiyun PC3MD_0, PC3MD_1, 1211*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1212*4882a593Smuzhiyun 1213*4882a593Smuzhiyun PC2MD_0, PC2MD_1, 1214*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1215*4882a593Smuzhiyun 1216*4882a593Smuzhiyun PC1MD_0, PC1MD_1, 1217*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1218*4882a593Smuzhiyun 1219*4882a593Smuzhiyun PC0MD_00, PC0MD_01, PC0MD_10, 0, 1220*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1221*4882a593Smuzhiyun }, 1222*4882a593Smuzhiyun { PINMUX_CFG_REG("PDIORL", 0xfffe3986, 16, 1, GROUP( 1223*4882a593Smuzhiyun PD15_IN, PD15_OUT, 1224*4882a593Smuzhiyun PD14_IN, PD14_OUT, 1225*4882a593Smuzhiyun PD13_IN, PD13_OUT, 1226*4882a593Smuzhiyun PD12_IN, PD12_OUT, 1227*4882a593Smuzhiyun PD11_IN, PD11_OUT, 1228*4882a593Smuzhiyun PD10_IN, PD10_OUT, 1229*4882a593Smuzhiyun PD9_IN, PD9_OUT, 1230*4882a593Smuzhiyun PD8_IN, PD8_OUT, 1231*4882a593Smuzhiyun PD7_IN, PD7_OUT, 1232*4882a593Smuzhiyun PD6_IN, PD6_OUT, 1233*4882a593Smuzhiyun PD5_IN, PD5_OUT, 1234*4882a593Smuzhiyun PD4_IN, PD4_OUT, 1235*4882a593Smuzhiyun PD3_IN, PD3_OUT, 1236*4882a593Smuzhiyun PD2_IN, PD2_OUT, 1237*4882a593Smuzhiyun PD1_IN, PD1_OUT, 1238*4882a593Smuzhiyun PD0_IN, PD0_OUT )) 1239*4882a593Smuzhiyun }, 1240*4882a593Smuzhiyun { PINMUX_CFG_REG("PDCRL4", 0xfffe3990, 16, 4, GROUP( 1241*4882a593Smuzhiyun PD15MD_000, PD15MD_001, PD15MD_010, 0, 1242*4882a593Smuzhiyun PD15MD_100, PD15MD_101, 0, 0, 1243*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 1244*4882a593Smuzhiyun 1245*4882a593Smuzhiyun PD14MD_000, PD14MD_001, PD14MD_010, 0, 1246*4882a593Smuzhiyun 0, PD14MD_101, 0, 0, 1247*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 1248*4882a593Smuzhiyun 1249*4882a593Smuzhiyun PD13MD_000, PD13MD_001, PD13MD_010, 0, 1250*4882a593Smuzhiyun PD13MD_100, PD13MD_101, 0, 0, 1251*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 1252*4882a593Smuzhiyun 1253*4882a593Smuzhiyun PD12MD_000, PD12MD_001, PD12MD_010, 0, 1254*4882a593Smuzhiyun PD12MD_100, PD12MD_101, 0, 0, 1255*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0 )) 1256*4882a593Smuzhiyun }, 1257*4882a593Smuzhiyun { PINMUX_CFG_REG("PDCRL3", 0xfffe3992, 16, 4, GROUP( 1258*4882a593Smuzhiyun PD11MD_000, PD11MD_001, PD11MD_010, 0, 1259*4882a593Smuzhiyun PD11MD_100, PD11MD_101, 0, 0, 1260*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 1261*4882a593Smuzhiyun 1262*4882a593Smuzhiyun PD10MD_000, PD10MD_001, PD10MD_010, 0, 1263*4882a593Smuzhiyun PD10MD_100, PD10MD_101, 0, 0, 1264*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 1265*4882a593Smuzhiyun 1266*4882a593Smuzhiyun PD9MD_000, PD9MD_001, PD9MD_010, 0, 1267*4882a593Smuzhiyun PD9MD_100, PD9MD_101, 0, 0, 1268*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 1269*4882a593Smuzhiyun 1270*4882a593Smuzhiyun PD8MD_000, PD8MD_001, PD8MD_010, 0, 1271*4882a593Smuzhiyun PD8MD_100, PD8MD_101, 0, 0, 1272*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0 )) 1273*4882a593Smuzhiyun }, 1274*4882a593Smuzhiyun { PINMUX_CFG_REG("PDCRL2", 0xfffe3994, 16, 4, GROUP( 1275*4882a593Smuzhiyun PD7MD_000, PD7MD_001, PD7MD_010, PD7MD_011, 1276*4882a593Smuzhiyun PD7MD_100, PD7MD_101, 0, 0, 1277*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 1278*4882a593Smuzhiyun 1279*4882a593Smuzhiyun PD6MD_000, PD6MD_001, PD6MD_010, PD6MD_011, 1280*4882a593Smuzhiyun PD6MD_100, PD6MD_101, 0, 0, 1281*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 1282*4882a593Smuzhiyun 1283*4882a593Smuzhiyun PD5MD_000, PD5MD_001, PD5MD_010, PD5MD_011, 1284*4882a593Smuzhiyun PD5MD_100, PD5MD_101, 0, 0, 1285*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 1286*4882a593Smuzhiyun 1287*4882a593Smuzhiyun PD4MD_000, PD4MD_001, PD4MD_010, PD4MD_011, 1288*4882a593Smuzhiyun PD4MD_100, PD4MD_101, 0, 0, 1289*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0 )) 1290*4882a593Smuzhiyun }, 1291*4882a593Smuzhiyun { PINMUX_CFG_REG("PDCRL1", 0xfffe3996, 16, 4, GROUP( 1292*4882a593Smuzhiyun PD3MD_000, PD3MD_001, PD3MD_010, PD3MD_011, 1293*4882a593Smuzhiyun PD3MD_100, PD3MD_101, 0, 0, 1294*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 1295*4882a593Smuzhiyun 1296*4882a593Smuzhiyun PD2MD_000, PD2MD_001, PD2MD_010, PD2MD_011, 1297*4882a593Smuzhiyun PD2MD_100, PD2MD_101, 0, 0, 1298*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 1299*4882a593Smuzhiyun 1300*4882a593Smuzhiyun PD1MD_000, PD1MD_001, PD1MD_010, PD1MD_011, 1301*4882a593Smuzhiyun PD1MD_100, PD1MD_101, 0, 0, 1302*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 1303*4882a593Smuzhiyun 1304*4882a593Smuzhiyun PD0MD_000, PD0MD_001, PD0MD_010, PD0MD_011, 1305*4882a593Smuzhiyun PD0MD_100, PD0MD_101, 0, 0, 1306*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0 )) 1307*4882a593Smuzhiyun }, 1308*4882a593Smuzhiyun { PINMUX_CFG_REG("PEIORL", 0xfffe3a06, 16, 1, GROUP( 1309*4882a593Smuzhiyun PE15_IN, PE15_OUT, 1310*4882a593Smuzhiyun PE14_IN, PE14_OUT, 1311*4882a593Smuzhiyun PE13_IN, PE13_OUT, 1312*4882a593Smuzhiyun PE12_IN, PE12_OUT, 1313*4882a593Smuzhiyun PE11_IN, PE11_OUT, 1314*4882a593Smuzhiyun PE10_IN, PE10_OUT, 1315*4882a593Smuzhiyun PE9_IN, PE9_OUT, 1316*4882a593Smuzhiyun PE8_IN, PE8_OUT, 1317*4882a593Smuzhiyun PE7_IN, PE7_OUT, 1318*4882a593Smuzhiyun PE6_IN, PE6_OUT, 1319*4882a593Smuzhiyun PE5_IN, PE5_OUT, 1320*4882a593Smuzhiyun PE4_IN, PE4_OUT, 1321*4882a593Smuzhiyun PE3_IN, PE3_OUT, 1322*4882a593Smuzhiyun PE2_IN, PE2_OUT, 1323*4882a593Smuzhiyun PE1_IN, PE1_OUT, 1324*4882a593Smuzhiyun PE0_IN, PE0_OUT )) 1325*4882a593Smuzhiyun }, 1326*4882a593Smuzhiyun { PINMUX_CFG_REG("PECRL4", 0xfffe3a10, 16, 4, GROUP( 1327*4882a593Smuzhiyun PE15MD_00, PE15MD_01, 0, PE15MD_11, 1328*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1329*4882a593Smuzhiyun 1330*4882a593Smuzhiyun PE14MD_00, PE14MD_01, 0, PE14MD_11, 1331*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1332*4882a593Smuzhiyun 1333*4882a593Smuzhiyun PE13MD_00, 0, 0, PE13MD_11, 1334*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1335*4882a593Smuzhiyun 1336*4882a593Smuzhiyun PE12MD_00, 0, 0, PE12MD_11, 1337*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1338*4882a593Smuzhiyun }, 1339*4882a593Smuzhiyun { PINMUX_CFG_REG("PECRL3", 0xfffe3a12, 16, 4, GROUP( 1340*4882a593Smuzhiyun PE11MD_000, PE11MD_001, PE11MD_010, 0, 1341*4882a593Smuzhiyun PE11MD_100, 0, 0, 0, 1342*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 1343*4882a593Smuzhiyun 1344*4882a593Smuzhiyun PE10MD_000, PE10MD_001, PE10MD_010, 0, 1345*4882a593Smuzhiyun PE10MD_100, 0, 0, 0, 1346*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 1347*4882a593Smuzhiyun 1348*4882a593Smuzhiyun PE9MD_00, PE9MD_01, PE9MD_10, PE9MD_11, 1349*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1350*4882a593Smuzhiyun 1351*4882a593Smuzhiyun PE8MD_00, PE8MD_01, PE8MD_10, PE8MD_11, 1352*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1353*4882a593Smuzhiyun }, 1354*4882a593Smuzhiyun { PINMUX_CFG_REG("PECRL2", 0xfffe3a14, 16, 4, GROUP( 1355*4882a593Smuzhiyun PE7MD_000, PE7MD_001, PE7MD_010, PE7MD_011, 1356*4882a593Smuzhiyun PE7MD_100, 0, 0, 0, 1357*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 1358*4882a593Smuzhiyun 1359*4882a593Smuzhiyun PE6MD_000, PE6MD_001, PE6MD_010, PE6MD_011, 1360*4882a593Smuzhiyun PE6MD_100, 0, 0, 0, 1361*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 1362*4882a593Smuzhiyun 1363*4882a593Smuzhiyun PE5MD_000, PE5MD_001, PE5MD_010, PE5MD_011, 1364*4882a593Smuzhiyun PE5MD_100, 0, 0, 0, 1365*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 1366*4882a593Smuzhiyun 1367*4882a593Smuzhiyun PE4MD_000, PE4MD_001, PE4MD_010, PE4MD_011, 1368*4882a593Smuzhiyun PE4MD_100, 0, 0, 0, 1369*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0 )) 1370*4882a593Smuzhiyun }, 1371*4882a593Smuzhiyun { PINMUX_CFG_REG("PECRL1", 0xfffe3a16, 16, 4, GROUP( 1372*4882a593Smuzhiyun PE3MD_00, PE3MD_01, 0, PE3MD_11, 1373*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1374*4882a593Smuzhiyun 1375*4882a593Smuzhiyun PE2MD_00, PE2MD_01, 0, PE2MD_11, 1376*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1377*4882a593Smuzhiyun 1378*4882a593Smuzhiyun PE1MD_00, PE1MD_01, PE1MD_10, PE1MD_11, 1379*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1380*4882a593Smuzhiyun 1381*4882a593Smuzhiyun PE0MD_000, PE0MD_001, 0, PE0MD_011, 1382*4882a593Smuzhiyun PE0MD_100, 0, 0, 0, 1383*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0 )) 1384*4882a593Smuzhiyun }, 1385*4882a593Smuzhiyun { PINMUX_CFG_REG("PFIORH", 0xfffe3a84, 16, 1, GROUP( 1386*4882a593Smuzhiyun 0, 0, 1387*4882a593Smuzhiyun PF30_IN, PF30_OUT, 1388*4882a593Smuzhiyun PF29_IN, PF29_OUT, 1389*4882a593Smuzhiyun PF28_IN, PF28_OUT, 1390*4882a593Smuzhiyun PF27_IN, PF27_OUT, 1391*4882a593Smuzhiyun PF26_IN, PF26_OUT, 1392*4882a593Smuzhiyun PF25_IN, PF25_OUT, 1393*4882a593Smuzhiyun PF24_IN, PF24_OUT, 1394*4882a593Smuzhiyun PF23_IN, PF23_OUT, 1395*4882a593Smuzhiyun PF22_IN, PF22_OUT, 1396*4882a593Smuzhiyun PF21_IN, PF21_OUT, 1397*4882a593Smuzhiyun PF20_IN, PF20_OUT, 1398*4882a593Smuzhiyun PF19_IN, PF19_OUT, 1399*4882a593Smuzhiyun PF18_IN, PF18_OUT, 1400*4882a593Smuzhiyun PF17_IN, PF17_OUT, 1401*4882a593Smuzhiyun PF16_IN, PF16_OUT )) 1402*4882a593Smuzhiyun }, 1403*4882a593Smuzhiyun { PINMUX_CFG_REG("PFIORL", 0xfffe3a86, 16, 1, GROUP( 1404*4882a593Smuzhiyun PF15_IN, PF15_OUT, 1405*4882a593Smuzhiyun PF14_IN, PF14_OUT, 1406*4882a593Smuzhiyun PF13_IN, PF13_OUT, 1407*4882a593Smuzhiyun PF12_IN, PF12_OUT, 1408*4882a593Smuzhiyun PF11_IN, PF11_OUT, 1409*4882a593Smuzhiyun PF10_IN, PF10_OUT, 1410*4882a593Smuzhiyun PF9_IN, PF9_OUT, 1411*4882a593Smuzhiyun PF8_IN, PF8_OUT, 1412*4882a593Smuzhiyun PF7_IN, PF7_OUT, 1413*4882a593Smuzhiyun PF6_IN, PF6_OUT, 1414*4882a593Smuzhiyun PF5_IN, PF5_OUT, 1415*4882a593Smuzhiyun PF4_IN, PF4_OUT, 1416*4882a593Smuzhiyun PF3_IN, PF3_OUT, 1417*4882a593Smuzhiyun PF2_IN, PF2_OUT, 1418*4882a593Smuzhiyun PF1_IN, PF1_OUT, 1419*4882a593Smuzhiyun PF0_IN, PF0_OUT )) 1420*4882a593Smuzhiyun }, 1421*4882a593Smuzhiyun { PINMUX_CFG_REG("PFCRH4", 0xfffe3a88, 16, 4, GROUP( 1422*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1423*4882a593Smuzhiyun 1424*4882a593Smuzhiyun PF30MD_0, PF30MD_1, 1425*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1426*4882a593Smuzhiyun 1427*4882a593Smuzhiyun PF29MD_0, PF29MD_1, 1428*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1429*4882a593Smuzhiyun 1430*4882a593Smuzhiyun PF28MD_0, PF28MD_1, 1431*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1432*4882a593Smuzhiyun }, 1433*4882a593Smuzhiyun { PINMUX_CFG_REG("PFCRH3", 0xfffe3a8a, 16, 4, GROUP( 1434*4882a593Smuzhiyun PF27MD_0, PF27MD_1, 1435*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1436*4882a593Smuzhiyun 1437*4882a593Smuzhiyun PF26MD_0, PF26MD_1, 1438*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1439*4882a593Smuzhiyun 1440*4882a593Smuzhiyun PF25MD_0, PF25MD_1, 1441*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1442*4882a593Smuzhiyun 1443*4882a593Smuzhiyun PF24MD_0, PF24MD_1, 1444*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1445*4882a593Smuzhiyun }, 1446*4882a593Smuzhiyun { PINMUX_CFG_REG("PFCRH2", 0xfffe3a8c, 16, 4, GROUP( 1447*4882a593Smuzhiyun PF23MD_00, PF23MD_01, PF23MD_10, 0, 1448*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1449*4882a593Smuzhiyun 1450*4882a593Smuzhiyun PF22MD_00, PF22MD_01, PF22MD_10, 0, 1451*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1452*4882a593Smuzhiyun 1453*4882a593Smuzhiyun PF21MD_00, PF21MD_01, PF21MD_10, 0, 1454*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1455*4882a593Smuzhiyun 1456*4882a593Smuzhiyun PF20MD_00, PF20MD_01, PF20MD_10, 0, 1457*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1458*4882a593Smuzhiyun }, 1459*4882a593Smuzhiyun { PINMUX_CFG_REG("PFCRH1", 0xfffe3a8e, 16, 4, GROUP( 1460*4882a593Smuzhiyun PF19MD_00, PF19MD_01, PF19MD_10, 0, 1461*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1462*4882a593Smuzhiyun 1463*4882a593Smuzhiyun PF18MD_00, PF18MD_01, PF18MD_10, 0, 1464*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1465*4882a593Smuzhiyun 1466*4882a593Smuzhiyun PF17MD_00, PF17MD_01, PF17MD_10, 0, 1467*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1468*4882a593Smuzhiyun 1469*4882a593Smuzhiyun PF16MD_00, PF16MD_01, PF16MD_10, 0, 1470*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1471*4882a593Smuzhiyun }, 1472*4882a593Smuzhiyun { PINMUX_CFG_REG("PFCRL4", 0xfffe3a90, 16, 4, GROUP( 1473*4882a593Smuzhiyun PF15MD_00, PF15MD_01, PF15MD_10, 0, 1474*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1475*4882a593Smuzhiyun 1476*4882a593Smuzhiyun PF14MD_00, PF14MD_01, PF14MD_10, 0, 1477*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1478*4882a593Smuzhiyun 1479*4882a593Smuzhiyun PF13MD_00, PF13MD_01, PF13MD_10, 0, 1480*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1481*4882a593Smuzhiyun 1482*4882a593Smuzhiyun PF12MD_00, PF12MD_01, PF12MD_10, 0, 1483*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1484*4882a593Smuzhiyun }, 1485*4882a593Smuzhiyun { PINMUX_CFG_REG("PFCRL3", 0xfffe3a92, 16, 4, GROUP( 1486*4882a593Smuzhiyun PF11MD_00, PF11MD_01, PF11MD_10, 0, 1487*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1488*4882a593Smuzhiyun 1489*4882a593Smuzhiyun PF10MD_00, PF10MD_01, PF10MD_10, 0, 1490*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1491*4882a593Smuzhiyun 1492*4882a593Smuzhiyun PF9MD_00, PF9MD_01, PF9MD_10, 0, 1493*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1494*4882a593Smuzhiyun 1495*4882a593Smuzhiyun PF8MD_00, PF8MD_01, PF8MD_10, 0, 1496*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1497*4882a593Smuzhiyun }, 1498*4882a593Smuzhiyun { PINMUX_CFG_REG("PFCRL2", 0xfffe3a94, 16, 4, GROUP( 1499*4882a593Smuzhiyun PF7MD_00, PF7MD_01, PF7MD_10, PF7MD_11, 1500*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1501*4882a593Smuzhiyun 1502*4882a593Smuzhiyun PF6MD_00, PF6MD_01, PF6MD_10, PF6MD_11, 1503*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1504*4882a593Smuzhiyun 1505*4882a593Smuzhiyun PF5MD_00, PF5MD_01, PF5MD_10, PF5MD_11, 1506*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1507*4882a593Smuzhiyun 1508*4882a593Smuzhiyun PF4MD_00, PF4MD_01, PF4MD_10, PF4MD_11, 1509*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1510*4882a593Smuzhiyun }, 1511*4882a593Smuzhiyun { PINMUX_CFG_REG("PFCRL1", 0xfffe3a96, 16, 4, GROUP( 1512*4882a593Smuzhiyun PF3MD_00, PF3MD_01, PF3MD_10, PF3MD_11, 1513*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1514*4882a593Smuzhiyun 1515*4882a593Smuzhiyun PF2MD_00, PF2MD_01, PF2MD_10, PF2MD_11, 1516*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1517*4882a593Smuzhiyun 1518*4882a593Smuzhiyun PF1MD_00, PF1MD_01, PF1MD_10, PF1MD_11, 1519*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1520*4882a593Smuzhiyun 1521*4882a593Smuzhiyun PF0MD_00, PF0MD_01, PF0MD_10, PF0MD_11, 1522*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1523*4882a593Smuzhiyun }, 1524*4882a593Smuzhiyun {} 1525*4882a593Smuzhiyun }; 1526*4882a593Smuzhiyun 1527*4882a593Smuzhiyun static const struct pinmux_data_reg pinmux_data_regs[] = { 1528*4882a593Smuzhiyun { PINMUX_DATA_REG("PADRL", 0xfffe3802, 16, GROUP( 1529*4882a593Smuzhiyun 0, 0, 0, 0, 1530*4882a593Smuzhiyun 0, 0, 0, 0, 1531*4882a593Smuzhiyun PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA, 1532*4882a593Smuzhiyun PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA )) 1533*4882a593Smuzhiyun }, 1534*4882a593Smuzhiyun { PINMUX_DATA_REG("PBDRL", 0xfffe3882, 16, GROUP( 1535*4882a593Smuzhiyun 0, 0, 0, PB12_DATA, 1536*4882a593Smuzhiyun PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA, 1537*4882a593Smuzhiyun PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA, 1538*4882a593Smuzhiyun PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA )) 1539*4882a593Smuzhiyun }, 1540*4882a593Smuzhiyun { PINMUX_DATA_REG("PCDRL", 0xfffe3902, 16, GROUP( 1541*4882a593Smuzhiyun 0, PC14_DATA, PC13_DATA, PC12_DATA, 1542*4882a593Smuzhiyun PC11_DATA, PC10_DATA, PC9_DATA, PC8_DATA, 1543*4882a593Smuzhiyun PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA, 1544*4882a593Smuzhiyun PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA )) 1545*4882a593Smuzhiyun }, 1546*4882a593Smuzhiyun { PINMUX_DATA_REG("PDDRL", 0xfffe3982, 16, GROUP( 1547*4882a593Smuzhiyun PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA, 1548*4882a593Smuzhiyun PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA, 1549*4882a593Smuzhiyun PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA, 1550*4882a593Smuzhiyun PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA )) 1551*4882a593Smuzhiyun }, 1552*4882a593Smuzhiyun { PINMUX_DATA_REG("PEDRL", 0xfffe3a02, 16, GROUP( 1553*4882a593Smuzhiyun PE15_DATA, PE14_DATA, PE13_DATA, PE12_DATA, 1554*4882a593Smuzhiyun PE11_DATA, PE10_DATA, PE9_DATA, PE8_DATA, 1555*4882a593Smuzhiyun PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA, 1556*4882a593Smuzhiyun PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA )) 1557*4882a593Smuzhiyun }, 1558*4882a593Smuzhiyun { PINMUX_DATA_REG("PFDRH", 0xfffe3a80, 16, GROUP( 1559*4882a593Smuzhiyun 0, PF30_DATA, PF29_DATA, PF28_DATA, 1560*4882a593Smuzhiyun PF27_DATA, PF26_DATA, PF25_DATA, PF24_DATA, 1561*4882a593Smuzhiyun PF23_DATA, PF22_DATA, PF21_DATA, PF20_DATA, 1562*4882a593Smuzhiyun PF19_DATA, PF18_DATA, PF17_DATA, PF16_DATA )) 1563*4882a593Smuzhiyun }, 1564*4882a593Smuzhiyun { PINMUX_DATA_REG("PFDRL", 0xfffe3a82, 16, GROUP( 1565*4882a593Smuzhiyun PF15_DATA, PF14_DATA, PF13_DATA, PF12_DATA, 1566*4882a593Smuzhiyun PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA, 1567*4882a593Smuzhiyun PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA, 1568*4882a593Smuzhiyun PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA )) 1569*4882a593Smuzhiyun }, 1570*4882a593Smuzhiyun { }, 1571*4882a593Smuzhiyun }; 1572*4882a593Smuzhiyun 1573*4882a593Smuzhiyun const struct sh_pfc_soc_info sh7203_pinmux_info = { 1574*4882a593Smuzhiyun .name = "sh7203_pfc", 1575*4882a593Smuzhiyun .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END, FORCE_IN }, 1576*4882a593Smuzhiyun .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END, FORCE_OUT }, 1577*4882a593Smuzhiyun .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, 1578*4882a593Smuzhiyun 1579*4882a593Smuzhiyun .pins = pinmux_pins, 1580*4882a593Smuzhiyun .nr_pins = ARRAY_SIZE(pinmux_pins), 1581*4882a593Smuzhiyun .func_gpios = pinmux_func_gpios, 1582*4882a593Smuzhiyun .nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios), 1583*4882a593Smuzhiyun 1584*4882a593Smuzhiyun .cfg_regs = pinmux_config_regs, 1585*4882a593Smuzhiyun .data_regs = pinmux_data_regs, 1586*4882a593Smuzhiyun 1587*4882a593Smuzhiyun .pinmux_data = pinmux_data, 1588*4882a593Smuzhiyun .pinmux_data_size = ARRAY_SIZE(pinmux_data), 1589*4882a593Smuzhiyun }; 1590