1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (c) 2016, The Linux Foundation. All rights reserved.
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include <linux/module.h>
7*4882a593Smuzhiyun #include <linux/of.h>
8*4882a593Smuzhiyun #include <linux/platform_device.h>
9*4882a593Smuzhiyun #include <linux/pinctrl/pinctrl.h>
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include "pinctrl-msm.h"
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #define FUNCTION(fname) \
14*4882a593Smuzhiyun [MSM_MUX_##fname] = { \
15*4882a593Smuzhiyun .name = #fname, \
16*4882a593Smuzhiyun .groups = fname##_groups, \
17*4882a593Smuzhiyun .ngroups = ARRAY_SIZE(fname##_groups), \
18*4882a593Smuzhiyun }
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11) \
21*4882a593Smuzhiyun { \
22*4882a593Smuzhiyun .name = "gpio" #id, \
23*4882a593Smuzhiyun .pins = gpio##id##_pins, \
24*4882a593Smuzhiyun .npins = ARRAY_SIZE(gpio##id##_pins), \
25*4882a593Smuzhiyun .funcs = (int[]){ \
26*4882a593Smuzhiyun MSM_MUX_gpio, \
27*4882a593Smuzhiyun MSM_MUX_##f1, \
28*4882a593Smuzhiyun MSM_MUX_##f2, \
29*4882a593Smuzhiyun MSM_MUX_##f3, \
30*4882a593Smuzhiyun MSM_MUX_##f4, \
31*4882a593Smuzhiyun MSM_MUX_##f5, \
32*4882a593Smuzhiyun MSM_MUX_##f6, \
33*4882a593Smuzhiyun MSM_MUX_##f7, \
34*4882a593Smuzhiyun MSM_MUX_##f8, \
35*4882a593Smuzhiyun MSM_MUX_##f9, \
36*4882a593Smuzhiyun MSM_MUX_##f10, \
37*4882a593Smuzhiyun MSM_MUX_##f11 \
38*4882a593Smuzhiyun }, \
39*4882a593Smuzhiyun .nfuncs = 12, \
40*4882a593Smuzhiyun .ctl_reg = 0x1000 + 0x10 * id, \
41*4882a593Smuzhiyun .io_reg = 0x1004 + 0x10 * id, \
42*4882a593Smuzhiyun .intr_cfg_reg = 0x1008 + 0x10 * id, \
43*4882a593Smuzhiyun .intr_status_reg = 0x100c + 0x10 * id, \
44*4882a593Smuzhiyun .intr_target_reg = 0x1008 + 0x10 * id, \
45*4882a593Smuzhiyun .mux_bit = 2, \
46*4882a593Smuzhiyun .pull_bit = 0, \
47*4882a593Smuzhiyun .drv_bit = 6, \
48*4882a593Smuzhiyun .oe_bit = 9, \
49*4882a593Smuzhiyun .in_bit = 0, \
50*4882a593Smuzhiyun .out_bit = 1, \
51*4882a593Smuzhiyun .intr_enable_bit = 0, \
52*4882a593Smuzhiyun .intr_status_bit = 0, \
53*4882a593Smuzhiyun .intr_target_bit = 5, \
54*4882a593Smuzhiyun .intr_target_kpss_val = 4, \
55*4882a593Smuzhiyun .intr_raw_status_bit = 4, \
56*4882a593Smuzhiyun .intr_polarity_bit = 1, \
57*4882a593Smuzhiyun .intr_detection_bit = 2, \
58*4882a593Smuzhiyun .intr_detection_width = 2, \
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun #define SDC_PINGROUP(pg_name, ctl, pull, drv) \
62*4882a593Smuzhiyun { \
63*4882a593Smuzhiyun .name = #pg_name, \
64*4882a593Smuzhiyun .pins = pg_name##_pins, \
65*4882a593Smuzhiyun .npins = ARRAY_SIZE(pg_name##_pins), \
66*4882a593Smuzhiyun .ctl_reg = ctl, \
67*4882a593Smuzhiyun .io_reg = 0, \
68*4882a593Smuzhiyun .intr_cfg_reg = 0, \
69*4882a593Smuzhiyun .intr_status_reg = 0, \
70*4882a593Smuzhiyun .intr_target_reg = 0, \
71*4882a593Smuzhiyun .mux_bit = -1, \
72*4882a593Smuzhiyun .pull_bit = pull, \
73*4882a593Smuzhiyun .drv_bit = drv, \
74*4882a593Smuzhiyun .oe_bit = -1, \
75*4882a593Smuzhiyun .in_bit = -1, \
76*4882a593Smuzhiyun .out_bit = -1, \
77*4882a593Smuzhiyun .intr_enable_bit = -1, \
78*4882a593Smuzhiyun .intr_status_bit = -1, \
79*4882a593Smuzhiyun .intr_target_bit = -1, \
80*4882a593Smuzhiyun .intr_target_kpss_val = -1, \
81*4882a593Smuzhiyun .intr_raw_status_bit = -1, \
82*4882a593Smuzhiyun .intr_polarity_bit = -1, \
83*4882a593Smuzhiyun .intr_detection_bit = -1, \
84*4882a593Smuzhiyun .intr_detection_width = -1, \
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun static const struct pinctrl_pin_desc msm8994_pins[] = {
87*4882a593Smuzhiyun PINCTRL_PIN(0, "GPIO_0"),
88*4882a593Smuzhiyun PINCTRL_PIN(1, "GPIO_1"),
89*4882a593Smuzhiyun PINCTRL_PIN(2, "GPIO_2"),
90*4882a593Smuzhiyun PINCTRL_PIN(3, "GPIO_3"),
91*4882a593Smuzhiyun PINCTRL_PIN(4, "GPIO_4"),
92*4882a593Smuzhiyun PINCTRL_PIN(5, "GPIO_5"),
93*4882a593Smuzhiyun PINCTRL_PIN(6, "GPIO_6"),
94*4882a593Smuzhiyun PINCTRL_PIN(7, "GPIO_7"),
95*4882a593Smuzhiyun PINCTRL_PIN(8, "GPIO_8"),
96*4882a593Smuzhiyun PINCTRL_PIN(9, "GPIO_9"),
97*4882a593Smuzhiyun PINCTRL_PIN(10, "GPIO_10"),
98*4882a593Smuzhiyun PINCTRL_PIN(11, "GPIO_11"),
99*4882a593Smuzhiyun PINCTRL_PIN(12, "GPIO_12"),
100*4882a593Smuzhiyun PINCTRL_PIN(13, "GPIO_13"),
101*4882a593Smuzhiyun PINCTRL_PIN(14, "GPIO_14"),
102*4882a593Smuzhiyun PINCTRL_PIN(15, "GPIO_15"),
103*4882a593Smuzhiyun PINCTRL_PIN(16, "GPIO_16"),
104*4882a593Smuzhiyun PINCTRL_PIN(17, "GPIO_17"),
105*4882a593Smuzhiyun PINCTRL_PIN(18, "GPIO_18"),
106*4882a593Smuzhiyun PINCTRL_PIN(19, "GPIO_19"),
107*4882a593Smuzhiyun PINCTRL_PIN(20, "GPIO_20"),
108*4882a593Smuzhiyun PINCTRL_PIN(21, "GPIO_21"),
109*4882a593Smuzhiyun PINCTRL_PIN(22, "GPIO_22"),
110*4882a593Smuzhiyun PINCTRL_PIN(23, "GPIO_23"),
111*4882a593Smuzhiyun PINCTRL_PIN(24, "GPIO_24"),
112*4882a593Smuzhiyun PINCTRL_PIN(25, "GPIO_25"),
113*4882a593Smuzhiyun PINCTRL_PIN(26, "GPIO_26"),
114*4882a593Smuzhiyun PINCTRL_PIN(27, "GPIO_27"),
115*4882a593Smuzhiyun PINCTRL_PIN(28, "GPIO_28"),
116*4882a593Smuzhiyun PINCTRL_PIN(29, "GPIO_29"),
117*4882a593Smuzhiyun PINCTRL_PIN(30, "GPIO_30"),
118*4882a593Smuzhiyun PINCTRL_PIN(31, "GPIO_31"),
119*4882a593Smuzhiyun PINCTRL_PIN(32, "GPIO_32"),
120*4882a593Smuzhiyun PINCTRL_PIN(33, "GPIO_33"),
121*4882a593Smuzhiyun PINCTRL_PIN(34, "GPIO_34"),
122*4882a593Smuzhiyun PINCTRL_PIN(35, "GPIO_35"),
123*4882a593Smuzhiyun PINCTRL_PIN(36, "GPIO_36"),
124*4882a593Smuzhiyun PINCTRL_PIN(37, "GPIO_37"),
125*4882a593Smuzhiyun PINCTRL_PIN(38, "GPIO_38"),
126*4882a593Smuzhiyun PINCTRL_PIN(39, "GPIO_39"),
127*4882a593Smuzhiyun PINCTRL_PIN(40, "GPIO_40"),
128*4882a593Smuzhiyun PINCTRL_PIN(41, "GPIO_41"),
129*4882a593Smuzhiyun PINCTRL_PIN(42, "GPIO_42"),
130*4882a593Smuzhiyun PINCTRL_PIN(43, "GPIO_43"),
131*4882a593Smuzhiyun PINCTRL_PIN(44, "GPIO_44"),
132*4882a593Smuzhiyun PINCTRL_PIN(45, "GPIO_45"),
133*4882a593Smuzhiyun PINCTRL_PIN(46, "GPIO_46"),
134*4882a593Smuzhiyun PINCTRL_PIN(47, "GPIO_47"),
135*4882a593Smuzhiyun PINCTRL_PIN(48, "GPIO_48"),
136*4882a593Smuzhiyun PINCTRL_PIN(49, "GPIO_49"),
137*4882a593Smuzhiyun PINCTRL_PIN(50, "GPIO_50"),
138*4882a593Smuzhiyun PINCTRL_PIN(51, "GPIO_51"),
139*4882a593Smuzhiyun PINCTRL_PIN(52, "GPIO_52"),
140*4882a593Smuzhiyun PINCTRL_PIN(53, "GPIO_53"),
141*4882a593Smuzhiyun PINCTRL_PIN(54, "GPIO_54"),
142*4882a593Smuzhiyun PINCTRL_PIN(55, "GPIO_55"),
143*4882a593Smuzhiyun PINCTRL_PIN(56, "GPIO_56"),
144*4882a593Smuzhiyun PINCTRL_PIN(57, "GPIO_57"),
145*4882a593Smuzhiyun PINCTRL_PIN(58, "GPIO_58"),
146*4882a593Smuzhiyun PINCTRL_PIN(59, "GPIO_59"),
147*4882a593Smuzhiyun PINCTRL_PIN(60, "GPIO_60"),
148*4882a593Smuzhiyun PINCTRL_PIN(61, "GPIO_61"),
149*4882a593Smuzhiyun PINCTRL_PIN(62, "GPIO_62"),
150*4882a593Smuzhiyun PINCTRL_PIN(63, "GPIO_63"),
151*4882a593Smuzhiyun PINCTRL_PIN(64, "GPIO_64"),
152*4882a593Smuzhiyun PINCTRL_PIN(65, "GPIO_65"),
153*4882a593Smuzhiyun PINCTRL_PIN(66, "GPIO_66"),
154*4882a593Smuzhiyun PINCTRL_PIN(67, "GPIO_67"),
155*4882a593Smuzhiyun PINCTRL_PIN(68, "GPIO_68"),
156*4882a593Smuzhiyun PINCTRL_PIN(69, "GPIO_69"),
157*4882a593Smuzhiyun PINCTRL_PIN(70, "GPIO_70"),
158*4882a593Smuzhiyun PINCTRL_PIN(71, "GPIO_71"),
159*4882a593Smuzhiyun PINCTRL_PIN(72, "GPIO_72"),
160*4882a593Smuzhiyun PINCTRL_PIN(73, "GPIO_73"),
161*4882a593Smuzhiyun PINCTRL_PIN(74, "GPIO_74"),
162*4882a593Smuzhiyun PINCTRL_PIN(75, "GPIO_75"),
163*4882a593Smuzhiyun PINCTRL_PIN(76, "GPIO_76"),
164*4882a593Smuzhiyun PINCTRL_PIN(77, "GPIO_77"),
165*4882a593Smuzhiyun PINCTRL_PIN(78, "GPIO_78"),
166*4882a593Smuzhiyun PINCTRL_PIN(79, "GPIO_79"),
167*4882a593Smuzhiyun PINCTRL_PIN(80, "GPIO_80"),
168*4882a593Smuzhiyun PINCTRL_PIN(81, "GPIO_81"),
169*4882a593Smuzhiyun PINCTRL_PIN(82, "GPIO_82"),
170*4882a593Smuzhiyun PINCTRL_PIN(83, "GPIO_83"),
171*4882a593Smuzhiyun PINCTRL_PIN(84, "GPIO_84"),
172*4882a593Smuzhiyun PINCTRL_PIN(85, "GPIO_85"),
173*4882a593Smuzhiyun PINCTRL_PIN(86, "GPIO_86"),
174*4882a593Smuzhiyun PINCTRL_PIN(87, "GPIO_87"),
175*4882a593Smuzhiyun PINCTRL_PIN(88, "GPIO_88"),
176*4882a593Smuzhiyun PINCTRL_PIN(89, "GPIO_89"),
177*4882a593Smuzhiyun PINCTRL_PIN(90, "GPIO_90"),
178*4882a593Smuzhiyun PINCTRL_PIN(91, "GPIO_91"),
179*4882a593Smuzhiyun PINCTRL_PIN(92, "GPIO_92"),
180*4882a593Smuzhiyun PINCTRL_PIN(93, "GPIO_93"),
181*4882a593Smuzhiyun PINCTRL_PIN(94, "GPIO_94"),
182*4882a593Smuzhiyun PINCTRL_PIN(95, "GPIO_95"),
183*4882a593Smuzhiyun PINCTRL_PIN(96, "GPIO_96"),
184*4882a593Smuzhiyun PINCTRL_PIN(97, "GPIO_97"),
185*4882a593Smuzhiyun PINCTRL_PIN(98, "GPIO_98"),
186*4882a593Smuzhiyun PINCTRL_PIN(99, "GPIO_99"),
187*4882a593Smuzhiyun PINCTRL_PIN(100, "GPIO_100"),
188*4882a593Smuzhiyun PINCTRL_PIN(101, "GPIO_101"),
189*4882a593Smuzhiyun PINCTRL_PIN(102, "GPIO_102"),
190*4882a593Smuzhiyun PINCTRL_PIN(103, "GPIO_103"),
191*4882a593Smuzhiyun PINCTRL_PIN(104, "GPIO_104"),
192*4882a593Smuzhiyun PINCTRL_PIN(105, "GPIO_105"),
193*4882a593Smuzhiyun PINCTRL_PIN(106, "GPIO_106"),
194*4882a593Smuzhiyun PINCTRL_PIN(107, "GPIO_107"),
195*4882a593Smuzhiyun PINCTRL_PIN(108, "GPIO_108"),
196*4882a593Smuzhiyun PINCTRL_PIN(109, "GPIO_109"),
197*4882a593Smuzhiyun PINCTRL_PIN(110, "GPIO_110"),
198*4882a593Smuzhiyun PINCTRL_PIN(111, "GPIO_111"),
199*4882a593Smuzhiyun PINCTRL_PIN(112, "GPIO_112"),
200*4882a593Smuzhiyun PINCTRL_PIN(113, "GPIO_113"),
201*4882a593Smuzhiyun PINCTRL_PIN(114, "GPIO_114"),
202*4882a593Smuzhiyun PINCTRL_PIN(115, "GPIO_115"),
203*4882a593Smuzhiyun PINCTRL_PIN(116, "GPIO_116"),
204*4882a593Smuzhiyun PINCTRL_PIN(117, "GPIO_117"),
205*4882a593Smuzhiyun PINCTRL_PIN(118, "GPIO_118"),
206*4882a593Smuzhiyun PINCTRL_PIN(119, "GPIO_119"),
207*4882a593Smuzhiyun PINCTRL_PIN(120, "GPIO_120"),
208*4882a593Smuzhiyun PINCTRL_PIN(121, "GPIO_121"),
209*4882a593Smuzhiyun PINCTRL_PIN(122, "GPIO_122"),
210*4882a593Smuzhiyun PINCTRL_PIN(123, "GPIO_123"),
211*4882a593Smuzhiyun PINCTRL_PIN(124, "GPIO_124"),
212*4882a593Smuzhiyun PINCTRL_PIN(125, "GPIO_125"),
213*4882a593Smuzhiyun PINCTRL_PIN(126, "GPIO_126"),
214*4882a593Smuzhiyun PINCTRL_PIN(127, "GPIO_127"),
215*4882a593Smuzhiyun PINCTRL_PIN(128, "GPIO_128"),
216*4882a593Smuzhiyun PINCTRL_PIN(129, "GPIO_129"),
217*4882a593Smuzhiyun PINCTRL_PIN(130, "GPIO_130"),
218*4882a593Smuzhiyun PINCTRL_PIN(131, "GPIO_131"),
219*4882a593Smuzhiyun PINCTRL_PIN(132, "GPIO_132"),
220*4882a593Smuzhiyun PINCTRL_PIN(133, "GPIO_133"),
221*4882a593Smuzhiyun PINCTRL_PIN(134, "GPIO_134"),
222*4882a593Smuzhiyun PINCTRL_PIN(135, "GPIO_135"),
223*4882a593Smuzhiyun PINCTRL_PIN(136, "GPIO_136"),
224*4882a593Smuzhiyun PINCTRL_PIN(137, "GPIO_137"),
225*4882a593Smuzhiyun PINCTRL_PIN(138, "GPIO_138"),
226*4882a593Smuzhiyun PINCTRL_PIN(139, "GPIO_139"),
227*4882a593Smuzhiyun PINCTRL_PIN(140, "GPIO_140"),
228*4882a593Smuzhiyun PINCTRL_PIN(141, "GPIO_141"),
229*4882a593Smuzhiyun PINCTRL_PIN(142, "GPIO_142"),
230*4882a593Smuzhiyun PINCTRL_PIN(143, "GPIO_143"),
231*4882a593Smuzhiyun PINCTRL_PIN(144, "GPIO_144"),
232*4882a593Smuzhiyun PINCTRL_PIN(145, "GPIO_145"),
233*4882a593Smuzhiyun PINCTRL_PIN(146, "SDC1_RCLK"),
234*4882a593Smuzhiyun PINCTRL_PIN(147, "SDC1_CLK"),
235*4882a593Smuzhiyun PINCTRL_PIN(148, "SDC1_CMD"),
236*4882a593Smuzhiyun PINCTRL_PIN(149, "SDC1_DATA"),
237*4882a593Smuzhiyun PINCTRL_PIN(150, "SDC2_CLK"),
238*4882a593Smuzhiyun PINCTRL_PIN(151, "SDC2_CMD"),
239*4882a593Smuzhiyun PINCTRL_PIN(152, "SDC2_DATA"),
240*4882a593Smuzhiyun PINCTRL_PIN(153, "SDC3_CLK"),
241*4882a593Smuzhiyun PINCTRL_PIN(154, "SDC3_CMD"),
242*4882a593Smuzhiyun PINCTRL_PIN(155, "SDC3_DATA"),
243*4882a593Smuzhiyun };
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun #define DECLARE_MSM_GPIO_PINS(pin) \
246*4882a593Smuzhiyun static const unsigned int gpio##pin##_pins[] = { pin }
247*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(0);
248*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(1);
249*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(2);
250*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(3);
251*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(4);
252*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(5);
253*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(6);
254*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(7);
255*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(8);
256*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(9);
257*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(10);
258*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(11);
259*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(12);
260*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(13);
261*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(14);
262*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(15);
263*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(16);
264*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(17);
265*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(18);
266*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(19);
267*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(20);
268*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(21);
269*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(22);
270*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(23);
271*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(24);
272*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(25);
273*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(26);
274*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(27);
275*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(28);
276*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(29);
277*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(30);
278*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(31);
279*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(32);
280*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(33);
281*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(34);
282*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(35);
283*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(36);
284*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(37);
285*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(38);
286*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(39);
287*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(40);
288*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(41);
289*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(42);
290*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(43);
291*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(44);
292*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(45);
293*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(46);
294*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(47);
295*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(48);
296*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(49);
297*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(50);
298*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(51);
299*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(52);
300*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(53);
301*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(54);
302*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(55);
303*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(56);
304*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(57);
305*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(58);
306*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(59);
307*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(60);
308*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(61);
309*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(62);
310*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(63);
311*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(64);
312*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(65);
313*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(66);
314*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(67);
315*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(68);
316*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(69);
317*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(70);
318*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(71);
319*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(72);
320*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(73);
321*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(74);
322*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(75);
323*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(76);
324*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(77);
325*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(78);
326*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(79);
327*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(80);
328*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(81);
329*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(82);
330*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(83);
331*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(84);
332*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(85);
333*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(86);
334*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(87);
335*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(88);
336*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(89);
337*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(90);
338*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(91);
339*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(92);
340*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(93);
341*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(94);
342*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(95);
343*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(96);
344*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(97);
345*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(98);
346*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(99);
347*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(100);
348*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(101);
349*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(102);
350*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(103);
351*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(104);
352*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(105);
353*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(106);
354*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(107);
355*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(108);
356*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(109);
357*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(110);
358*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(111);
359*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(112);
360*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(113);
361*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(114);
362*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(115);
363*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(116);
364*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(117);
365*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(118);
366*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(119);
367*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(120);
368*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(121);
369*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(122);
370*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(123);
371*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(124);
372*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(125);
373*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(126);
374*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(127);
375*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(128);
376*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(129);
377*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(130);
378*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(131);
379*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(132);
380*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(133);
381*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(134);
382*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(135);
383*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(136);
384*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(137);
385*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(138);
386*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(139);
387*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(140);
388*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(141);
389*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(142);
390*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(143);
391*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(144);
392*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(145);
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun static const unsigned int sdc1_rclk_pins[] = { 146 };
395*4882a593Smuzhiyun static const unsigned int sdc1_clk_pins[] = { 147 };
396*4882a593Smuzhiyun static const unsigned int sdc1_cmd_pins[] = { 148 };
397*4882a593Smuzhiyun static const unsigned int sdc1_data_pins[] = { 149 };
398*4882a593Smuzhiyun static const unsigned int sdc2_clk_pins[] = { 150 };
399*4882a593Smuzhiyun static const unsigned int sdc2_cmd_pins[] = { 151 };
400*4882a593Smuzhiyun static const unsigned int sdc2_data_pins[] = { 152 };
401*4882a593Smuzhiyun static const unsigned int sdc3_clk_pins[] = { 153 };
402*4882a593Smuzhiyun static const unsigned int sdc3_cmd_pins[] = { 154 };
403*4882a593Smuzhiyun static const unsigned int sdc3_data_pins[] = { 155 };
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun enum msm8994_functions {
406*4882a593Smuzhiyun MSM_MUX_audio_ref_clk,
407*4882a593Smuzhiyun MSM_MUX_blsp_i2c1,
408*4882a593Smuzhiyun MSM_MUX_blsp_i2c2,
409*4882a593Smuzhiyun MSM_MUX_blsp_i2c3,
410*4882a593Smuzhiyun MSM_MUX_blsp_i2c4,
411*4882a593Smuzhiyun MSM_MUX_blsp_i2c5,
412*4882a593Smuzhiyun MSM_MUX_blsp_i2c6,
413*4882a593Smuzhiyun MSM_MUX_blsp_i2c7,
414*4882a593Smuzhiyun MSM_MUX_blsp_i2c8,
415*4882a593Smuzhiyun MSM_MUX_blsp_i2c9,
416*4882a593Smuzhiyun MSM_MUX_blsp_i2c10,
417*4882a593Smuzhiyun MSM_MUX_blsp_i2c11,
418*4882a593Smuzhiyun MSM_MUX_blsp_i2c12,
419*4882a593Smuzhiyun MSM_MUX_blsp_spi1,
420*4882a593Smuzhiyun MSM_MUX_blsp_spi1_cs1,
421*4882a593Smuzhiyun MSM_MUX_blsp_spi1_cs2,
422*4882a593Smuzhiyun MSM_MUX_blsp_spi1_cs3,
423*4882a593Smuzhiyun MSM_MUX_blsp_spi2,
424*4882a593Smuzhiyun MSM_MUX_blsp_spi2_cs1,
425*4882a593Smuzhiyun MSM_MUX_blsp_spi2_cs2,
426*4882a593Smuzhiyun MSM_MUX_blsp_spi2_cs3,
427*4882a593Smuzhiyun MSM_MUX_blsp_spi3,
428*4882a593Smuzhiyun MSM_MUX_blsp_spi4,
429*4882a593Smuzhiyun MSM_MUX_blsp_spi5,
430*4882a593Smuzhiyun MSM_MUX_blsp_spi6,
431*4882a593Smuzhiyun MSM_MUX_blsp_spi7,
432*4882a593Smuzhiyun MSM_MUX_blsp_spi8,
433*4882a593Smuzhiyun MSM_MUX_blsp_spi9,
434*4882a593Smuzhiyun MSM_MUX_blsp_spi10,
435*4882a593Smuzhiyun MSM_MUX_blsp_spi10_cs1,
436*4882a593Smuzhiyun MSM_MUX_blsp_spi10_cs2,
437*4882a593Smuzhiyun MSM_MUX_blsp_spi10_cs3,
438*4882a593Smuzhiyun MSM_MUX_blsp_spi11,
439*4882a593Smuzhiyun MSM_MUX_blsp_spi12,
440*4882a593Smuzhiyun MSM_MUX_blsp_uart1,
441*4882a593Smuzhiyun MSM_MUX_blsp_uart2,
442*4882a593Smuzhiyun MSM_MUX_blsp_uart3,
443*4882a593Smuzhiyun MSM_MUX_blsp_uart4,
444*4882a593Smuzhiyun MSM_MUX_blsp_uart5,
445*4882a593Smuzhiyun MSM_MUX_blsp_uart6,
446*4882a593Smuzhiyun MSM_MUX_blsp_uart7,
447*4882a593Smuzhiyun MSM_MUX_blsp_uart8,
448*4882a593Smuzhiyun MSM_MUX_blsp_uart9,
449*4882a593Smuzhiyun MSM_MUX_blsp_uart10,
450*4882a593Smuzhiyun MSM_MUX_blsp_uart11,
451*4882a593Smuzhiyun MSM_MUX_blsp_uart12,
452*4882a593Smuzhiyun MSM_MUX_blsp_uim1,
453*4882a593Smuzhiyun MSM_MUX_blsp_uim2,
454*4882a593Smuzhiyun MSM_MUX_blsp_uim3,
455*4882a593Smuzhiyun MSM_MUX_blsp_uim4,
456*4882a593Smuzhiyun MSM_MUX_blsp_uim5,
457*4882a593Smuzhiyun MSM_MUX_blsp_uim6,
458*4882a593Smuzhiyun MSM_MUX_blsp_uim7,
459*4882a593Smuzhiyun MSM_MUX_blsp_uim8,
460*4882a593Smuzhiyun MSM_MUX_blsp_uim9,
461*4882a593Smuzhiyun MSM_MUX_blsp_uim10,
462*4882a593Smuzhiyun MSM_MUX_blsp_uim11,
463*4882a593Smuzhiyun MSM_MUX_blsp_uim12,
464*4882a593Smuzhiyun MSM_MUX_blsp11_i2c_scl_b,
465*4882a593Smuzhiyun MSM_MUX_blsp11_i2c_sda_b,
466*4882a593Smuzhiyun MSM_MUX_blsp11_uart_rx_b,
467*4882a593Smuzhiyun MSM_MUX_blsp11_uart_tx_b,
468*4882a593Smuzhiyun MSM_MUX_cam_mclk0,
469*4882a593Smuzhiyun MSM_MUX_cam_mclk1,
470*4882a593Smuzhiyun MSM_MUX_cam_mclk2,
471*4882a593Smuzhiyun MSM_MUX_cam_mclk3,
472*4882a593Smuzhiyun MSM_MUX_cci_async_in0,
473*4882a593Smuzhiyun MSM_MUX_cci_async_in1,
474*4882a593Smuzhiyun MSM_MUX_cci_async_in2,
475*4882a593Smuzhiyun MSM_MUX_cci_i2c0,
476*4882a593Smuzhiyun MSM_MUX_cci_i2c1,
477*4882a593Smuzhiyun MSM_MUX_cci_timer0,
478*4882a593Smuzhiyun MSM_MUX_cci_timer1,
479*4882a593Smuzhiyun MSM_MUX_cci_timer2,
480*4882a593Smuzhiyun MSM_MUX_cci_timer3,
481*4882a593Smuzhiyun MSM_MUX_cci_timer4,
482*4882a593Smuzhiyun MSM_MUX_gcc_gp1_clk_a,
483*4882a593Smuzhiyun MSM_MUX_gcc_gp1_clk_b,
484*4882a593Smuzhiyun MSM_MUX_gcc_gp2_clk_a,
485*4882a593Smuzhiyun MSM_MUX_gcc_gp2_clk_b,
486*4882a593Smuzhiyun MSM_MUX_gcc_gp3_clk_a,
487*4882a593Smuzhiyun MSM_MUX_gcc_gp3_clk_b,
488*4882a593Smuzhiyun MSM_MUX_gp_mn,
489*4882a593Smuzhiyun MSM_MUX_gp_pdm0,
490*4882a593Smuzhiyun MSM_MUX_gp_pdm1,
491*4882a593Smuzhiyun MSM_MUX_gp_pdm2,
492*4882a593Smuzhiyun MSM_MUX_gp0_clk,
493*4882a593Smuzhiyun MSM_MUX_gp1_clk,
494*4882a593Smuzhiyun MSM_MUX_gps_tx,
495*4882a593Smuzhiyun MSM_MUX_gsm_tx,
496*4882a593Smuzhiyun MSM_MUX_hdmi_cec,
497*4882a593Smuzhiyun MSM_MUX_hdmi_ddc,
498*4882a593Smuzhiyun MSM_MUX_hdmi_hpd,
499*4882a593Smuzhiyun MSM_MUX_hdmi_rcv,
500*4882a593Smuzhiyun MSM_MUX_mdp_vsync,
501*4882a593Smuzhiyun MSM_MUX_mss_lte,
502*4882a593Smuzhiyun MSM_MUX_nav_pps,
503*4882a593Smuzhiyun MSM_MUX_nav_tsync,
504*4882a593Smuzhiyun MSM_MUX_qdss_cti_trig_in_a,
505*4882a593Smuzhiyun MSM_MUX_qdss_cti_trig_in_b,
506*4882a593Smuzhiyun MSM_MUX_qdss_cti_trig_in_c,
507*4882a593Smuzhiyun MSM_MUX_qdss_cti_trig_in_d,
508*4882a593Smuzhiyun MSM_MUX_qdss_cti_trig_out_a,
509*4882a593Smuzhiyun MSM_MUX_qdss_cti_trig_out_b,
510*4882a593Smuzhiyun MSM_MUX_qdss_cti_trig_out_c,
511*4882a593Smuzhiyun MSM_MUX_qdss_cti_trig_out_d,
512*4882a593Smuzhiyun MSM_MUX_qdss_traceclk_a,
513*4882a593Smuzhiyun MSM_MUX_qdss_traceclk_b,
514*4882a593Smuzhiyun MSM_MUX_qdss_tracectl_a,
515*4882a593Smuzhiyun MSM_MUX_qdss_tracectl_b,
516*4882a593Smuzhiyun MSM_MUX_qdss_tracedata_a,
517*4882a593Smuzhiyun MSM_MUX_qdss_tracedata_b,
518*4882a593Smuzhiyun MSM_MUX_qua_mi2s,
519*4882a593Smuzhiyun MSM_MUX_pci_e0,
520*4882a593Smuzhiyun MSM_MUX_pci_e1,
521*4882a593Smuzhiyun MSM_MUX_pri_mi2s,
522*4882a593Smuzhiyun MSM_MUX_sdc4,
523*4882a593Smuzhiyun MSM_MUX_sec_mi2s,
524*4882a593Smuzhiyun MSM_MUX_slimbus,
525*4882a593Smuzhiyun MSM_MUX_spkr_i2s,
526*4882a593Smuzhiyun MSM_MUX_ter_mi2s,
527*4882a593Smuzhiyun MSM_MUX_tsif1,
528*4882a593Smuzhiyun MSM_MUX_tsif2,
529*4882a593Smuzhiyun MSM_MUX_uim1,
530*4882a593Smuzhiyun MSM_MUX_uim2,
531*4882a593Smuzhiyun MSM_MUX_uim3,
532*4882a593Smuzhiyun MSM_MUX_uim4,
533*4882a593Smuzhiyun MSM_MUX_uim_batt_alarm,
534*4882a593Smuzhiyun MSM_MUX_gpio,
535*4882a593Smuzhiyun MSM_MUX_NA,
536*4882a593Smuzhiyun };
537*4882a593Smuzhiyun
538*4882a593Smuzhiyun static const char * const gpio_groups[] = {
539*4882a593Smuzhiyun "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
540*4882a593Smuzhiyun "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
541*4882a593Smuzhiyun "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
542*4882a593Smuzhiyun "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
543*4882a593Smuzhiyun "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
544*4882a593Smuzhiyun "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
545*4882a593Smuzhiyun "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
546*4882a593Smuzhiyun "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
547*4882a593Smuzhiyun "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
548*4882a593Smuzhiyun "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
549*4882a593Smuzhiyun "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
550*4882a593Smuzhiyun "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
551*4882a593Smuzhiyun "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
552*4882a593Smuzhiyun "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
553*4882a593Smuzhiyun "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104",
554*4882a593Smuzhiyun "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110",
555*4882a593Smuzhiyun "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116",
556*4882a593Smuzhiyun "gpio117", "gpio118", "gpio119", "gpio120", "gpio121", "gpio122",
557*4882a593Smuzhiyun "gpio123", "gpio124", "gpio125", "gpio126", "gpio127", "gpio128",
558*4882a593Smuzhiyun "gpio129", "gpio130", "gpio131", "gpio132", "gpio133", "gpio134",
559*4882a593Smuzhiyun "gpio135", "gpio136", "gpio137", "gpio138", "gpio139", "gpio140",
560*4882a593Smuzhiyun "gpio141", "gpio142", "gpio143", "gpio144", "gpio145",
561*4882a593Smuzhiyun };
562*4882a593Smuzhiyun
563*4882a593Smuzhiyun static const char * const blsp_spi1_groups[] = {
564*4882a593Smuzhiyun "gpio0", "gpio1", "gpio2", "gpio3"
565*4882a593Smuzhiyun };
566*4882a593Smuzhiyun static const char * const blsp_uart1_groups[] = {
567*4882a593Smuzhiyun "gpio0", "gpio1", "gpio2", "gpio3"
568*4882a593Smuzhiyun };
569*4882a593Smuzhiyun static const char * const blsp_uim1_groups[] = {
570*4882a593Smuzhiyun "gpio0", "gpio1"
571*4882a593Smuzhiyun };
572*4882a593Smuzhiyun static const char * const hdmi_rcv_groups[] = {
573*4882a593Smuzhiyun "gpio0"
574*4882a593Smuzhiyun };
575*4882a593Smuzhiyun static const char * const blsp_i2c1_groups[] = {
576*4882a593Smuzhiyun "gpio2", "gpio3"
577*4882a593Smuzhiyun };
578*4882a593Smuzhiyun static const char * const blsp_spi2_groups[] = {
579*4882a593Smuzhiyun "gpio4", "gpio5", "gpio6", "gpio7"
580*4882a593Smuzhiyun };
581*4882a593Smuzhiyun static const char * const blsp_uart2_groups[] = {
582*4882a593Smuzhiyun "gpio4", "gpio5", "gpio6", "gpio7"
583*4882a593Smuzhiyun };
584*4882a593Smuzhiyun static const char * const blsp_uim2_groups[] = {
585*4882a593Smuzhiyun "gpio4", "gpio5"
586*4882a593Smuzhiyun };
587*4882a593Smuzhiyun static const char * const qdss_cti_trig_out_b_groups[] = {
588*4882a593Smuzhiyun "gpio4",
589*4882a593Smuzhiyun };
590*4882a593Smuzhiyun static const char * const qdss_cti_trig_in_b_groups[] = {
591*4882a593Smuzhiyun "gpio5",
592*4882a593Smuzhiyun };
593*4882a593Smuzhiyun static const char * const blsp_i2c2_groups[] = {
594*4882a593Smuzhiyun "gpio6", "gpio7"
595*4882a593Smuzhiyun };
596*4882a593Smuzhiyun static const char * const blsp_spi3_groups[] = {
597*4882a593Smuzhiyun "gpio8", "gpio9", "gpio10", "gpio11"
598*4882a593Smuzhiyun };
599*4882a593Smuzhiyun static const char * const blsp_uart3_groups[] = {
600*4882a593Smuzhiyun "gpio8", "gpio9", "gpio10", "gpio11"
601*4882a593Smuzhiyun };
602*4882a593Smuzhiyun static const char * const blsp_uim3_groups[] = {
603*4882a593Smuzhiyun "gpio8", "gpio9"
604*4882a593Smuzhiyun };
605*4882a593Smuzhiyun static const char * const blsp_spi1_cs1_groups[] = {
606*4882a593Smuzhiyun "gpio8"
607*4882a593Smuzhiyun };
608*4882a593Smuzhiyun static const char * const blsp_spi1_cs2_groups[] = {
609*4882a593Smuzhiyun "gpio9", "gpio11"
610*4882a593Smuzhiyun };
611*4882a593Smuzhiyun static const char * const mdp_vsync_groups[] = {
612*4882a593Smuzhiyun "gpio10", "gpio11", "gpio12"
613*4882a593Smuzhiyun };
614*4882a593Smuzhiyun static const char * const blsp_i2c3_groups[] = {
615*4882a593Smuzhiyun "gpio10", "gpio11"
616*4882a593Smuzhiyun };
617*4882a593Smuzhiyun static const char * const blsp_spi1_cs3_groups[] = {
618*4882a593Smuzhiyun "gpio10"
619*4882a593Smuzhiyun };
620*4882a593Smuzhiyun static const char * const qdss_tracedata_b_groups[] = {
621*4882a593Smuzhiyun "gpio13", "gpio14", "gpio15", "gpio16", "gpio17", "gpio18",
622*4882a593Smuzhiyun "gpio19", "gpio21", "gpio22", "gpio23", "gpio25", "gpio26",
623*4882a593Smuzhiyun "gpio57", "gpio58", "gpio92", "gpio93",
624*4882a593Smuzhiyun };
625*4882a593Smuzhiyun static const char * const cam_mclk0_groups[] = {
626*4882a593Smuzhiyun "gpio13"
627*4882a593Smuzhiyun };
628*4882a593Smuzhiyun static const char * const cam_mclk1_groups[] = {
629*4882a593Smuzhiyun "gpio14"
630*4882a593Smuzhiyun };
631*4882a593Smuzhiyun static const char * const cam_mclk2_groups[] = {
632*4882a593Smuzhiyun "gpio15"
633*4882a593Smuzhiyun };
634*4882a593Smuzhiyun static const char * const cam_mclk3_groups[] = {
635*4882a593Smuzhiyun "gpio16"
636*4882a593Smuzhiyun };
637*4882a593Smuzhiyun static const char * const cci_i2c0_groups[] = {
638*4882a593Smuzhiyun "gpio17", "gpio18"
639*4882a593Smuzhiyun };
640*4882a593Smuzhiyun static const char * const blsp_spi4_groups[] = {
641*4882a593Smuzhiyun "gpio17", "gpio18", "gpio19", "gpio20"
642*4882a593Smuzhiyun };
643*4882a593Smuzhiyun static const char * const blsp_uart4_groups[] = {
644*4882a593Smuzhiyun "gpio17", "gpio18", "gpio19", "gpio20"
645*4882a593Smuzhiyun };
646*4882a593Smuzhiyun static const char * const blsp_uim4_groups[] = {
647*4882a593Smuzhiyun "gpio17", "gpio18"
648*4882a593Smuzhiyun };
649*4882a593Smuzhiyun static const char * const cci_i2c1_groups[] = {
650*4882a593Smuzhiyun "gpio19", "gpio20"
651*4882a593Smuzhiyun };
652*4882a593Smuzhiyun static const char * const blsp_i2c4_groups[] = {
653*4882a593Smuzhiyun "gpio19", "gpio20"
654*4882a593Smuzhiyun };
655*4882a593Smuzhiyun static const char * const cci_timer0_groups[] = {
656*4882a593Smuzhiyun "gpio21"
657*4882a593Smuzhiyun };
658*4882a593Smuzhiyun static const char * const blsp_spi5_groups[] = {
659*4882a593Smuzhiyun "gpio21", "gpio22", "gpio23", "gpio24"
660*4882a593Smuzhiyun };
661*4882a593Smuzhiyun static const char * const blsp_uart5_groups[] = {
662*4882a593Smuzhiyun "gpio21", "gpio22", "gpio23", "gpio24"
663*4882a593Smuzhiyun };
664*4882a593Smuzhiyun static const char * const blsp_uim5_groups[] = {
665*4882a593Smuzhiyun "gpio21", "gpio22"
666*4882a593Smuzhiyun };
667*4882a593Smuzhiyun static const char * const cci_timer1_groups[] = {
668*4882a593Smuzhiyun "gpio22"
669*4882a593Smuzhiyun };
670*4882a593Smuzhiyun static const char * const cci_timer2_groups[] = {
671*4882a593Smuzhiyun "gpio23"
672*4882a593Smuzhiyun };
673*4882a593Smuzhiyun static const char * const blsp_i2c5_groups[] = {
674*4882a593Smuzhiyun "gpio23", "gpio24"
675*4882a593Smuzhiyun };
676*4882a593Smuzhiyun static const char * const cci_timer3_groups[] = {
677*4882a593Smuzhiyun "gpio24"
678*4882a593Smuzhiyun };
679*4882a593Smuzhiyun static const char * const cci_async_in1_groups[] = {
680*4882a593Smuzhiyun "gpio24"
681*4882a593Smuzhiyun };
682*4882a593Smuzhiyun static const char * const cci_timer4_groups[] = {
683*4882a593Smuzhiyun "gpio25"
684*4882a593Smuzhiyun };
685*4882a593Smuzhiyun static const char * const cci_async_in2_groups[] = {
686*4882a593Smuzhiyun "gpio25"
687*4882a593Smuzhiyun };
688*4882a593Smuzhiyun static const char * const blsp_spi6_groups[] = {
689*4882a593Smuzhiyun "gpio25", "gpio26", "gpio27", "gpio28"
690*4882a593Smuzhiyun };
691*4882a593Smuzhiyun static const char * const blsp_uart6_groups[] = {
692*4882a593Smuzhiyun "gpio25", "gpio26", "gpio27", "gpio28"
693*4882a593Smuzhiyun };
694*4882a593Smuzhiyun static const char * const blsp_uim6_groups[] = {
695*4882a593Smuzhiyun "gpio25", "gpio26"
696*4882a593Smuzhiyun };
697*4882a593Smuzhiyun static const char * const cci_async_in0_groups[] = {
698*4882a593Smuzhiyun "gpio26"
699*4882a593Smuzhiyun };
700*4882a593Smuzhiyun static const char * const gp0_clk_groups[] = {
701*4882a593Smuzhiyun "gpio26"
702*4882a593Smuzhiyun };
703*4882a593Smuzhiyun static const char * const gp1_clk_groups[] = {
704*4882a593Smuzhiyun "gpio27", "gpio57", "gpio78"
705*4882a593Smuzhiyun };
706*4882a593Smuzhiyun static const char * const blsp_i2c6_groups[] = {
707*4882a593Smuzhiyun "gpio27", "gpio28"
708*4882a593Smuzhiyun };
709*4882a593Smuzhiyun static const char * const qdss_tracectl_a_groups[] = {
710*4882a593Smuzhiyun "gpio27",
711*4882a593Smuzhiyun };
712*4882a593Smuzhiyun static const char * const qdss_traceclk_a_groups[] = {
713*4882a593Smuzhiyun "gpio28",
714*4882a593Smuzhiyun };
715*4882a593Smuzhiyun static const char * const gp_mn_groups[] = {
716*4882a593Smuzhiyun "gpio29"
717*4882a593Smuzhiyun };
718*4882a593Smuzhiyun static const char * const hdmi_cec_groups[] = {
719*4882a593Smuzhiyun "gpio31"
720*4882a593Smuzhiyun };
721*4882a593Smuzhiyun static const char * const hdmi_ddc_groups[] = {
722*4882a593Smuzhiyun "gpio32", "gpio33"
723*4882a593Smuzhiyun };
724*4882a593Smuzhiyun static const char * const hdmi_hpd_groups[] = {
725*4882a593Smuzhiyun "gpio34"
726*4882a593Smuzhiyun };
727*4882a593Smuzhiyun static const char * const uim3_groups[] = {
728*4882a593Smuzhiyun "gpio35", "gpio36", "gpio37", "gpio38"
729*4882a593Smuzhiyun };
730*4882a593Smuzhiyun static const char * const pci_e1_groups[] = {
731*4882a593Smuzhiyun "gpio35", "gpio36",
732*4882a593Smuzhiyun };
733*4882a593Smuzhiyun static const char * const blsp_spi7_groups[] = {
734*4882a593Smuzhiyun "gpio41", "gpio42", "gpio43", "gpio44"
735*4882a593Smuzhiyun };
736*4882a593Smuzhiyun static const char * const blsp_uart7_groups[] = {
737*4882a593Smuzhiyun "gpio41", "gpio42", "gpio43", "gpio44"
738*4882a593Smuzhiyun };
739*4882a593Smuzhiyun static const char * const blsp_uim7_groups[] = {
740*4882a593Smuzhiyun "gpio41", "gpio42"
741*4882a593Smuzhiyun };
742*4882a593Smuzhiyun static const char * const qdss_cti_trig_out_c_groups[] = {
743*4882a593Smuzhiyun "gpio41",
744*4882a593Smuzhiyun };
745*4882a593Smuzhiyun static const char * const qdss_cti_trig_in_c_groups[] = {
746*4882a593Smuzhiyun "gpio42",
747*4882a593Smuzhiyun };
748*4882a593Smuzhiyun static const char * const blsp_i2c7_groups[] = {
749*4882a593Smuzhiyun "gpio43", "gpio44"
750*4882a593Smuzhiyun };
751*4882a593Smuzhiyun static const char * const blsp_spi8_groups[] = {
752*4882a593Smuzhiyun "gpio45", "gpio46", "gpio47", "gpio48"
753*4882a593Smuzhiyun };
754*4882a593Smuzhiyun static const char * const blsp_uart8_groups[] = {
755*4882a593Smuzhiyun "gpio45", "gpio46", "gpio47", "gpio48"
756*4882a593Smuzhiyun };
757*4882a593Smuzhiyun static const char * const blsp_uim8_groups[] = {
758*4882a593Smuzhiyun "gpio45", "gpio46"
759*4882a593Smuzhiyun };
760*4882a593Smuzhiyun static const char * const blsp_i2c8_groups[] = {
761*4882a593Smuzhiyun "gpio47", "gpio48"
762*4882a593Smuzhiyun };
763*4882a593Smuzhiyun static const char * const blsp_spi10_cs1_groups[] = {
764*4882a593Smuzhiyun "gpio47", "gpio67"
765*4882a593Smuzhiyun };
766*4882a593Smuzhiyun static const char * const blsp_spi10_cs2_groups[] = {
767*4882a593Smuzhiyun "gpio48", "gpio68"
768*4882a593Smuzhiyun };
769*4882a593Smuzhiyun static const char * const uim2_groups[] = {
770*4882a593Smuzhiyun "gpio49", "gpio50", "gpio51", "gpio52"
771*4882a593Smuzhiyun };
772*4882a593Smuzhiyun static const char * const blsp_spi9_groups[] = {
773*4882a593Smuzhiyun "gpio49", "gpio50", "gpio51", "gpio52"
774*4882a593Smuzhiyun };
775*4882a593Smuzhiyun static const char * const blsp_uart9_groups[] = {
776*4882a593Smuzhiyun "gpio49", "gpio50", "gpio51", "gpio52"
777*4882a593Smuzhiyun };
778*4882a593Smuzhiyun static const char * const blsp_uim9_groups[] = {
779*4882a593Smuzhiyun "gpio49", "gpio50"
780*4882a593Smuzhiyun };
781*4882a593Smuzhiyun static const char * const blsp_i2c9_groups[] = {
782*4882a593Smuzhiyun "gpio51", "gpio52"
783*4882a593Smuzhiyun };
784*4882a593Smuzhiyun static const char * const pci_e0_groups[] = {
785*4882a593Smuzhiyun "gpio53", "gpio54",
786*4882a593Smuzhiyun };
787*4882a593Smuzhiyun static const char * const uim4_groups[] = {
788*4882a593Smuzhiyun "gpio53", "gpio54", "gpio55", "gpio56"
789*4882a593Smuzhiyun };
790*4882a593Smuzhiyun static const char * const blsp_spi10_groups[] = {
791*4882a593Smuzhiyun "gpio53", "gpio54", "gpio55", "gpio56"
792*4882a593Smuzhiyun };
793*4882a593Smuzhiyun static const char * const blsp_uart10_groups[] = {
794*4882a593Smuzhiyun "gpio53", "gpio54", "gpio55", "gpio56"
795*4882a593Smuzhiyun };
796*4882a593Smuzhiyun static const char * const blsp_uim10_groups[] = {
797*4882a593Smuzhiyun "gpio53", "gpio54"
798*4882a593Smuzhiyun };
799*4882a593Smuzhiyun static const char * const qdss_tracedata_a_groups[] = {
800*4882a593Smuzhiyun "gpio53", "gpio54", "gpio63", "gpio64", "gpio65",
801*4882a593Smuzhiyun "gpio66", "gpio67", "gpio74", "gpio75", "gpio76",
802*4882a593Smuzhiyun "gpio77", "gpio85", "gpio86", "gpio87", "gpio89",
803*4882a593Smuzhiyun "gpio90"
804*4882a593Smuzhiyun };
805*4882a593Smuzhiyun static const char * const gp_pdm0_groups[] = {
806*4882a593Smuzhiyun "gpio54", "gpio95"
807*4882a593Smuzhiyun };
808*4882a593Smuzhiyun static const char * const blsp_i2c10_groups[] = {
809*4882a593Smuzhiyun "gpio55", "gpio56"
810*4882a593Smuzhiyun };
811*4882a593Smuzhiyun static const char * const qdss_cti_trig_in_a_groups[] = {
812*4882a593Smuzhiyun "gpio55",
813*4882a593Smuzhiyun };
814*4882a593Smuzhiyun static const char * const qdss_cti_trig_out_a_groups[] = {
815*4882a593Smuzhiyun "gpio56",
816*4882a593Smuzhiyun };
817*4882a593Smuzhiyun static const char * const qua_mi2s_groups[] = {
818*4882a593Smuzhiyun "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
819*4882a593Smuzhiyun };
820*4882a593Smuzhiyun static const char * const gcc_gp1_clk_a_groups[] = {
821*4882a593Smuzhiyun "gpio57"
822*4882a593Smuzhiyun };
823*4882a593Smuzhiyun static const char * const gcc_gp2_clk_a_groups[] = {
824*4882a593Smuzhiyun "gpio58"
825*4882a593Smuzhiyun };
826*4882a593Smuzhiyun static const char * const gcc_gp3_clk_a_groups[] = {
827*4882a593Smuzhiyun "gpio59"
828*4882a593Smuzhiyun };
829*4882a593Smuzhiyun static const char * const blsp_spi2_cs1_groups[] = {
830*4882a593Smuzhiyun "gpio62"
831*4882a593Smuzhiyun };
832*4882a593Smuzhiyun static const char * const blsp_spi2_cs2_groups[] = {
833*4882a593Smuzhiyun "gpio63"
834*4882a593Smuzhiyun };
835*4882a593Smuzhiyun static const char * const gp_pdm2_groups[] = {
836*4882a593Smuzhiyun "gpio63", "gpio79"
837*4882a593Smuzhiyun };
838*4882a593Smuzhiyun static const char * const pri_mi2s_groups[] = {
839*4882a593Smuzhiyun "gpio64", "gpio65", "gpio66", "gpio67", "gpio68"
840*4882a593Smuzhiyun };
841*4882a593Smuzhiyun static const char * const blsp_spi2_cs3_groups[] = {
842*4882a593Smuzhiyun "gpio66"
843*4882a593Smuzhiyun };
844*4882a593Smuzhiyun static const char * const spkr_i2s_groups[] = {
845*4882a593Smuzhiyun "gpio69", "gpio70", "gpio71", "gpio72"
846*4882a593Smuzhiyun };
847*4882a593Smuzhiyun static const char * const audio_ref_clk_groups[] = {
848*4882a593Smuzhiyun "gpio69"
849*4882a593Smuzhiyun };
850*4882a593Smuzhiyun static const char * const slimbus_groups[] = {
851*4882a593Smuzhiyun "gpio70", "gpio71"
852*4882a593Smuzhiyun };
853*4882a593Smuzhiyun static const char * const ter_mi2s_groups[] = {
854*4882a593Smuzhiyun "gpio73", "gpio74", "gpio75", "gpio76", "gpio77"
855*4882a593Smuzhiyun };
856*4882a593Smuzhiyun static const char * const gp_pdm1_groups[] = {
857*4882a593Smuzhiyun "gpio74", "gpio86"
858*4882a593Smuzhiyun };
859*4882a593Smuzhiyun static const char * const sec_mi2s_groups[] = {
860*4882a593Smuzhiyun "gpio78", "gpio79", "gpio80", "gpio81", "gpio82"
861*4882a593Smuzhiyun };
862*4882a593Smuzhiyun static const char * const gcc_gp1_clk_b_groups[] = {
863*4882a593Smuzhiyun "gpio78"
864*4882a593Smuzhiyun };
865*4882a593Smuzhiyun static const char * const blsp_spi11_groups[] = {
866*4882a593Smuzhiyun "gpio81", "gpio82", "gpio83", "gpio84"
867*4882a593Smuzhiyun };
868*4882a593Smuzhiyun static const char * const blsp_uart11_groups[] = {
869*4882a593Smuzhiyun "gpio81", "gpio82", "gpio83", "gpio84"
870*4882a593Smuzhiyun };
871*4882a593Smuzhiyun static const char * const blsp_uim11_groups[] = {
872*4882a593Smuzhiyun "gpio81", "gpio82"
873*4882a593Smuzhiyun };
874*4882a593Smuzhiyun static const char * const gcc_gp2_clk_b_groups[] = {
875*4882a593Smuzhiyun "gpio81"
876*4882a593Smuzhiyun };
877*4882a593Smuzhiyun static const char * const gcc_gp3_clk_b_groups[] = {
878*4882a593Smuzhiyun "gpio82"
879*4882a593Smuzhiyun };
880*4882a593Smuzhiyun static const char * const blsp_i2c11_groups[] = {
881*4882a593Smuzhiyun "gpio83", "gpio84"
882*4882a593Smuzhiyun };
883*4882a593Smuzhiyun static const char * const blsp_uart12_groups[] = {
884*4882a593Smuzhiyun "gpio85", "gpio86", "gpio87", "gpio88"
885*4882a593Smuzhiyun };
886*4882a593Smuzhiyun static const char * const blsp_uim12_groups[] = {
887*4882a593Smuzhiyun "gpio85", "gpio86"
888*4882a593Smuzhiyun };
889*4882a593Smuzhiyun static const char * const blsp_i2c12_groups[] = {
890*4882a593Smuzhiyun "gpio87", "gpio88"
891*4882a593Smuzhiyun };
892*4882a593Smuzhiyun static const char * const blsp_spi12_groups[] = {
893*4882a593Smuzhiyun "gpio85", "gpio86", "gpio87", "gpio88"
894*4882a593Smuzhiyun };
895*4882a593Smuzhiyun static const char * const tsif1_groups[] = {
896*4882a593Smuzhiyun "gpio89", "gpio90", "gpio91", "gpio110", "gpio111"
897*4882a593Smuzhiyun };
898*4882a593Smuzhiyun static const char * const blsp_spi10_cs3_groups[] = {
899*4882a593Smuzhiyun "gpio90"
900*4882a593Smuzhiyun };
901*4882a593Smuzhiyun static const char * const sdc4_groups[] = {
902*4882a593Smuzhiyun "gpio91", "gpio92", "gpio93", "gpio94", "gpio95", "gpio96"
903*4882a593Smuzhiyun };
904*4882a593Smuzhiyun static const char * const qdss_traceclk_b_groups[] = {
905*4882a593Smuzhiyun "gpio91",
906*4882a593Smuzhiyun };
907*4882a593Smuzhiyun static const char * const tsif2_groups[] = {
908*4882a593Smuzhiyun "gpio92", "gpio93", "gpio94", "gpio95", "gpio96"
909*4882a593Smuzhiyun };
910*4882a593Smuzhiyun static const char * const qdss_tracectl_b_groups[] = {
911*4882a593Smuzhiyun "gpio94",
912*4882a593Smuzhiyun };
913*4882a593Smuzhiyun static const char * const qdss_cti_trig_out_d_groups[] = {
914*4882a593Smuzhiyun "gpio95",
915*4882a593Smuzhiyun };
916*4882a593Smuzhiyun static const char * const qdss_cti_trig_in_d_groups[] = {
917*4882a593Smuzhiyun "gpio96",
918*4882a593Smuzhiyun };
919*4882a593Smuzhiyun static const char * const uim1_groups[] = {
920*4882a593Smuzhiyun "gpio97", "gpio98", "gpio99", "gpio100"
921*4882a593Smuzhiyun };
922*4882a593Smuzhiyun static const char * const uim_batt_alarm_groups[] = {
923*4882a593Smuzhiyun "gpio101"
924*4882a593Smuzhiyun };
925*4882a593Smuzhiyun static const char * const blsp11_uart_tx_b_groups[] = {
926*4882a593Smuzhiyun "gpio111"
927*4882a593Smuzhiyun };
928*4882a593Smuzhiyun static const char * const blsp11_uart_rx_b_groups[] = {
929*4882a593Smuzhiyun "gpio112"
930*4882a593Smuzhiyun };
931*4882a593Smuzhiyun static const char * const blsp11_i2c_sda_b_groups[] = {
932*4882a593Smuzhiyun "gpio113"
933*4882a593Smuzhiyun };
934*4882a593Smuzhiyun static const char * const blsp11_i2c_scl_b_groups[] = {
935*4882a593Smuzhiyun "gpio114"
936*4882a593Smuzhiyun };
937*4882a593Smuzhiyun static const char * const gsm_tx_groups[] = {
938*4882a593Smuzhiyun "gpio126", "gpio131", "gpio132", "gpio133"
939*4882a593Smuzhiyun };
940*4882a593Smuzhiyun static const char * const nav_tsync_groups[] = {
941*4882a593Smuzhiyun "gpio127"
942*4882a593Smuzhiyun };
943*4882a593Smuzhiyun static const char * const nav_pps_groups[] = {
944*4882a593Smuzhiyun "gpio127"
945*4882a593Smuzhiyun };
946*4882a593Smuzhiyun static const char * const gps_tx_groups[] = {
947*4882a593Smuzhiyun "gpio130"
948*4882a593Smuzhiyun };
949*4882a593Smuzhiyun static const char * const mss_lte_groups[] = {
950*4882a593Smuzhiyun "gpio134", "gpio135"
951*4882a593Smuzhiyun };
952*4882a593Smuzhiyun
953*4882a593Smuzhiyun static const struct msm_function msm8994_functions[] = {
954*4882a593Smuzhiyun FUNCTION(audio_ref_clk),
955*4882a593Smuzhiyun FUNCTION(blsp_i2c1),
956*4882a593Smuzhiyun FUNCTION(blsp_i2c2),
957*4882a593Smuzhiyun FUNCTION(blsp_i2c3),
958*4882a593Smuzhiyun FUNCTION(blsp_i2c4),
959*4882a593Smuzhiyun FUNCTION(blsp_i2c5),
960*4882a593Smuzhiyun FUNCTION(blsp_i2c6),
961*4882a593Smuzhiyun FUNCTION(blsp_i2c7),
962*4882a593Smuzhiyun FUNCTION(blsp_i2c8),
963*4882a593Smuzhiyun FUNCTION(blsp_i2c9),
964*4882a593Smuzhiyun FUNCTION(blsp_i2c10),
965*4882a593Smuzhiyun FUNCTION(blsp_i2c11),
966*4882a593Smuzhiyun FUNCTION(blsp_i2c12),
967*4882a593Smuzhiyun FUNCTION(blsp_spi1),
968*4882a593Smuzhiyun FUNCTION(blsp_spi1_cs1),
969*4882a593Smuzhiyun FUNCTION(blsp_spi1_cs2),
970*4882a593Smuzhiyun FUNCTION(blsp_spi1_cs3),
971*4882a593Smuzhiyun FUNCTION(blsp_spi2),
972*4882a593Smuzhiyun FUNCTION(blsp_spi2_cs1),
973*4882a593Smuzhiyun FUNCTION(blsp_spi2_cs2),
974*4882a593Smuzhiyun FUNCTION(blsp_spi2_cs3),
975*4882a593Smuzhiyun FUNCTION(blsp_spi3),
976*4882a593Smuzhiyun FUNCTION(blsp_spi4),
977*4882a593Smuzhiyun FUNCTION(blsp_spi5),
978*4882a593Smuzhiyun FUNCTION(blsp_spi6),
979*4882a593Smuzhiyun FUNCTION(blsp_spi7),
980*4882a593Smuzhiyun FUNCTION(blsp_spi8),
981*4882a593Smuzhiyun FUNCTION(blsp_spi9),
982*4882a593Smuzhiyun FUNCTION(blsp_spi10),
983*4882a593Smuzhiyun FUNCTION(blsp_spi10_cs1),
984*4882a593Smuzhiyun FUNCTION(blsp_spi10_cs2),
985*4882a593Smuzhiyun FUNCTION(blsp_spi10_cs3),
986*4882a593Smuzhiyun FUNCTION(blsp_spi11),
987*4882a593Smuzhiyun FUNCTION(blsp_spi12),
988*4882a593Smuzhiyun FUNCTION(blsp_uart1),
989*4882a593Smuzhiyun FUNCTION(blsp_uart2),
990*4882a593Smuzhiyun FUNCTION(blsp_uart3),
991*4882a593Smuzhiyun FUNCTION(blsp_uart4),
992*4882a593Smuzhiyun FUNCTION(blsp_uart5),
993*4882a593Smuzhiyun FUNCTION(blsp_uart6),
994*4882a593Smuzhiyun FUNCTION(blsp_uart7),
995*4882a593Smuzhiyun FUNCTION(blsp_uart8),
996*4882a593Smuzhiyun FUNCTION(blsp_uart9),
997*4882a593Smuzhiyun FUNCTION(blsp_uart10),
998*4882a593Smuzhiyun FUNCTION(blsp_uart11),
999*4882a593Smuzhiyun FUNCTION(blsp_uart12),
1000*4882a593Smuzhiyun FUNCTION(blsp_uim1),
1001*4882a593Smuzhiyun FUNCTION(blsp_uim2),
1002*4882a593Smuzhiyun FUNCTION(blsp_uim3),
1003*4882a593Smuzhiyun FUNCTION(blsp_uim4),
1004*4882a593Smuzhiyun FUNCTION(blsp_uim5),
1005*4882a593Smuzhiyun FUNCTION(blsp_uim6),
1006*4882a593Smuzhiyun FUNCTION(blsp_uim7),
1007*4882a593Smuzhiyun FUNCTION(blsp_uim8),
1008*4882a593Smuzhiyun FUNCTION(blsp_uim9),
1009*4882a593Smuzhiyun FUNCTION(blsp_uim10),
1010*4882a593Smuzhiyun FUNCTION(blsp_uim11),
1011*4882a593Smuzhiyun FUNCTION(blsp_uim12),
1012*4882a593Smuzhiyun FUNCTION(blsp11_i2c_scl_b),
1013*4882a593Smuzhiyun FUNCTION(blsp11_i2c_sda_b),
1014*4882a593Smuzhiyun FUNCTION(blsp11_uart_rx_b),
1015*4882a593Smuzhiyun FUNCTION(blsp11_uart_tx_b),
1016*4882a593Smuzhiyun FUNCTION(cam_mclk0),
1017*4882a593Smuzhiyun FUNCTION(cam_mclk1),
1018*4882a593Smuzhiyun FUNCTION(cam_mclk2),
1019*4882a593Smuzhiyun FUNCTION(cam_mclk3),
1020*4882a593Smuzhiyun FUNCTION(cci_async_in0),
1021*4882a593Smuzhiyun FUNCTION(cci_async_in1),
1022*4882a593Smuzhiyun FUNCTION(cci_async_in2),
1023*4882a593Smuzhiyun FUNCTION(cci_i2c0),
1024*4882a593Smuzhiyun FUNCTION(cci_i2c1),
1025*4882a593Smuzhiyun FUNCTION(cci_timer0),
1026*4882a593Smuzhiyun FUNCTION(cci_timer1),
1027*4882a593Smuzhiyun FUNCTION(cci_timer2),
1028*4882a593Smuzhiyun FUNCTION(cci_timer3),
1029*4882a593Smuzhiyun FUNCTION(cci_timer4),
1030*4882a593Smuzhiyun FUNCTION(gcc_gp1_clk_a),
1031*4882a593Smuzhiyun FUNCTION(gcc_gp1_clk_b),
1032*4882a593Smuzhiyun FUNCTION(gcc_gp2_clk_a),
1033*4882a593Smuzhiyun FUNCTION(gcc_gp2_clk_b),
1034*4882a593Smuzhiyun FUNCTION(gcc_gp3_clk_a),
1035*4882a593Smuzhiyun FUNCTION(gcc_gp3_clk_b),
1036*4882a593Smuzhiyun FUNCTION(gp_mn),
1037*4882a593Smuzhiyun FUNCTION(gp_pdm0),
1038*4882a593Smuzhiyun FUNCTION(gp_pdm1),
1039*4882a593Smuzhiyun FUNCTION(gp_pdm2),
1040*4882a593Smuzhiyun FUNCTION(gp0_clk),
1041*4882a593Smuzhiyun FUNCTION(gp1_clk),
1042*4882a593Smuzhiyun FUNCTION(gps_tx),
1043*4882a593Smuzhiyun FUNCTION(gsm_tx),
1044*4882a593Smuzhiyun FUNCTION(hdmi_cec),
1045*4882a593Smuzhiyun FUNCTION(hdmi_ddc),
1046*4882a593Smuzhiyun FUNCTION(hdmi_hpd),
1047*4882a593Smuzhiyun FUNCTION(hdmi_rcv),
1048*4882a593Smuzhiyun FUNCTION(mdp_vsync),
1049*4882a593Smuzhiyun FUNCTION(mss_lte),
1050*4882a593Smuzhiyun FUNCTION(nav_pps),
1051*4882a593Smuzhiyun FUNCTION(nav_tsync),
1052*4882a593Smuzhiyun FUNCTION(qdss_cti_trig_in_a),
1053*4882a593Smuzhiyun FUNCTION(qdss_cti_trig_in_b),
1054*4882a593Smuzhiyun FUNCTION(qdss_cti_trig_in_c),
1055*4882a593Smuzhiyun FUNCTION(qdss_cti_trig_in_d),
1056*4882a593Smuzhiyun FUNCTION(qdss_cti_trig_out_a),
1057*4882a593Smuzhiyun FUNCTION(qdss_cti_trig_out_b),
1058*4882a593Smuzhiyun FUNCTION(qdss_cti_trig_out_c),
1059*4882a593Smuzhiyun FUNCTION(qdss_cti_trig_out_d),
1060*4882a593Smuzhiyun FUNCTION(qdss_traceclk_a),
1061*4882a593Smuzhiyun FUNCTION(qdss_traceclk_b),
1062*4882a593Smuzhiyun FUNCTION(qdss_tracectl_a),
1063*4882a593Smuzhiyun FUNCTION(qdss_tracectl_b),
1064*4882a593Smuzhiyun FUNCTION(qdss_tracedata_a),
1065*4882a593Smuzhiyun FUNCTION(qdss_tracedata_b),
1066*4882a593Smuzhiyun FUNCTION(qua_mi2s),
1067*4882a593Smuzhiyun FUNCTION(pci_e0),
1068*4882a593Smuzhiyun FUNCTION(pci_e1),
1069*4882a593Smuzhiyun FUNCTION(pri_mi2s),
1070*4882a593Smuzhiyun FUNCTION(sdc4),
1071*4882a593Smuzhiyun FUNCTION(sec_mi2s),
1072*4882a593Smuzhiyun FUNCTION(slimbus),
1073*4882a593Smuzhiyun FUNCTION(spkr_i2s),
1074*4882a593Smuzhiyun FUNCTION(ter_mi2s),
1075*4882a593Smuzhiyun FUNCTION(tsif1),
1076*4882a593Smuzhiyun FUNCTION(tsif2),
1077*4882a593Smuzhiyun FUNCTION(uim_batt_alarm),
1078*4882a593Smuzhiyun FUNCTION(uim1),
1079*4882a593Smuzhiyun FUNCTION(uim2),
1080*4882a593Smuzhiyun FUNCTION(uim3),
1081*4882a593Smuzhiyun FUNCTION(uim4),
1082*4882a593Smuzhiyun FUNCTION(gpio),
1083*4882a593Smuzhiyun };
1084*4882a593Smuzhiyun
1085*4882a593Smuzhiyun static const struct msm_pingroup msm8994_groups[] = {
1086*4882a593Smuzhiyun PINGROUP(0, blsp_spi1, blsp_uart1, blsp_uim1, hdmi_rcv, NA, NA, NA,
1087*4882a593Smuzhiyun NA, NA, NA, NA),
1088*4882a593Smuzhiyun PINGROUP(1, blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA, NA, NA,
1089*4882a593Smuzhiyun NA, NA),
1090*4882a593Smuzhiyun PINGROUP(2, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA, NA, NA,
1091*4882a593Smuzhiyun NA, NA),
1092*4882a593Smuzhiyun PINGROUP(3, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA, NA, NA,
1093*4882a593Smuzhiyun NA, NA),
1094*4882a593Smuzhiyun PINGROUP(4, blsp_spi2, blsp_uart2, blsp_uim2, NA, qdss_cti_trig_out_b,
1095*4882a593Smuzhiyun NA, NA, NA, NA, NA, NA),
1096*4882a593Smuzhiyun PINGROUP(5, blsp_spi2, blsp_uart2, blsp_uim2, NA, qdss_cti_trig_in_b,
1097*4882a593Smuzhiyun NA, NA, NA, NA, NA, NA),
1098*4882a593Smuzhiyun PINGROUP(6, blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA, NA, NA,
1099*4882a593Smuzhiyun NA, NA),
1100*4882a593Smuzhiyun PINGROUP(7, blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA, NA, NA,
1101*4882a593Smuzhiyun NA, NA),
1102*4882a593Smuzhiyun PINGROUP(8, blsp_spi3, blsp_uart3, blsp_uim3, blsp_spi1_cs1, NA, NA,
1103*4882a593Smuzhiyun NA, NA, NA, NA, NA),
1104*4882a593Smuzhiyun PINGROUP(9, blsp_spi3, blsp_uart3, blsp_uim3, blsp_spi1_cs2, NA, NA,
1105*4882a593Smuzhiyun NA, NA, NA, NA, NA),
1106*4882a593Smuzhiyun PINGROUP(10, mdp_vsync, blsp_spi3, blsp_uart3, blsp_i2c3,
1107*4882a593Smuzhiyun blsp_spi1_cs3, NA, NA, NA, NA, NA, NA),
1108*4882a593Smuzhiyun PINGROUP(11, mdp_vsync, blsp_spi3, blsp_uart3, blsp_i2c3,
1109*4882a593Smuzhiyun blsp_spi1_cs2, NA, NA, NA, NA, NA, NA),
1110*4882a593Smuzhiyun PINGROUP(12, mdp_vsync, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1111*4882a593Smuzhiyun PINGROUP(13, cam_mclk0, NA, NA, qdss_tracedata_b, NA, NA, NA, NA, NA,
1112*4882a593Smuzhiyun NA, NA),
1113*4882a593Smuzhiyun PINGROUP(14, cam_mclk1, NA, NA, qdss_tracedata_b, NA, NA, NA, NA, NA,
1114*4882a593Smuzhiyun NA, NA),
1115*4882a593Smuzhiyun PINGROUP(15, cam_mclk2, NA, qdss_tracedata_b, NA, NA, NA, NA, NA, NA,
1116*4882a593Smuzhiyun NA, NA),
1117*4882a593Smuzhiyun PINGROUP(16, cam_mclk3, NA, qdss_tracedata_b, NA, NA, NA, NA, NA, NA,
1118*4882a593Smuzhiyun NA, NA),
1119*4882a593Smuzhiyun PINGROUP(17, cci_i2c0, blsp_spi4, blsp_uart4, blsp_uim4, NA,
1120*4882a593Smuzhiyun qdss_tracedata_b, NA, NA, NA, NA, NA),
1121*4882a593Smuzhiyun PINGROUP(18, cci_i2c0, blsp_spi4, blsp_uart4, blsp_uim4, NA,
1122*4882a593Smuzhiyun qdss_tracedata_b, NA, NA, NA, NA, NA),
1123*4882a593Smuzhiyun PINGROUP(19, cci_i2c1, blsp_spi4, blsp_uart4, blsp_i2c4, NA,
1124*4882a593Smuzhiyun qdss_tracedata_b, NA, NA, NA, NA, NA),
1125*4882a593Smuzhiyun PINGROUP(20, cci_i2c1, blsp_spi4, blsp_uart4, blsp_i2c4, NA, NA, NA,
1126*4882a593Smuzhiyun NA, NA, NA, NA),
1127*4882a593Smuzhiyun PINGROUP(21, cci_timer0, blsp_spi5, blsp_uart5, blsp_uim5, NA,
1128*4882a593Smuzhiyun qdss_tracedata_b, NA, NA, NA, NA, NA),
1129*4882a593Smuzhiyun PINGROUP(22, cci_timer1, blsp_spi5, blsp_uart5, blsp_uim5, NA,
1130*4882a593Smuzhiyun qdss_tracedata_b, NA, NA, NA, NA, NA),
1131*4882a593Smuzhiyun PINGROUP(23, cci_timer2, blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA,
1132*4882a593Smuzhiyun qdss_tracedata_b, NA, NA, NA, NA),
1133*4882a593Smuzhiyun PINGROUP(24, cci_timer3, cci_async_in1, blsp_spi5, blsp_uart5,
1134*4882a593Smuzhiyun blsp_i2c5, NA, NA, NA, NA, NA, NA),
1135*4882a593Smuzhiyun PINGROUP(25, cci_timer4, cci_async_in2, blsp_spi6, blsp_uart6,
1136*4882a593Smuzhiyun blsp_uim6, NA, NA, qdss_tracedata_b, NA, NA, NA),
1137*4882a593Smuzhiyun PINGROUP(26, cci_async_in0, blsp_spi6, blsp_uart6, blsp_uim6, gp0_clk,
1138*4882a593Smuzhiyun NA, qdss_tracedata_b, NA, NA, NA, NA),
1139*4882a593Smuzhiyun PINGROUP(27, blsp_spi6, blsp_uart6, blsp_i2c6, gp1_clk,
1140*4882a593Smuzhiyun qdss_tracectl_a, NA, NA, NA, NA, NA, NA),
1141*4882a593Smuzhiyun PINGROUP(28, blsp_spi6, blsp_uart6, blsp_i2c6, qdss_traceclk_a, NA,
1142*4882a593Smuzhiyun NA, NA, NA, NA, NA, NA),
1143*4882a593Smuzhiyun PINGROUP(29, gp_mn, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1144*4882a593Smuzhiyun PINGROUP(30, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1145*4882a593Smuzhiyun PINGROUP(31, hdmi_cec, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1146*4882a593Smuzhiyun PINGROUP(32, hdmi_ddc, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1147*4882a593Smuzhiyun PINGROUP(33, hdmi_ddc, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1148*4882a593Smuzhiyun PINGROUP(34, hdmi_hpd, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1149*4882a593Smuzhiyun PINGROUP(35, uim3, pci_e1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1150*4882a593Smuzhiyun PINGROUP(36, uim3, pci_e1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1151*4882a593Smuzhiyun PINGROUP(37, uim3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1152*4882a593Smuzhiyun PINGROUP(38, uim3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1153*4882a593Smuzhiyun PINGROUP(39, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1154*4882a593Smuzhiyun PINGROUP(40, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1155*4882a593Smuzhiyun PINGROUP(41, blsp_spi7, blsp_uart7, blsp_uim7, qdss_cti_trig_out_c,
1156*4882a593Smuzhiyun NA, NA, NA, NA, NA, NA, NA),
1157*4882a593Smuzhiyun PINGROUP(42, blsp_spi7, blsp_uart7, blsp_uim7, qdss_cti_trig_in_c, NA,
1158*4882a593Smuzhiyun NA, NA, NA, NA, NA, NA),
1159*4882a593Smuzhiyun PINGROUP(43, blsp_spi7, blsp_uart7, blsp_i2c7, NA, NA, NA, NA, NA, NA,
1160*4882a593Smuzhiyun NA, NA),
1161*4882a593Smuzhiyun PINGROUP(44, blsp_spi7, blsp_uart7, blsp_i2c7, NA, NA, NA, NA, NA, NA,
1162*4882a593Smuzhiyun NA, NA),
1163*4882a593Smuzhiyun PINGROUP(45, blsp_spi8, blsp_uart8, blsp_uim8, NA, NA, NA, NA, NA, NA,
1164*4882a593Smuzhiyun NA, NA),
1165*4882a593Smuzhiyun PINGROUP(46, blsp_spi8, blsp_uart8, blsp_uim8, NA, NA, NA, NA, NA, NA,
1166*4882a593Smuzhiyun NA, NA),
1167*4882a593Smuzhiyun PINGROUP(47, blsp_spi8, blsp_uart8, blsp_i2c8, blsp_spi10_cs1, NA, NA,
1168*4882a593Smuzhiyun NA, NA, NA, NA, NA),
1169*4882a593Smuzhiyun PINGROUP(48, blsp_spi8, blsp_uart8, blsp_i2c8, blsp_spi10_cs2, NA, NA,
1170*4882a593Smuzhiyun NA, NA, NA, NA, NA),
1171*4882a593Smuzhiyun PINGROUP(49, uim2, blsp_spi9, blsp_uart9, blsp_uim9, NA, NA, NA, NA,
1172*4882a593Smuzhiyun NA, NA, NA),
1173*4882a593Smuzhiyun PINGROUP(50, uim2, blsp_spi9, blsp_uart9, blsp_uim9, NA, NA, NA, NA,
1174*4882a593Smuzhiyun NA, NA, NA),
1175*4882a593Smuzhiyun PINGROUP(51, uim2, blsp_spi9, blsp_uart9, blsp_i2c9, NA, NA, NA, NA,
1176*4882a593Smuzhiyun NA, NA, NA),
1177*4882a593Smuzhiyun PINGROUP(52, uim2, blsp_spi9, blsp_uart9, blsp_i2c9, NA, NA, NA, NA,
1178*4882a593Smuzhiyun NA, NA, NA),
1179*4882a593Smuzhiyun PINGROUP(53, uim4, pci_e0, blsp_spi10, blsp_uart10, blsp_uim10, NA,
1180*4882a593Smuzhiyun NA, qdss_tracedata_a, NA, NA, NA),
1181*4882a593Smuzhiyun PINGROUP(54, uim4, pci_e0, blsp_spi10, blsp_uart10, blsp_uim10,
1182*4882a593Smuzhiyun gp_pdm0, NA, NA, qdss_tracedata_a, NA, NA),
1183*4882a593Smuzhiyun PINGROUP(55, uim4, blsp_spi10, blsp_uart10, blsp_i2c10, NA, NA, NA,
1184*4882a593Smuzhiyun qdss_cti_trig_in_a, NA, NA, NA),
1185*4882a593Smuzhiyun PINGROUP(56, uim4, blsp_spi10, blsp_uart10, blsp_i2c10, NA, NA,
1186*4882a593Smuzhiyun qdss_cti_trig_out_a, NA, NA, NA, NA),
1187*4882a593Smuzhiyun PINGROUP(57, qua_mi2s, gcc_gp1_clk_a, NA, NA, qdss_tracedata_b, NA, NA,
1188*4882a593Smuzhiyun NA, NA, NA, NA),
1189*4882a593Smuzhiyun PINGROUP(58, qua_mi2s, gcc_gp2_clk_a, NA, NA, qdss_tracedata_b, NA, NA,
1190*4882a593Smuzhiyun NA, NA, NA, NA),
1191*4882a593Smuzhiyun PINGROUP(59, qua_mi2s, gcc_gp3_clk_a, NA, NA, NA, NA, NA, NA, NA, NA,
1192*4882a593Smuzhiyun NA),
1193*4882a593Smuzhiyun PINGROUP(60, qua_mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1194*4882a593Smuzhiyun PINGROUP(61, qua_mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1195*4882a593Smuzhiyun PINGROUP(62, qua_mi2s, blsp_spi2_cs1, NA, NA, NA, NA, NA, NA, NA, NA,
1196*4882a593Smuzhiyun NA),
1197*4882a593Smuzhiyun PINGROUP(63, qua_mi2s, blsp_spi2_cs2, gp_pdm2, NA, NA, NA, NA, NA,
1198*4882a593Smuzhiyun qdss_tracedata_a, NA, NA),
1199*4882a593Smuzhiyun PINGROUP(64, pri_mi2s, NA, NA, NA, qdss_tracedata_a, NA, NA, NA, NA,
1200*4882a593Smuzhiyun NA, NA),
1201*4882a593Smuzhiyun PINGROUP(65, pri_mi2s, NA, NA, NA, qdss_tracedata_a, NA, NA, NA, NA,
1202*4882a593Smuzhiyun NA, NA),
1203*4882a593Smuzhiyun PINGROUP(66, pri_mi2s, blsp_spi2_cs3, NA, NA, NA, qdss_tracedata_a,
1204*4882a593Smuzhiyun NA, NA, NA, NA, NA),
1205*4882a593Smuzhiyun PINGROUP(67, pri_mi2s, blsp_spi10_cs1, NA, NA, NA, qdss_tracedata_a,
1206*4882a593Smuzhiyun NA, NA, NA, NA, NA),
1207*4882a593Smuzhiyun PINGROUP(68, pri_mi2s, blsp_spi10_cs2, NA, NA, NA, NA, NA, NA, NA, NA,
1208*4882a593Smuzhiyun NA),
1209*4882a593Smuzhiyun PINGROUP(69, spkr_i2s, audio_ref_clk, NA, NA, NA, NA, NA, NA, NA, NA,
1210*4882a593Smuzhiyun NA),
1211*4882a593Smuzhiyun PINGROUP(70, slimbus, spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1212*4882a593Smuzhiyun PINGROUP(71, slimbus, spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1213*4882a593Smuzhiyun PINGROUP(72, spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1214*4882a593Smuzhiyun PINGROUP(73, ter_mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1215*4882a593Smuzhiyun PINGROUP(74, ter_mi2s, gp_pdm1, NA, NA, NA, qdss_tracedata_a, NA, NA,
1216*4882a593Smuzhiyun NA, NA, NA),
1217*4882a593Smuzhiyun PINGROUP(75, ter_mi2s, NA, NA, qdss_tracedata_a, NA, NA, NA, NA, NA,
1218*4882a593Smuzhiyun NA, NA),
1219*4882a593Smuzhiyun PINGROUP(76, ter_mi2s, NA, NA, qdss_tracedata_a, NA, NA, NA, NA, NA,
1220*4882a593Smuzhiyun NA, NA),
1221*4882a593Smuzhiyun PINGROUP(77, ter_mi2s, NA, NA, qdss_tracedata_a, NA, NA, NA, NA, NA,
1222*4882a593Smuzhiyun NA, NA),
1223*4882a593Smuzhiyun PINGROUP(78, sec_mi2s, gcc_gp1_clk_b, NA, NA, NA, NA, NA, NA, NA, NA,
1224*4882a593Smuzhiyun NA),
1225*4882a593Smuzhiyun PINGROUP(79, sec_mi2s, gp_pdm2, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1226*4882a593Smuzhiyun PINGROUP(80, sec_mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1227*4882a593Smuzhiyun PINGROUP(81, sec_mi2s, blsp_spi11, blsp_uart11, blsp_uim11,
1228*4882a593Smuzhiyun gcc_gp2_clk_b, NA, NA, NA, NA, NA, NA),
1229*4882a593Smuzhiyun PINGROUP(82, sec_mi2s, blsp_spi11, blsp_uart11, blsp_uim11,
1230*4882a593Smuzhiyun gcc_gp3_clk_b, NA, NA, NA, NA, NA, NA),
1231*4882a593Smuzhiyun PINGROUP(83, blsp_spi11, blsp_uart11, blsp_i2c11, NA, NA, NA, NA, NA,
1232*4882a593Smuzhiyun NA, NA, NA),
1233*4882a593Smuzhiyun PINGROUP(84, blsp_spi11, blsp_uart11, blsp_i2c11, NA, NA, NA, NA, NA,
1234*4882a593Smuzhiyun NA, NA, NA),
1235*4882a593Smuzhiyun PINGROUP(85, blsp_spi12, blsp_uart12, blsp_uim12, NA, NA,
1236*4882a593Smuzhiyun qdss_tracedata_a, NA, NA, NA, NA, NA),
1237*4882a593Smuzhiyun PINGROUP(86, blsp_spi12, blsp_uart12, blsp_uim12, gp_pdm1, NA,
1238*4882a593Smuzhiyun qdss_tracedata_a, NA, NA, NA, NA, NA),
1239*4882a593Smuzhiyun PINGROUP(87, blsp_spi12, blsp_uart12, blsp_i2c12, NA,
1240*4882a593Smuzhiyun qdss_tracedata_a, NA, NA, NA, NA, NA, NA),
1241*4882a593Smuzhiyun PINGROUP(88, blsp_spi12, blsp_uart12, blsp_i2c12, NA, NA, NA, NA, NA,
1242*4882a593Smuzhiyun NA, NA, NA),
1243*4882a593Smuzhiyun PINGROUP(89, tsif1, NA, qdss_tracedata_a, NA, NA, NA, NA, NA, NA, NA,
1244*4882a593Smuzhiyun NA),
1245*4882a593Smuzhiyun PINGROUP(90, tsif1, blsp_spi10_cs3, qdss_tracedata_a, NA, NA, NA, NA,
1246*4882a593Smuzhiyun NA, NA, NA, NA),
1247*4882a593Smuzhiyun PINGROUP(91, tsif1, sdc4, NA, NA, NA, NA, qdss_traceclk_b, NA, NA, NA,
1248*4882a593Smuzhiyun NA),
1249*4882a593Smuzhiyun PINGROUP(92, tsif2, sdc4, NA, NA, qdss_tracedata_b, NA, NA, NA, NA,
1250*4882a593Smuzhiyun NA, NA),
1251*4882a593Smuzhiyun PINGROUP(93, tsif2, sdc4, NA, NA, NA, NA, qdss_tracedata_b, NA, NA,
1252*4882a593Smuzhiyun NA, NA),
1253*4882a593Smuzhiyun PINGROUP(94, tsif2, sdc4, NA, NA, NA, NA, qdss_tracectl_b, NA, NA, NA,
1254*4882a593Smuzhiyun NA),
1255*4882a593Smuzhiyun PINGROUP(95, tsif2, sdc4, gp_pdm0, NA, NA, NA, qdss_cti_trig_out_d,
1256*4882a593Smuzhiyun NA, NA, NA, NA),
1257*4882a593Smuzhiyun PINGROUP(96, tsif2, sdc4, qdss_cti_trig_in_d, NA, NA, NA, NA, NA, NA,
1258*4882a593Smuzhiyun NA, NA),
1259*4882a593Smuzhiyun PINGROUP(97, uim1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1260*4882a593Smuzhiyun PINGROUP(98, uim1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1261*4882a593Smuzhiyun PINGROUP(99, uim1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1262*4882a593Smuzhiyun PINGROUP(100, uim1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1263*4882a593Smuzhiyun PINGROUP(101, uim_batt_alarm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1264*4882a593Smuzhiyun PINGROUP(102, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1265*4882a593Smuzhiyun PINGROUP(103, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1266*4882a593Smuzhiyun PINGROUP(104, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1267*4882a593Smuzhiyun PINGROUP(105, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1268*4882a593Smuzhiyun PINGROUP(106, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1269*4882a593Smuzhiyun PINGROUP(107, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1270*4882a593Smuzhiyun PINGROUP(108, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1271*4882a593Smuzhiyun PINGROUP(109, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1272*4882a593Smuzhiyun PINGROUP(110, tsif1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1273*4882a593Smuzhiyun PINGROUP(111, tsif1, blsp11_uart_tx_b, NA, NA, NA, NA, NA, NA, NA, NA,
1274*4882a593Smuzhiyun NA),
1275*4882a593Smuzhiyun PINGROUP(112, blsp11_uart_rx_b, NA, NA, NA, NA, NA, NA, NA, NA, NA,
1276*4882a593Smuzhiyun NA),
1277*4882a593Smuzhiyun PINGROUP(113, blsp11_i2c_sda_b, NA, NA, NA, NA, NA, NA, NA, NA, NA,
1278*4882a593Smuzhiyun NA),
1279*4882a593Smuzhiyun PINGROUP(114, blsp11_i2c_scl_b, NA, NA, NA, NA, NA, NA, NA, NA, NA,
1280*4882a593Smuzhiyun NA),
1281*4882a593Smuzhiyun PINGROUP(115, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1282*4882a593Smuzhiyun PINGROUP(116, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1283*4882a593Smuzhiyun PINGROUP(117, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1284*4882a593Smuzhiyun PINGROUP(118, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1285*4882a593Smuzhiyun PINGROUP(119, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1286*4882a593Smuzhiyun PINGROUP(120, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1287*4882a593Smuzhiyun PINGROUP(121, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1288*4882a593Smuzhiyun PINGROUP(122, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1289*4882a593Smuzhiyun PINGROUP(123, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1290*4882a593Smuzhiyun PINGROUP(124, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1291*4882a593Smuzhiyun PINGROUP(125, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1292*4882a593Smuzhiyun PINGROUP(126, NA, gsm_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1293*4882a593Smuzhiyun PINGROUP(127, NA, nav_tsync, nav_pps, NA, NA, NA, NA, NA, NA, NA,
1294*4882a593Smuzhiyun NA),
1295*4882a593Smuzhiyun PINGROUP(128, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1296*4882a593Smuzhiyun PINGROUP(129, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1297*4882a593Smuzhiyun PINGROUP(130, gps_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1298*4882a593Smuzhiyun PINGROUP(131, gsm_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1299*4882a593Smuzhiyun PINGROUP(132, gsm_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1300*4882a593Smuzhiyun PINGROUP(133, gsm_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1301*4882a593Smuzhiyun PINGROUP(134, mss_lte, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1302*4882a593Smuzhiyun PINGROUP(135, mss_lte, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1303*4882a593Smuzhiyun PINGROUP(136, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1304*4882a593Smuzhiyun PINGROUP(137, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1305*4882a593Smuzhiyun PINGROUP(138, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1306*4882a593Smuzhiyun PINGROUP(139, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1307*4882a593Smuzhiyun PINGROUP(140, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1308*4882a593Smuzhiyun PINGROUP(141, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1309*4882a593Smuzhiyun PINGROUP(142, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1310*4882a593Smuzhiyun PINGROUP(143, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1311*4882a593Smuzhiyun PINGROUP(144, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1312*4882a593Smuzhiyun PINGROUP(145, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1313*4882a593Smuzhiyun SDC_PINGROUP(sdc1_rclk, 0x2044, 15, 0),
1314*4882a593Smuzhiyun SDC_PINGROUP(sdc1_clk, 0x2044, 13, 6),
1315*4882a593Smuzhiyun SDC_PINGROUP(sdc1_cmd, 0x2044, 11, 3),
1316*4882a593Smuzhiyun SDC_PINGROUP(sdc1_data, 0x2044, 9, 0),
1317*4882a593Smuzhiyun SDC_PINGROUP(sdc2_clk, 0x2048, 14, 6),
1318*4882a593Smuzhiyun SDC_PINGROUP(sdc2_cmd, 0x2048, 11, 3),
1319*4882a593Smuzhiyun SDC_PINGROUP(sdc2_data, 0x2048, 9, 0),
1320*4882a593Smuzhiyun SDC_PINGROUP(sdc3_clk, 0x206c, 14, 6),
1321*4882a593Smuzhiyun SDC_PINGROUP(sdc3_cmd, 0x206c, 11, 3),
1322*4882a593Smuzhiyun SDC_PINGROUP(sdc3_data, 0x206c, 9, 0),
1323*4882a593Smuzhiyun };
1324*4882a593Smuzhiyun
1325*4882a593Smuzhiyun #define NUM_GPIO_PINGROUPS 146
1326*4882a593Smuzhiyun
1327*4882a593Smuzhiyun static const struct msm_pinctrl_soc_data msm8994_pinctrl = {
1328*4882a593Smuzhiyun .pins = msm8994_pins,
1329*4882a593Smuzhiyun .npins = ARRAY_SIZE(msm8994_pins),
1330*4882a593Smuzhiyun .functions = msm8994_functions,
1331*4882a593Smuzhiyun .nfunctions = ARRAY_SIZE(msm8994_functions),
1332*4882a593Smuzhiyun .groups = msm8994_groups,
1333*4882a593Smuzhiyun .ngroups = ARRAY_SIZE(msm8994_groups),
1334*4882a593Smuzhiyun .ngpios = NUM_GPIO_PINGROUPS,
1335*4882a593Smuzhiyun };
1336*4882a593Smuzhiyun
msm8994_pinctrl_probe(struct platform_device * pdev)1337*4882a593Smuzhiyun static int msm8994_pinctrl_probe(struct platform_device *pdev)
1338*4882a593Smuzhiyun {
1339*4882a593Smuzhiyun return msm_pinctrl_probe(pdev, &msm8994_pinctrl);
1340*4882a593Smuzhiyun }
1341*4882a593Smuzhiyun
1342*4882a593Smuzhiyun static const struct of_device_id msm8994_pinctrl_of_match[] = {
1343*4882a593Smuzhiyun { .compatible = "qcom,msm8992-pinctrl", },
1344*4882a593Smuzhiyun { .compatible = "qcom,msm8994-pinctrl", },
1345*4882a593Smuzhiyun { }
1346*4882a593Smuzhiyun };
1347*4882a593Smuzhiyun
1348*4882a593Smuzhiyun static struct platform_driver msm8994_pinctrl_driver = {
1349*4882a593Smuzhiyun .driver = {
1350*4882a593Smuzhiyun .name = "msm8994-pinctrl",
1351*4882a593Smuzhiyun .of_match_table = msm8994_pinctrl_of_match,
1352*4882a593Smuzhiyun },
1353*4882a593Smuzhiyun .probe = msm8994_pinctrl_probe,
1354*4882a593Smuzhiyun .remove = msm_pinctrl_remove,
1355*4882a593Smuzhiyun };
1356*4882a593Smuzhiyun
msm8994_pinctrl_init(void)1357*4882a593Smuzhiyun static int __init msm8994_pinctrl_init(void)
1358*4882a593Smuzhiyun {
1359*4882a593Smuzhiyun return platform_driver_register(&msm8994_pinctrl_driver);
1360*4882a593Smuzhiyun }
1361*4882a593Smuzhiyun arch_initcall(msm8994_pinctrl_init);
1362*4882a593Smuzhiyun
msm8994_pinctrl_exit(void)1363*4882a593Smuzhiyun static void __exit msm8994_pinctrl_exit(void)
1364*4882a593Smuzhiyun {
1365*4882a593Smuzhiyun platform_driver_unregister(&msm8994_pinctrl_driver);
1366*4882a593Smuzhiyun }
1367*4882a593Smuzhiyun module_exit(msm8994_pinctrl_exit);
1368*4882a593Smuzhiyun
1369*4882a593Smuzhiyun MODULE_DESCRIPTION("Qualcomm MSM8994 pinctrl driver");
1370*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
1371*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, msm8994_pinctrl_of_match);
1372