xref: /OK3568_Linux_fs/kernel/drivers/pinctrl/qcom/pinctrl-msm8916.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (c) 2015, The Linux Foundation. All rights reserved.
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun #include <linux/module.h>
7*4882a593Smuzhiyun #include <linux/of.h>
8*4882a593Smuzhiyun #include <linux/platform_device.h>
9*4882a593Smuzhiyun #include <linux/pinctrl/pinctrl.h>
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include "pinctrl-msm.h"
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun static const struct pinctrl_pin_desc msm8916_pins[] = {
14*4882a593Smuzhiyun 	PINCTRL_PIN(0, "GPIO_0"),
15*4882a593Smuzhiyun 	PINCTRL_PIN(1, "GPIO_1"),
16*4882a593Smuzhiyun 	PINCTRL_PIN(2, "GPIO_2"),
17*4882a593Smuzhiyun 	PINCTRL_PIN(3, "GPIO_3"),
18*4882a593Smuzhiyun 	PINCTRL_PIN(4, "GPIO_4"),
19*4882a593Smuzhiyun 	PINCTRL_PIN(5, "GPIO_5"),
20*4882a593Smuzhiyun 	PINCTRL_PIN(6, "GPIO_6"),
21*4882a593Smuzhiyun 	PINCTRL_PIN(7, "GPIO_7"),
22*4882a593Smuzhiyun 	PINCTRL_PIN(8, "GPIO_8"),
23*4882a593Smuzhiyun 	PINCTRL_PIN(9, "GPIO_9"),
24*4882a593Smuzhiyun 	PINCTRL_PIN(10, "GPIO_10"),
25*4882a593Smuzhiyun 	PINCTRL_PIN(11, "GPIO_11"),
26*4882a593Smuzhiyun 	PINCTRL_PIN(12, "GPIO_12"),
27*4882a593Smuzhiyun 	PINCTRL_PIN(13, "GPIO_13"),
28*4882a593Smuzhiyun 	PINCTRL_PIN(14, "GPIO_14"),
29*4882a593Smuzhiyun 	PINCTRL_PIN(15, "GPIO_15"),
30*4882a593Smuzhiyun 	PINCTRL_PIN(16, "GPIO_16"),
31*4882a593Smuzhiyun 	PINCTRL_PIN(17, "GPIO_17"),
32*4882a593Smuzhiyun 	PINCTRL_PIN(18, "GPIO_18"),
33*4882a593Smuzhiyun 	PINCTRL_PIN(19, "GPIO_19"),
34*4882a593Smuzhiyun 	PINCTRL_PIN(20, "GPIO_20"),
35*4882a593Smuzhiyun 	PINCTRL_PIN(21, "GPIO_21"),
36*4882a593Smuzhiyun 	PINCTRL_PIN(22, "GPIO_22"),
37*4882a593Smuzhiyun 	PINCTRL_PIN(23, "GPIO_23"),
38*4882a593Smuzhiyun 	PINCTRL_PIN(24, "GPIO_24"),
39*4882a593Smuzhiyun 	PINCTRL_PIN(25, "GPIO_25"),
40*4882a593Smuzhiyun 	PINCTRL_PIN(26, "GPIO_26"),
41*4882a593Smuzhiyun 	PINCTRL_PIN(27, "GPIO_27"),
42*4882a593Smuzhiyun 	PINCTRL_PIN(28, "GPIO_28"),
43*4882a593Smuzhiyun 	PINCTRL_PIN(29, "GPIO_29"),
44*4882a593Smuzhiyun 	PINCTRL_PIN(30, "GPIO_30"),
45*4882a593Smuzhiyun 	PINCTRL_PIN(31, "GPIO_31"),
46*4882a593Smuzhiyun 	PINCTRL_PIN(32, "GPIO_32"),
47*4882a593Smuzhiyun 	PINCTRL_PIN(33, "GPIO_33"),
48*4882a593Smuzhiyun 	PINCTRL_PIN(34, "GPIO_34"),
49*4882a593Smuzhiyun 	PINCTRL_PIN(35, "GPIO_35"),
50*4882a593Smuzhiyun 	PINCTRL_PIN(36, "GPIO_36"),
51*4882a593Smuzhiyun 	PINCTRL_PIN(37, "GPIO_37"),
52*4882a593Smuzhiyun 	PINCTRL_PIN(38, "GPIO_38"),
53*4882a593Smuzhiyun 	PINCTRL_PIN(39, "GPIO_39"),
54*4882a593Smuzhiyun 	PINCTRL_PIN(40, "GPIO_40"),
55*4882a593Smuzhiyun 	PINCTRL_PIN(41, "GPIO_41"),
56*4882a593Smuzhiyun 	PINCTRL_PIN(42, "GPIO_42"),
57*4882a593Smuzhiyun 	PINCTRL_PIN(43, "GPIO_43"),
58*4882a593Smuzhiyun 	PINCTRL_PIN(44, "GPIO_44"),
59*4882a593Smuzhiyun 	PINCTRL_PIN(45, "GPIO_45"),
60*4882a593Smuzhiyun 	PINCTRL_PIN(46, "GPIO_46"),
61*4882a593Smuzhiyun 	PINCTRL_PIN(47, "GPIO_47"),
62*4882a593Smuzhiyun 	PINCTRL_PIN(48, "GPIO_48"),
63*4882a593Smuzhiyun 	PINCTRL_PIN(49, "GPIO_49"),
64*4882a593Smuzhiyun 	PINCTRL_PIN(50, "GPIO_50"),
65*4882a593Smuzhiyun 	PINCTRL_PIN(51, "GPIO_51"),
66*4882a593Smuzhiyun 	PINCTRL_PIN(52, "GPIO_52"),
67*4882a593Smuzhiyun 	PINCTRL_PIN(53, "GPIO_53"),
68*4882a593Smuzhiyun 	PINCTRL_PIN(54, "GPIO_54"),
69*4882a593Smuzhiyun 	PINCTRL_PIN(55, "GPIO_55"),
70*4882a593Smuzhiyun 	PINCTRL_PIN(56, "GPIO_56"),
71*4882a593Smuzhiyun 	PINCTRL_PIN(57, "GPIO_57"),
72*4882a593Smuzhiyun 	PINCTRL_PIN(58, "GPIO_58"),
73*4882a593Smuzhiyun 	PINCTRL_PIN(59, "GPIO_59"),
74*4882a593Smuzhiyun 	PINCTRL_PIN(60, "GPIO_60"),
75*4882a593Smuzhiyun 	PINCTRL_PIN(61, "GPIO_61"),
76*4882a593Smuzhiyun 	PINCTRL_PIN(62, "GPIO_62"),
77*4882a593Smuzhiyun 	PINCTRL_PIN(63, "GPIO_63"),
78*4882a593Smuzhiyun 	PINCTRL_PIN(64, "GPIO_64"),
79*4882a593Smuzhiyun 	PINCTRL_PIN(65, "GPIO_65"),
80*4882a593Smuzhiyun 	PINCTRL_PIN(66, "GPIO_66"),
81*4882a593Smuzhiyun 	PINCTRL_PIN(67, "GPIO_67"),
82*4882a593Smuzhiyun 	PINCTRL_PIN(68, "GPIO_68"),
83*4882a593Smuzhiyun 	PINCTRL_PIN(69, "GPIO_69"),
84*4882a593Smuzhiyun 	PINCTRL_PIN(70, "GPIO_70"),
85*4882a593Smuzhiyun 	PINCTRL_PIN(71, "GPIO_71"),
86*4882a593Smuzhiyun 	PINCTRL_PIN(72, "GPIO_72"),
87*4882a593Smuzhiyun 	PINCTRL_PIN(73, "GPIO_73"),
88*4882a593Smuzhiyun 	PINCTRL_PIN(74, "GPIO_74"),
89*4882a593Smuzhiyun 	PINCTRL_PIN(75, "GPIO_75"),
90*4882a593Smuzhiyun 	PINCTRL_PIN(76, "GPIO_76"),
91*4882a593Smuzhiyun 	PINCTRL_PIN(77, "GPIO_77"),
92*4882a593Smuzhiyun 	PINCTRL_PIN(78, "GPIO_78"),
93*4882a593Smuzhiyun 	PINCTRL_PIN(79, "GPIO_79"),
94*4882a593Smuzhiyun 	PINCTRL_PIN(80, "GPIO_80"),
95*4882a593Smuzhiyun 	PINCTRL_PIN(81, "GPIO_81"),
96*4882a593Smuzhiyun 	PINCTRL_PIN(82, "GPIO_82"),
97*4882a593Smuzhiyun 	PINCTRL_PIN(83, "GPIO_83"),
98*4882a593Smuzhiyun 	PINCTRL_PIN(84, "GPIO_84"),
99*4882a593Smuzhiyun 	PINCTRL_PIN(85, "GPIO_85"),
100*4882a593Smuzhiyun 	PINCTRL_PIN(86, "GPIO_86"),
101*4882a593Smuzhiyun 	PINCTRL_PIN(87, "GPIO_87"),
102*4882a593Smuzhiyun 	PINCTRL_PIN(88, "GPIO_88"),
103*4882a593Smuzhiyun 	PINCTRL_PIN(89, "GPIO_89"),
104*4882a593Smuzhiyun 	PINCTRL_PIN(90, "GPIO_90"),
105*4882a593Smuzhiyun 	PINCTRL_PIN(91, "GPIO_91"),
106*4882a593Smuzhiyun 	PINCTRL_PIN(92, "GPIO_92"),
107*4882a593Smuzhiyun 	PINCTRL_PIN(93, "GPIO_93"),
108*4882a593Smuzhiyun 	PINCTRL_PIN(94, "GPIO_94"),
109*4882a593Smuzhiyun 	PINCTRL_PIN(95, "GPIO_95"),
110*4882a593Smuzhiyun 	PINCTRL_PIN(96, "GPIO_96"),
111*4882a593Smuzhiyun 	PINCTRL_PIN(97, "GPIO_97"),
112*4882a593Smuzhiyun 	PINCTRL_PIN(98, "GPIO_98"),
113*4882a593Smuzhiyun 	PINCTRL_PIN(99, "GPIO_99"),
114*4882a593Smuzhiyun 	PINCTRL_PIN(100, "GPIO_100"),
115*4882a593Smuzhiyun 	PINCTRL_PIN(101, "GPIO_101"),
116*4882a593Smuzhiyun 	PINCTRL_PIN(102, "GPIO_102"),
117*4882a593Smuzhiyun 	PINCTRL_PIN(103, "GPIO_103"),
118*4882a593Smuzhiyun 	PINCTRL_PIN(104, "GPIO_104"),
119*4882a593Smuzhiyun 	PINCTRL_PIN(105, "GPIO_105"),
120*4882a593Smuzhiyun 	PINCTRL_PIN(106, "GPIO_106"),
121*4882a593Smuzhiyun 	PINCTRL_PIN(107, "GPIO_107"),
122*4882a593Smuzhiyun 	PINCTRL_PIN(108, "GPIO_108"),
123*4882a593Smuzhiyun 	PINCTRL_PIN(109, "GPIO_109"),
124*4882a593Smuzhiyun 	PINCTRL_PIN(110, "GPIO_110"),
125*4882a593Smuzhiyun 	PINCTRL_PIN(111, "GPIO_111"),
126*4882a593Smuzhiyun 	PINCTRL_PIN(112, "GPIO_112"),
127*4882a593Smuzhiyun 	PINCTRL_PIN(113, "GPIO_113"),
128*4882a593Smuzhiyun 	PINCTRL_PIN(114, "GPIO_114"),
129*4882a593Smuzhiyun 	PINCTRL_PIN(115, "GPIO_115"),
130*4882a593Smuzhiyun 	PINCTRL_PIN(116, "GPIO_116"),
131*4882a593Smuzhiyun 	PINCTRL_PIN(117, "GPIO_117"),
132*4882a593Smuzhiyun 	PINCTRL_PIN(118, "GPIO_118"),
133*4882a593Smuzhiyun 	PINCTRL_PIN(119, "GPIO_119"),
134*4882a593Smuzhiyun 	PINCTRL_PIN(120, "GPIO_120"),
135*4882a593Smuzhiyun 	PINCTRL_PIN(121, "GPIO_121"),
136*4882a593Smuzhiyun 	PINCTRL_PIN(122, "SDC1_CLK"),
137*4882a593Smuzhiyun 	PINCTRL_PIN(123, "SDC1_CMD"),
138*4882a593Smuzhiyun 	PINCTRL_PIN(124, "SDC1_DATA"),
139*4882a593Smuzhiyun 	PINCTRL_PIN(125, "SDC2_CLK"),
140*4882a593Smuzhiyun 	PINCTRL_PIN(126, "SDC2_CMD"),
141*4882a593Smuzhiyun 	PINCTRL_PIN(127, "SDC2_DATA"),
142*4882a593Smuzhiyun 	PINCTRL_PIN(128, "QDSD_CLK"),
143*4882a593Smuzhiyun 	PINCTRL_PIN(129, "QDSD_CMD"),
144*4882a593Smuzhiyun 	PINCTRL_PIN(130, "QDSD_DATA0"),
145*4882a593Smuzhiyun 	PINCTRL_PIN(131, "QDSD_DATA1"),
146*4882a593Smuzhiyun 	PINCTRL_PIN(132, "QDSD_DATA2"),
147*4882a593Smuzhiyun 	PINCTRL_PIN(133, "QDSD_DATA3"),
148*4882a593Smuzhiyun };
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun #define DECLARE_MSM_GPIO_PINS(pin)	\
151*4882a593Smuzhiyun 	static const unsigned int gpio##pin##_pins[] = { pin }
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(0);
154*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(1);
155*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(2);
156*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(3);
157*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(4);
158*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(5);
159*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(6);
160*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(7);
161*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(8);
162*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(9);
163*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(10);
164*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(11);
165*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(12);
166*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(13);
167*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(14);
168*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(15);
169*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(16);
170*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(17);
171*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(18);
172*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(19);
173*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(20);
174*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(21);
175*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(22);
176*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(23);
177*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(24);
178*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(25);
179*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(26);
180*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(27);
181*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(28);
182*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(29);
183*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(30);
184*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(31);
185*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(32);
186*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(33);
187*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(34);
188*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(35);
189*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(36);
190*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(37);
191*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(38);
192*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(39);
193*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(40);
194*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(41);
195*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(42);
196*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(43);
197*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(44);
198*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(45);
199*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(46);
200*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(47);
201*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(48);
202*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(49);
203*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(50);
204*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(51);
205*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(52);
206*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(53);
207*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(54);
208*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(55);
209*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(56);
210*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(57);
211*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(58);
212*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(59);
213*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(60);
214*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(61);
215*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(62);
216*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(63);
217*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(64);
218*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(65);
219*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(66);
220*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(67);
221*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(68);
222*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(69);
223*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(70);
224*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(71);
225*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(72);
226*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(73);
227*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(74);
228*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(75);
229*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(76);
230*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(77);
231*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(78);
232*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(79);
233*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(80);
234*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(81);
235*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(82);
236*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(83);
237*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(84);
238*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(85);
239*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(86);
240*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(87);
241*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(88);
242*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(89);
243*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(90);
244*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(91);
245*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(92);
246*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(93);
247*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(94);
248*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(95);
249*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(96);
250*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(97);
251*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(98);
252*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(99);
253*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(100);
254*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(101);
255*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(102);
256*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(103);
257*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(104);
258*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(105);
259*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(106);
260*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(107);
261*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(108);
262*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(109);
263*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(110);
264*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(111);
265*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(112);
266*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(113);
267*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(114);
268*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(115);
269*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(116);
270*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(117);
271*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(118);
272*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(119);
273*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(120);
274*4882a593Smuzhiyun DECLARE_MSM_GPIO_PINS(121);
275*4882a593Smuzhiyun 
276*4882a593Smuzhiyun static const unsigned int sdc1_clk_pins[] = { 122 };
277*4882a593Smuzhiyun static const unsigned int sdc1_cmd_pins[] = { 123 };
278*4882a593Smuzhiyun static const unsigned int sdc1_data_pins[] = { 124 };
279*4882a593Smuzhiyun static const unsigned int sdc2_clk_pins[] = { 125 };
280*4882a593Smuzhiyun static const unsigned int sdc2_cmd_pins[] = { 126 };
281*4882a593Smuzhiyun static const unsigned int sdc2_data_pins[] = { 127 };
282*4882a593Smuzhiyun static const unsigned int qdsd_clk_pins[] = { 128 };
283*4882a593Smuzhiyun static const unsigned int qdsd_cmd_pins[] = { 129 };
284*4882a593Smuzhiyun static const unsigned int qdsd_data0_pins[] = { 130 };
285*4882a593Smuzhiyun static const unsigned int qdsd_data1_pins[] = { 131 };
286*4882a593Smuzhiyun static const unsigned int qdsd_data2_pins[] = { 132 };
287*4882a593Smuzhiyun static const unsigned int qdsd_data3_pins[] = { 133 };
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun #define FUNCTION(fname)			                \
290*4882a593Smuzhiyun 	[MSM_MUX_##fname] = {		                \
291*4882a593Smuzhiyun 		.name = #fname,				\
292*4882a593Smuzhiyun 		.groups = fname##_groups,               \
293*4882a593Smuzhiyun 		.ngroups = ARRAY_SIZE(fname##_groups),	\
294*4882a593Smuzhiyun 	}
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9)	\
297*4882a593Smuzhiyun 	{							\
298*4882a593Smuzhiyun 		.name = "gpio" #id,				\
299*4882a593Smuzhiyun 		.pins = gpio##id##_pins,			\
300*4882a593Smuzhiyun 		.npins = ARRAY_SIZE(gpio##id##_pins),		\
301*4882a593Smuzhiyun 		.funcs = (int[]){				\
302*4882a593Smuzhiyun 			MSM_MUX_gpio,				\
303*4882a593Smuzhiyun 			MSM_MUX_##f1,				\
304*4882a593Smuzhiyun 			MSM_MUX_##f2,				\
305*4882a593Smuzhiyun 			MSM_MUX_##f3,				\
306*4882a593Smuzhiyun 			MSM_MUX_##f4,				\
307*4882a593Smuzhiyun 			MSM_MUX_##f5,				\
308*4882a593Smuzhiyun 			MSM_MUX_##f6,				\
309*4882a593Smuzhiyun 			MSM_MUX_##f7,				\
310*4882a593Smuzhiyun 			MSM_MUX_##f8,				\
311*4882a593Smuzhiyun 			MSM_MUX_##f9				\
312*4882a593Smuzhiyun 		},				        	\
313*4882a593Smuzhiyun 		.nfuncs = 10,					\
314*4882a593Smuzhiyun 		.ctl_reg = 0x1000 * id,	        		\
315*4882a593Smuzhiyun 		.io_reg = 0x4 + 0x1000 * id,			\
316*4882a593Smuzhiyun 		.intr_cfg_reg = 0x8 + 0x1000 * id,		\
317*4882a593Smuzhiyun 		.intr_status_reg = 0xc + 0x1000 * id,		\
318*4882a593Smuzhiyun 		.intr_target_reg = 0x8 + 0x1000 * id,		\
319*4882a593Smuzhiyun 		.mux_bit = 2,					\
320*4882a593Smuzhiyun 		.pull_bit = 0,					\
321*4882a593Smuzhiyun 		.drv_bit = 6,					\
322*4882a593Smuzhiyun 		.oe_bit = 9,					\
323*4882a593Smuzhiyun 		.in_bit = 0,					\
324*4882a593Smuzhiyun 		.out_bit = 1,					\
325*4882a593Smuzhiyun 		.intr_enable_bit = 0,				\
326*4882a593Smuzhiyun 		.intr_status_bit = 0,				\
327*4882a593Smuzhiyun 		.intr_target_bit = 5,				\
328*4882a593Smuzhiyun 		.intr_target_kpss_val = 4,			\
329*4882a593Smuzhiyun 		.intr_raw_status_bit = 4,			\
330*4882a593Smuzhiyun 		.intr_polarity_bit = 1,				\
331*4882a593Smuzhiyun 		.intr_detection_bit = 2,			\
332*4882a593Smuzhiyun 		.intr_detection_width = 2,			\
333*4882a593Smuzhiyun 	}
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun #define SDC_PINGROUP(pg_name, ctl, pull, drv)	\
336*4882a593Smuzhiyun 	{					        \
337*4882a593Smuzhiyun 		.name = #pg_name,			\
338*4882a593Smuzhiyun 		.pins = pg_name##_pins,			\
339*4882a593Smuzhiyun 		.npins = ARRAY_SIZE(pg_name##_pins),	\
340*4882a593Smuzhiyun 		.ctl_reg = ctl,				\
341*4882a593Smuzhiyun 		.io_reg = 0,				\
342*4882a593Smuzhiyun 		.intr_cfg_reg = 0,			\
343*4882a593Smuzhiyun 		.intr_status_reg = 0,			\
344*4882a593Smuzhiyun 		.intr_target_reg = 0,			\
345*4882a593Smuzhiyun 		.mux_bit = -1,				\
346*4882a593Smuzhiyun 		.pull_bit = pull,			\
347*4882a593Smuzhiyun 		.drv_bit = drv,				\
348*4882a593Smuzhiyun 		.oe_bit = -1,				\
349*4882a593Smuzhiyun 		.in_bit = -1,				\
350*4882a593Smuzhiyun 		.out_bit = -1,				\
351*4882a593Smuzhiyun 		.intr_enable_bit = -1,			\
352*4882a593Smuzhiyun 		.intr_status_bit = -1,			\
353*4882a593Smuzhiyun 		.intr_target_bit = -1,			\
354*4882a593Smuzhiyun 		.intr_target_kpss_val = -1,		\
355*4882a593Smuzhiyun 		.intr_raw_status_bit = -1,		\
356*4882a593Smuzhiyun 		.intr_polarity_bit = -1,		\
357*4882a593Smuzhiyun 		.intr_detection_bit = -1,		\
358*4882a593Smuzhiyun 		.intr_detection_width = -1,		\
359*4882a593Smuzhiyun 	}
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun enum msm8916_functions {
362*4882a593Smuzhiyun 	MSM_MUX_adsp_ext,
363*4882a593Smuzhiyun 	MSM_MUX_alsp_int,
364*4882a593Smuzhiyun 	MSM_MUX_atest_bbrx0,
365*4882a593Smuzhiyun 	MSM_MUX_atest_bbrx1,
366*4882a593Smuzhiyun 	MSM_MUX_atest_char,
367*4882a593Smuzhiyun 	MSM_MUX_atest_char0,
368*4882a593Smuzhiyun 	MSM_MUX_atest_char1,
369*4882a593Smuzhiyun 	MSM_MUX_atest_char2,
370*4882a593Smuzhiyun 	MSM_MUX_atest_char3,
371*4882a593Smuzhiyun 	MSM_MUX_atest_combodac,
372*4882a593Smuzhiyun 	MSM_MUX_atest_gpsadc0,
373*4882a593Smuzhiyun 	MSM_MUX_atest_gpsadc1,
374*4882a593Smuzhiyun 	MSM_MUX_atest_tsens,
375*4882a593Smuzhiyun 	MSM_MUX_atest_wlan0,
376*4882a593Smuzhiyun 	MSM_MUX_atest_wlan1,
377*4882a593Smuzhiyun 	MSM_MUX_backlight_en,
378*4882a593Smuzhiyun 	MSM_MUX_bimc_dte0,
379*4882a593Smuzhiyun 	MSM_MUX_bimc_dte1,
380*4882a593Smuzhiyun 	MSM_MUX_blsp_i2c1,
381*4882a593Smuzhiyun 	MSM_MUX_blsp_i2c2,
382*4882a593Smuzhiyun 	MSM_MUX_blsp_i2c3,
383*4882a593Smuzhiyun 	MSM_MUX_blsp_i2c4,
384*4882a593Smuzhiyun 	MSM_MUX_blsp_i2c5,
385*4882a593Smuzhiyun 	MSM_MUX_blsp_i2c6,
386*4882a593Smuzhiyun 	MSM_MUX_blsp_spi1,
387*4882a593Smuzhiyun 	MSM_MUX_blsp_spi1_cs1,
388*4882a593Smuzhiyun 	MSM_MUX_blsp_spi1_cs2,
389*4882a593Smuzhiyun 	MSM_MUX_blsp_spi1_cs3,
390*4882a593Smuzhiyun 	MSM_MUX_blsp_spi2,
391*4882a593Smuzhiyun 	MSM_MUX_blsp_spi2_cs1,
392*4882a593Smuzhiyun 	MSM_MUX_blsp_spi2_cs2,
393*4882a593Smuzhiyun 	MSM_MUX_blsp_spi2_cs3,
394*4882a593Smuzhiyun 	MSM_MUX_blsp_spi3,
395*4882a593Smuzhiyun 	MSM_MUX_blsp_spi3_cs1,
396*4882a593Smuzhiyun 	MSM_MUX_blsp_spi3_cs2,
397*4882a593Smuzhiyun 	MSM_MUX_blsp_spi3_cs3,
398*4882a593Smuzhiyun 	MSM_MUX_blsp_spi4,
399*4882a593Smuzhiyun 	MSM_MUX_blsp_spi5,
400*4882a593Smuzhiyun 	MSM_MUX_blsp_spi6,
401*4882a593Smuzhiyun 	MSM_MUX_blsp_uart1,
402*4882a593Smuzhiyun 	MSM_MUX_blsp_uart2,
403*4882a593Smuzhiyun 	MSM_MUX_blsp_uim1,
404*4882a593Smuzhiyun 	MSM_MUX_blsp_uim2,
405*4882a593Smuzhiyun 	MSM_MUX_cam1_rst,
406*4882a593Smuzhiyun 	MSM_MUX_cam1_standby,
407*4882a593Smuzhiyun 	MSM_MUX_cam_mclk0,
408*4882a593Smuzhiyun 	MSM_MUX_cam_mclk1,
409*4882a593Smuzhiyun 	MSM_MUX_cci_async,
410*4882a593Smuzhiyun 	MSM_MUX_cci_i2c,
411*4882a593Smuzhiyun 	MSM_MUX_cci_timer0,
412*4882a593Smuzhiyun 	MSM_MUX_cci_timer1,
413*4882a593Smuzhiyun 	MSM_MUX_cci_timer2,
414*4882a593Smuzhiyun 	MSM_MUX_cdc_pdm0,
415*4882a593Smuzhiyun 	MSM_MUX_codec_mad,
416*4882a593Smuzhiyun 	MSM_MUX_dbg_out,
417*4882a593Smuzhiyun 	MSM_MUX_display_5v,
418*4882a593Smuzhiyun 	MSM_MUX_dmic0_clk,
419*4882a593Smuzhiyun 	MSM_MUX_dmic0_data,
420*4882a593Smuzhiyun 	MSM_MUX_dsi_rst,
421*4882a593Smuzhiyun 	MSM_MUX_ebi0_wrcdc,
422*4882a593Smuzhiyun 	MSM_MUX_euro_us,
423*4882a593Smuzhiyun 	MSM_MUX_ext_lpass,
424*4882a593Smuzhiyun 	MSM_MUX_flash_strobe,
425*4882a593Smuzhiyun 	MSM_MUX_gcc_gp1_clk_a,
426*4882a593Smuzhiyun 	MSM_MUX_gcc_gp1_clk_b,
427*4882a593Smuzhiyun 	MSM_MUX_gcc_gp2_clk_a,
428*4882a593Smuzhiyun 	MSM_MUX_gcc_gp2_clk_b,
429*4882a593Smuzhiyun 	MSM_MUX_gcc_gp3_clk_a,
430*4882a593Smuzhiyun 	MSM_MUX_gcc_gp3_clk_b,
431*4882a593Smuzhiyun 	MSM_MUX_gpio,
432*4882a593Smuzhiyun 	MSM_MUX_gsm0_tx0,
433*4882a593Smuzhiyun 	MSM_MUX_gsm0_tx1,
434*4882a593Smuzhiyun 	MSM_MUX_gsm1_tx0,
435*4882a593Smuzhiyun 	MSM_MUX_gsm1_tx1,
436*4882a593Smuzhiyun 	MSM_MUX_gyro_accl,
437*4882a593Smuzhiyun 	MSM_MUX_kpsns0,
438*4882a593Smuzhiyun 	MSM_MUX_kpsns1,
439*4882a593Smuzhiyun 	MSM_MUX_kpsns2,
440*4882a593Smuzhiyun 	MSM_MUX_ldo_en,
441*4882a593Smuzhiyun 	MSM_MUX_ldo_update,
442*4882a593Smuzhiyun 	MSM_MUX_mag_int,
443*4882a593Smuzhiyun 	MSM_MUX_mdp_vsync,
444*4882a593Smuzhiyun 	MSM_MUX_modem_tsync,
445*4882a593Smuzhiyun 	MSM_MUX_m_voc,
446*4882a593Smuzhiyun 	MSM_MUX_nav_pps,
447*4882a593Smuzhiyun 	MSM_MUX_nav_tsync,
448*4882a593Smuzhiyun 	MSM_MUX_pa_indicator,
449*4882a593Smuzhiyun 	MSM_MUX_pbs0,
450*4882a593Smuzhiyun 	MSM_MUX_pbs1,
451*4882a593Smuzhiyun 	MSM_MUX_pbs2,
452*4882a593Smuzhiyun 	MSM_MUX_pri_mi2s,
453*4882a593Smuzhiyun 	MSM_MUX_pri_mi2s_ws,
454*4882a593Smuzhiyun 	MSM_MUX_prng_rosc,
455*4882a593Smuzhiyun 	MSM_MUX_pwr_crypto_enabled_a,
456*4882a593Smuzhiyun 	MSM_MUX_pwr_crypto_enabled_b,
457*4882a593Smuzhiyun 	MSM_MUX_pwr_modem_enabled_a,
458*4882a593Smuzhiyun 	MSM_MUX_pwr_modem_enabled_b,
459*4882a593Smuzhiyun 	MSM_MUX_pwr_nav_enabled_a,
460*4882a593Smuzhiyun 	MSM_MUX_pwr_nav_enabled_b,
461*4882a593Smuzhiyun 	MSM_MUX_qdss_ctitrig_in_a0,
462*4882a593Smuzhiyun 	MSM_MUX_qdss_ctitrig_in_a1,
463*4882a593Smuzhiyun 	MSM_MUX_qdss_ctitrig_in_b0,
464*4882a593Smuzhiyun 	MSM_MUX_qdss_ctitrig_in_b1,
465*4882a593Smuzhiyun 	MSM_MUX_qdss_ctitrig_out_a0,
466*4882a593Smuzhiyun 	MSM_MUX_qdss_ctitrig_out_a1,
467*4882a593Smuzhiyun 	MSM_MUX_qdss_ctitrig_out_b0,
468*4882a593Smuzhiyun 	MSM_MUX_qdss_ctitrig_out_b1,
469*4882a593Smuzhiyun 	MSM_MUX_qdss_traceclk_a,
470*4882a593Smuzhiyun 	MSM_MUX_qdss_traceclk_b,
471*4882a593Smuzhiyun 	MSM_MUX_qdss_tracectl_a,
472*4882a593Smuzhiyun 	MSM_MUX_qdss_tracectl_b,
473*4882a593Smuzhiyun 	MSM_MUX_qdss_tracedata_a,
474*4882a593Smuzhiyun 	MSM_MUX_qdss_tracedata_b,
475*4882a593Smuzhiyun 	MSM_MUX_reset_n,
476*4882a593Smuzhiyun 	MSM_MUX_sd_card,
477*4882a593Smuzhiyun 	MSM_MUX_sd_write,
478*4882a593Smuzhiyun 	MSM_MUX_sec_mi2s,
479*4882a593Smuzhiyun 	MSM_MUX_smb_int,
480*4882a593Smuzhiyun 	MSM_MUX_ssbi_wtr0,
481*4882a593Smuzhiyun 	MSM_MUX_ssbi_wtr1,
482*4882a593Smuzhiyun 	MSM_MUX_uim1,
483*4882a593Smuzhiyun 	MSM_MUX_uim2,
484*4882a593Smuzhiyun 	MSM_MUX_uim3,
485*4882a593Smuzhiyun 	MSM_MUX_uim_batt,
486*4882a593Smuzhiyun 	MSM_MUX_wcss_bt,
487*4882a593Smuzhiyun 	MSM_MUX_wcss_fm,
488*4882a593Smuzhiyun 	MSM_MUX_wcss_wlan,
489*4882a593Smuzhiyun 	MSM_MUX_webcam1_rst,
490*4882a593Smuzhiyun 	MSM_MUX_NA,
491*4882a593Smuzhiyun };
492*4882a593Smuzhiyun 
493*4882a593Smuzhiyun static const char * const gpio_groups[] = {
494*4882a593Smuzhiyun 	"gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
495*4882a593Smuzhiyun 	"gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
496*4882a593Smuzhiyun 	"gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
497*4882a593Smuzhiyun 	"gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
498*4882a593Smuzhiyun 	"gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
499*4882a593Smuzhiyun 	"gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
500*4882a593Smuzhiyun 	"gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
501*4882a593Smuzhiyun 	"gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
502*4882a593Smuzhiyun 	"gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
503*4882a593Smuzhiyun 	"gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
504*4882a593Smuzhiyun 	"gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
505*4882a593Smuzhiyun 	"gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
506*4882a593Smuzhiyun 	"gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
507*4882a593Smuzhiyun 	"gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
508*4882a593Smuzhiyun 	"gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104",
509*4882a593Smuzhiyun 	"gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110",
510*4882a593Smuzhiyun 	"gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116",
511*4882a593Smuzhiyun 	"gpio117", "gpio118", "gpio119", "gpio120", "gpio121"
512*4882a593Smuzhiyun };
513*4882a593Smuzhiyun static const char * const adsp_ext_groups[] = { "gpio38" };
514*4882a593Smuzhiyun static const char * const alsp_int_groups[] = { "gpio113" };
515*4882a593Smuzhiyun static const char * const atest_bbrx0_groups[] = { "gpio17" };
516*4882a593Smuzhiyun static const char * const atest_bbrx1_groups[] = { "gpio16" };
517*4882a593Smuzhiyun static const char * const atest_char_groups[] = { "gpio62" };
518*4882a593Smuzhiyun static const char * const atest_char0_groups[] = { "gpio60" };
519*4882a593Smuzhiyun static const char * const atest_char1_groups[] = { "gpio59" };
520*4882a593Smuzhiyun static const char * const atest_char2_groups[] = { "gpio58" };
521*4882a593Smuzhiyun static const char * const atest_char3_groups[] = { "gpio57" };
522*4882a593Smuzhiyun static const char * const atest_combodac_groups[] = {
523*4882a593Smuzhiyun 	"gpio4", "gpio12", "gpio13", "gpio20", "gpio21", "gpio28", "gpio29",
524*4882a593Smuzhiyun 	"gpio30", "gpio39", "gpio40", "gpio41", "gpio42", "gpio43", "gpio44",
525*4882a593Smuzhiyun 	"gpio45", "gpio46", "gpio47", "gpio48", "gpio69", "gpio107"
526*4882a593Smuzhiyun };
527*4882a593Smuzhiyun static const char * const atest_gpsadc0_groups[] = { "gpio7" };
528*4882a593Smuzhiyun static const char * const atest_gpsadc1_groups[] = { "gpio18" };
529*4882a593Smuzhiyun static const char * const atest_tsens_groups[] = { "gpio112" };
530*4882a593Smuzhiyun static const char * const atest_wlan0_groups[] = { "gpio22" };
531*4882a593Smuzhiyun static const char * const atest_wlan1_groups[] = { "gpio23" };
532*4882a593Smuzhiyun static const char * const backlight_en_groups[] = { "gpio98" };
533*4882a593Smuzhiyun static const char * const bimc_dte0_groups[] = { "gpio63", "gpio65" };
534*4882a593Smuzhiyun static const char * const bimc_dte1_groups[] = { "gpio64", "gpio66" };
535*4882a593Smuzhiyun static const char * const blsp_i2c1_groups[] = { "gpio2", "gpio3" };
536*4882a593Smuzhiyun static const char * const blsp_i2c2_groups[] = { "gpio6", "gpio7" };
537*4882a593Smuzhiyun static const char * const blsp_i2c3_groups[] = { "gpio10", "gpio11" };
538*4882a593Smuzhiyun static const char * const blsp_i2c4_groups[] = { "gpio14", "gpio15" };
539*4882a593Smuzhiyun static const char * const blsp_i2c5_groups[] = { "gpio18", "gpio19" };
540*4882a593Smuzhiyun static const char * const blsp_i2c6_groups[] = { "gpio22", "gpio23" };
541*4882a593Smuzhiyun static const char * const blsp_spi1_groups[] = {
542*4882a593Smuzhiyun 	"gpio0", "gpio1", "gpio2", "gpio3"
543*4882a593Smuzhiyun };
544*4882a593Smuzhiyun static const char * const blsp_spi1_cs1_groups[] = { "gpio110" };
545*4882a593Smuzhiyun static const char * const blsp_spi1_cs2_groups[] = { "gpio16" };
546*4882a593Smuzhiyun static const char * const blsp_spi1_cs3_groups[] = { "gpio4" };
547*4882a593Smuzhiyun static const char * const blsp_spi2_groups[] = {
548*4882a593Smuzhiyun 	"gpio4", "gpio5", "gpio6", "gpio7"
549*4882a593Smuzhiyun };
550*4882a593Smuzhiyun static const char * const blsp_spi2_cs1_groups[] = { "gpio121" };
551*4882a593Smuzhiyun static const char * const blsp_spi2_cs2_groups[] = { "gpio17" };
552*4882a593Smuzhiyun static const char * const blsp_spi2_cs3_groups[] = { "gpio5" };
553*4882a593Smuzhiyun static const char * const blsp_spi3_groups[] = {
554*4882a593Smuzhiyun 	"gpio8", "gpio9", "gpio10", "gpio11"
555*4882a593Smuzhiyun };
556*4882a593Smuzhiyun static const char * const blsp_spi3_cs1_groups[] = { "gpio120" };
557*4882a593Smuzhiyun static const char * const blsp_spi3_cs2_groups[] = { "gpio37" };
558*4882a593Smuzhiyun static const char * const blsp_spi3_cs3_groups[] = { "gpio69" };
559*4882a593Smuzhiyun static const char * const blsp_spi4_groups[] = {
560*4882a593Smuzhiyun 	"gpio12", "gpio13", "gpio14", "gpio15"
561*4882a593Smuzhiyun };
562*4882a593Smuzhiyun static const char * const blsp_spi5_groups[] = {
563*4882a593Smuzhiyun 	"gpio16", "gpio17", "gpio18", "gpio19"
564*4882a593Smuzhiyun };
565*4882a593Smuzhiyun static const char * const blsp_spi6_groups[] = {
566*4882a593Smuzhiyun 	"gpio20", "gpio21", "gpio22", "gpio23"
567*4882a593Smuzhiyun };
568*4882a593Smuzhiyun static const char * const blsp_uart1_groups[] = {
569*4882a593Smuzhiyun 	"gpio0", "gpio1", "gpio2", "gpio3"
570*4882a593Smuzhiyun };
571*4882a593Smuzhiyun static const char * const blsp_uart2_groups[] = {
572*4882a593Smuzhiyun 	"gpio4", "gpio5", "gpio6", "gpio7"
573*4882a593Smuzhiyun };
574*4882a593Smuzhiyun static const char * const blsp_uim1_groups[] = { "gpio0", "gpio1" };
575*4882a593Smuzhiyun static const char * const blsp_uim2_groups[] = { "gpio4", "gpio5" };
576*4882a593Smuzhiyun static const char * const cam1_rst_groups[] = { "gpio35" };
577*4882a593Smuzhiyun static const char * const cam1_standby_groups[] = { "gpio34" };
578*4882a593Smuzhiyun static const char * const cam_mclk0_groups[] = { "gpio26" };
579*4882a593Smuzhiyun static const char * const cam_mclk1_groups[] = { "gpio27" };
580*4882a593Smuzhiyun static const char * const cci_async_groups[] = { "gpio33" };
581*4882a593Smuzhiyun static const char * const cci_i2c_groups[] = { "gpio29", "gpio30" };
582*4882a593Smuzhiyun static const char * const cci_timer0_groups[] = { "gpio31" };
583*4882a593Smuzhiyun static const char * const cci_timer1_groups[] = { "gpio32" };
584*4882a593Smuzhiyun static const char * const cci_timer2_groups[] = { "gpio38" };
585*4882a593Smuzhiyun static const char * const cdc_pdm0_groups[] = {
586*4882a593Smuzhiyun 	"gpio63", "gpio64", "gpio65", "gpio66", "gpio67", "gpio68"
587*4882a593Smuzhiyun };
588*4882a593Smuzhiyun static const char * const codec_mad_groups[] = { "gpio16" };
589*4882a593Smuzhiyun static const char * const dbg_out_groups[] = { "gpio47" };
590*4882a593Smuzhiyun static const char * const display_5v_groups[] = { "gpio97" };
591*4882a593Smuzhiyun static const char * const dmic0_clk_groups[] = { "gpio0" };
592*4882a593Smuzhiyun static const char * const dmic0_data_groups[] = { "gpio1" };
593*4882a593Smuzhiyun static const char * const dsi_rst_groups[] = { "gpio25" };
594*4882a593Smuzhiyun static const char * const ebi0_wrcdc_groups[] = { "gpio67" };
595*4882a593Smuzhiyun static const char * const euro_us_groups[] = { "gpio120" };
596*4882a593Smuzhiyun static const char * const ext_lpass_groups[] = { "gpio45" };
597*4882a593Smuzhiyun static const char * const flash_strobe_groups[] = { "gpio31", "gpio32" };
598*4882a593Smuzhiyun static const char * const gcc_gp1_clk_a_groups[] = { "gpio49" };
599*4882a593Smuzhiyun static const char * const gcc_gp1_clk_b_groups[] = { "gpio97" };
600*4882a593Smuzhiyun static const char * const gcc_gp2_clk_a_groups[] = { "gpio50" };
601*4882a593Smuzhiyun static const char * const gcc_gp2_clk_b_groups[] = { "gpio12" };
602*4882a593Smuzhiyun static const char * const gcc_gp3_clk_a_groups[] = { "gpio51" };
603*4882a593Smuzhiyun static const char * const gcc_gp3_clk_b_groups[] = { "gpio13" };
604*4882a593Smuzhiyun static const char * const gsm0_tx0_groups[] = { "gpio99" };
605*4882a593Smuzhiyun static const char * const gsm0_tx1_groups[] = { "gpio100" };
606*4882a593Smuzhiyun static const char * const gsm1_tx0_groups[] = { "gpio101" };
607*4882a593Smuzhiyun static const char * const gsm1_tx1_groups[] = { "gpio102" };
608*4882a593Smuzhiyun static const char * const gyro_accl_groups[] = {"gpio115" };
609*4882a593Smuzhiyun static const char * const kpsns0_groups[] = { "gpio107" };
610*4882a593Smuzhiyun static const char * const kpsns1_groups[] = { "gpio108" };
611*4882a593Smuzhiyun static const char * const kpsns2_groups[] = { "gpio109" };
612*4882a593Smuzhiyun static const char * const ldo_en_groups[] = { "gpio121" };
613*4882a593Smuzhiyun static const char * const ldo_update_groups[] = { "gpio120" };
614*4882a593Smuzhiyun static const char * const mag_int_groups[] = { "gpio69" };
615*4882a593Smuzhiyun static const char * const mdp_vsync_groups[] = { "gpio24", "gpio25" };
616*4882a593Smuzhiyun static const char * const modem_tsync_groups[] = { "gpio95" };
617*4882a593Smuzhiyun static const char * const m_voc_groups[] = { "gpio8", "gpio119" };
618*4882a593Smuzhiyun static const char * const nav_pps_groups[] = { "gpio95" };
619*4882a593Smuzhiyun static const char * const nav_tsync_groups[] = { "gpio95" };
620*4882a593Smuzhiyun static const char * const pa_indicator_groups[] = { "gpio86" };
621*4882a593Smuzhiyun static const char * const pbs0_groups[] = { "gpio107" };
622*4882a593Smuzhiyun static const char * const pbs1_groups[] = { "gpio108" };
623*4882a593Smuzhiyun static const char * const pbs2_groups[] = { "gpio109" };
624*4882a593Smuzhiyun static const char * const pri_mi2s_groups[] = {
625*4882a593Smuzhiyun 	"gpio113", "gpio114", "gpio115", "gpio116"
626*4882a593Smuzhiyun };
627*4882a593Smuzhiyun static const char * const pri_mi2s_ws_groups[] = { "gpio110" };
628*4882a593Smuzhiyun static const char * const prng_rosc_groups[] = { "gpio43" };
629*4882a593Smuzhiyun static const char * const pwr_crypto_enabled_a_groups[] = { "gpio35" };
630*4882a593Smuzhiyun static const char * const pwr_crypto_enabled_b_groups[] = { "gpio115" };
631*4882a593Smuzhiyun static const char * const pwr_modem_enabled_a_groups[] = { "gpio28" };
632*4882a593Smuzhiyun static const char * const pwr_modem_enabled_b_groups[] = { "gpio113" };
633*4882a593Smuzhiyun static const char * const pwr_nav_enabled_a_groups[] = { "gpio34" };
634*4882a593Smuzhiyun static const char * const pwr_nav_enabled_b_groups[] = { "gpio114" };
635*4882a593Smuzhiyun static const char * const qdss_ctitrig_in_a0_groups[] = { "gpio20" };
636*4882a593Smuzhiyun static const char * const qdss_ctitrig_in_a1_groups[] = { "gpio49" };
637*4882a593Smuzhiyun static const char * const qdss_ctitrig_in_b0_groups[] = { "gpio21" };
638*4882a593Smuzhiyun static const char * const qdss_ctitrig_in_b1_groups[] = { "gpio50" };
639*4882a593Smuzhiyun static const char * const qdss_ctitrig_out_a0_groups[] = { "gpio23" };
640*4882a593Smuzhiyun static const char * const qdss_ctitrig_out_a1_groups[] = { "gpio52" };
641*4882a593Smuzhiyun static const char * const qdss_ctitrig_out_b0_groups[] = { "gpio22" };
642*4882a593Smuzhiyun static const char * const qdss_ctitrig_out_b1_groups[] = { "gpio51" };
643*4882a593Smuzhiyun static const char * const qdss_traceclk_a_groups[] = { "gpio46" };
644*4882a593Smuzhiyun static const char * const qdss_traceclk_b_groups[] = { "gpio5" };
645*4882a593Smuzhiyun static const char * const qdss_tracectl_a_groups[] = { "gpio45" };
646*4882a593Smuzhiyun static const char * const qdss_tracectl_b_groups[] = { "gpio4" };
647*4882a593Smuzhiyun static const char * const qdss_tracedata_a_groups[] = {
648*4882a593Smuzhiyun 	"gpio8", "gpio9", "gpio10", "gpio39", "gpio40", "gpio41", "gpio42",
649*4882a593Smuzhiyun 	"gpio43", "gpio47", "gpio48", "gpio62", "gpio69", "gpio112", "gpio113",
650*4882a593Smuzhiyun 	"gpio114", "gpio115"
651*4882a593Smuzhiyun };
652*4882a593Smuzhiyun static const char * const qdss_tracedata_b_groups[] = {
653*4882a593Smuzhiyun 	"gpio26", "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
654*4882a593Smuzhiyun 	"gpio33", "gpio34", "gpio35", "gpio36", "gpio37", "gpio110", "gpio111",
655*4882a593Smuzhiyun 	"gpio120", "gpio121"
656*4882a593Smuzhiyun };
657*4882a593Smuzhiyun static const char * const reset_n_groups[] = { "gpio36" };
658*4882a593Smuzhiyun static const char * const sd_card_groups[] = { "gpio38" };
659*4882a593Smuzhiyun static const char * const sd_write_groups[] = { "gpio121" };
660*4882a593Smuzhiyun static const char * const sec_mi2s_groups[] = {
661*4882a593Smuzhiyun 	"gpio112", "gpio117", "gpio118", "gpio119"
662*4882a593Smuzhiyun };
663*4882a593Smuzhiyun static const char * const smb_int_groups[] = { "gpio62" };
664*4882a593Smuzhiyun static const char * const ssbi_wtr0_groups[] = { "gpio103", "gpio104" };
665*4882a593Smuzhiyun static const char * const ssbi_wtr1_groups[] = { "gpio105", "gpio106" };
666*4882a593Smuzhiyun static const char * const uim1_groups[] = {
667*4882a593Smuzhiyun 	"gpio57", "gpio58", "gpio59", "gpio60"
668*4882a593Smuzhiyun };
669*4882a593Smuzhiyun 
670*4882a593Smuzhiyun static const char * const uim2_groups[] = {
671*4882a593Smuzhiyun 	"gpio53", "gpio54", "gpio55", "gpio56"
672*4882a593Smuzhiyun };
673*4882a593Smuzhiyun static const char * const uim3_groups[] = {
674*4882a593Smuzhiyun 	"gpio49",  "gpio50", "gpio51", "gpio52"
675*4882a593Smuzhiyun };
676*4882a593Smuzhiyun static const char * const uim_batt_groups[] = { "gpio61" };
677*4882a593Smuzhiyun static const char * const wcss_bt_groups[] = { "gpio39", "gpio47", "gpio48" };
678*4882a593Smuzhiyun static const char * const wcss_fm_groups[] = { "gpio45", "gpio46" };
679*4882a593Smuzhiyun static const char * const wcss_wlan_groups[] = {
680*4882a593Smuzhiyun 	"gpio40", "gpio41", "gpio42", "gpio43", "gpio44"
681*4882a593Smuzhiyun };
682*4882a593Smuzhiyun static const char * const webcam1_rst_groups[] = { "gpio28" };
683*4882a593Smuzhiyun 
684*4882a593Smuzhiyun static const struct msm_function msm8916_functions[] = {
685*4882a593Smuzhiyun 	FUNCTION(adsp_ext),
686*4882a593Smuzhiyun 	FUNCTION(alsp_int),
687*4882a593Smuzhiyun 	FUNCTION(atest_bbrx0),
688*4882a593Smuzhiyun 	FUNCTION(atest_bbrx1),
689*4882a593Smuzhiyun 	FUNCTION(atest_char),
690*4882a593Smuzhiyun 	FUNCTION(atest_char0),
691*4882a593Smuzhiyun 	FUNCTION(atest_char1),
692*4882a593Smuzhiyun 	FUNCTION(atest_char2),
693*4882a593Smuzhiyun 	FUNCTION(atest_char3),
694*4882a593Smuzhiyun 	FUNCTION(atest_combodac),
695*4882a593Smuzhiyun 	FUNCTION(atest_gpsadc0),
696*4882a593Smuzhiyun 	FUNCTION(atest_gpsadc1),
697*4882a593Smuzhiyun 	FUNCTION(atest_tsens),
698*4882a593Smuzhiyun 	FUNCTION(atest_wlan0),
699*4882a593Smuzhiyun 	FUNCTION(atest_wlan1),
700*4882a593Smuzhiyun 	FUNCTION(backlight_en),
701*4882a593Smuzhiyun 	FUNCTION(bimc_dte0),
702*4882a593Smuzhiyun 	FUNCTION(bimc_dte1),
703*4882a593Smuzhiyun 	FUNCTION(blsp_i2c1),
704*4882a593Smuzhiyun 	FUNCTION(blsp_i2c2),
705*4882a593Smuzhiyun 	FUNCTION(blsp_i2c3),
706*4882a593Smuzhiyun 	FUNCTION(blsp_i2c4),
707*4882a593Smuzhiyun 	FUNCTION(blsp_i2c5),
708*4882a593Smuzhiyun 	FUNCTION(blsp_i2c6),
709*4882a593Smuzhiyun 	FUNCTION(blsp_spi1),
710*4882a593Smuzhiyun 	FUNCTION(blsp_spi1_cs1),
711*4882a593Smuzhiyun 	FUNCTION(blsp_spi1_cs2),
712*4882a593Smuzhiyun 	FUNCTION(blsp_spi1_cs3),
713*4882a593Smuzhiyun 	FUNCTION(blsp_spi2),
714*4882a593Smuzhiyun 	FUNCTION(blsp_spi2_cs1),
715*4882a593Smuzhiyun 	FUNCTION(blsp_spi2_cs2),
716*4882a593Smuzhiyun 	FUNCTION(blsp_spi2_cs3),
717*4882a593Smuzhiyun 	FUNCTION(blsp_spi3),
718*4882a593Smuzhiyun 	FUNCTION(blsp_spi3_cs1),
719*4882a593Smuzhiyun 	FUNCTION(blsp_spi3_cs2),
720*4882a593Smuzhiyun 	FUNCTION(blsp_spi3_cs3),
721*4882a593Smuzhiyun 	FUNCTION(blsp_spi4),
722*4882a593Smuzhiyun 	FUNCTION(blsp_spi5),
723*4882a593Smuzhiyun 	FUNCTION(blsp_spi6),
724*4882a593Smuzhiyun 	FUNCTION(blsp_uart1),
725*4882a593Smuzhiyun 	FUNCTION(blsp_uart2),
726*4882a593Smuzhiyun 	FUNCTION(blsp_uim1),
727*4882a593Smuzhiyun 	FUNCTION(blsp_uim2),
728*4882a593Smuzhiyun 	FUNCTION(cam1_rst),
729*4882a593Smuzhiyun 	FUNCTION(cam1_standby),
730*4882a593Smuzhiyun 	FUNCTION(cam_mclk0),
731*4882a593Smuzhiyun 	FUNCTION(cam_mclk1),
732*4882a593Smuzhiyun 	FUNCTION(cci_async),
733*4882a593Smuzhiyun 	FUNCTION(cci_i2c),
734*4882a593Smuzhiyun 	FUNCTION(cci_timer0),
735*4882a593Smuzhiyun 	FUNCTION(cci_timer1),
736*4882a593Smuzhiyun 	FUNCTION(cci_timer2),
737*4882a593Smuzhiyun 	FUNCTION(cdc_pdm0),
738*4882a593Smuzhiyun 	FUNCTION(codec_mad),
739*4882a593Smuzhiyun 	FUNCTION(dbg_out),
740*4882a593Smuzhiyun 	FUNCTION(display_5v),
741*4882a593Smuzhiyun 	FUNCTION(dmic0_clk),
742*4882a593Smuzhiyun 	FUNCTION(dmic0_data),
743*4882a593Smuzhiyun 	FUNCTION(dsi_rst),
744*4882a593Smuzhiyun 	FUNCTION(ebi0_wrcdc),
745*4882a593Smuzhiyun 	FUNCTION(euro_us),
746*4882a593Smuzhiyun 	FUNCTION(ext_lpass),
747*4882a593Smuzhiyun 	FUNCTION(flash_strobe),
748*4882a593Smuzhiyun 	FUNCTION(gcc_gp1_clk_a),
749*4882a593Smuzhiyun 	FUNCTION(gcc_gp1_clk_b),
750*4882a593Smuzhiyun 	FUNCTION(gcc_gp2_clk_a),
751*4882a593Smuzhiyun 	FUNCTION(gcc_gp2_clk_b),
752*4882a593Smuzhiyun 	FUNCTION(gcc_gp3_clk_a),
753*4882a593Smuzhiyun 	FUNCTION(gcc_gp3_clk_b),
754*4882a593Smuzhiyun 	FUNCTION(gpio),
755*4882a593Smuzhiyun 	FUNCTION(gsm0_tx0),
756*4882a593Smuzhiyun 	FUNCTION(gsm0_tx1),
757*4882a593Smuzhiyun 	FUNCTION(gsm1_tx0),
758*4882a593Smuzhiyun 	FUNCTION(gsm1_tx1),
759*4882a593Smuzhiyun 	FUNCTION(gyro_accl),
760*4882a593Smuzhiyun 	FUNCTION(kpsns0),
761*4882a593Smuzhiyun 	FUNCTION(kpsns1),
762*4882a593Smuzhiyun 	FUNCTION(kpsns2),
763*4882a593Smuzhiyun 	FUNCTION(ldo_en),
764*4882a593Smuzhiyun 	FUNCTION(ldo_update),
765*4882a593Smuzhiyun 	FUNCTION(mag_int),
766*4882a593Smuzhiyun 	FUNCTION(mdp_vsync),
767*4882a593Smuzhiyun 	FUNCTION(modem_tsync),
768*4882a593Smuzhiyun 	FUNCTION(m_voc),
769*4882a593Smuzhiyun 	FUNCTION(nav_pps),
770*4882a593Smuzhiyun 	FUNCTION(nav_tsync),
771*4882a593Smuzhiyun 	FUNCTION(pa_indicator),
772*4882a593Smuzhiyun 	FUNCTION(pbs0),
773*4882a593Smuzhiyun 	FUNCTION(pbs1),
774*4882a593Smuzhiyun 	FUNCTION(pbs2),
775*4882a593Smuzhiyun 	FUNCTION(pri_mi2s),
776*4882a593Smuzhiyun 	FUNCTION(pri_mi2s_ws),
777*4882a593Smuzhiyun 	FUNCTION(prng_rosc),
778*4882a593Smuzhiyun 	FUNCTION(pwr_crypto_enabled_a),
779*4882a593Smuzhiyun 	FUNCTION(pwr_crypto_enabled_b),
780*4882a593Smuzhiyun 	FUNCTION(pwr_modem_enabled_a),
781*4882a593Smuzhiyun 	FUNCTION(pwr_modem_enabled_b),
782*4882a593Smuzhiyun 	FUNCTION(pwr_nav_enabled_a),
783*4882a593Smuzhiyun 	FUNCTION(pwr_nav_enabled_b),
784*4882a593Smuzhiyun 	FUNCTION(qdss_ctitrig_in_a0),
785*4882a593Smuzhiyun 	FUNCTION(qdss_ctitrig_in_a1),
786*4882a593Smuzhiyun 	FUNCTION(qdss_ctitrig_in_b0),
787*4882a593Smuzhiyun 	FUNCTION(qdss_ctitrig_in_b1),
788*4882a593Smuzhiyun 	FUNCTION(qdss_ctitrig_out_a0),
789*4882a593Smuzhiyun 	FUNCTION(qdss_ctitrig_out_a1),
790*4882a593Smuzhiyun 	FUNCTION(qdss_ctitrig_out_b0),
791*4882a593Smuzhiyun 	FUNCTION(qdss_ctitrig_out_b1),
792*4882a593Smuzhiyun 	FUNCTION(qdss_traceclk_a),
793*4882a593Smuzhiyun 	FUNCTION(qdss_traceclk_b),
794*4882a593Smuzhiyun 	FUNCTION(qdss_tracectl_a),
795*4882a593Smuzhiyun 	FUNCTION(qdss_tracectl_b),
796*4882a593Smuzhiyun 	FUNCTION(qdss_tracedata_a),
797*4882a593Smuzhiyun 	FUNCTION(qdss_tracedata_b),
798*4882a593Smuzhiyun 	FUNCTION(reset_n),
799*4882a593Smuzhiyun 	FUNCTION(sd_card),
800*4882a593Smuzhiyun 	FUNCTION(sd_write),
801*4882a593Smuzhiyun 	FUNCTION(sec_mi2s),
802*4882a593Smuzhiyun 	FUNCTION(smb_int),
803*4882a593Smuzhiyun 	FUNCTION(ssbi_wtr0),
804*4882a593Smuzhiyun 	FUNCTION(ssbi_wtr1),
805*4882a593Smuzhiyun 	FUNCTION(uim1),
806*4882a593Smuzhiyun 	FUNCTION(uim2),
807*4882a593Smuzhiyun 	FUNCTION(uim3),
808*4882a593Smuzhiyun 	FUNCTION(uim_batt),
809*4882a593Smuzhiyun 	FUNCTION(wcss_bt),
810*4882a593Smuzhiyun 	FUNCTION(wcss_fm),
811*4882a593Smuzhiyun 	FUNCTION(wcss_wlan),
812*4882a593Smuzhiyun 	FUNCTION(webcam1_rst)
813*4882a593Smuzhiyun };
814*4882a593Smuzhiyun 
815*4882a593Smuzhiyun static const struct msm_pingroup msm8916_groups[] = {
816*4882a593Smuzhiyun 	PINGROUP(0, blsp_spi1, blsp_uart1, blsp_uim1, dmic0_clk, NA, NA, NA, NA, NA),
817*4882a593Smuzhiyun 	PINGROUP(1, blsp_spi1, blsp_uart1, blsp_uim1, dmic0_data, NA, NA, NA, NA, NA),
818*4882a593Smuzhiyun 	PINGROUP(2, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA, NA, NA),
819*4882a593Smuzhiyun 	PINGROUP(3, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA, NA, NA),
820*4882a593Smuzhiyun 	PINGROUP(4, blsp_spi2, blsp_uart2, blsp_uim2, blsp_spi1_cs3, qdss_tracectl_b, NA, atest_combodac, NA, NA),
821*4882a593Smuzhiyun 	PINGROUP(5, blsp_spi2, blsp_uart2, blsp_uim2, blsp_spi2_cs3, qdss_traceclk_b, NA, NA, NA, NA),
822*4882a593Smuzhiyun 	PINGROUP(6, blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA, NA, NA),
823*4882a593Smuzhiyun 	PINGROUP(7, blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA, NA, NA),
824*4882a593Smuzhiyun 	PINGROUP(8, blsp_spi3, m_voc, qdss_tracedata_a, NA, NA, NA, NA, NA, NA),
825*4882a593Smuzhiyun 	PINGROUP(9, blsp_spi3, qdss_tracedata_a, NA, NA, NA, NA, NA, NA, NA),
826*4882a593Smuzhiyun 	PINGROUP(10, blsp_spi3, blsp_i2c3, qdss_tracedata_a, NA, NA, NA, NA, NA, NA),
827*4882a593Smuzhiyun 	PINGROUP(11, blsp_spi3, blsp_i2c3, NA, NA, NA, NA, NA, NA, NA),
828*4882a593Smuzhiyun 	PINGROUP(12, blsp_spi4, gcc_gp2_clk_b, NA, atest_combodac, NA, NA, NA, NA, NA),
829*4882a593Smuzhiyun 	PINGROUP(13, blsp_spi4, gcc_gp3_clk_b, NA, atest_combodac, NA, NA, NA, NA, NA),
830*4882a593Smuzhiyun 	PINGROUP(14, blsp_spi4, blsp_i2c4, NA, NA, NA, NA, NA, NA, NA),
831*4882a593Smuzhiyun 	PINGROUP(15, blsp_spi4, blsp_i2c4, NA, NA, NA, NA, NA, NA, NA),
832*4882a593Smuzhiyun 	PINGROUP(16, blsp_spi5, blsp_spi1_cs2, NA, atest_bbrx1, NA, NA, NA, NA, NA),
833*4882a593Smuzhiyun 	PINGROUP(17, blsp_spi5, blsp_spi2_cs2, NA, atest_bbrx0, NA, NA, NA, NA, NA),
834*4882a593Smuzhiyun 	PINGROUP(18, blsp_spi5, blsp_i2c5, NA, atest_gpsadc1, NA, NA, NA, NA, NA),
835*4882a593Smuzhiyun 	PINGROUP(19, blsp_spi5, blsp_i2c5, NA, NA, NA, NA, NA, NA, NA),
836*4882a593Smuzhiyun 	PINGROUP(20, blsp_spi6, NA, NA, NA, NA, NA, NA, qdss_ctitrig_in_a0, NA),
837*4882a593Smuzhiyun 	PINGROUP(21, blsp_spi6, NA, NA, NA, NA, NA, NA, qdss_ctitrig_in_b0, NA),
838*4882a593Smuzhiyun 	PINGROUP(22, blsp_spi6, blsp_i2c6, NA, NA, NA, NA, NA, NA, NA),
839*4882a593Smuzhiyun 	PINGROUP(23, blsp_spi6, blsp_i2c6, NA, NA, NA, NA, NA, NA, NA),
840*4882a593Smuzhiyun 	PINGROUP(24, mdp_vsync, NA, NA, NA, NA, NA, NA, NA, NA),
841*4882a593Smuzhiyun 	PINGROUP(25, mdp_vsync, NA, NA, NA, NA, NA, NA, NA, NA),
842*4882a593Smuzhiyun 	PINGROUP(26, cam_mclk0, NA, NA, NA, NA, NA, qdss_tracedata_b, NA, NA),
843*4882a593Smuzhiyun 	PINGROUP(27, cam_mclk1, NA, NA, NA, NA, NA, NA, NA, qdss_tracedata_b),
844*4882a593Smuzhiyun 	PINGROUP(28, pwr_modem_enabled_a, NA, NA, NA, NA, NA, qdss_tracedata_b, NA, atest_combodac),
845*4882a593Smuzhiyun 	PINGROUP(29, cci_i2c, NA, NA, NA, NA, NA, qdss_tracedata_b, NA, atest_combodac),
846*4882a593Smuzhiyun 	PINGROUP(30, cci_i2c, NA, NA, NA, NA, NA, NA, NA, qdss_tracedata_b),
847*4882a593Smuzhiyun 	PINGROUP(31, cci_timer0, flash_strobe, NA, NA, NA, NA, NA, NA, NA),
848*4882a593Smuzhiyun 	PINGROUP(32, cci_timer1, flash_strobe, NA, NA, NA, NA, NA, NA, NA),
849*4882a593Smuzhiyun 	PINGROUP(33, cci_async, NA, NA, NA, NA, NA, NA, NA, qdss_tracedata_b),
850*4882a593Smuzhiyun 	PINGROUP(34, pwr_nav_enabled_a, NA, NA, NA, NA, NA, NA, NA, qdss_tracedata_b),
851*4882a593Smuzhiyun 	PINGROUP(35, pwr_crypto_enabled_a, NA, NA, NA, NA, NA, NA, NA, qdss_tracedata_b),
852*4882a593Smuzhiyun 	PINGROUP(36, NA, NA, NA, NA, NA, NA, NA, qdss_tracedata_b, NA),
853*4882a593Smuzhiyun 	PINGROUP(37, blsp_spi3_cs2, NA, NA, NA, NA, NA, qdss_tracedata_b, NA, NA),
854*4882a593Smuzhiyun 	PINGROUP(38, cci_timer2, adsp_ext, NA, NA, NA, NA, NA, NA, NA),
855*4882a593Smuzhiyun 	PINGROUP(39, wcss_bt, qdss_tracedata_a, NA, atest_combodac, NA, NA, NA, NA, NA),
856*4882a593Smuzhiyun 	PINGROUP(40, wcss_wlan, qdss_tracedata_a, NA, atest_combodac, NA, NA, NA, NA, NA),
857*4882a593Smuzhiyun 	PINGROUP(41, wcss_wlan, qdss_tracedata_a, NA, atest_combodac, NA, NA, NA, NA, NA),
858*4882a593Smuzhiyun 	PINGROUP(42, wcss_wlan, qdss_tracedata_a, NA, atest_combodac, NA, NA, NA, NA, NA),
859*4882a593Smuzhiyun 	PINGROUP(43, wcss_wlan, prng_rosc, qdss_tracedata_a, NA, atest_combodac, NA, NA, NA, NA),
860*4882a593Smuzhiyun 	PINGROUP(44, wcss_wlan, NA, atest_combodac, NA, NA, NA, NA, NA, NA),
861*4882a593Smuzhiyun 	PINGROUP(45, wcss_fm, ext_lpass, qdss_tracectl_a, NA, atest_combodac, NA, NA, NA, NA),
862*4882a593Smuzhiyun 	PINGROUP(46, wcss_fm, qdss_traceclk_a, NA, atest_combodac, NA, NA, NA, NA, NA),
863*4882a593Smuzhiyun 	PINGROUP(47, wcss_bt, dbg_out, qdss_tracedata_a, NA, atest_combodac, NA, NA, NA, NA),
864*4882a593Smuzhiyun 	PINGROUP(48, wcss_bt, qdss_tracedata_a, NA, atest_combodac, NA, NA, NA, NA, NA),
865*4882a593Smuzhiyun 	PINGROUP(49, uim3, gcc_gp1_clk_a, qdss_ctitrig_in_a1, NA, NA, NA, NA, NA, NA),
866*4882a593Smuzhiyun 	PINGROUP(50, uim3, gcc_gp2_clk_a, qdss_ctitrig_in_b1, NA, NA, NA, NA, NA, NA),
867*4882a593Smuzhiyun 	PINGROUP(51, uim3, gcc_gp3_clk_a, qdss_ctitrig_out_b1, NA, NA, NA, NA, NA, NA),
868*4882a593Smuzhiyun 	PINGROUP(52, uim3, NA, qdss_ctitrig_out_a1, NA, NA, NA, NA, NA, NA),
869*4882a593Smuzhiyun 	PINGROUP(53, uim2, NA, NA, NA, NA, NA, NA, NA, NA),
870*4882a593Smuzhiyun 	PINGROUP(54, uim2, NA, NA, NA, NA, NA, NA, NA, NA),
871*4882a593Smuzhiyun 	PINGROUP(55, uim2, NA, NA, NA, NA, NA, NA, NA, NA),
872*4882a593Smuzhiyun 	PINGROUP(56, uim2, NA, NA, NA, NA, NA, NA, NA, NA),
873*4882a593Smuzhiyun 	PINGROUP(57, uim1, atest_char3, NA, NA, NA, NA, NA, NA, NA),
874*4882a593Smuzhiyun 	PINGROUP(58, uim1, atest_char2, NA, NA, NA, NA, NA, NA, NA),
875*4882a593Smuzhiyun 	PINGROUP(59, uim1, atest_char1, NA, NA, NA, NA, NA, NA, NA),
876*4882a593Smuzhiyun 	PINGROUP(60, uim1, atest_char0, NA, NA, NA, NA, NA, NA, NA),
877*4882a593Smuzhiyun 	PINGROUP(61, uim_batt, NA, NA, NA, NA, NA, NA, NA, NA),
878*4882a593Smuzhiyun 	PINGROUP(62, atest_char, qdss_tracedata_a, NA, NA, NA, NA, NA, NA, NA),
879*4882a593Smuzhiyun 	PINGROUP(63, cdc_pdm0, bimc_dte0, NA, NA, NA, NA, NA, NA, NA),
880*4882a593Smuzhiyun 	PINGROUP(64, cdc_pdm0, bimc_dte1, NA, NA, NA, NA, NA, NA, NA),
881*4882a593Smuzhiyun 	PINGROUP(65, cdc_pdm0, bimc_dte0, NA, NA, NA, NA, NA, NA, NA),
882*4882a593Smuzhiyun 	PINGROUP(66, cdc_pdm0, bimc_dte1, NA, NA, NA, NA, NA, NA, NA),
883*4882a593Smuzhiyun 	PINGROUP(67, cdc_pdm0, ebi0_wrcdc, NA, NA, NA, NA, NA, NA, NA),
884*4882a593Smuzhiyun 	PINGROUP(68, cdc_pdm0, NA, NA, NA, NA, NA, NA, NA, NA),
885*4882a593Smuzhiyun 	PINGROUP(69, blsp_spi3_cs3, qdss_tracedata_a, NA, atest_combodac, NA, NA, NA, NA, NA),
886*4882a593Smuzhiyun 	PINGROUP(70, NA, NA, NA, NA, NA, NA, NA, NA, NA),
887*4882a593Smuzhiyun 	PINGROUP(71, NA, NA, NA, NA, NA, NA, NA, NA, NA),
888*4882a593Smuzhiyun 	PINGROUP(72, NA, NA, NA, NA, NA, NA, NA, NA, NA),
889*4882a593Smuzhiyun 	PINGROUP(73, NA, NA, NA, NA, NA, NA, NA, NA, NA),
890*4882a593Smuzhiyun 	PINGROUP(74, NA, NA, NA, NA, NA, NA, NA, NA, NA),
891*4882a593Smuzhiyun 	PINGROUP(75, NA, NA, NA, NA, NA, NA, NA, NA, NA),
892*4882a593Smuzhiyun 	PINGROUP(76, NA, NA, NA, NA, NA, NA, NA, NA, NA),
893*4882a593Smuzhiyun 	PINGROUP(77, NA, NA, NA, NA, NA, NA, NA, NA, NA),
894*4882a593Smuzhiyun 	PINGROUP(78, NA, NA, NA, NA, NA, NA, NA, NA, NA),
895*4882a593Smuzhiyun 	PINGROUP(79, NA, NA, NA, NA, NA, NA, NA, NA, NA),
896*4882a593Smuzhiyun 	PINGROUP(80, NA, NA, NA, NA, NA, NA, NA, NA, NA),
897*4882a593Smuzhiyun 	PINGROUP(81, NA, NA, NA, NA, NA, NA, NA, NA, NA),
898*4882a593Smuzhiyun 	PINGROUP(82, NA, NA, NA, NA, NA, NA, NA, NA, NA),
899*4882a593Smuzhiyun 	PINGROUP(83, NA, NA, NA, NA, NA, NA, NA, NA, NA),
900*4882a593Smuzhiyun 	PINGROUP(84, NA, NA, NA, NA, NA, NA, NA, NA, NA),
901*4882a593Smuzhiyun 	PINGROUP(85, NA, NA, NA, NA, NA, NA, NA, NA, NA),
902*4882a593Smuzhiyun 	PINGROUP(86, NA, pa_indicator, NA, NA, NA, NA, NA, NA, NA),
903*4882a593Smuzhiyun 	PINGROUP(87, NA, NA, NA, NA, NA, NA, NA, NA, NA),
904*4882a593Smuzhiyun 	PINGROUP(88, NA, NA, NA, NA, NA, NA, NA, NA, NA),
905*4882a593Smuzhiyun 	PINGROUP(89, NA, NA, NA, NA, NA, NA, NA, NA, NA),
906*4882a593Smuzhiyun 	PINGROUP(90, NA, NA, NA, NA, NA, NA, NA, NA, NA),
907*4882a593Smuzhiyun 	PINGROUP(91, NA, NA, NA, NA, NA, NA, NA, NA, NA),
908*4882a593Smuzhiyun 	PINGROUP(92, NA, NA, NA, NA, NA, NA, NA, NA, NA),
909*4882a593Smuzhiyun 	PINGROUP(93, NA, NA, NA, NA, NA, NA, NA, NA, NA),
910*4882a593Smuzhiyun 	PINGROUP(94, NA, NA, NA, NA, NA, NA, NA, NA, NA),
911*4882a593Smuzhiyun 	PINGROUP(95, NA, modem_tsync, nav_tsync, nav_pps, NA, NA, NA, NA, NA),
912*4882a593Smuzhiyun 	PINGROUP(96, NA, NA, NA, NA, NA, NA, NA, NA, NA),
913*4882a593Smuzhiyun 	PINGROUP(97, gcc_gp1_clk_b, NA, NA, NA, NA, NA, NA, NA, NA),
914*4882a593Smuzhiyun 	PINGROUP(98, NA, NA, NA, NA, NA, NA, NA, NA, NA),
915*4882a593Smuzhiyun 	PINGROUP(99, gsm0_tx0, NA, NA, NA, NA, NA, NA, NA, NA),
916*4882a593Smuzhiyun 	PINGROUP(100, gsm0_tx1, NA, NA, NA, NA, NA, NA, NA, NA),
917*4882a593Smuzhiyun 	PINGROUP(101, gsm1_tx0, NA, NA, NA, NA, NA, NA, NA, NA),
918*4882a593Smuzhiyun 	PINGROUP(102, gsm1_tx1, NA, NA, NA, NA, NA, NA, NA, NA),
919*4882a593Smuzhiyun 	PINGROUP(103, ssbi_wtr0, NA, NA, NA, NA, NA, NA, NA, NA),
920*4882a593Smuzhiyun 	PINGROUP(104, ssbi_wtr0, NA, NA, NA, NA, NA, NA, NA, NA),
921*4882a593Smuzhiyun 	PINGROUP(105, ssbi_wtr1, NA, NA, NA, NA, NA, NA, NA, NA),
922*4882a593Smuzhiyun 	PINGROUP(106, ssbi_wtr1, NA, NA, NA, NA, NA, NA, NA, NA),
923*4882a593Smuzhiyun 	PINGROUP(107, pbs0, NA, atest_combodac, NA, NA, NA, NA, NA, NA),
924*4882a593Smuzhiyun 	PINGROUP(108, pbs1, NA, NA, NA, NA, NA, NA, NA, NA),
925*4882a593Smuzhiyun 	PINGROUP(109, pbs2, NA, NA, NA, NA, NA, NA, NA, NA),
926*4882a593Smuzhiyun 	PINGROUP(110, blsp_spi1_cs1, pri_mi2s_ws, NA, qdss_tracedata_b, NA, NA, NA, NA, NA),
927*4882a593Smuzhiyun 	PINGROUP(111, qdss_tracedata_b, NA, NA, NA, NA, NA, NA, NA, NA),
928*4882a593Smuzhiyun 	PINGROUP(112, sec_mi2s, NA, NA, NA, qdss_tracedata_a, NA, atest_tsens, NA, NA),
929*4882a593Smuzhiyun 	PINGROUP(113, pri_mi2s, NA, pwr_modem_enabled_b, NA, NA, NA, NA, NA, qdss_tracedata_a),
930*4882a593Smuzhiyun 	PINGROUP(114, pri_mi2s, pwr_nav_enabled_b, NA, NA, NA, NA, NA, qdss_tracedata_a, NA),
931*4882a593Smuzhiyun 	PINGROUP(115, pri_mi2s, pwr_crypto_enabled_b, NA, NA, NA, NA, NA, qdss_tracedata_a, NA),
932*4882a593Smuzhiyun 	PINGROUP(116, pri_mi2s, NA, NA, NA, NA, NA, NA, NA, NA),
933*4882a593Smuzhiyun 	PINGROUP(117, sec_mi2s, NA, NA, NA, NA, NA, NA, NA, NA),
934*4882a593Smuzhiyun 	PINGROUP(118, sec_mi2s, NA, NA, NA, NA, NA, NA, NA, NA),
935*4882a593Smuzhiyun 	PINGROUP(119, sec_mi2s, m_voc, NA, NA, NA, NA, NA, NA, NA),
936*4882a593Smuzhiyun 	PINGROUP(120, blsp_spi3_cs1, ldo_update, NA, NA, NA, NA, NA, NA, NA),
937*4882a593Smuzhiyun 	PINGROUP(121, sd_write, blsp_spi2_cs1, ldo_en, NA, NA, NA, NA, NA, NA),
938*4882a593Smuzhiyun 	SDC_PINGROUP(sdc1_clk, 0x10a000, 13, 6),
939*4882a593Smuzhiyun 	SDC_PINGROUP(sdc1_cmd, 0x10a000, 11, 3),
940*4882a593Smuzhiyun 	SDC_PINGROUP(sdc1_data, 0x10a000, 9, 0),
941*4882a593Smuzhiyun 	SDC_PINGROUP(sdc2_clk, 0x109000, 14, 6),
942*4882a593Smuzhiyun 	SDC_PINGROUP(sdc2_cmd, 0x109000, 11, 3),
943*4882a593Smuzhiyun 	SDC_PINGROUP(sdc2_data, 0x109000, 9, 0),
944*4882a593Smuzhiyun 	SDC_PINGROUP(qdsd_clk, 0x19c000, 3, 0),
945*4882a593Smuzhiyun 	SDC_PINGROUP(qdsd_cmd, 0x19c000, 8, 5),
946*4882a593Smuzhiyun 	SDC_PINGROUP(qdsd_data0, 0x19c000, 13, 10),
947*4882a593Smuzhiyun 	SDC_PINGROUP(qdsd_data1, 0x19c000, 18, 15),
948*4882a593Smuzhiyun 	SDC_PINGROUP(qdsd_data2, 0x19c000, 23, 20),
949*4882a593Smuzhiyun 	SDC_PINGROUP(qdsd_data3, 0x19c000, 28, 25),
950*4882a593Smuzhiyun };
951*4882a593Smuzhiyun 
952*4882a593Smuzhiyun #define NUM_GPIO_PINGROUPS	122
953*4882a593Smuzhiyun 
954*4882a593Smuzhiyun static const struct msm_pinctrl_soc_data msm8916_pinctrl = {
955*4882a593Smuzhiyun 	.pins = msm8916_pins,
956*4882a593Smuzhiyun 	.npins = ARRAY_SIZE(msm8916_pins),
957*4882a593Smuzhiyun 	.functions = msm8916_functions,
958*4882a593Smuzhiyun 	.nfunctions = ARRAY_SIZE(msm8916_functions),
959*4882a593Smuzhiyun 	.groups = msm8916_groups,
960*4882a593Smuzhiyun 	.ngroups = ARRAY_SIZE(msm8916_groups),
961*4882a593Smuzhiyun 	.ngpios = NUM_GPIO_PINGROUPS,
962*4882a593Smuzhiyun };
963*4882a593Smuzhiyun 
msm8916_pinctrl_probe(struct platform_device * pdev)964*4882a593Smuzhiyun static int msm8916_pinctrl_probe(struct platform_device *pdev)
965*4882a593Smuzhiyun {
966*4882a593Smuzhiyun 	return msm_pinctrl_probe(pdev, &msm8916_pinctrl);
967*4882a593Smuzhiyun }
968*4882a593Smuzhiyun 
969*4882a593Smuzhiyun static const struct of_device_id msm8916_pinctrl_of_match[] = {
970*4882a593Smuzhiyun 	{ .compatible = "qcom,msm8916-pinctrl", },
971*4882a593Smuzhiyun 	{ },
972*4882a593Smuzhiyun };
973*4882a593Smuzhiyun 
974*4882a593Smuzhiyun static struct platform_driver msm8916_pinctrl_driver = {
975*4882a593Smuzhiyun 	.driver = {
976*4882a593Smuzhiyun 		.name = "msm8916-pinctrl",
977*4882a593Smuzhiyun 		.of_match_table = msm8916_pinctrl_of_match,
978*4882a593Smuzhiyun 	},
979*4882a593Smuzhiyun 	.probe = msm8916_pinctrl_probe,
980*4882a593Smuzhiyun 	.remove = msm_pinctrl_remove,
981*4882a593Smuzhiyun };
982*4882a593Smuzhiyun 
msm8916_pinctrl_init(void)983*4882a593Smuzhiyun static int __init msm8916_pinctrl_init(void)
984*4882a593Smuzhiyun {
985*4882a593Smuzhiyun 	return platform_driver_register(&msm8916_pinctrl_driver);
986*4882a593Smuzhiyun }
987*4882a593Smuzhiyun arch_initcall(msm8916_pinctrl_init);
988*4882a593Smuzhiyun 
msm8916_pinctrl_exit(void)989*4882a593Smuzhiyun static void __exit msm8916_pinctrl_exit(void)
990*4882a593Smuzhiyun {
991*4882a593Smuzhiyun 	platform_driver_unregister(&msm8916_pinctrl_driver);
992*4882a593Smuzhiyun }
993*4882a593Smuzhiyun module_exit(msm8916_pinctrl_exit);
994*4882a593Smuzhiyun 
995*4882a593Smuzhiyun MODULE_DESCRIPTION("Qualcomm msm8916 pinctrl driver");
996*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
997*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, msm8916_pinctrl_of_match);
998