1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Marvell PXA27x family pin control
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2015 Robert Jarzmik
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun #include <linux/module.h>
8*4882a593Smuzhiyun #include <linux/platform_device.h>
9*4882a593Smuzhiyun #include <linux/of.h>
10*4882a593Smuzhiyun #include <linux/of_device.h>
11*4882a593Smuzhiyun #include <linux/pinctrl/pinctrl.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include "pinctrl-pxa2xx.h"
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun static const struct pxa_desc_pin pxa27x_pins[] = {
16*4882a593Smuzhiyun PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(0)),
17*4882a593Smuzhiyun PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(1)),
18*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(9),
19*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "FFCTS"),
20*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "HZ_CLK"),
21*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "CHOUT<0>")),
22*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(10),
23*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "FFDCD"),
24*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "USB_P3_5"),
25*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "HZ_CLK"),
26*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "CHOUT<1>")),
27*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(11),
28*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "EXT_SYNC<0>"),
29*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "SSPRXD2"),
30*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "USB_P3_1"),
31*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "CHOUT<0>"),
32*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "PWM_OUT<2>"),
33*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "48_MHz")),
34*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(12),
35*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "EXT_SYNC<1>"),
36*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "CIF_DD<7>"),
37*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "CHOUT<1>"),
38*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "PWM_OUT<3>"),
39*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "48_MHz")),
40*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(13),
41*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "CLK_EXT"),
42*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "KP_DKIN<7>"),
43*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "KP_MKIN<7>"),
44*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "SSPTXD2")),
45*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(14),
46*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "L_VSYNC"),
47*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "SSPSFRM2"),
48*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "SSPSFRM2"),
49*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "UCLK")),
50*4882a593Smuzhiyun PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(15)),
51*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(16),
52*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "KP_MKIN<5>"),
53*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "PWM_OUT<0>"),
54*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "FFTXD")),
55*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(17),
56*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "KP_MKIN<6>"),
57*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "CIF_DD<6>"),
58*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "PWM_OUT<1>")),
59*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(18),
60*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "RDY")),
61*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(19),
62*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "SSPSCLK2"),
63*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "FFRXD"),
64*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "SSPSCLK2"),
65*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "L_CS"),
66*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "nURST")),
67*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(20),
68*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "DREQ<0>"),
69*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "MBREQ"),
70*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "nSDCS<2>")),
71*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(21),
72*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "nSDCS<3>"),
73*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "DVAL<0>"),
74*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "MBGNT")),
75*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(22),
76*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "SSPEXTCLK2"),
77*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "SSPSCLKEN2"),
78*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "SSPSCLK2"),
79*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "KP_MKOUT<7>"),
80*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "SSPSYSCLK2"),
81*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "SSPSCLK2")),
82*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(23),
83*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "SSPSCLK"),
84*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "CIF_MCLK"),
85*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "SSPSCLK")),
86*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(24),
87*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "CIF_FV"),
88*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "SSPSFRM"),
89*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "CIF_FV"),
90*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "SSPSFRM")),
91*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(25),
92*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "CIF_LV"),
93*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "CIF_LV"),
94*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "SSPTXD")),
95*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(26),
96*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "SSPRXD"),
97*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "CIF_PCLK"),
98*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "FFCTS")),
99*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(27),
100*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "SSPEXTCLK"),
101*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "SSPSCLKEN"),
102*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "CIF_DD<0>"),
103*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "SSPSYSCLK"),
104*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "FFRTS")),
105*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(28),
106*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "AC97_BITCLK"),
107*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "I2S_BITCLK"),
108*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "SSPSFRM"),
109*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "I2S_BITCLK"),
110*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "SSPSFRM")),
111*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(29),
112*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "AC97_SDATA_IN_0"),
113*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "I2S_SDATA_IN"),
114*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "SSPSCLK"),
115*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "SSPRXD2"),
116*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "SSPSCLK")),
117*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(30),
118*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "I2S_SDATA_OUT"),
119*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "AC97_SDATA_OUT"),
120*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "USB_P3_2")),
121*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(31),
122*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "I2S_SYNC"),
123*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "AC97_SYNC"),
124*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "USB_P3_6")),
125*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(32),
126*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "MSSCLK"),
127*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "MMCLK")),
128*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(33),
129*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "FFRXD"),
130*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "FFDSR"),
131*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "DVAL<1>"),
132*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "nCS<5>"),
133*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "MBGNT")),
134*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(34),
135*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "FFRXD"),
136*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "KP_MKIN<3>"),
137*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "SSPSCLK3"),
138*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "USB_P2_2"),
139*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "SSPSCLK3")),
140*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(35),
141*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "FFCTS"),
142*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "USB_P2_1"),
143*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "SSPSFRM3"),
144*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "KP_MKOUT<6>"),
145*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "SSPTXD3")),
146*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(36),
147*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "FFDCD"),
148*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "SSPSCLK2"),
149*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "KP_MKIN<7>"),
150*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "USB_P2_4"),
151*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "SSPSCLK2")),
152*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(37),
153*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "FFDSR"),
154*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "SSPSFRM2"),
155*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "KP_MKIN<3>"),
156*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "USB_P2_8"),
157*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "SSPSFRM2"),
158*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "FFTXD")),
159*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(38),
160*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "FFRI"),
161*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "KP_MKIN<4>"),
162*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "USB_P2_3"),
163*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "SSPTXD3"),
164*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "SSPTXD2"),
165*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "PWM_OUT<0>")),
166*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(39),
167*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "KP_MKIN<4>"),
168*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "SSPSFRM3"),
169*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "USB_P2_6"),
170*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "FFTXD"),
171*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "SSPSFRM3")),
172*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(40),
173*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "SSPRXD2"),
174*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "USB_P2_5"),
175*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "KP_MKOUT<6>"),
176*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "FFDTR"),
177*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "SSPSCLK3")),
178*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(41),
179*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "FFRXD"),
180*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "USB_P2_7"),
181*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "SSPRXD3"),
182*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "KP_MKOUT<7>"),
183*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "FFRTS")),
184*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(42),
185*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "BTRXD"),
186*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "ICP_RXD"),
187*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "CIF_MCLK")),
188*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(43),
189*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "CIF_FV"),
190*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "ICP_TXD"),
191*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "BTTXD"),
192*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "CIF_FV")),
193*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(44),
194*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "BTCTS"),
195*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "CIF_LV"),
196*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "CIF_LV")),
197*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(45),
198*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "CIF_PCLK"),
199*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "AC97_SYSCLK"),
200*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "BTRTS"),
201*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "SSPSYSCLK3")),
202*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(46),
203*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "ICP_RXD"),
204*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "STD_RXD"),
205*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "PWM_OUT<2>")),
206*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(47),
207*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "CIF_DD<0>"),
208*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "STD_TXD"),
209*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "ICP_TXD"),
210*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "PWM_OUT<3>")),
211*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(48),
212*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "CIF_DD<5>"),
213*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "BB_OB_DAT<1>"),
214*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "nPOE")),
215*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(49),
216*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "nPWE")),
217*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(50),
218*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "CIF_DD<3>"),
219*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "SSPSCLK2"),
220*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "BB_OB_DAT<2>"),
221*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "nPIOR"),
222*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "SSPSCLK2")),
223*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(51),
224*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "CIF_DD<2>"),
225*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "BB_OB_DAT<3>"),
226*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "nPIOW")),
227*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(52),
228*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "CIF_DD<4>"),
229*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "SSPSCLK3"),
230*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "BB_OB_CLK"),
231*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "SSPSCLK3")),
232*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(53),
233*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "FFRXD"),
234*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "USB_P2_3"),
235*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "BB_OB_STB"),
236*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "CIF_MCLK"),
237*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "SSPSYSCLK")),
238*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(54),
239*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "BB_OB_WAIT"),
240*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "CIF_PCLK"),
241*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "nPCE<2>")),
242*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(55),
243*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "CIF_DD<1>"),
244*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "BB_IB_DAT<1>"),
245*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "nPREG")),
246*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(56),
247*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "nPWAIT"),
248*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "BB_IB_DAT<2>"),
249*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "USB_P3_4")),
250*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(57),
251*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "nIOS16"),
252*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "BB_IB_DAT<3>"),
253*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "SSPTXD")),
254*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(58),
255*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "LDD<0>"),
256*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "LDD<0>")),
257*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(59),
258*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "LDD<1>"),
259*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "LDD<1>")),
260*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(60),
261*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "LDD<2>"),
262*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "LDD<2>")),
263*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(61),
264*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "LDD<3>"),
265*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "LDD<3>")),
266*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(62),
267*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "LDD<4>"),
268*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "LDD<4>")),
269*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(63),
270*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "LDD<5>"),
271*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "LDD<5>")),
272*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(64),
273*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "LDD<6>"),
274*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "LDD<6>")),
275*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(65),
276*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "LDD<7>"),
277*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "LDD<7>")),
278*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(66),
279*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "LDD<8>"),
280*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "LDD<8>")),
281*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(67),
282*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "LDD<9>"),
283*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "LDD<9>")),
284*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(68),
285*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "LDD<10>"),
286*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "LDD<10>")),
287*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(69),
288*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "LDD<11>"),
289*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "LDD<11>")),
290*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(70),
291*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "LDD<12>"),
292*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "LDD<12>")),
293*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(71),
294*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "LDD<13>"),
295*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "LDD<13>")),
296*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(72),
297*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "LDD<14>"),
298*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "LDD<14>")),
299*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(73),
300*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "LDD<15>"),
301*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "LDD<15>")),
302*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(74),
303*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "L_FCLK_RD")),
304*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(75),
305*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "L_LCLK_A0")),
306*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(76),
307*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "L_PCLK_WR")),
308*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(77),
309*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "L_BIAS")),
310*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(78),
311*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "nPCE<2>"),
312*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "nCS<2>")),
313*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(79),
314*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "PSKTSEL"),
315*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "nCS<3>"),
316*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "PWM_OUT<2>")),
317*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(80),
318*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "DREQ<1>"),
319*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "MBREQ"),
320*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "nCS<4>"),
321*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "PWM_OUT<3>")),
322*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(81),
323*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "CIF_DD<0>"),
324*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "SSPTXD3"),
325*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "BB_OB_DAT<0>")),
326*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(82),
327*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "SSPRXD3"),
328*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "BB_IB_DAT<0>"),
329*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "CIF_DD<5>"),
330*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "FFDTR")),
331*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(83),
332*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "SSPSFRM3"),
333*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "BB_IB_CLK"),
334*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "CIF_DD<5>"),
335*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "SSPSFRM3"),
336*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "FFTXD"),
337*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "FFRTS")),
338*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(84),
339*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "SSPCLK3"),
340*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "BB_IB_STB"),
341*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "CIF_FV"),
342*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "SSPCLK3"),
343*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "CIF_FV")),
344*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(85),
345*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "FFRXD"),
346*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "DREQ<2>"),
347*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "CIF_LV"),
348*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "nPCE<1>"),
349*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "BB_IB_WAIT"),
350*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "CIF_LV")),
351*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(86),
352*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "SSPRXD2"),
353*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "LDD<16>"),
354*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "USB_P3_5"),
355*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "nPCE<1>"),
356*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "LDD<16>")),
357*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(87),
358*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "nPCE<2>"),
359*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "LDD<17>"),
360*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "USB_P3_1"),
361*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "SSPTXD2"),
362*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "LDD<17>"),
363*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "SSPSFRM2")),
364*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(88),
365*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "USBHPWR<1>"),
366*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "SSPRXD2"),
367*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "SSPSFRM2"),
368*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "SSPTXD2"),
369*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "SSPSFRM2")),
370*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(89),
371*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "SSPRXD3"),
372*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "FFRI"),
373*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "AC97_SYSCLK"),
374*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "USBHPEN<1>"),
375*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "SSPTXD2")),
376*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(90),
377*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "KP_MKIN<5>"),
378*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "USB_P3_5"),
379*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "CIF_DD<4>"),
380*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "nURST")),
381*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(91),
382*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "KP_MKIN<6>"),
383*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "USB_P3_1"),
384*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "CIF_DD<5>"),
385*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "UCLK")),
386*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(92),
387*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "MMDAT<0>"),
388*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "MMDAT<0>"),
389*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "MSBS")),
390*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(93),
391*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "KP_DKIN<0>"),
392*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "CIF_DD<6>"),
393*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "AC97_SDATA_OUT")),
394*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(94),
395*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "KP_DKIN<1>"),
396*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "CIF_DD<5>"),
397*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "AC97_SYNC")),
398*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(95),
399*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "KP_DKIN<2>"),
400*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "CIF_DD<4>"),
401*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "KP_MKIN<6>"),
402*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "AC97_RESET_n")),
403*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(96),
404*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "KP_DKIN<3>"),
405*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "MBREQ"),
406*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "FFRXD"),
407*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "DVAL<1>"),
408*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "KP_MKOUT<6>")),
409*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(97),
410*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "KP_DKIN<4>"),
411*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "DREQ<1>"),
412*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "KP_MKIN<3>"),
413*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "MBGNT")),
414*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(98),
415*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "KP_DKIN<5>"),
416*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "CIF_DD<0>"),
417*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "KP_MKIN<4>"),
418*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "AC97_SYSCLK"),
419*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "FFRTS")),
420*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(99),
421*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "KP_DKIN<6>"),
422*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "AC97_SDATA_IN_1"),
423*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "KP_MKIN<5>"),
424*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "FFTXD")),
425*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(100),
426*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "KP_MKIN<0>"),
427*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "DREQ<2>"),
428*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "FFCTS")),
429*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(101),
430*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "KP_MKIN<1>")),
431*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(102),
432*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "KP_MKIN<2>"),
433*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "FFRXD"),
434*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "nPCE<1>")),
435*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(103),
436*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "CIF_DD<3>"),
437*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "KP_MKOUT<0>")),
438*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(104),
439*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "CIF_DD<2>"),
440*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "PSKTSEL"),
441*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "KP_MKOUT<1>")),
442*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(105),
443*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "CIF_DD<1>"),
444*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "nPCE<2>"),
445*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "KP_MKOUT<2>")),
446*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(106),
447*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "CIF_DD<9>"),
448*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "KP_MKOUT<3>")),
449*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(107),
450*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "CIF_DD<8>"),
451*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "KP_MKOUT<4>")),
452*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(108),
453*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "CIF_DD<7>"),
454*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "CHOUT<0>"),
455*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "KP_MKOUT<5>")),
456*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(109),
457*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "MMDAT<1>"),
458*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "MSSDIO"),
459*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "MMDAT<1>"),
460*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "MSSDIO")),
461*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(110),
462*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "MMDAT<2>"),
463*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "MMDAT<2>")),
464*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(111),
465*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "MMDAT<3>"),
466*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "MMDAT<3>")),
467*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(112),
468*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "MMCMD"),
469*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "nMSINS"),
470*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "MMCMD")),
471*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(113),
472*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "USB_P3_3"),
473*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "I2S_SYSCLK"),
474*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "AC97_RESET_n")),
475*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(114),
476*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "CIF_DD<1>"),
477*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "UEN"),
478*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "UVS0")),
479*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(115),
480*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "DREQ<0>"),
481*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "CIF_DD<3>"),
482*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "MBREQ"),
483*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "UEN"),
484*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "nUVS1"),
485*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "PWM_OUT<1>")),
486*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(116),
487*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "CIF_DD<2>"),
488*4882a593Smuzhiyun PXA_FUNCTION(0, 2, "AC97_SDATA_IN_0"),
489*4882a593Smuzhiyun PXA_FUNCTION(0, 3, "UDET"),
490*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "DVAL<0>"),
491*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "nUVS2"),
492*4882a593Smuzhiyun PXA_FUNCTION(1, 3, "MBGNT")),
493*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(117),
494*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "SCL"),
495*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "SCL")),
496*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(118),
497*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "SDA"),
498*4882a593Smuzhiyun PXA_FUNCTION(1, 1, "SDA")),
499*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(119),
500*4882a593Smuzhiyun PXA_FUNCTION(0, 1, "USBHPWR<2>")),
501*4882a593Smuzhiyun PXA_GPIO_PIN(PXA_PINCTRL_PIN(120),
502*4882a593Smuzhiyun PXA_FUNCTION(1, 2, "USBHPEN<2>")),
503*4882a593Smuzhiyun };
504*4882a593Smuzhiyun
pxa27x_pinctrl_probe(struct platform_device * pdev)505*4882a593Smuzhiyun static int pxa27x_pinctrl_probe(struct platform_device *pdev)
506*4882a593Smuzhiyun {
507*4882a593Smuzhiyun int ret, i;
508*4882a593Smuzhiyun void __iomem *base_af[8];
509*4882a593Smuzhiyun void __iomem *base_dir[4];
510*4882a593Smuzhiyun void __iomem *base_sleep[4];
511*4882a593Smuzhiyun
512*4882a593Smuzhiyun base_af[0] = devm_platform_ioremap_resource(pdev, 0);
513*4882a593Smuzhiyun if (IS_ERR(base_af[0]))
514*4882a593Smuzhiyun return PTR_ERR(base_af[0]);
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun base_dir[0] = devm_platform_ioremap_resource(pdev, 1);
517*4882a593Smuzhiyun if (IS_ERR(base_dir[0]))
518*4882a593Smuzhiyun return PTR_ERR(base_dir[0]);
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun base_dir[3] = devm_platform_ioremap_resource(pdev, 2);
521*4882a593Smuzhiyun if (IS_ERR(base_dir[3]))
522*4882a593Smuzhiyun return PTR_ERR(base_dir[3]);
523*4882a593Smuzhiyun
524*4882a593Smuzhiyun base_sleep[0] = devm_platform_ioremap_resource(pdev, 3);
525*4882a593Smuzhiyun if (IS_ERR(base_sleep[0]))
526*4882a593Smuzhiyun return PTR_ERR(base_sleep[0]);
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(base_af); i++)
529*4882a593Smuzhiyun base_af[i] = base_af[0] + sizeof(base_af[0]) * i;
530*4882a593Smuzhiyun for (i = 0; i < 3; i++)
531*4882a593Smuzhiyun base_dir[i] = base_dir[0] + sizeof(base_dir[0]) * i;
532*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(base_sleep); i++)
533*4882a593Smuzhiyun base_sleep[i] = base_sleep[0] + sizeof(base_af[0]) * i;
534*4882a593Smuzhiyun
535*4882a593Smuzhiyun ret = pxa2xx_pinctrl_init(pdev, pxa27x_pins, ARRAY_SIZE(pxa27x_pins),
536*4882a593Smuzhiyun base_af, base_dir, base_sleep);
537*4882a593Smuzhiyun return ret;
538*4882a593Smuzhiyun }
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun static const struct of_device_id pxa27x_pinctrl_match[] = {
541*4882a593Smuzhiyun { .compatible = "marvell,pxa27x-pinctrl", },
542*4882a593Smuzhiyun {}
543*4882a593Smuzhiyun };
544*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, pxa27x_pinctrl_match);
545*4882a593Smuzhiyun
546*4882a593Smuzhiyun static struct platform_driver pxa27x_pinctrl_driver = {
547*4882a593Smuzhiyun .probe = pxa27x_pinctrl_probe,
548*4882a593Smuzhiyun .driver = {
549*4882a593Smuzhiyun .name = "pxa27x-pinctrl",
550*4882a593Smuzhiyun .of_match_table = pxa27x_pinctrl_match,
551*4882a593Smuzhiyun },
552*4882a593Smuzhiyun };
553*4882a593Smuzhiyun module_platform_driver(pxa27x_pinctrl_driver);
554*4882a593Smuzhiyun
555*4882a593Smuzhiyun MODULE_AUTHOR("Robert Jarzmik <robert.jarzmik@free.fr>");
556*4882a593Smuzhiyun MODULE_DESCRIPTION("Marvell PXA27x pinctrl driver");
557*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
558