1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Marvell Armada ap806 pinctrl driver based on mvebu pinctrl core
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2017 Marvell
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
8*4882a593Smuzhiyun * Hanna Hawa <hannah@marvell.com>
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/err.h>
12*4882a593Smuzhiyun #include <linux/init.h>
13*4882a593Smuzhiyun #include <linux/io.h>
14*4882a593Smuzhiyun #include <linux/platform_device.h>
15*4882a593Smuzhiyun #include <linux/of.h>
16*4882a593Smuzhiyun #include <linux/of_device.h>
17*4882a593Smuzhiyun #include <linux/pinctrl/pinctrl.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #include "pinctrl-mvebu.h"
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun static struct mvebu_mpp_mode armada_ap806_mpp_modes[] = {
22*4882a593Smuzhiyun MPP_MODE(0,
23*4882a593Smuzhiyun MPP_FUNCTION(0, "gpio", NULL),
24*4882a593Smuzhiyun MPP_FUNCTION(1, "sdio", "clk"),
25*4882a593Smuzhiyun MPP_FUNCTION(3, "spi0", "clk")),
26*4882a593Smuzhiyun MPP_MODE(1,
27*4882a593Smuzhiyun MPP_FUNCTION(0, "gpio", NULL),
28*4882a593Smuzhiyun MPP_FUNCTION(1, "sdio", "cmd"),
29*4882a593Smuzhiyun MPP_FUNCTION(3, "spi0", "miso")),
30*4882a593Smuzhiyun MPP_MODE(2,
31*4882a593Smuzhiyun MPP_FUNCTION(0, "gpio", NULL),
32*4882a593Smuzhiyun MPP_FUNCTION(1, "sdio", "d0"),
33*4882a593Smuzhiyun MPP_FUNCTION(3, "spi0", "mosi")),
34*4882a593Smuzhiyun MPP_MODE(3,
35*4882a593Smuzhiyun MPP_FUNCTION(0, "gpio", NULL),
36*4882a593Smuzhiyun MPP_FUNCTION(1, "sdio", "d1"),
37*4882a593Smuzhiyun MPP_FUNCTION(3, "spi0", "cs0n")),
38*4882a593Smuzhiyun MPP_MODE(4,
39*4882a593Smuzhiyun MPP_FUNCTION(0, "gpio", NULL),
40*4882a593Smuzhiyun MPP_FUNCTION(1, "sdio", "d2"),
41*4882a593Smuzhiyun MPP_FUNCTION(3, "i2c0", "sda")),
42*4882a593Smuzhiyun MPP_MODE(5,
43*4882a593Smuzhiyun MPP_FUNCTION(0, "gpio", NULL),
44*4882a593Smuzhiyun MPP_FUNCTION(1, "sdio", "d3"),
45*4882a593Smuzhiyun MPP_FUNCTION(3, "i2c0", "sdk")),
46*4882a593Smuzhiyun MPP_MODE(6,
47*4882a593Smuzhiyun MPP_FUNCTION(0, "gpio", NULL),
48*4882a593Smuzhiyun MPP_FUNCTION(1, "sdio", "ds")),
49*4882a593Smuzhiyun MPP_MODE(7,
50*4882a593Smuzhiyun MPP_FUNCTION(0, "gpio", NULL),
51*4882a593Smuzhiyun MPP_FUNCTION(1, "sdio", "d4"),
52*4882a593Smuzhiyun MPP_FUNCTION(3, "uart1", "rxd")),
53*4882a593Smuzhiyun MPP_MODE(8,
54*4882a593Smuzhiyun MPP_FUNCTION(0, "gpio", NULL),
55*4882a593Smuzhiyun MPP_FUNCTION(1, "sdio", "d5"),
56*4882a593Smuzhiyun MPP_FUNCTION(3, "uart1", "txd")),
57*4882a593Smuzhiyun MPP_MODE(9,
58*4882a593Smuzhiyun MPP_FUNCTION(0, "gpio", NULL),
59*4882a593Smuzhiyun MPP_FUNCTION(1, "sdio", "d6"),
60*4882a593Smuzhiyun MPP_FUNCTION(3, "spi0", "cs1n")),
61*4882a593Smuzhiyun MPP_MODE(10,
62*4882a593Smuzhiyun MPP_FUNCTION(0, "gpio", NULL),
63*4882a593Smuzhiyun MPP_FUNCTION(1, "sdio", "d7")),
64*4882a593Smuzhiyun MPP_MODE(11,
65*4882a593Smuzhiyun MPP_FUNCTION(0, "gpio", NULL),
66*4882a593Smuzhiyun MPP_FUNCTION(3, "uart0", "txd")),
67*4882a593Smuzhiyun MPP_MODE(12,
68*4882a593Smuzhiyun MPP_FUNCTION(0, "gpio", NULL),
69*4882a593Smuzhiyun MPP_FUNCTION(1, "sdio", "pw_off"),
70*4882a593Smuzhiyun MPP_FUNCTION(2, "sdio", "hw_rst")),
71*4882a593Smuzhiyun MPP_MODE(13,
72*4882a593Smuzhiyun MPP_FUNCTION(0, "gpio", NULL)),
73*4882a593Smuzhiyun MPP_MODE(14,
74*4882a593Smuzhiyun MPP_FUNCTION(0, "gpio", NULL)),
75*4882a593Smuzhiyun MPP_MODE(15,
76*4882a593Smuzhiyun MPP_FUNCTION(0, "gpio", NULL)),
77*4882a593Smuzhiyun MPP_MODE(16,
78*4882a593Smuzhiyun MPP_FUNCTION(0, "gpio", NULL)),
79*4882a593Smuzhiyun MPP_MODE(17,
80*4882a593Smuzhiyun MPP_FUNCTION(0, "gpio", NULL)),
81*4882a593Smuzhiyun MPP_MODE(18,
82*4882a593Smuzhiyun MPP_FUNCTION(0, "gpio", NULL)),
83*4882a593Smuzhiyun MPP_MODE(19,
84*4882a593Smuzhiyun MPP_FUNCTION(0, "gpio", NULL),
85*4882a593Smuzhiyun MPP_FUNCTION(3, "uart0", "rxd"),
86*4882a593Smuzhiyun MPP_FUNCTION(4, "sdio", "pw_off")),
87*4882a593Smuzhiyun };
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun static struct mvebu_pinctrl_soc_info armada_ap806_pinctrl_info;
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun static const struct of_device_id armada_ap806_pinctrl_of_match[] = {
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun .compatible = "marvell,ap806-pinctrl",
94*4882a593Smuzhiyun },
95*4882a593Smuzhiyun { },
96*4882a593Smuzhiyun };
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun static const struct mvebu_mpp_ctrl armada_ap806_mpp_controls[] = {
99*4882a593Smuzhiyun MPP_FUNC_CTRL(0, 19, NULL, mvebu_regmap_mpp_ctrl),
100*4882a593Smuzhiyun };
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun static struct pinctrl_gpio_range armada_ap806_mpp_gpio_ranges[] = {
103*4882a593Smuzhiyun MPP_GPIO_RANGE(0, 0, 0, 20),
104*4882a593Smuzhiyun };
105*4882a593Smuzhiyun
armada_ap806_pinctrl_probe(struct platform_device * pdev)106*4882a593Smuzhiyun static int armada_ap806_pinctrl_probe(struct platform_device *pdev)
107*4882a593Smuzhiyun {
108*4882a593Smuzhiyun struct mvebu_pinctrl_soc_info *soc = &armada_ap806_pinctrl_info;
109*4882a593Smuzhiyun const struct of_device_id *match =
110*4882a593Smuzhiyun of_match_device(armada_ap806_pinctrl_of_match, &pdev->dev);
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun if (!match || !pdev->dev.parent)
113*4882a593Smuzhiyun return -ENODEV;
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun soc->variant = 0; /* no variants for Armada AP806 */
116*4882a593Smuzhiyun soc->controls = armada_ap806_mpp_controls;
117*4882a593Smuzhiyun soc->ncontrols = ARRAY_SIZE(armada_ap806_mpp_controls);
118*4882a593Smuzhiyun soc->gpioranges = armada_ap806_mpp_gpio_ranges;
119*4882a593Smuzhiyun soc->ngpioranges = ARRAY_SIZE(armada_ap806_mpp_gpio_ranges);
120*4882a593Smuzhiyun soc->modes = armada_ap806_mpp_modes;
121*4882a593Smuzhiyun soc->nmodes = armada_ap806_mpp_controls[0].npins;
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun pdev->dev.platform_data = soc;
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun return mvebu_pinctrl_simple_regmap_probe(pdev, pdev->dev.parent, 0);
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun static struct platform_driver armada_ap806_pinctrl_driver = {
129*4882a593Smuzhiyun .driver = {
130*4882a593Smuzhiyun .name = "armada-ap806-pinctrl",
131*4882a593Smuzhiyun .of_match_table = of_match_ptr(armada_ap806_pinctrl_of_match),
132*4882a593Smuzhiyun },
133*4882a593Smuzhiyun .probe = armada_ap806_pinctrl_probe,
134*4882a593Smuzhiyun };
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun builtin_platform_driver(armada_ap806_pinctrl_driver);
137