1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Marvell Armada 380/385 pinctrl driver based on mvebu pinctrl core
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2013 Marvell
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/err.h>
11*4882a593Smuzhiyun #include <linux/init.h>
12*4882a593Smuzhiyun #include <linux/io.h>
13*4882a593Smuzhiyun #include <linux/platform_device.h>
14*4882a593Smuzhiyun #include <linux/of.h>
15*4882a593Smuzhiyun #include <linux/of_device.h>
16*4882a593Smuzhiyun #include <linux/pinctrl/pinctrl.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #include "pinctrl-mvebu.h"
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun enum {
21*4882a593Smuzhiyun V_88F6810 = BIT(0),
22*4882a593Smuzhiyun V_88F6820 = BIT(1),
23*4882a593Smuzhiyun V_88F6828 = BIT(2),
24*4882a593Smuzhiyun V_88F6810_PLUS = (V_88F6810 | V_88F6820 | V_88F6828),
25*4882a593Smuzhiyun V_88F6820_PLUS = (V_88F6820 | V_88F6828),
26*4882a593Smuzhiyun };
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun static struct mvebu_mpp_mode armada_38x_mpp_modes[] = {
29*4882a593Smuzhiyun MPP_MODE(0,
30*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
31*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "ua0", "rxd", V_88F6810_PLUS)),
32*4882a593Smuzhiyun MPP_MODE(1,
33*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
34*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "ua0", "txd", V_88F6810_PLUS)),
35*4882a593Smuzhiyun MPP_MODE(2,
36*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
37*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "i2c0", "sck", V_88F6810_PLUS)),
38*4882a593Smuzhiyun MPP_MODE(3,
39*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
40*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "i2c0", "sda", V_88F6810_PLUS)),
41*4882a593Smuzhiyun MPP_MODE(4,
42*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
43*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "ge", "mdc", V_88F6810_PLUS),
44*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "ua1", "txd", V_88F6810_PLUS),
45*4882a593Smuzhiyun MPP_VAR_FUNCTION(3, "ua0", "rts", V_88F6810_PLUS)),
46*4882a593Smuzhiyun MPP_MODE(5,
47*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
48*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "ge", "mdio", V_88F6810_PLUS),
49*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "ua1", "rxd", V_88F6810_PLUS),
50*4882a593Smuzhiyun MPP_VAR_FUNCTION(3, "ua0", "cts", V_88F6810_PLUS)),
51*4882a593Smuzhiyun MPP_MODE(6,
52*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
53*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "ge0", "txclkout", V_88F6810_PLUS),
54*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "ge0", "crs", V_88F6810_PLUS),
55*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "dev", "cs3", V_88F6810_PLUS)),
56*4882a593Smuzhiyun MPP_MODE(7,
57*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
58*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "ge0", "txd0", V_88F6810_PLUS),
59*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "dev", "ad9", V_88F6810_PLUS)),
60*4882a593Smuzhiyun MPP_MODE(8,
61*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
62*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "ge0", "txd1", V_88F6810_PLUS),
63*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "dev", "ad10", V_88F6810_PLUS)),
64*4882a593Smuzhiyun MPP_MODE(9,
65*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
66*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "ge0", "txd2", V_88F6810_PLUS),
67*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "dev", "ad11", V_88F6810_PLUS)),
68*4882a593Smuzhiyun MPP_MODE(10,
69*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
70*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "ge0", "txd3", V_88F6810_PLUS),
71*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "dev", "ad12", V_88F6810_PLUS)),
72*4882a593Smuzhiyun MPP_MODE(11,
73*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
74*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "ge0", "txctl", V_88F6810_PLUS),
75*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "dev", "ad13", V_88F6810_PLUS)),
76*4882a593Smuzhiyun MPP_MODE(12,
77*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
78*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "ge0", "rxd0", V_88F6810_PLUS),
79*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "pcie0", "rstout", V_88F6810_PLUS),
80*4882a593Smuzhiyun MPP_VAR_FUNCTION(4, "spi0", "cs1", V_88F6810_PLUS),
81*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "dev", "ad14", V_88F6810_PLUS),
82*4882a593Smuzhiyun MPP_VAR_FUNCTION(6, "pcie3", "clkreq", V_88F6810_PLUS)),
83*4882a593Smuzhiyun MPP_MODE(13,
84*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
85*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "ge0", "rxd1", V_88F6810_PLUS),
86*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "pcie0", "clkreq", V_88F6810_PLUS),
87*4882a593Smuzhiyun MPP_VAR_FUNCTION(3, "pcie1", "clkreq", V_88F6820_PLUS),
88*4882a593Smuzhiyun MPP_VAR_FUNCTION(4, "spi0", "cs2", V_88F6810_PLUS),
89*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "dev", "ad15", V_88F6810_PLUS),
90*4882a593Smuzhiyun MPP_VAR_FUNCTION(6, "pcie2", "clkreq", V_88F6810_PLUS)),
91*4882a593Smuzhiyun MPP_MODE(14,
92*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
93*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "ge0", "rxd2", V_88F6810_PLUS),
94*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "ptp", "clk", V_88F6810_PLUS),
95*4882a593Smuzhiyun MPP_VAR_FUNCTION(3, "dram", "vttctrl", V_88F6810_PLUS),
96*4882a593Smuzhiyun MPP_VAR_FUNCTION(4, "spi0", "cs3", V_88F6810_PLUS),
97*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "dev", "we1", V_88F6810_PLUS),
98*4882a593Smuzhiyun MPP_VAR_FUNCTION(6, "pcie3", "clkreq", V_88F6810_PLUS)),
99*4882a593Smuzhiyun MPP_MODE(15,
100*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
101*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "ge0", "rxd3", V_88F6810_PLUS),
102*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "ge", "mdc slave", V_88F6810_PLUS),
103*4882a593Smuzhiyun MPP_VAR_FUNCTION(3, "pcie0", "rstout", V_88F6810_PLUS),
104*4882a593Smuzhiyun MPP_VAR_FUNCTION(4, "spi0", "mosi", V_88F6810_PLUS)),
105*4882a593Smuzhiyun MPP_MODE(16,
106*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
107*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "ge0", "rxctl", V_88F6810_PLUS),
108*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "ge", "mdio slave", V_88F6810_PLUS),
109*4882a593Smuzhiyun MPP_VAR_FUNCTION(3, "dram", "deccerr", V_88F6810_PLUS),
110*4882a593Smuzhiyun MPP_VAR_FUNCTION(4, "spi0", "miso", V_88F6810_PLUS),
111*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "pcie0", "clkreq", V_88F6810_PLUS),
112*4882a593Smuzhiyun MPP_VAR_FUNCTION(6, "pcie1", "clkreq", V_88F6820_PLUS)),
113*4882a593Smuzhiyun MPP_MODE(17,
114*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
115*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "ge0", "rxclk", V_88F6810_PLUS),
116*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "ptp", "clk", V_88F6810_PLUS),
117*4882a593Smuzhiyun MPP_VAR_FUNCTION(3, "ua1", "rxd", V_88F6810_PLUS),
118*4882a593Smuzhiyun MPP_VAR_FUNCTION(4, "spi0", "sck", V_88F6810_PLUS),
119*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "sata1", "prsnt", V_88F6810_PLUS),
120*4882a593Smuzhiyun MPP_VAR_FUNCTION(6, "sata0", "prsnt", V_88F6810_PLUS)),
121*4882a593Smuzhiyun MPP_MODE(18,
122*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
123*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "ge0", "rxerr", V_88F6810_PLUS),
124*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "ptp", "trig", V_88F6810_PLUS),
125*4882a593Smuzhiyun MPP_VAR_FUNCTION(3, "ua1", "txd", V_88F6810_PLUS),
126*4882a593Smuzhiyun MPP_VAR_FUNCTION(4, "spi0", "cs0", V_88F6810_PLUS)),
127*4882a593Smuzhiyun MPP_MODE(19,
128*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
129*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "ge0", "col", V_88F6810_PLUS),
130*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "ptp", "evreq", V_88F6810_PLUS),
131*4882a593Smuzhiyun MPP_VAR_FUNCTION(3, "ge0", "txerr", V_88F6810_PLUS),
132*4882a593Smuzhiyun MPP_VAR_FUNCTION(4, "sata1", "prsnt", V_88F6810_PLUS),
133*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "ua0", "cts", V_88F6810_PLUS),
134*4882a593Smuzhiyun MPP_VAR_FUNCTION(6, "ua1", "rxd", V_88F6810_PLUS)),
135*4882a593Smuzhiyun MPP_MODE(20,
136*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
137*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "ge0", "txclk", V_88F6810_PLUS),
138*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "ptp", "clk", V_88F6810_PLUS),
139*4882a593Smuzhiyun MPP_VAR_FUNCTION(4, "sata0", "prsnt", V_88F6810_PLUS),
140*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "ua0", "rts", V_88F6810_PLUS),
141*4882a593Smuzhiyun MPP_VAR_FUNCTION(6, "ua1", "txd", V_88F6810_PLUS)),
142*4882a593Smuzhiyun MPP_MODE(21,
143*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
144*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "spi0", "cs1", V_88F6810_PLUS),
145*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "ge1", "rxd0", V_88F6810_PLUS),
146*4882a593Smuzhiyun MPP_VAR_FUNCTION(3, "sata0", "prsnt", V_88F6810_PLUS),
147*4882a593Smuzhiyun MPP_VAR_FUNCTION(4, "sd0", "cmd", V_88F6810_PLUS),
148*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "dev", "bootcs", V_88F6810_PLUS),
149*4882a593Smuzhiyun MPP_VAR_FUNCTION(6, "sata1", "prsnt", V_88F6810_PLUS)),
150*4882a593Smuzhiyun MPP_MODE(22,
151*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
152*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "spi0", "mosi", V_88F6810_PLUS),
153*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "dev", "ad0", V_88F6810_PLUS)),
154*4882a593Smuzhiyun MPP_MODE(23,
155*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
156*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "spi0", "sck", V_88F6810_PLUS),
157*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "dev", "ad2", V_88F6810_PLUS)),
158*4882a593Smuzhiyun MPP_MODE(24,
159*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
160*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "spi0", "miso", V_88F6810_PLUS),
161*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "ua0", "cts", V_88F6810_PLUS),
162*4882a593Smuzhiyun MPP_VAR_FUNCTION(3, "ua1", "rxd", V_88F6810_PLUS),
163*4882a593Smuzhiyun MPP_VAR_FUNCTION(4, "sd0", "d4", V_88F6810_PLUS),
164*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "dev", "ready", V_88F6810_PLUS)),
165*4882a593Smuzhiyun MPP_MODE(25,
166*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
167*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "spi0", "cs0", V_88F6810_PLUS),
168*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "ua0", "rts", V_88F6810_PLUS),
169*4882a593Smuzhiyun MPP_VAR_FUNCTION(3, "ua1", "txd", V_88F6810_PLUS),
170*4882a593Smuzhiyun MPP_VAR_FUNCTION(4, "sd0", "d5", V_88F6810_PLUS),
171*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "dev", "cs0", V_88F6810_PLUS)),
172*4882a593Smuzhiyun MPP_MODE(26,
173*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
174*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "spi0", "cs2", V_88F6810_PLUS),
175*4882a593Smuzhiyun MPP_VAR_FUNCTION(3, "i2c1", "sck", V_88F6810_PLUS),
176*4882a593Smuzhiyun MPP_VAR_FUNCTION(4, "sd0", "d6", V_88F6810_PLUS),
177*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "dev", "cs1", V_88F6810_PLUS)),
178*4882a593Smuzhiyun MPP_MODE(27,
179*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
180*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "spi0", "cs3", V_88F6810_PLUS),
181*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "ge1", "txclkout", V_88F6810_PLUS),
182*4882a593Smuzhiyun MPP_VAR_FUNCTION(3, "i2c1", "sda", V_88F6810_PLUS),
183*4882a593Smuzhiyun MPP_VAR_FUNCTION(4, "sd0", "d7", V_88F6810_PLUS),
184*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "dev", "cs2", V_88F6810_PLUS)),
185*4882a593Smuzhiyun MPP_MODE(28,
186*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
187*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "ge1", "txd0", V_88F6810_PLUS),
188*4882a593Smuzhiyun MPP_VAR_FUNCTION(4, "sd0", "clk", V_88F6810_PLUS),
189*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "dev", "ad5", V_88F6810_PLUS)),
190*4882a593Smuzhiyun MPP_MODE(29,
191*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
192*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "ge1", "txd1", V_88F6810_PLUS),
193*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "dev", "ale0", V_88F6810_PLUS)),
194*4882a593Smuzhiyun MPP_MODE(30,
195*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
196*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "ge1", "txd2", V_88F6810_PLUS),
197*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "dev", "oe", V_88F6810_PLUS)),
198*4882a593Smuzhiyun MPP_MODE(31,
199*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
200*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "ge1", "txd3", V_88F6810_PLUS),
201*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "dev", "ale1", V_88F6810_PLUS)),
202*4882a593Smuzhiyun MPP_MODE(32,
203*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
204*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "ge1", "txctl", V_88F6810_PLUS),
205*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "dev", "we0", V_88F6810_PLUS)),
206*4882a593Smuzhiyun MPP_MODE(33,
207*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
208*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "dram", "deccerr", V_88F6810_PLUS),
209*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "dev", "ad3", V_88F6810_PLUS)),
210*4882a593Smuzhiyun MPP_MODE(34,
211*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
212*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "dev", "ad1", V_88F6810_PLUS)),
213*4882a593Smuzhiyun MPP_MODE(35,
214*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
215*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "ref", "clk_out1", V_88F6810_PLUS),
216*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "dev", "a1", V_88F6810_PLUS)),
217*4882a593Smuzhiyun MPP_MODE(36,
218*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
219*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "ptp", "trig", V_88F6810_PLUS),
220*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "dev", "a0", V_88F6810_PLUS)),
221*4882a593Smuzhiyun MPP_MODE(37,
222*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
223*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "ptp", "clk", V_88F6810_PLUS),
224*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "ge1", "rxclk", V_88F6810_PLUS),
225*4882a593Smuzhiyun MPP_VAR_FUNCTION(4, "sd0", "d3", V_88F6810_PLUS),
226*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "dev", "ad8", V_88F6810_PLUS)),
227*4882a593Smuzhiyun MPP_MODE(38,
228*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
229*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "ptp", "evreq", V_88F6810_PLUS),
230*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "ge1", "rxd1", V_88F6810_PLUS),
231*4882a593Smuzhiyun MPP_VAR_FUNCTION(3, "ref", "clk_out0", V_88F6810_PLUS),
232*4882a593Smuzhiyun MPP_VAR_FUNCTION(4, "sd0", "d0", V_88F6810_PLUS),
233*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "dev", "ad4", V_88F6810_PLUS)),
234*4882a593Smuzhiyun MPP_MODE(39,
235*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
236*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "i2c1", "sck", V_88F6810_PLUS),
237*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "ge1", "rxd2", V_88F6810_PLUS),
238*4882a593Smuzhiyun MPP_VAR_FUNCTION(3, "ua0", "cts", V_88F6810_PLUS),
239*4882a593Smuzhiyun MPP_VAR_FUNCTION(4, "sd0", "d1", V_88F6810_PLUS),
240*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "dev", "a2", V_88F6810_PLUS)),
241*4882a593Smuzhiyun MPP_MODE(40,
242*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
243*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "i2c1", "sda", V_88F6810_PLUS),
244*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "ge1", "rxd3", V_88F6810_PLUS),
245*4882a593Smuzhiyun MPP_VAR_FUNCTION(3, "ua0", "rts", V_88F6810_PLUS),
246*4882a593Smuzhiyun MPP_VAR_FUNCTION(4, "sd0", "d2", V_88F6810_PLUS),
247*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "dev", "ad6", V_88F6810_PLUS)),
248*4882a593Smuzhiyun MPP_MODE(41,
249*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
250*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "ua1", "rxd", V_88F6810_PLUS),
251*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "ge1", "rxctl", V_88F6810_PLUS),
252*4882a593Smuzhiyun MPP_VAR_FUNCTION(3, "ua0", "cts", V_88F6810_PLUS),
253*4882a593Smuzhiyun MPP_VAR_FUNCTION(4, "spi1", "cs3", V_88F6810_PLUS),
254*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "dev", "burst/last", V_88F6810_PLUS),
255*4882a593Smuzhiyun MPP_VAR_FUNCTION(6, "nand", "rb0", V_88F6810_PLUS)),
256*4882a593Smuzhiyun MPP_MODE(42,
257*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
258*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "ua1", "txd", V_88F6810_PLUS),
259*4882a593Smuzhiyun MPP_VAR_FUNCTION(3, "ua0", "rts", V_88F6810_PLUS),
260*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "dev", "ad7", V_88F6810_PLUS)),
261*4882a593Smuzhiyun MPP_MODE(43,
262*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
263*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "pcie0", "clkreq", V_88F6810_PLUS),
264*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "dram", "vttctrl", V_88F6810_PLUS),
265*4882a593Smuzhiyun MPP_VAR_FUNCTION(3, "dram", "deccerr", V_88F6810_PLUS),
266*4882a593Smuzhiyun MPP_VAR_FUNCTION(4, "spi1", "cs2", V_88F6810_PLUS),
267*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "dev", "clkout", V_88F6810_PLUS),
268*4882a593Smuzhiyun MPP_VAR_FUNCTION(6, "nand", "rb1", V_88F6810_PLUS)),
269*4882a593Smuzhiyun MPP_MODE(44,
270*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
271*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "sata0", "prsnt", V_88F6810_PLUS),
272*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "sata1", "prsnt", V_88F6810_PLUS),
273*4882a593Smuzhiyun MPP_VAR_FUNCTION(3, "sata2", "prsnt", V_88F6828),
274*4882a593Smuzhiyun MPP_VAR_FUNCTION(4, "sata3", "prsnt", V_88F6828)),
275*4882a593Smuzhiyun MPP_MODE(45,
276*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
277*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "ref", "clk_out0", V_88F6810_PLUS),
278*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "pcie0", "rstout", V_88F6810_PLUS),
279*4882a593Smuzhiyun MPP_VAR_FUNCTION(6, "ua1", "rxd", V_88F6810_PLUS)),
280*4882a593Smuzhiyun MPP_MODE(46,
281*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
282*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "ref", "clk_out1", V_88F6810_PLUS),
283*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "pcie0", "rstout", V_88F6810_PLUS),
284*4882a593Smuzhiyun MPP_VAR_FUNCTION(6, "ua1", "txd", V_88F6810_PLUS)),
285*4882a593Smuzhiyun MPP_MODE(47,
286*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
287*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "sata0", "prsnt", V_88F6810_PLUS),
288*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "sata1", "prsnt", V_88F6810_PLUS),
289*4882a593Smuzhiyun MPP_VAR_FUNCTION(3, "sata2", "prsnt", V_88F6828),
290*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "sata3", "prsnt", V_88F6828)),
291*4882a593Smuzhiyun MPP_MODE(48,
292*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
293*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "sata0", "prsnt", V_88F6810_PLUS),
294*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "dram", "vttctrl", V_88F6810_PLUS),
295*4882a593Smuzhiyun MPP_VAR_FUNCTION(3, "tdm", "pclk", V_88F6810_PLUS),
296*4882a593Smuzhiyun MPP_VAR_FUNCTION(4, "audio", "mclk", V_88F6810_PLUS),
297*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "sd0", "d4", V_88F6810_PLUS),
298*4882a593Smuzhiyun MPP_VAR_FUNCTION(6, "pcie0", "clkreq", V_88F6810_PLUS)),
299*4882a593Smuzhiyun MPP_MODE(49,
300*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
301*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "sata2", "prsnt", V_88F6828),
302*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "sata3", "prsnt", V_88F6828),
303*4882a593Smuzhiyun MPP_VAR_FUNCTION(3, "tdm", "fsync", V_88F6810_PLUS),
304*4882a593Smuzhiyun MPP_VAR_FUNCTION(4, "audio", "lrclk", V_88F6810_PLUS),
305*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "sd0", "d5", V_88F6810_PLUS),
306*4882a593Smuzhiyun MPP_VAR_FUNCTION(6, "pcie1", "clkreq", V_88F6820_PLUS)),
307*4882a593Smuzhiyun MPP_MODE(50,
308*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
309*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "pcie0", "rstout", V_88F6810_PLUS),
310*4882a593Smuzhiyun MPP_VAR_FUNCTION(3, "tdm", "drx", V_88F6810_PLUS),
311*4882a593Smuzhiyun MPP_VAR_FUNCTION(4, "audio", "extclk", V_88F6810_PLUS),
312*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "sd0", "cmd", V_88F6810_PLUS)),
313*4882a593Smuzhiyun MPP_MODE(51,
314*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
315*4882a593Smuzhiyun MPP_VAR_FUNCTION(3, "tdm", "dtx", V_88F6810_PLUS),
316*4882a593Smuzhiyun MPP_VAR_FUNCTION(4, "audio", "sdo", V_88F6810_PLUS),
317*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "dram", "deccerr", V_88F6810_PLUS),
318*4882a593Smuzhiyun MPP_VAR_FUNCTION(6, "ptp", "trig", V_88F6810_PLUS)),
319*4882a593Smuzhiyun MPP_MODE(52,
320*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
321*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "pcie0", "rstout", V_88F6810_PLUS),
322*4882a593Smuzhiyun MPP_VAR_FUNCTION(3, "tdm", "int", V_88F6810_PLUS),
323*4882a593Smuzhiyun MPP_VAR_FUNCTION(4, "audio", "sdi", V_88F6810_PLUS),
324*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "sd0", "d6", V_88F6810_PLUS),
325*4882a593Smuzhiyun MPP_VAR_FUNCTION(6, "ptp", "clk", V_88F6810_PLUS)),
326*4882a593Smuzhiyun MPP_MODE(53,
327*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
328*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "sata1", "prsnt", V_88F6810_PLUS),
329*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "sata0", "prsnt", V_88F6810_PLUS),
330*4882a593Smuzhiyun MPP_VAR_FUNCTION(3, "tdm", "rst", V_88F6810_PLUS),
331*4882a593Smuzhiyun MPP_VAR_FUNCTION(4, "audio", "bclk", V_88F6810_PLUS),
332*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "sd0", "d7", V_88F6810_PLUS),
333*4882a593Smuzhiyun MPP_VAR_FUNCTION(6, "ptp", "evreq", V_88F6810_PLUS)),
334*4882a593Smuzhiyun MPP_MODE(54,
335*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
336*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "sata0", "prsnt", V_88F6810_PLUS),
337*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "sata1", "prsnt", V_88F6810_PLUS),
338*4882a593Smuzhiyun MPP_VAR_FUNCTION(3, "pcie0", "rstout", V_88F6810_PLUS),
339*4882a593Smuzhiyun MPP_VAR_FUNCTION(4, "ge0", "txerr", V_88F6810_PLUS),
340*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "sd0", "d3", V_88F6810_PLUS)),
341*4882a593Smuzhiyun MPP_MODE(55,
342*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
343*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "ua1", "cts", V_88F6810_PLUS),
344*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "ge", "mdio", V_88F6810_PLUS),
345*4882a593Smuzhiyun MPP_VAR_FUNCTION(3, "pcie1", "clkreq", V_88F6820_PLUS),
346*4882a593Smuzhiyun MPP_VAR_FUNCTION(4, "spi1", "cs1", V_88F6810_PLUS),
347*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "sd0", "d0", V_88F6810_PLUS),
348*4882a593Smuzhiyun MPP_VAR_FUNCTION(6, "ua1", "rxd", V_88F6810_PLUS)),
349*4882a593Smuzhiyun MPP_MODE(56,
350*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
351*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "ua1", "rts", V_88F6810_PLUS),
352*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "ge", "mdc", V_88F6810_PLUS),
353*4882a593Smuzhiyun MPP_VAR_FUNCTION(3, "dram", "deccerr", V_88F6810_PLUS),
354*4882a593Smuzhiyun MPP_VAR_FUNCTION(4, "spi1", "mosi", V_88F6810_PLUS),
355*4882a593Smuzhiyun MPP_VAR_FUNCTION(6, "ua1", "txd", V_88F6810_PLUS)),
356*4882a593Smuzhiyun MPP_MODE(57,
357*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
358*4882a593Smuzhiyun MPP_VAR_FUNCTION(4, "spi1", "sck", V_88F6810_PLUS),
359*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "sd0", "clk", V_88F6810_PLUS),
360*4882a593Smuzhiyun MPP_VAR_FUNCTION(6, "ua1", "txd", V_88F6810_PLUS)),
361*4882a593Smuzhiyun MPP_MODE(58,
362*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
363*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "pcie1", "clkreq", V_88F6820_PLUS),
364*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "i2c1", "sck", V_88F6810_PLUS),
365*4882a593Smuzhiyun MPP_VAR_FUNCTION(3, "pcie2", "clkreq", V_88F6810_PLUS),
366*4882a593Smuzhiyun MPP_VAR_FUNCTION(4, "spi1", "miso", V_88F6810_PLUS),
367*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "sd0", "d1", V_88F6810_PLUS),
368*4882a593Smuzhiyun MPP_VAR_FUNCTION(6, "ua1", "rxd", V_88F6810_PLUS)),
369*4882a593Smuzhiyun MPP_MODE(59,
370*4882a593Smuzhiyun MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
371*4882a593Smuzhiyun MPP_VAR_FUNCTION(1, "pcie0", "rstout", V_88F6810_PLUS),
372*4882a593Smuzhiyun MPP_VAR_FUNCTION(2, "i2c1", "sda", V_88F6810_PLUS),
373*4882a593Smuzhiyun MPP_VAR_FUNCTION(4, "spi1", "cs0", V_88F6810_PLUS),
374*4882a593Smuzhiyun MPP_VAR_FUNCTION(5, "sd0", "d2", V_88F6810_PLUS)),
375*4882a593Smuzhiyun };
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun static struct mvebu_pinctrl_soc_info armada_38x_pinctrl_info;
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun static const struct of_device_id armada_38x_pinctrl_of_match[] = {
380*4882a593Smuzhiyun {
381*4882a593Smuzhiyun .compatible = "marvell,mv88f6810-pinctrl",
382*4882a593Smuzhiyun .data = (void *) V_88F6810,
383*4882a593Smuzhiyun },
384*4882a593Smuzhiyun {
385*4882a593Smuzhiyun .compatible = "marvell,mv88f6820-pinctrl",
386*4882a593Smuzhiyun .data = (void *) V_88F6820,
387*4882a593Smuzhiyun },
388*4882a593Smuzhiyun {
389*4882a593Smuzhiyun .compatible = "marvell,mv88f6828-pinctrl",
390*4882a593Smuzhiyun .data = (void *) V_88F6828,
391*4882a593Smuzhiyun },
392*4882a593Smuzhiyun { },
393*4882a593Smuzhiyun };
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun static const struct mvebu_mpp_ctrl armada_38x_mpp_controls[] = {
396*4882a593Smuzhiyun MPP_FUNC_CTRL(0, 59, NULL, mvebu_mmio_mpp_ctrl),
397*4882a593Smuzhiyun };
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun static struct pinctrl_gpio_range armada_38x_mpp_gpio_ranges[] = {
400*4882a593Smuzhiyun MPP_GPIO_RANGE(0, 0, 0, 32),
401*4882a593Smuzhiyun MPP_GPIO_RANGE(1, 32, 32, 28),
402*4882a593Smuzhiyun };
403*4882a593Smuzhiyun
armada_38x_pinctrl_probe(struct platform_device * pdev)404*4882a593Smuzhiyun static int armada_38x_pinctrl_probe(struct platform_device *pdev)
405*4882a593Smuzhiyun {
406*4882a593Smuzhiyun struct mvebu_pinctrl_soc_info *soc = &armada_38x_pinctrl_info;
407*4882a593Smuzhiyun const struct of_device_id *match =
408*4882a593Smuzhiyun of_match_device(armada_38x_pinctrl_of_match, &pdev->dev);
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun if (!match)
411*4882a593Smuzhiyun return -ENODEV;
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun soc->variant = (unsigned) match->data & 0xff;
414*4882a593Smuzhiyun soc->controls = armada_38x_mpp_controls;
415*4882a593Smuzhiyun soc->ncontrols = ARRAY_SIZE(armada_38x_mpp_controls);
416*4882a593Smuzhiyun soc->gpioranges = armada_38x_mpp_gpio_ranges;
417*4882a593Smuzhiyun soc->ngpioranges = ARRAY_SIZE(armada_38x_mpp_gpio_ranges);
418*4882a593Smuzhiyun soc->modes = armada_38x_mpp_modes;
419*4882a593Smuzhiyun soc->nmodes = armada_38x_mpp_controls[0].npins;
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun pdev->dev.platform_data = soc;
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun return mvebu_pinctrl_simple_mmio_probe(pdev);
424*4882a593Smuzhiyun }
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun static struct platform_driver armada_38x_pinctrl_driver = {
427*4882a593Smuzhiyun .driver = {
428*4882a593Smuzhiyun .name = "armada-38x-pinctrl",
429*4882a593Smuzhiyun .of_match_table = of_match_ptr(armada_38x_pinctrl_of_match),
430*4882a593Smuzhiyun },
431*4882a593Smuzhiyun .probe = armada_38x_pinctrl_probe,
432*4882a593Smuzhiyun };
433*4882a593Smuzhiyun builtin_platform_driver(armada_38x_pinctrl_driver);
434