1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * First generation of pinmux driver for Amlogic Meson SoCs 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com> 6*4882a593Smuzhiyun * Copyright (C) 2017 Jerome Brunet <jbrunet@baylibre.com> 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun struct meson8_pmx_data { 10*4882a593Smuzhiyun bool is_gpio; 11*4882a593Smuzhiyun unsigned int reg; 12*4882a593Smuzhiyun unsigned int bit; 13*4882a593Smuzhiyun }; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define PMX_DATA(r, b, g) \ 16*4882a593Smuzhiyun { \ 17*4882a593Smuzhiyun .reg = r, \ 18*4882a593Smuzhiyun .bit = b, \ 19*4882a593Smuzhiyun .is_gpio = g, \ 20*4882a593Smuzhiyun } 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #define GROUP(grp, r, b) \ 23*4882a593Smuzhiyun { \ 24*4882a593Smuzhiyun .name = #grp, \ 25*4882a593Smuzhiyun .pins = grp ## _pins, \ 26*4882a593Smuzhiyun .num_pins = ARRAY_SIZE(grp ## _pins), \ 27*4882a593Smuzhiyun .data = (const struct meson8_pmx_data[]){ \ 28*4882a593Smuzhiyun PMX_DATA(r, b, false), \ 29*4882a593Smuzhiyun }, \ 30*4882a593Smuzhiyun } 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun #define GPIO_GROUP(gpio) \ 33*4882a593Smuzhiyun { \ 34*4882a593Smuzhiyun .name = #gpio, \ 35*4882a593Smuzhiyun .pins = (const unsigned int[]){ gpio }, \ 36*4882a593Smuzhiyun .num_pins = 1, \ 37*4882a593Smuzhiyun .data = (const struct meson8_pmx_data[]){ \ 38*4882a593Smuzhiyun PMX_DATA(0, 0, true), \ 39*4882a593Smuzhiyun }, \ 40*4882a593Smuzhiyun } 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun extern const struct pinmux_ops meson8_pmx_ops; 43